Semiconductor device and method for manufacturing the same

Abstract

The present application provides a semiconductor device and a method for preparing the same. The present application uses a SiC pre-buffer layer as a buffer structure between the Si substrate and the epitaxial layer, which can ensure the growth quality of the epitaxial film. In addition, since the traditional processes of pre-laying an aluminum layer and growing a low-temperature aluminum nitride buffer layer are omitted, the buffer layer process of the semiconductor device can be simplified and the risk of parasitic reactions occurring during the process can be reduced. In addition, the present application avoids the problem of leakage caused by the diffusion of Al into the Si substrate in the traditional pre-laying aluminum layer, which causes the Si substrate to conduct electricity, thereby reducing the risk of leakage in the semiconductor device.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for preparing the same. Background Art

[0002] The third-generation wide bandgap direct bandgap semiconductor materials represented by GaN are new semiconductor materials that have received much attention internationally in recent years. Their excellent physical and chemical stability, high saturated electron drift velocity, high breakdown field strength and high thermal conductivity make them the most preferred material for the preparation of short-wavelength semiconductor optoelectronic devices and high-frequency, high-voltage and high-temperature microelectronic devices.

[0003] Traditionally, the substrates for growing GaN thin films in this field are mostly sapphire (Al2O3), lithium aluminate (LiAlO2), silicon carbide (SiC), gallium arsenide (GaAs), etc. Among them, epitaxial growth of GaN thin films on sapphire and SiC substrates is very mature, but the prices of sapphire and SiC are relatively high, especially SiC. In addition, due to the poor heat dissipation performance of sapphire itself, it is difficult to achieve large-scale epitaxial growth using sapphire as a substrate, which greatly increases the manufacturing cost.

[0004] At present, GaN thin films are usually grown epitaxially on Si substrates, which have advantages such as good thermal conductivity and are conducive to large-scale epitaxial growth, which greatly reduces the production cost of GaN thin films and makes them more competitive in the market. However, due to the serious lattice mismatch between Si and GaN (lattice mismatch rate of 17%), thermal mismatch and melt-back etching, cracks and uneven surface morphology are easily caused in GaN epitaxial films.

[0005] In view of this, it is usually necessary to pre-lay an aluminum layer on the Si substrate, grow a low-temperature aluminum nitride (AlN) buffer layer and a high-temperature aluminum nitride (AlN) buffer layer, and then grow a GaN film. As a result, the current buffer layer process between the Si substrate and the GaN film is relatively complicated and time-consuming, parasitic reactions are prone to occur during the process, and there is a high risk of leakage. Summary of the invention

[0006] The present application provides a semiconductor device and a method for preparing the same, which can simplify the buffer layer process of the semiconductor device, reduce the risk of parasitic reactions occurring during the process, and reduce the risk of leakage of the semiconductor device.

[0007] The present application provides a method for preparing a semiconductor device, which comprises: providing a Si substrate; forming a SiC pre-buffer layer on the Si substrate, wherein the SiC pre-buffer layer comprises SiC having an amorphous structure; and forming an epitaxial layer on a side of the SiC pre-buffer layer away from the Si substrate.

[0008] In one embodiment of the present application, the step of forming a SiC pre-buffer layer on a Si substrate includes: growing a SiC film layer on the Si substrate, and controlling the thickness of the SiC film layer to be less than 1 nm, thereby forming a SiC pre-buffer layer.

[0009] In one embodiment of the present application, a SiC film layer is grown on a Si substrate, and the thickness of the SiC film layer is controlled to be less than 3 nm, and the step of forming a SiC pre-buffer layer includes: saturated adsorption of CO on the surface of the Si substrate; and deoxidation of CO to form a SiC film layer with a thickness of less than 1 nm.

[0010] In one embodiment of the present application, the step of saturated adsorption of CO on the surface of the Si substrate includes: in an atmosphere at a temperature of 900°C, introducing a mixed gas with a CO concentration of 1%-1.5%, wherein the flow rate is 5000sccm-5500sccm, the duration is not less than 15min, and the gas pressure is 800mbar, so as to complete the saturated adsorption of CO on the surface of the Si substrate; the step of deoxidizing CO to form a SiC film layer with a thickness of less than 1nm includes: keeping the total flow rate of the introduced gas and the CO flow rate unchanged, gradually reducing the flow rate of the carrier gas in the mixed gas and gradually increasing the flow rate of H2, so that the reaction gas is switched to CO and H2, and the ambient temperature is heated to 1100°C from the beginning of gas switching, and performing deoxidation treatment to form a single layer of Si-C bonds on the surface of the Si substrate, thereby forming a SiC film layer with a thickness of less than 1nm, wherein the duration of gas switching is 2min, and the time for keeping the flow rates of each introduced gas unchanged after the gas switching is completed is no more than 120s, and the gas pressure of the reaction chamber is kept unchanged.

[0011] In one embodiment of the present application, before the step of forming a SiC pre-buffer layer on the Si substrate, the step includes: cleaning the surface of the Si substrate in an H2 atmosphere.

[0012] Accordingly, the present application also provides a semiconductor device. The semiconductor device includes a Si substrate. The semiconductor device also includes a SiC pre-buffer layer provided on the Si substrate, wherein the SiC pre-buffer layer includes SiC having an amorphous structure. The semiconductor device also includes an epitaxial layer provided on a side of the SiC pre-buffer layer away from the Si substrate.

[0013] In one embodiment of the present application, the thickness of the SiC pre-buffer layer is less than 1 nm.

[0014] In one embodiment of the present application, the SiC pre-buffer layer has a Si—C bond structure of a single carbon atom layer.

[0015] In one embodiment of the present application, the SiC pre-buffer layer includes at least a C-plane that can be epitaxially grown, and the epitaxial layer includes an Al2O3 layer directly contacting the C-plane of the SiC pre-buffer layer. x Ga(1-x) N buffer layer.

[0016] In one embodiment of the present application, the SiC pre-buffer layer includes at least a C-plane that can be epitaxially grown, and the epitaxial layer includes a first GaN buffer layer directly contacting the C-plane of the SiC pre-buffer layer.

[0017] In one embodiment of the present application, the SiC pre-buffer layer includes at least a C-plane that can be epitaxially grown, and the epitaxial layer includes Al x Ga (1-x) The semiconductor device also includes an AlN buffer layer, which is disposed between the SiC pre-buffer layer and the Al x Ga (1-x) N buffer layers, and the AlN buffer layer directly contacts the C-surface of the SiC pre-buffer layer.

[0018] The beneficial effects of the present application are as follows: Different from the prior art, the present application provides a semiconductor device and a method for manufacturing the same. In the preparation method, a Si substrate is provided, and a SiC pre-buffer layer is formed on the Si substrate. The SiC pre-buffer layer includes SiC having an amorphous structure. The SiC pre-buffer layer of the present application has a high lattice matching rate with the Si substrate and with the epitaxial layer.

[0019] In other words, the present application uses the SiC pre-buffer layer as a buffer structure between the Si substrate and the epitaxial layer, which can ensure the growth quality of the epitaxial film. In addition, since the traditional process of pre-laying the aluminum layer and growing the low-temperature aluminum nitride buffer layer is omitted, the buffer layer process of the semiconductor device can be simplified and the risk of parasitic reactions occurring during the process can be reduced. In addition, the present application avoids the problem of leakage caused by the diffusion of Al into the Si substrate in the traditional pre-laying aluminum layer, which causes the Si substrate to conduct electricity, thereby reducing the risk of leakage in the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 is a schematic structural diagram of a first embodiment of a semiconductor device of the present application;

[0022] Figure 2 This application Al x Ga (1-x) A schematic structural diagram of a first embodiment of an N buffer layer;

[0023] Figure 3 This application Alx Ga (1-x) A schematic structural diagram of a second embodiment of an N buffer layer;

[0024] Figure 4 is a schematic structural diagram of a second embodiment of a semiconductor device of the present application;

[0025] Figure 5 is a schematic structural diagram of a third embodiment of a semiconductor device of the present application;

[0026] Figure 6 It is a schematic flow chart of a first embodiment of a method for preparing a semiconductor device of the present application;

[0027] Figure 7 It is a schematic flow chart of a second embodiment of a method for preparing a semiconductor device of the present application;

[0028] Figure 8 It is a schematic diagram of an embodiment of the formation process of the SiC pre-buffer layer of the present application.

[0029] Description of reference numerals:

[0030] Si substrate 10;

[0031] SiC pre-buffer layer 20;

[0032] Epitaxial layer 30;

[0033] Al x Ga (1-x) N buffer layer 31, AlGaN buffer layer 311, second GaN buffer layer 312;

[0034] A first GaN buffer layer 32;

[0035] Channel layer 33;

[0036] Insertion layer 34;

[0037] Barrier layer 35;

[0038] Cap layer 36;

[0039] Device layer 37;

[0040] AlN buffer layer 40 . DETAILED DESCRIPTION

[0041] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application and are not used to limit the present application. In the present application, unless otherwise stated, the directional words used, such as "up", "down", "left", and "right", generally refer to the up, down, left, and right of the device in actual use or working state, specifically the drawing direction in the accompanying drawings.

[0042] The present application provides a semiconductor device and a method for manufacturing the same, which are described in detail below. It should be noted that the description order of the following embodiments does not limit the preferred order of the embodiments of the present application. In the following embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0043] See also Figure 1 , Figure 1 It is a schematic structural diagram of the first embodiment of the semiconductor device of the present application.

[0044] In one embodiment, the semiconductor device of this embodiment may be a device using a buffer structure such as a buffer layer on a heterogeneous substrate using a MOCVD (Metal-organic Chemical Vapor Deposition) process. For example, the semiconductor device of this embodiment may specifically be a high electron mobility transistor (HEMT), a polarization doped field effect transistor (POLFET), a metal semiconductor field effect transistor (MESFET), a diode (LED), a diode laser, and a current aperture vertical electron transistor (CAVET). The following description takes the semiconductor device of the embodiment of the present application as a HEMT as an example, which is for example only and does not limit the type of the semiconductor device of the embodiment of the present application.

[0045] Specifically, the semiconductor device includes a Si substrate 10. The Si substrate 10 of this embodiment has better heat dissipation performance than a traditional sapphire substrate, which is conducive to achieving large-size epitaxial growth, thereby helping to reduce the manufacturing cost of the semiconductor device. Moreover, the Si substrate 10 of this embodiment has a lower cost than a traditional SiC substrate, which is conducive to reducing the manufacturing cost of the semiconductor device.

[0046] The semiconductor device further includes a SiC pre-buffer layer 20 and an epitaxial layer 30. The SiC pre-buffer layer 20 is disposed on the Si substrate 10, and the epitaxial layer 30 is disposed on the side of the SiC pre-buffer layer 20 away from the Si substrate 10. Considering that there are relatively serious lattice mismatch, thermal mismatch, and melt-back etching between the Si substrate 10 and at least part of the film layer in the epitaxial layer 30, for example, there are relatively serious lattice mismatch (lattice mismatch rate of 17%), thermal mismatch, and melt-back etching between the Si substrate 10 and the GaN film, which easily lead to cracks in the film of the epitaxial layer 30, uneven surface morphology, and the like. In addition, considering that there is a high lattice adaptation rate between the Si substrate 10 and the SiC pre-buffer layer 20 and between the SiC pre-buffer layer 20 and the epitaxial layer 30, the present embodiment uses the SiC pre-buffer layer 20 as a buffer structure between the Si substrate 10 and the epitaxial layer 30 to reduce the risk of cracks in the epitaxial film layer, uneven surface morphology, and the like, thereby ensuring the growth quality of the epitaxial film.

[0047] Compared with the conventional buffer layer process of pre-laying an aluminum layer on the Si substrate 10, growing a low-temperature aluminum nitride (AlN) buffer layer, a high-temperature aluminum nitride (AlN) buffer layer, and then growing a GaN film, this embodiment at least saves the process steps of pre-laying an aluminum layer and growing a low-temperature aluminum nitride (AlN) buffer layer, thereby simplifying the buffer layer process of the semiconductor device and reducing the risk of parasitic reactions during the process. In the conventional buffer layer process, Al in the aluminum layer easily diffuses to the Si substrate 10, causing the Si substrate 10 to be conductive and causing the risk of leakage. This embodiment omits the pre-laid aluminum layer in the conventional buffer layer process, which can reduce the risk of leakage of the semiconductor device and avoid the problem of low mobility of Al adsorbed atoms on the growth surface.

[0048] In one embodiment, the SiC pre-buffer layer 20 includes SiC having an amorphous structure. Further, it may be an amorphous structure SiC in the form of a thin layer formed on the surface of the Si substrate 10. Compared with SiC having a cubic lattice structure, such as 3C-SiC, the SiC having an amorphous structure in this embodiment has not formed a fixed crystal form, and the lattice adaptation rate of the SiC having an amorphous structure and the heterogeneous film layer epitaxially grown thereon is least affected by the lattice constant of the lower film layer, so that the lattice adaptation rate of the SiC having an amorphous structure in this embodiment and the heterogeneous film layer thereon is greater than the lattice adaptation rate of the SiC having a cubic lattice structure and the heterogeneous film layer thereon, which is beneficial to ensure the growth quality of the thin film.

[0049] It should be noted that the SiC with amorphous structure in this embodiment has a very small thickness (less than 1 nm as described below). In the existing process, the SiC thin layer can be formed by carbonization of the surface of the Si substrate 10, and only a carbon source needs to be introduced into the reaction chamber, and there is no need to introduce a silicon source (such as silane, etc.) into the reaction chamber, so the SiC thin layer can be obtained quickly and easily. However, during the carbonization process, since C will be replaced with deep Si, an additional "silicon source" will be obtained, which will easily promote the "epitaxialization" of SiC into the substrate. Therefore, the SiC thin layer obtained by the currently known surface carbonization process will basically form a stable crystal form, and 3C-SiC is the main one. At the same time, during the reaction, it is necessary to strictly control the amount of carbon source introduced and the reaction time to limit the thickness of SiC, and the controllability is very poor. Therefore, it should be noted that the process requirements for forming the SiC with amorphous structure in this embodiment are very different from the process requirements for forming a SiC thin layer in the existing process, and the surface deposited amorphous SiC in this embodiment and the existing SiC thin layer are also very different. In particular, when the C-plane of the amorphous SiC layer is required to be a subsequent epitaxial plane, ordinary carbonization or epitaxy cannot guarantee the realization of this feature.

[0050] Since SiC with an amorphous structure has not yet formed a stable lattice, the stability of its covalent bonds varies greatly. Especially when the C-plane of SiC is used as the epitaxial plane, some of its carbon atoms are more likely to be adsorbed and react with the precursors of subsequent processes on the surface, thereby inducing other carbon atoms to be adsorbed and react on the surface, which is beneficial to the formation of crystal nuclei of subsequent film layers and the formation of island bundle growth, thereby improving the growth efficiency and growth quality of subsequent film layers.

[0051] In addition, since the SiC with an amorphous structure in this embodiment has a smaller thickness, and the substrate is a Si substrate 10, and the growth surface of the SiC pre-buffer layer 20 used to grow the subsequent film layer is a carbon surface, the structural stress of the film layer grown on the carbon surface is much smaller than the structural stress of the film layer grown on the silicon surface. Therefore, this embodiment can also improve the growth quality of the film layer by reducing the structural stress of the film layer.

[0052] Furthermore, the thickness of the SiC pre-buffer layer 20 is less than 1 nm. Furthermore, the SiC pre-buffer layer 20 is a Si-C bond structure of a single carbon atom layer, that is, the SiC in the SiC pre-buffer layer 20 can be reliably made to present an amorphous structure, and it does not form a fixed crystal form. In this way, by reasonably controlling the thickness of the SiC pre-buffer layer 20, the thickness of the SiC pre-buffer layer is not enough to form a fixed crystal form of the SiC therein, thereby ensuring that SiC with an amorphous structure is formed in the SiC pre-buffer layer.

[0053] In one embodiment, the semiconductor device includes a Si substrate 10, a SiC pre-buffer layer 20 and an epitaxial layer 30. The SiC pre-buffer layer 20 is disposed on the Si substrate 10, and the epitaxial layer 30 is disposed on a side of the SiC pre-buffer layer 20 away from the Si substrate 10. Further, the SiC pre-buffer layer 20 includes a C-face that can be epitaxially grown, and the epitaxial layer 30 is in contact with the aforementioned C-face.

[0054] The epitaxial layer 30 includes Al x Ga (1-x) The semiconductor device further includes an AlN buffer layer 40. The AlN buffer layer 40 is disposed between the SiC pre-buffer layer 20 and the Al x Ga (1-x) The AlN buffer layer 40 is in direct contact with the C surface of the SiC pre-buffer layer 20. x Ga (1-x) By forming the AlN buffer layer 40 between the N buffer layers 31 , the lattice matching rate between the layers of the semiconductor device is improved.

[0055] It should be noted that the direct contact between the film layers in the embodiment of the present application should be understood as the two film layers not being in contact through other film layers, for example, the AlN buffer layer 40 and the SiC pre-buffer layer 20 are not in contact with other film layers.

[0056] The AlN buffer layer 40 of this embodiment is a high-quality AlN buffer layer 40. Compared with the conventional buffer layer process of pre-laying an aluminum layer on the Si substrate 10, growing a low-temperature aluminum nitride (AlN) buffer layer, a high-temperature aluminum nitride (AlN) buffer layer, and then growing a GaN film, this embodiment saves the process steps of pre-laying an aluminum layer and growing a low-temperature aluminum nitride (AlN) buffer layer.

[0057] Furthermore, the epitaxial layer 30 further includes a first GaN buffer layer 32. The first GaN buffer layer 32 is a high-resistance buffer layer. The first GaN buffer layer 32 may be a C / Fe-doped GaN buffer layer. The first GaN buffer layer 32 is used to reduce the leakage current of the semiconductor device buffer layer and improve the breakdown voltage of the semiconductor device, that is, to enable the semiconductor device to operate in a higher voltage environment.

[0058] Please also read Figure 2 The first GaN buffer layer 32 is provided on the Al x Ga (1-x) The N buffer layer 31 is located away from the side of the SiC pre-buffer layer 20. In order to improve the lattice matching rate between the AlN buffer layer 40 and the first GaN buffer layer 32, the Al x Ga (1-x) The number of N buffer layers 31 is at least two. xGa (1-x) The N buffer layers 31 are stacked in sequence in a direction away from the SiC pre-buffer layer 20, wherein each Al x Ga (1-x) The Al composition x in the N buffer layer 31 decreases layer by layer in a direction away from the SiC pre-buffer layer 20 .

[0059] In other words, Al with a higher Al content x x Ga (1-x) The lattice matching rate between the N buffer layer 31 and the AlN buffer layer 40 is high, so the AlN buffer layer with a higher Al component x x Ga (1-x) The N buffer layer 31 is close to the AlN buffer layer 40. x Ga (1-x) The lattice matching rate between the N buffer layer 31 and the first GaN buffer layer 32 is high, so the Al component x is low. x Ga (1-x) The N buffer layer 31 is close to the first GaN buffer layer 32. x Ga (1-x) The N buffer layer 31 enables the AlN buffer layer 40 and the first GaN buffer layer 32 to have a higher lattice matching rate between the film layers.

[0060] Please also read Figure 3 In an alternative embodiment, Al x Ga (1-x) The N buffer layer 31 includes an AlGaN buffer layer 311 and a second GaN buffer layer 312. The AlGaN buffer layer 311 and the second GaN buffer layer 312 are alternately stacked one by one in a direction away from the SiC pre-buffer layer 20 to eliminate stress and reduce Al x Ga (1-x) The risk of deformation and warping of the N buffer layer 31.

[0061] In this embodiment, the epitaxial layer 30 further includes a channel layer 33, an insertion layer 34, a barrier layer 35, a cap layer 36 and a device layer 37. The channel layer 33, the insertion layer 34, the barrier layer 35, the cap layer 36 and the device layer 37 are stacked in sequence in a direction away from the SiC pre-buffer layer 20. The channel layer 33 may be made of undoped GaN. A two-dimensional electron gas is formed between the channel layer 33 and the barrier layer 35. The insertion layer 34 may be made of AlN. The barrier layer 35 may be made of Al x Ga (1-x) N. The cap layer 36 may be GaN. The device layer 37 includes a source electrode, a drain electrode, a gate electrode, and the like.

[0062] See also Figure 4 , Figure 41 is a schematic diagram of the structure of the second embodiment of the semiconductor device of the present application. The difference between this embodiment and the above embodiment is that the Al2O3 is directly deposited on the SiC pre-buffer layer 20. x Ga (1-x) N buffer layer 31 .

[0063] In this embodiment, Al x Ga (1-x) The N buffer layer 31 directly contacts the C surface of the SiC pre-buffer layer 20. x Ga (1-x) The N buffer layer 31 also has a high lattice adaptation rate, so it is allowed to directly deposit and grow Al on the SiC pre-buffer layer 20. x Ga (1-x) The N buffer layer 31 can save the process of depositing the AlN buffer layer in the above embodiment, which is further beneficial to simplifying the buffer layer process of the semiconductor device.

[0064] Furthermore, for low-frequency semiconductor devices, it is allowed not to set an AlN buffer layer for isolation, so in this embodiment, AlN is directly deposited on the SiC pre-buffer layer 20 to form x Ga (1-x) The N buffer layer 31 is particularly suitable for the process technology of low-frequency semiconductor devices. x Ga (1-x) The method of depositing an AlN buffer layer between the N buffer layers 31 is more suitable for the manufacturing process of high-frequency semiconductor devices.

[0065] It should be noted that for SiC with cubic lattice structure, the cubic lattice structure of SiC and GaN / Al x Ga (1-x) The lattice matching rate of N is low, and it is often necessary to x Ga (1-x) The use of AlN as buffer between N will inevitably lead to the buffer layer process of semiconductor devices being more complicated and time-consuming.

[0066] See also Figure 5 , Figure 5 1 is a schematic diagram of the structure of the third embodiment of the semiconductor device of the present application. The difference between this embodiment and the above embodiments is that in this embodiment, the first GaN buffer layer 32 is directly deposited on the SiC pre-buffer layer 20 to form the first GaN buffer layer 32 .

[0067] In this embodiment, the first GaN buffer layer 32 directly contacts the C-surface of the SiC pre-buffer layer 20. The SiC pre-buffer layer 20 and the first GaN buffer layer 32 also have a high lattice adaptation rate, so it is allowed to directly deposit and grow the first GaN buffer layer 32 on the SiC pre-buffer layer 20, which can omit the deposition and formation of the AlN buffer layer and the AlN buffer layer in the above embodiment. x Ga (1-x) The process of the N buffer layer is further conducive to simplifying the buffer layer process of the semiconductor device.

[0068] See also Figure 6 , Figure 6 It is a flow chart of the first embodiment of the method for preparing a semiconductor device of the present application.

[0069] S101: Provide a Si substrate.

[0070] In this embodiment, a Si substrate is provided, that is, the semiconductor device adopts a Si substrate, which is beneficial to improving the heat dissipation performance of the semiconductor device substrate, and further beneficial to achieving large-size epitaxial growth and reducing the manufacturing cost of the semiconductor device.

[0071] S102: forming a SiC pre-buffer layer on a Si substrate.

[0072] In this embodiment, a SiC pre-buffer layer is formed on a Si substrate. Considering that there are relatively serious lattice mismatch, thermal mismatch, and melt-back etching problems between the Si substrate and at least part of the film layer in the epitaxial layer formed by subsequent deposition, and there is a high lattice adaptation rate between the Si substrate and the SiC pre-buffer layer and between the SiC pre-buffer layer and the epitaxial layer, this embodiment uses the SiC pre-buffer layer as a buffer structure between the Si substrate and the epitaxial layer to reduce the risk of problems such as cracks and uneven surface morphology in the epitaxial film layer, thereby ensuring the growth quality of the epitaxial film.

[0073] S103: forming an epitaxial layer on a side of the SiC pre-buffer layer facing away from the Si substrate.

[0074] In this embodiment, an epitaxial layer is formed on the side of the SiC pre-buffer layer away from the Si substrate, thereby completing the preparation of the semiconductor device. The epitaxial layer may include the Al x Ga (1-x) N buffer layer, first GaN buffer layer, channel layer, insertion layer, barrier layer, cap layer, device layer, etc.

[0075] See also Figure 1 and Figure 7 , Figure 7This is a schematic flow chart of the second embodiment of the method for preparing a semiconductor device of the present application. This embodiment takes the above-mentioned embodiment of the semiconductor device having an AlN buffer layer as an example to exemplarily illustrate the preparation process of the semiconductor device of the embodiment of the present application.

[0076] S201: Provide a Si substrate.

[0077] In this embodiment, a Si substrate 10 is provided, that is, the semiconductor device adopts a Si substrate, which is beneficial to improving the heat dissipation performance of the semiconductor device substrate, thereby facilitating large-scale epitaxial growth and reducing the manufacturing cost of the semiconductor device.

[0078] S202: Clean the surface of the Si substrate in an atmosphere of H2.

[0079] In this embodiment, before epitaxially growing other film layers on the Si substrate 10, the surface of the Si substrate 10 is cleaned in advance in an H2 atmosphere to ensure that the surface of the Si substrate 10 is clean, which is beneficial to the subsequent epitaxial growth of film layers and ensures the growth quality of subsequent film layers.

[0080] S203: growing a SiC film layer on the Si substrate, and controlling the thickness of the SiC film layer to be less than 1 nm, thereby forming a SiC pre-buffer layer.

[0081] In this embodiment, a SiC film layer is grown on the Si substrate 10, and the thickness of the SiC film layer is controlled to be less than 1 nm, thereby forming a SiC pre-buffer layer 20. In this embodiment, the thickness of the SiC pre-buffer layer 20 is reasonably controlled so that the thickness of the SiC pre-buffer layer is not enough to form a fixed crystal form of SiC therein, thereby ensuring that SiC with an amorphous structure is formed in the SiC pre-buffer layer.

[0082] In an exemplary embodiment, an atomic layer deposition (ALD) method is used to grow a SiC film layer on the Si substrate 10 , and the thickness of the SiC film layer is controlled to be less than 1 nm.

[0083] For example, CO is saturatedly adsorbed on the surface of the Si substrate 10 and then the CO is deoxidized to form the SiC film layer having a thickness of less than 1 nm.

[0084] For details, please refer to Figure 8 In an atmosphere at a temperature of 900° C., a mixed gas with a CO concentration of 1%-1.5% (argon gas may be used as a carrier gas) is introduced at a flow rate of 5000sccm-5500sccm, a duration of not less than 15 minutes, and a gas pressure of 800mbar to complete saturated adsorption of CO on the surface of the Si substrate 10.

[0085] The total flow rate of the introduced gas and the CO flow rate are kept unchanged, the flow rate of the carrier gas in the mixed gas is gradually reduced and the flow rate of H2 is gradually increased, so that the reaction gas is switched to CO and H2, and the ambient temperature is raised to 1100°C from the beginning of gas switching, and deoxidation treatment is performed to form a single layer of Si-C bonds on the surface of the Si substrate 10, thereby forming a SiC film layer with a thickness of less than 1 nm, wherein the duration of gas switching is 2 minutes, and the time for maintaining the flow rate of each introduced gas unchanged after the gas switching is completed does not exceed 120 seconds (for example, 100 seconds, etc.), and the gas pressure in the reaction chamber is kept unchanged.

[0086] In the above manner, CO is saturatedly adsorbed on the surface of the Si substrate 10, wherein the CO film layer is a dense film layer, which can prevent the SiC film layer from growing inside the Si substrate 10. In the conventional carbonization process, the surface film layer is not a dense film layer, and the SiC film layer is easy to grow inside the substrate, resulting in the formation of a thicker SiC film layer, that is, at this time, the SiC film layer forms a fixed crystal form. Moreover, in this embodiment, CO stops growing after saturated adsorption is completed, so that the CO on the surface of the Si substrate 10 is a single-layer structure to form a subsequent single-layer Si-C bond SiC film layer, which means that this embodiment can easily control the film thickness of the SiC film layer, and this embodiment provides a well-controlled method to form the above-mentioned SiC film layer with a thickness of less than 1nm.

[0087] In addition, this embodiment reasonably sets the time for keeping the flow rate of each gas introduced unchanged after the gas switching is completed, so as to ensure that the CO on the surface of the Si substrate 10 is fully deoxidized as much as possible. If the time is maintained for more than 120s, H2 will further reduce the C on the surface of the Si substrate 10, affecting the formed SiC film layer.

[0088] S204: forming an AlN buffer layer on a side of the SiC pre-buffer layer facing away from the Si substrate.

[0089] In this embodiment, an AlN buffer layer 40 is formed on the side of the SiC pre-buffer layer 20 facing away from the Si substrate 10, specifically, a high-quality AlN buffer layer 40 is deposited. Specifically, the AlN buffer layer 40 with a thickness of 5 nm to 2000 nm is deposited in an atmosphere with a temperature of 1050° C. to 1300° C. and an ammonia flow rate of 1 to 10 standard liters / minute.

[0090] S205: Al is formed on the side of the AlN buffer layer away from the SiC pre-buffer layer x Ga (1-x) N buffer layer.

[0091] In this embodiment, an AlN buffer layer 40 is formed on the side away from the SiC pre-buffer layer 20. x Ga (1-x) N buffer layer 31, Al x Ga(1-x) The N buffer layer 31 is used to improve the lattice matching rate between semiconductor device film layers or to eliminate stress. x Ga (1-x) By forming the AlN buffer layer 40 between the N buffer layers 31 , the lattice matching rate between the layers of the semiconductor device is improved.

[0092] S206: In Al x Ga (1-x) A first GaN buffer layer is formed on a side of the N buffer layer facing away from the AlN buffer layer.

[0093] In this embodiment, in Al x Ga (1-x) The first GaN buffer layer 32 is formed on the side of the N buffer layer 31 away from the AlN buffer layer 40. The first GaN buffer layer 32 is a high-resistance buffer layer. The first GaN buffer layer 32 can be a C / Fe-doped GaN buffer layer. The first GaN buffer layer 32 is used to reduce the leakage current of the semiconductor device buffer layer and increase the breakdown voltage of the semiconductor device, that is, to enable the semiconductor device to operate in a higher voltage environment.

[0094] S207: In the first GaN buffer layer, away from Al x Ga (1-x) A channel layer is formed on one side of the N buffer layer.

[0095] In this embodiment, the first GaN buffer layer 32 is away from the Al x Ga (1-x) A channel layer 33 is formed on one side of the N buffer layer 31. The channel layer 33 may be made of non-doped GaN. A two-dimensional electron gas is formed between the channel layer 33 and the subsequent barrier layer 35.

[0096] S208: forming an insertion layer on a side of the channel layer away from the first GaN buffer layer.

[0097] In this embodiment, an insertion layer 34 is formed on a side of the channel layer 33 away from the first GaN buffer layer 32. The insertion layer 34 may be made of AlN.

[0098] S209: forming a barrier layer on a side of the insertion layer away from the channel layer.

[0099] In this embodiment, a barrier layer 35 is formed on the side of the insertion layer 34 away from the channel layer 33. The barrier layer 35 may be made of Al x Ga (1-x) N.

[0100] S210: forming a cap layer on a side of the barrier layer facing away from the insertion layer.

[0101] In this embodiment, a cap layer 36 is formed on the side of the barrier layer 35 facing away from the insertion layer 34. The cap layer 36 may be made of GaN.

[0102] S211: forming a device layer on a side of the cap layer away from the barrier layer.

[0103] In this embodiment, a device layer 37 is formed on the side of the cap layer 36 away from the barrier layer 35. The device layer 37 may include components such as a source electrode, a drain electrode, and a gate electrode.

[0104] The semiconductor device and the preparation method thereof provided by the present application are introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation method of the present application. The description of the above embodiments is only used to help understand the method and the core idea of ​​the present application. At the same time, for the general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and the scope of application. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for preparing a semiconductor device, characterized in that: The preparation method comprises: Providing a Si substrate; forming a SiC pre-buffer layer on the Si substrate, wherein the SiC pre-buffer layer comprises SiC having an amorphous structure; forming an epitaxial layer on a side of the SiC pre-buffer layer away from the Si substrate; Wherein, the thickness of the SiC pre-buffer layer is less than 1 nm, the SiC pre-buffer layer is a Si-C bond structure of a single carbon atomic layer, and the C surface of the SiC pre-buffer layer is the epitaxial surface of the epitaxial layer; The step of forming the SiC pre-buffer layer on the Si substrate comprises: Saturated adsorption of CO on the surface of the Si substrate; CO is deoxidized by using H2 to form the SiC pre-buffer layer with a thickness of less than 1 nm.

2. The preparation method according to claim 1, characterized in that: The step of saturated adsorption of CO on the surface of the Si substrate comprises: In an atmosphere at a temperature of 900° C., a mixed gas with a CO concentration of 1%-1.5% is introduced at a flow rate of 5000sccm-5500sccm, a duration of not less than 15 minutes, and a gas pressure of 800mbar to complete saturated adsorption of CO on the surface of the Si substrate; The step of deoxidizing CO with H2 to form the SiC pre-buffer layer with a thickness of less than 1 nm comprises: The total flow rate of the introduced gas and the CO flow rate are kept unchanged, the flow rate of the carrier gas in the mixed gas is gradually reduced and the flow rate of H2 is gradually increased, so that the reaction gas is switched to CO and H2, and the ambient temperature is heated to 1100°C from the beginning of gas switching, and deoxidation treatment is performed to form a single layer of Si-C bonds on the surface of the Si substrate, thereby forming the SiC pre-buffer layer with a thickness of less than 1 nm, wherein the duration of gas switching is 2 minutes, and the time for maintaining the flow rate of each introduced gas unchanged after the gas switching is completed is no more than 120 seconds, and the gas pressure in the reaction chamber is kept unchanged.

3. The preparation method according to any one of claims 1 to 2, characterized in that Before the step of forming a SiC pre-buffer layer on the Si substrate, the step includes: The surface of the Si substrate was cleaned in an H 2 atmosphere.

4. A semiconductor device manufactured based on the method for manufacturing a semiconductor device according to any one of claims 1 to 3, characterized in that: Including: Si substrate; A SiC pre-buffer layer provided on the Si substrate, wherein the SiC pre-buffer layer comprises SiC having an amorphous structure; and an epitaxial layer provided on a side of the SiC pre-buffer layer away from the Si substrate; The thickness of the SiC pre-buffer layer is less than 1 nm, the SiC pre-buffer layer is a Si-C bond structure of a single carbon atom layer, and the C surface of the SiC pre-buffer layer is the epitaxial surface of the epitaxial layer.

5. The semiconductor device according to claim 4, characterized in that The epitaxial layer includes an Al layer directly contacting the C surface of the SiC pre-buffer layer. x Ga (1-x) N buffer layer.

6. The semiconductor device according to claim 4, characterized in that The epitaxial layer includes a first GaN buffer layer directly contacting a C-face of the SiC pre-buffer layer.

7. The semiconductor device according to claim 4, characterized in that The epitaxial layer includes Al x Ga (1-x) N buffer layer; The semiconductor device further comprises an AlN buffer layer, wherein the AlN buffer layer is disposed between the SiC pre-buffer layer and the Al x Ga (1-x) N buffer layers, and the AlN buffer layer directly contacts the C surface of the SiC pre-buffer layer.

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