Method for integrating temperature sensor polysilicon layer on IGBT chip

Abstract

The present invention provides a method for integrating a temperature sensor polysilicon layer on an IGBT chip, the method comprising: providing a semiconductor structure; forming a second oxide layer on the upper surface of the semiconductor structure; forming a polysilicon layer on the upper surface of the second oxide layer; etching the polysilicon layer using a first dry etching process until the second oxide layer leaks out, so as to form a temperature sensor polysilicon layer in an active area at a preset distance from the polysilicon gate, and forming a sidewall at the sidewall of the polysilicon gate; etching using a second dry etching process to remove the sidewall. The present invention solves the problem of poor accuracy of existing temperature sensors.

Description

Technical Field

[0001] The invention relates to the field of semiconductor manufacturing, and in particular to a method for integrating a temperature sensor polysilicon layer on an IGBT chip. Background Art

[0002] IGBT (Insulated Gate Bipolar Transistor) is a power semiconductor device composed of BJT (Bipolar Junction Transistor) and MOS (Metal-Oxide-Semiconductor Field-Effect Transistor). It has the characteristics of low on-state voltage drop, fast response speed and simple control. Therefore, it has been more and more widely used in the field of power electronics. In order to ensure the normal operation of the IGBT chip, it is necessary to avoid damage due to excessive chip temperature and shorten its life due to excessive temperature fluctuations. Therefore, in order to make the IGBT chip perform better, it is necessary to integrate a temperature sensor inside it to monitor its temperature.

[0003] At present, when integrating the polysilicon layer of the temperature sensor on the IGBT chip, the method adopted is to lay out the polysilicon layer above the gate polysilicon. However, the temperature sensor prepared by the above method has poor sensitivity. Moreover, the step height difference between the polysilicon layer of the temperature sensor and the gate polysilicon will lead to poor contact hole morphology of the polysilicon layer of the temperature sensor. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for integrating a temperature sensor polysilicon layer on an IGBT chip, so as to solve the problem of poor sensitivity of the temperature sensor caused by preparing the temperature sensor polysilicon layer by the prior method.

[0005] To achieve the above-mentioned object and other related objects, the present invention provides a method for integrating a temperature sensor polysilicon layer on an IGBT chip, the method comprising:

[0006] A semiconductor structure is provided, comprising a semiconductor substrate, a trench formed in the semiconductor substrate, a first oxide layer formed on the bottom, sidewalls and upper surface of the trench, and a polysilicon gate filling the trench and extending outside the trench to a portion of the upper surface of the first oxide layer;

[0007] forming a second oxide layer on the upper surface of the semiconductor structure;

[0008] forming a polysilicon layer on an upper surface of the second oxide layer;

[0009] Etching the polysilicon layer using a first dry etching process to remove the polysilicon layer formed on the surface of the polysilicon gate, and retaining the polysilicon layer formed in the active area and located at a preset distance from the polysilicon gate as a temperature sensor polysilicon layer, while forming a sidewall at the sidewall of the polysilicon gate;

[0010] Using a second dry etching process to perform etching to remove the sidewalls;

[0011] The first dry etching process is anisotropic etching, and the second dry etching process is isotropic etching.

[0012] Optionally, before performing the first dry etching process to etch the polysilicon layer, the method further comprises the step of defining a pattern of the temperature sensor polysilicon layer on an upper surface of the second oxide layer using a mask layer.

[0013] Optionally, when the second dry etching process is performed to remove the sidewall spacer, the mask layer is used to protect the temperature sensor polysilicon layer.

[0014] Optionally, the method further comprises: a step of modifying the boundary morphology of the temperature sensor polysilicon layer by using a third dry etching process, wherein the third dry etching process is isotropic etching.

[0015] Optionally, before performing the third dry etching process, the method includes a step of removing the mask layer.

[0016] Optionally, the etching gas in the third dry etching process includes hydrogen bromide, chlorine, and carbon tetrafluoride.

[0017] Optionally, the first oxide layer and the second oxide layer are made of silicon oxide.

[0018] Optionally, the etching gas in the first dry etching process includes sulfur hexafluoride and chlorine; and the etching gas in the second dry etching process includes hydrogen bromide, chlorine, and carbon tetrafluoride.

[0019] As described above, the method of integrating a temperature sensor polysilicon layer on an IGBT chip of the present invention forms the temperature sensor polysilicon layer directly on the oxide layer of the active area of ​​the IGBT chip, thereby avoiding the isolation of the temperature sensor polysilicon layer and the semiconductor substrate by the gate polysilicon layer, thereby improving the accuracy of the temperature sensor; moreover, in the process of preparing the temperature sensor polysilicon layer, the temperature sensor polysilicon layer is first obtained by an anisotropic etching process, and then the residue at the polysilicon gate side wall is removed by an isotropic etching process, thereby avoiding the formation of particle defects in the wafer and ensuring the quality of the wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 to Figure 5 The cross-sectional structure schematic diagram shows the existing process of integrating a temperature sensor polysilicon layer on an IGBT chip.

[0021] Figure 6 A scanning electron microscope image showing a contact hole in a polysilicon layer of a temperature sensor formed using a conventional method.

[0022] Figure 7 It shows a flow chart of the method of integrating a temperature sensor polysilicon layer on an IGBT chip according to the present invention.

[0023] Figure 8 to Figure 13 It shows a cross-sectional structure schematic diagram of the process of integrating a temperature sensor polysilicon layer on an IGBT chip according to the present invention.

[0024] Fig.14 Shown is a scanning electron microscope image of a polysilicon gate formed using the present invention.

[0025] Fig.15 The figure shows a scanning electron microscope image of a polysilicon layer of a temperature sensor formed by the present invention.

[0026] Fig.16 Shown is a scanning electron microscope image of the sidewall formed after the first dry etching of the present invention.

[0027] Fig.17 Shown is a top view of a temperature sensor formed using the present invention.

[0028] Fig.18 Displayed is the temperature-voltage curve of the NTC temperature sensor.

[0029] Component number description

[0030] 10.101 Semiconductor Substrate

[0031] 20, 102 groove

[0032] 30 First silicon dioxide layer

[0033] 40 Gate polysilicon layer

[0034] 41, 104 Polysilicon Gate

[0035] 50 Second silicon dioxide layer

[0036] 60, 300 polysilicon layer

[0037] 61 Temperature sensor polysilicon layer

[0038] 70 Photoresist

[0039] 100 Semiconductor Structure

[0040] 103 First Oxide Layer

[0041] 200 Second Oxide Layer

[0042] 400 Sidewall

[0043] 500 Mask layer DETAILED DESCRIPTION

[0044] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0045] See also Figures 1 to 18 It should be noted that the illustrations provided in this embodiment are only schematic illustrations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the number, shape and size of components in actual implementation, the form, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the component layout may also be more complicated.

[0046] Figure 1 to Figure 5 A structural schematic diagram corresponding to a method for integrating a temperature sensor polysilicon layer on an IGBT chip is provided.

[0047] like Figure 1 As shown, a semiconductor substrate 10 having a groove 20 is provided, and a first silicon dioxide layer 30 is formed at the bottom, sidewalls and upper surface of the groove 20; a gate polysilicon layer 40 is filled in the groove 20, and the gate polysilicon layer 40 is extended to the upper surface of the first silicon dioxide layer 30; a second silicon dioxide layer 50 is formed on the upper surface of the gate polysilicon layer 40; and a polysilicon layer 60 is formed on the upper surface of the second silicon dioxide layer 50.

[0048] like Figure 2 As shown, the pattern of the temperature sensor polysilicon layer 61 is defined by using a photoresist 70 , and the polysilicon layer 60 not protected by the photoresist 70 is removed by an etching process to form the temperature sensor polysilicon layer 61 .

[0049] like Figure 3 As shown, the photoresist 70 on the upper surface of the temperature sensor polysilicon layer 61 is removed.

[0050] like Figure 4As shown, photoresist 70 is used to protect the temperature sensor polysilicon layer 61 and define the pattern of the polysilicon gate 41 , and the gate polysilicon layer 40 is etched by an etching process until the first silicon dioxide layer 30 is exposed to obtain the polysilicon gate 41 .

[0051] like Figure 5 As shown, the photoresist on the upper surface and sidewall of the polysilicon gate 41 and the temperature sensor polysilicon layer 61 is removed.

[0052] The above method for preparing the temperature sensor polysilicon layer is to first define the temperature sensor polysilicon layer, and then define the polysilicon gate, so that the temperature sensor polysilicon layer and the substrate are separated by the gate polysilicon, resulting in poor sensitivity of the temperature sensor. Moreover, the step height difference between the temperature sensor polysilicon layer and the gate polysilicon will lead to poor contact hole morphology of the temperature sensor polysilicon layer (such as Figure 6 shown).

[0053] like Figure 7 As shown, this embodiment provides a method for integrating a temperature sensor polysilicon layer on an IGBT chip, the method comprising:

[0054] A semiconductor structure 100 is provided, comprising a semiconductor substrate 101, a trench 102 formed in the semiconductor substrate 101, a first oxide layer 103 formed on the bottom, sidewalls and upper surface of the trench 102, and a polysilicon gate 104 filling the trench 102 and extending outside the trench 102 to a portion of the upper surface of the first oxide layer 103;

[0055] forming a second oxide layer 200 on the upper surface of the semiconductor structure 100;

[0056] forming a polysilicon layer 300 on the upper surface of the second oxide layer 200;

[0057] The polysilicon layer 300 is etched by a first dry etching process to remove the polysilicon layer 300 formed on the surface of the polysilicon gate, and the polysilicon layer 300 formed in the active area and located at a preset distance from the polysilicon gate 104 is retained as a temperature sensor polysilicon layer 310, and a sidewall 400 is formed at the sidewall of the polysilicon gate 104;

[0058] Using a second dry etching process to perform etching to remove the sidewall 400;

[0059] The first dry etching process is anisotropic etching, and the second dry etching process is isotropic etching.

[0060] Combine the following Figure 8 to Figure 13, the preparation method described in this embodiment is described in detail:

[0061] like Figure 8 As shown, a semiconductor structure 100 is provided, including a semiconductor substrate 101, a trench 102 formed in the semiconductor substrate 101, a first oxide layer 103 formed on the bottom, sidewalls and upper surface of the trench 102, and a polysilicon gate 104 filling the trench 102 and extending outside the trench 102 to a portion of the upper surface of the first oxide layer 103.

[0062] The semiconductor substrate 101 includes but is not limited to a silicon substrate, a gallium nitride substrate, and a silicon-on-insulator substrate. Optionally, in this embodiment, the semiconductor substrate is a silicon substrate.

[0063] Specifically, the material of the first oxide layer 103 includes silicon oxide. In this embodiment, the material of the first oxide layer is silicon dioxide. The first oxide layer 103 can be formed on the bottom, sidewalls of the trench 102 and the upper surface of the semiconductor substrate 101 by a thermal oxidation process or a chemical vapor deposition process.

[0064] In this embodiment, the specific process of forming the polysilicon gate 104 is as follows: after forming the first oxide layer 103, the trench 102 is filled with a gate polysilicon layer, and at the same time, the gate polysilicon layer covers the first oxide layer 103 on the upper surface of the semiconductor substrate 101, and then the pattern of the polysilicon gate 104 is defined by photoresist, and then an anisotropic dry etching process is used to remove the gate polysilicon layer not protected by the photoresist to form the polysilicon gate 104, and finally the photoresist is removed. In the specific preparation, the gate polysilicon layer can be generated by a chemical vapor deposition process. Moreover, the thickness of the gate polysilicon layer formed on the upper surface of the first oxide layer 103 outside the trench 102 is Optionally, in this embodiment, the deposition thickness of the gate polysilicon layer is (like Fig.14 shown).

[0065] like Fig. 9 As shown, a second oxide layer 200 is formed on the upper surface of the semiconductor structure 100 .

[0066] Specifically, the material of the second oxide layer 200 includes silicon oxide. In this embodiment, the material of the second oxide layer is silicon dioxide, and the second oxide layer 200 can be formed by a thermal oxidation process or a chemical vapor deposition process. Moreover, the thickness of the second oxide layer 200 can be the same as or different from the thickness of the first oxide layer 103, and can be selected according to needs in the specific preparation process.

[0067] like Fig.10 As shown, a polysilicon layer 300 is formed on the upper surface of the second oxide layer 200. In this embodiment, the polysilicon layer 300 can be formed by chemical vapor deposition. Moreover, the thickness of the polysilicon layer 300 includes Optionally, the thickness of the polysilicon layer 300 in this embodiment is (like Fig.15 shown).

[0068] like Fig.11 As shown, the polysilicon layer 300 is etched by a first dry etching process until the second oxide layer 200 is exposed, so as to form a temperature sensor polysilicon layer 310 in the active area at a preset distance from the polysilicon gate 104, and at the same time form a sidewall 400 at the sidewall of the polysilicon gate 104.

[0069] Specifically, before performing the first dry etching process to etch the polysilicon layer 300, the method further includes a step of defining a pattern of the temperature sensor polysilicon layer 310 on the upper surface of the second oxide layer 200 using a mask layer 500. In this embodiment, the material of the mask layer 500 includes but is not limited to photoresist.

[0070] More specifically, the etching gas in the first dry etching process includes sulfur hexafluoride (SF6) and chlorine (Cl2). In this embodiment, the flow rate range of the etching gas sulfur hexafluoride can be selected from 30sccm to 150sccm, and the flow rate range of the chlorine can be selected from 90sccm to 110sccm. In the actual preparation process, the flow rate range of the required etching gas can be selected according to needs.

[0071] However, when the polysilicon layer 300 is etched by the first dry etching process to form the temperature sensor polysilicon layer 310 in the active area of ​​the IGBT chip, a sidewall 400 is formed at the sidewall of the polysilicon gate 104, and the sidewall 400 is a polysilicon residue (such as Fig.16 As shown in the figure, if the particles fall off during the subsequent preparation process (such as the wet process), serious particle defects will be formed in the wafer, so they need to be removed.

[0072] like Fig.12 As shown, a second dry etching process is used to perform etching to remove the sidewall spacer 400 .

[0073] Specifically, the etching gas in the second dry etching process includes hydrogen bromide (HBr), chlorine (Cl2), and carbon tetrafluoride (CF4). In this embodiment, the flow range of the etching gas hydrogen bromide can be selected as 150sccm~200sccm, the flow range of the etching gas chlorine can be selected as 150sccm~200sccm, and the flow range of the etching gas carbon tetrafluoride can be selected as 40sccm~50sccm. In the actual preparation process, the flow range of the required etching gas can be selected as needed. Further, the etching gas also includes oxygen (O2) and helium (He).

[0074] More specifically, when the second dry etching process is performed to remove the sidewall 400, the mask layer 500 is used to protect the temperature sensor polysilicon layer 310. In this embodiment, when the second dry etching process is performed, the polysilicon under the edge of the mask layer 500 is etched away, so that the side of the temperature sensor 310 forms an arc surface, and therefore, the boundary of the temperature sensor polysilicon layer 310 needs to be modified.

[0075] like Fig.13 As shown, the method also includes: a step of modifying the boundary morphology of the temperature sensor polysilicon layer 310 by a third dry etching process, wherein the third dry etching process is isotropic etching. In this embodiment, the etching gas in the third dry etching process includes hydrogen bromide (HBr), chlorine (Cl2), and carbon tetrafluoride (CF4). In this embodiment, the flow range of the etching gas hydrogen bromide can be selected as 150sccm~200sccm, the flow range of the etching gas chlorine can be selected as 150sccm~200sccm, and the flow range of the etching gas carbon tetrafluoride can be selected as 40sccm~50sccm. In the actual preparation process, the flow range of the required etching gas can be selected as needed. Further, the etching gas also includes oxygen (O2) and helium (He).

[0076] Specifically, before performing the third dry etching process, the method includes a step of removing the mask layer 500 .

[0077] An NTC temperature sensor is prepared on the upper surface of the active area of ​​the IGBT chip by the above method. The presence of the NTC temperature sensor can achieve better protection for the IGBT chip, and more accurate monitoring can be achieved by setting multiple NTC temperature sensors. Fig.17 A top view of multiple NTC temperature sensors. Fig.18 A curve diagram of temperature T and voltage VF of two NTC temperature sensors (NTC1 and NTC2) is shown. It can be seen from the figure that the ratio of the voltage change of NTC1 to its temperature change is smaller than the ratio of the voltage change of NTC2 to its temperature change.

[0078] In summary, the present invention provides a method for integrating a temperature sensor polysilicon layer on an IGBT chip, by directly forming a temperature sensor polysilicon layer on the oxide layer of the active region of the IGBT chip, thereby avoiding the temperature sensor polysilicon layer and the semiconductor substrate being isolated by the gate polysilicon layer, thereby improving the accuracy of the temperature sensor; and in the process of preparing the temperature sensor polysilicon layer, firstly using an anisotropic etching process to obtain the temperature sensor polysilicon layer, and then using an isotropic etching process to remove the residues at the polysilicon gate sidewall, thereby avoiding the formation of particle defects in the wafer and ensuring the quality of the wafer. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0079] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for integrating a temperature sensor polysilicon layer on an IGBT chip, characterized in that: The method comprises: A semiconductor structure is provided, comprising a semiconductor substrate, a trench formed in the semiconductor substrate, a first oxide layer formed on the bottom, sidewalls and upper surface of the trench, and a polysilicon gate filling the trench and extending outside the trench to a portion of the upper surface of the first oxide layer; forming a second oxide layer on the upper surface of the semiconductor structure; forming a polysilicon layer on an upper surface of the second oxide layer; The polysilicon layer is etched by a first dry etching process until the second oxide layer is exposed, so as to form a temperature sensor polysilicon layer in an active area at a preset distance from the polysilicon gate, so as to prevent the temperature sensor polysilicon layer from being isolated from the semiconductor substrate by the polysilicon gate, and at the same time, a sidewall is formed at the sidewall of the polysilicon gate; Using a second dry etching process to perform etching to remove the sidewalls; The first dry etching process is anisotropic etching, and the second dry etching process is isotropic etching.

2. The method for integrating a temperature sensor polysilicon layer on an IGBT chip according to claim 1, characterized in that: Before performing a first dry etching process to etch the polysilicon layer, the method further comprises a step of defining a pattern of the temperature sensor polysilicon layer on an upper surface of the second oxide layer using a mask layer.

3. The method for integrating a temperature sensor polysilicon layer on an IGBT chip according to claim 2, characterized in that: When the second dry etching process is performed to remove the sidewall spacer, the mask layer is used to protect the temperature sensor polysilicon layer.

4. The method for integrating a temperature sensor polysilicon layer on an IGBT chip according to claim 2 or 3, characterized in that: The method further comprises: a step of modifying the boundary morphology of the temperature sensor polysilicon layer by using a third dry etching process, wherein the third dry etching process is isotropic etching.

5. The method for integrating a temperature sensor polysilicon layer on an IGBT chip according to claim 4, characterized in that: Before performing the third dry etching process, the method includes a step of removing the mask layer.

6. The method for integrating a temperature sensor polysilicon layer on an IGBT chip according to claim 4, characterized in that: The etching gas in the third dry etching process includes hydrogen bromide, chlorine, and carbon tetrafluoride.

7. The method for integrating a temperature sensor polysilicon layer on an IGBT chip according to claim 1, characterized in that: The first oxide layer and the second oxide layer are made of silicon oxide.

8. The method for integrating a temperature sensor polysilicon layer on an IGBT chip according to claim 1, characterized in that: The etching gas in the first dry etching process includes sulfur hexafluoride and chlorine; the etching gas in the second dry etching process includes hydrogen bromide, chlorine, and carbon tetrafluoride.

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