Chip control method and device, chip control test method, medium and equipment

Abstract

The present disclosure relates to a chip control method and device, a chip test method, a computer-readable storage medium and an electronic device, and relates to the field of semiconductor equipment technology. The chip control method includes: setting different identification numbers for a plurality of reaction chambers; determining the slot number of the chip according to the identification number of the reaction chamber; and allocating the chip according to the slot number of the chip and the identification number of the reaction chamber. The present disclosure provides a method for automatically setting and allocating controls in a machine device. This method not only saves manpower and time, but also reduces the error rate caused by manual operation and improves the efficiency of allocation.

Description

Background Art

[0002] In the process of semiconductor wafer manufacturing, it is usually necessary to equip the semiconductor processing machine equipment with multiple control wafers, and perform corresponding semiconductor processing on the control wafers. According to the detection results after the control wafers are processed, the stability of the semiconductor processing machine equipment is monitored and it is determined whether the products produced by the semiconductor processing machine equipment are within the process specifications.

[0003] A semiconductor processing machine usually includes multiple reaction chambers, and each reaction chamber usually needs to be equipped with a different control chip to perform semiconductor processing, so that each reaction chamber can be monitored and managed.

[0004] However, the existing method of allocating control sheets for different reaction chambers mainly adopts manual setting and recording, which is not only labor-intensive and time-consuming, but also prone to errors that affect the detection results.

[0005] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0006] The purpose of the present disclosure is to provide a chip control method and device, a chip test method, a computer-readable storage medium and an electronic device to solve the problem of wasting manpower and time when manually setting and allocating chips.

[0007] Other features and advantages of the present disclosure will become apparent from the following detailed description, or may be learned in part by the practice of the present invention.

[0008] According to a first aspect of the present disclosure, a wafer control method is provided for a machine device having a plurality of reaction chambers, the method comprising:

[0009] Setting different identification numbers for the plurality of reaction chambers;

[0010] Determining the slot number of the control chip according to the identification number of the reaction chamber;

[0011] The control chip is allocated according to the slot number of the control chip and the identification number of the reaction chamber.

[0012] Optionally, determining the slot number of the control chip according to the identification number of the reaction chamber includes:

[0013] In the case where the reaction chamber needs to specify the control chip, the slot number of the control chip is set to the identification number of the reaction chamber that needs to be specified;

[0014] In the case that the reaction chamber does not need to specify the control chip, the slot number of the control chip is set to the sum of the identification numbers of the reaction chambers that do not need to be specified.

[0015] Optionally, allocating the control chip according to the slot number and the identification number includes:

[0016] If the slot number of a certain control chip is equal to the identification number of one of the reaction chambers, the control chip is allocated to the reaction chamber;

[0017] If the slot number of the control chip is equal to the sum of the identification numbers of the plurality of reaction chambers, the control chip is allocated to one of the plurality of reaction chambers.

[0018] Optionally, the sum of the identification numbers of any plurality of the reaction chambers is not equal to the identification number of any other reaction chambers.

[0019] Optionally, the sum of the identification numbers of any plurality of the reaction chambers is not equal to the sum of the identification numbers of any remaining number of the reaction chambers.

[0020] Optionally, the method further includes:

[0021] According to the state of the control piece, the preset designated control piece is determined from multiple control pieces, or the preset designated control piece is manually determined, and the preset designated control piece is used to be allocated to the reaction chamber that needs to be designated; the control piece state includes at least one of the thickness of the control piece, the curvature, the amount of surface dust, the pollution level or the number of times it is used.

[0022] Optionally, the method further includes:

[0023] If the control sheet state of the control sheet exceeds preset limits, the control sheet is marked and replaced; the preset limits include at least one of the thickness range, curvature range, surface dust quantity range, pollution level range or usage count range of the control sheet.

[0024] According to a second aspect of the present disclosure, a wafer control device is provided for a machine having a plurality of reaction chambers, the device comprising:

[0025] an identification number setting module, used for setting different identification numbers for the plurality of reaction chambers;

[0026] A slot number determination module, used to determine the slot number of the control chip according to the identification number of the reaction chamber;

[0027] A control chip allocation module is used to allocate the control chip according to the slot number of the control chip and the identification number of the reaction chamber.

[0028] Optionally, the slot number determination module includes:

[0029] The calculation submodule is used for setting the slot number of the control chip to the identification number of the reaction chamber that needs to be specified when the reaction chamber needs to specify the control chip; and for setting the slot number of the control chip to the sum of the identification numbers of the reaction chambers that do not need to be specified when the reaction chamber does not need to specify the control chip.

[0030] Optionally, the control chip allocation module is used to allocate the control chip to the reaction chamber if the slot number of the control chip is equal to the identification number of one of the reaction chambers; if the slot number of the control chip is equal to the sum of the identification numbers of multiple reaction chambers, allocate the control chip to one of the multiple reaction chambers.

[0031] Optionally, the device further comprises:

[0032] A preset designated control piece determination module is used to determine a preset designated control piece from a plurality of control pieces according to a control piece state, or to manually determine the preset designated control piece, wherein the preset designated control piece is used to be allocated to the reaction chamber to be designated; the control piece state includes at least one of the thickness, curvature, amount of surface dust, pollution level or number of uses of the control piece.

[0033] Optionally, the device further comprises:

[0034] A marking replacement module is used to mark the control sheet and replace the control sheet if the control sheet state exceeds a preset limit; the preset limit includes at least one of the thickness range, curvature range, surface dust quantity range, pollution level range or usage count range of the control sheet.

[0035] According to a third aspect of the present disclosure, a control chip testing method is provided, the method comprising:

[0036] Allocating control slices according to the above control slice control method;

[0037] Using the allocated control sheet to test the reaction chamber;

[0038] Acquiring a control chip status of the control chip after the test;

[0039] The control sheet state includes at least one of the thickness, curvature, amount of surface dust, pollution level or number of times of use of the control sheet.

[0040] Optionally, the obtaining of the control chip status of the control chip after the test includes:

[0041] Obtain the reaction process performed in the reaction chamber before and during the test to determine the contamination level of the control wafer

[0042] Counting the number of times the control sheet is used after the test;

[0043] A measuring machine is used to measure at least one of the thickness, curvature, and the amount of surface dust of the control sheet.

[0044] According to a fourth aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the above-mentioned chip control method or the above-mentioned chip control test method is implemented.

[0045] According to a fifth aspect of the present disclosure, there is provided an electronic device, including:

[0046] Processor; and

[0047] A memory, configured to store executable instructions of the processor;

[0048] Wherein, the processor is configured to execute the above-mentioned chip control method or the above-mentioned chip control test method by executing the executable instructions.

[0049] The technical solution provided by the present disclosure may have the following beneficial effects:

[0050] The control chip control method in the exemplary embodiment of the present disclosure sets different identification numbers for the reaction chambers, and then sets corresponding slot numbers for the control chips according to the identification numbers of the reaction chambers, so that the control chips can be automatically allocated according to the slot numbers of the control chips and the identification numbers of the reaction chambers during the control chip allocation process, thereby realizing a method for automatically setting and allocating controls in machine equipment. This method not only saves manpower and time, but also reduces the error rate caused by manual operation and improves the efficiency of allocation.

[0051] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0053] Figure 1 A schematic diagram of the structure of a photolithography machine according to an exemplary embodiment of the present disclosure is schematically shown;

[0054] Figure 2 A flowchart of a chip control method according to an exemplary embodiment of the present disclosure is schematically shown;

[0055] Figure 3 The schematic diagram shows an operation interface corresponding to the chip control method provided according to an exemplary embodiment of the present disclosure. Figure 1 ;

[0056] Figure 4 The schematic diagram shows an operation interface corresponding to the chip control method provided according to an exemplary embodiment of the present disclosure. Figure 1 ;

[0057] Figure 5 The block diagram schematically shows a chip control device according to an exemplary embodiment of the present disclosure. Figure 1 ;

[0058] Figure 6 The block diagram schematically shows a chip control device according to an exemplary embodiment of the present disclosure. Figure 2 ;

[0059] Figure 7 A flowchart of a chip control test method according to an exemplary embodiment of the present disclosure is schematically shown;

[0060] Figure 8 A module diagram of an electronic device according to an exemplary embodiment of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0061] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar parts, and thus their repeated description will be omitted.

[0062] In addition, the described features, structures or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known structures, methods, devices, implementations, materials or operations are not shown or described in detail to avoid blurring the various aspects of the present disclosure.

[0063] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or these functional entities or parts of functional entities may be implemented in one or more software hardened modules, or these functional entities may be implemented in different networks and / or processor devices and / or microcontroller devices.

[0064] In the semiconductor industry, a variety of semiconductor processing equipment is needed, such as single crystal furnace, vapor phase epitaxy furnace, oxidation furnace, magnetron sputtering station, chemical mechanical polishing machine, photolithography machine, ion implantation machine, wire bonding machine, wafer dicing machine, wafer thinning machine, etc. Among these equipment, some equipment are usually equipped with multiple reaction chambers.

[0065] Take the photolithography machine as an example, refer to Figure 1 As shown in FIG. 1 , a schematic diagram of the structure of a photolithography machine is provided. Figure 1 As shown, the lithography machine 100 includes a wafer handling system 110, a reaction chamber 120 and a transfer chamber 130; wherein, there are multiple reaction chambers 120, and the multiple reaction chambers 120 are used to perform different process treatments on the wafers placed in the wafer handling system 110.

[0066] In actual applications, in order to monitor the process conditions of the reaction chamber 120, a small number of wafers are required to be used as control chips to detect the process conditions of the reaction chamber 120, that is, to control the control chips to perform semiconductor processing in the reaction chamber 120, and to analyze and judge the stability of the reaction chamber 120 based on the processing results, and to determine whether the reaction chamber 120 is faulty or needs maintenance, etc. This can provide a qualified processing environment for conventional wafer semiconductor processing and reduce the scrap rate.

[0067] In order to ensure the accuracy of the test results, for a machine device, each reaction chamber usually requires the use of multiple control slices for testing. Therefore, before allocating control slices to each reaction chamber, it is necessary to count the total number of control slices required by the machine device and transport the control slices that meet the total number to the machine device for easy allocation by the machine device.

[0068] In the actual wafer transportation process, a front opening unified pod (FOUP) is usually used as a container to protect, transport and store wafers. Therefore, the wafers used as control wafers can be transported to the machine equipment according to the demand for testing through the FOUP.

[0069] After the control wafer is transported to the machine equipment, the problem of controlling wafer allocation is faced, that is, multiple control wafers need to be allocated to different reaction chambers. In actual applications, some reaction chambers have requirements for the thickness or surface particle size of the control wafer. If the thickness or surface particle size does not meet the standard, qualified products will not be obtained after processing in the reaction chamber, which will affect the judgment of the process status of the reaction chamber and bring inaccurate detection results; some reaction chambers may have different pollution levels due to differences in reaction processes. Reaction chambers with different pollution levels cannot share control wafers, and the acceptable pollution level range of the reaction chamber is different. For example, the pollution level of the back-end metal copper process, the pollution level after exposure and development, and the pollution level of the front-end general process are all different. If the control wafers are arbitrarily allocated to reaction chambers with different pollution levels, cross-contamination between reaction chambers will be caused, affecting the performance of subsequent products produced and processed.

[0070] Therefore, how to achieve reasonable and automatic distribution of control chips for machine equipment becomes a problem that needs to be solved in this application. Figure 2 , which shows a flow chart of a chip control method provided by an exemplary embodiment of the present disclosure. Figure 2 As shown, the wafer control method for a machine device having multiple reaction chambers may include the following steps:

[0071] Step S210, setting different identification numbers for multiple reaction chambers;

[0072] Step S220, determining the slot number of the control chip according to the identification number of the reaction chamber;

[0073] Step S230, allocating the control chip according to the slot number of the control chip and the identification number of the reaction chamber.

[0074] According to the control chip control method in the exemplary embodiment of the present disclosure, by setting different identification numbers for the reaction chambers, and then setting corresponding slot numbers for the control chips according to the identification numbers of the reaction chambers, the control chips can be automatically allocated according to the slot numbers of the control chips and the identification numbers of the reaction chambers during the control chip allocation process, thereby realizing a method for automatically setting and allocating controls in a machine device. This method not only saves manpower and time, but also reduces the error rate caused by manual operation and improves the efficiency of allocation.

[0075] Next, the chip control method in the exemplary embodiment of the present disclosure will be further described.

[0076] In step S210 , different identification numbers are set for a plurality of reaction chambers.

[0077] In practical applications, a machine device is often provided with multiple reaction chambers. In order to allocate different control chips to each reaction chamber, a different identification number can be set for each reaction chamber as a mark of the reaction chamber, which is convenient for the designated allocation of control chips later.

[0078] In step S220, the slot number of the control chip is determined according to the identification number of the reaction chamber.

[0079] In order to assign different control chips to different reaction chambers, in the exemplary embodiment of the present disclosure, the slot number of the control chip is determined according to the identification number of the reaction chamber. The wafer slot identification device on the machine equipment will identify the control chip according to the slot number and assign the control chip that meets the conditions to the corresponding reaction chamber, thereby realizing automatic allocation of the control chip, avoiding mislabeling caused by manual operation, or contamination of the control chip, and improving the efficiency of control chip allocation.

[0080] In the actual process of determining the control chip slot number, it is necessary to first determine whether there is a reaction chamber in the machine equipment that needs to specify a control chip, that is, the reaction chamber needs to be assigned a control chip that meets the predetermined conditions. The specific predetermined conditions can be determined according to the actual reaction chamber conditions, for example, it can be a control chip that meets a certain thickness or surface particle size, etc. The exemplary embodiment of the present disclosure does not limit the specific predetermined conditions.

[0081] In the case of a reaction chamber that needs to specify a control chip, the slot number of the control chip that meets the conditions can be set as the identification number of the reaction chamber that needs to specify the control chip, and the slot numbers of the remaining control chips can be set as the sum of the identification numbers of the remaining reaction chambers, so as to identify the slot numbers of the control chips. Here, the reaction chamber that needs to specify a control chip is called a preset specified reaction chamber, and the corresponding control chip is called a preset specified control chip. If PM is used i represents the identification number of the i-th reaction chamber, then the slot number SNm of the preset designated control chip is equal to the identification number PMm of the preset designated reaction chamber, that is, SNm=PMm; and the slot numbers SNm of the remaining control chips are j Equal to the sum of the identification numbers of all reaction chambers ∑PM i Subtract the identification number PMm of the preset designated reaction chamber. If there are multiple preset designated reaction chambers, the sum of the identification numbers of all reaction chambers ∑PM i Subtract the sum of the identification numbers of multiple preset designated reaction chambers Sum (PMm), that is, the sum of the identification numbers of the remaining reaction chambers, which can be expressed by the formula: SN j =∑PM i -Sum(PMm).

[0082] When the reaction chamber does not need to specify a control chip, the slot number of the control chip is set to the sum of the identification numbers of the reaction chambers that do not need to specify a control chip. That is, when there is no preset designated reaction chamber, the slot number SNn of the control chip can be set to the sum of the identification numbers of all reaction chambers, that is, SN n =∑PM i , so that the control chip can be randomly used in any reaction chamber.

[0083] In step S230, the control chip is allocated according to the slot number of the control chip and the identification number of the reaction chamber.

[0084] After the identification number of the reaction chamber and the slot number of the control chip are determined, the control chip can be allocated according to the identification number and slot number.

[0085] In the specific allocation process, if the slot number of a control chip is exactly equal to the identification number of one of the reaction chambers, the control chip is directly allocated to this reaction chamber and designated for use by the reaction chamber, thereby meeting the requirements of the preset designated reaction chamber that needs to designate the control chip and achieving the purpose of inspection.

[0086] If the slot number of the control chip is equal to the sum of the identification numbers of multiple reaction chambers, the control chip is allocated to one of the multiple reaction chambers. In other words, the control chip can be used in any of the multiple reaction chambers, and the machine equipment can randomly allocate the control chip to meet the demand for control chips in the reaction chamber.

[0087] In order to avoid confusion when the control chips are assigned to multiple reaction chambers, in the exemplary embodiment of the present disclosure, in the process of setting the identification numbers of the reaction chambers in step S210, in addition to satisfying the first condition that the identification numbers of the multiple reaction chambers are different, the following two conditions need to be satisfied:

[0088] Second condition: the sum of the identification numbers of any multiple reaction chambers is not equal to the identification number of any other reaction chamber. That is, in a set of multiple reaction chambers of the same equipment, the sum of the identification numbers of any number of reaction chambers is not equal to the identification numbers of the other reaction chambers in the set.

[0089] The third condition is that the sum of the identification numbers of any number of reaction chambers is not equal to the sum of the identification numbers of any other number of reaction chambers. That is, in a set of multiple reaction chambers of the same equipment, the sum of the identification numbers of any number of reaction chambers is not equal to the sum of the identification numbers of the other reaction chambers in the set.

[0090] The above conditions are now described by taking the reaction chambers and their corresponding identification numbers shown in Table 1 as an example:

[0091] Table 1

[0092] Reaction chamber <![CDATA[Identification number PM i > hexadecimal C1 1 0x00000001 C2 2 0x00000002 C3 4 0x00000004 C4 8 0x00000008 C5 16 0x00000010 C6 32 0x00000020

[0093] It can be seen from Table 1 that the identification numbers of the reaction chambers C1-C6 are all different. Moreover, the sum of the identification numbers of any two reaction chambers is not equal to the identification number of any of the remaining four reaction chambers; the sum of the identification numbers of any three reaction chambers is not equal to the identification number of any of the remaining three reaction chambers; the sum of the identification numbers of any four reaction chambers is not equal to the identification number of any of the remaining two reaction chambers; the sum of the identification numbers of any five reaction chambers is not equal to the identification number of the sixth reaction chamber; that is, the above-mentioned second condition is met.

[0094] In addition, the sum of the identification numbers of any two reaction chambers is not equal to the sum of the identification numbers of the remaining four reaction chambers, nor is it equal to the sum of the identification numbers of the remaining three or two reaction chambers; the sum of the identification numbers of any three reaction chambers is not equal to the sum of the identification numbers of the remaining three reaction chambers, nor is it equal to the sum of the identification numbers of any other two reaction chambers; the sum of the identification numbers of any four reaction chambers is not equal to the sum of the identification numbers of the remaining two reaction chambers; that is, the above third condition is satisfied.

[0095] Only when the identification number of the reaction chamber meets the above three conditions can the identification number of the reaction chamber contained in the set slot number of the control chip be avoided from being repeated. For example, if the sum of the identification numbers of reaction chambers C1 and C2 is equal to the identification number of reaction chamber C3, then if the slot number of a certain control chip is exactly equal to the identification number of C3, then in the allocation process of the control chip, there will be a logical confusion of "whether to allocate the control chip to C3, or to any one of C1 and C2", resulting in allocation errors and the allocation work cannot be carried out normally.

[0096] It should also be noted that the last column in Table 1 represents the conversion of the identification number in the second column into a format recognizable by a hexadecimal programming language. In practical applications, the identification number may also be converted into other different bases to meet the requirements of programming language recognition, such as binary, etc., and the exemplary embodiments of the present disclosure are not particularly limited to this.

[0097] Continuing to take the reaction chamber identification numbers shown in Table 1 as an example, the allocation process of the exemplary embodiment of the present disclosure is illustrated:

[0098] If there are 25 control slices in a FOUP, namely SN1-SN25, there are two cases. One is as shown in Table 2. The 25 control slices can be assigned to any reaction chamber. Then the slot number of the control slice is set to the sum of the identification numbers of all reaction chambers, that is, SN = ∑PM i=1+2+4+8+16+32=63. In the process of allocating control chips, control chips SN1-SN25 can be randomly allocated to each reaction chamber C1-C6 in the machine equipment according to the value 63 until the demand for control chips of the reaction chamber is met.

[0099] Table 2

[0100] SN1 SN2 SN3 SN4 SN5 SN6 SN7 SN8 … SN25 63 63 63 63 63 63 63 63 … 63

[0101] Another example is shown in Table 3. The control chips SN1-SN5 are designated for the reaction chamber C2. According to the formula SNm=PMm, the slot number of SN1-SN5 is 2, and the slot numbers of the remaining control chips SN6-SN25 are SN. i =∑PM i -Sum(PMm)=63-2=61. In the process of controlling chip allocation, according to the value 2, the controlling chips SN1-SN5 can be allocated to the reaction chamber C2; according to the value 61, SN6-SN25 can be randomly allocated to the reaction chambers C1, C3-C6.

[0102] Table 3

[0103] SN1 SN2 SN3 SN4 SN5 SN6 SN7 SN8 … SN25 2 2 2 2 2 61 61 61 … 61

[0104] There is another case as shown in Table 4. When control chips SN1-SN5 are designated for reaction chamber C2, control chips SN6 and SN7 are also designated for reaction chamber C5. Then, according to the formula SNm=PMm, the slot number of SN1-SN5 is 2, the slot number of SN6 and SN7 is 16; the slot numbers of the remaining control chips SN8-SN25 are SNm=PMm. i =∑PM i -Sum(PMm)=63-2-16=45. In the process of chip allocation, chips SN1-SN5 can be allocated to reaction chamber C2 according to the value 2; chips SN6 and SN7 can be allocated to reaction chamber C5 according to the value 16; and chips SN8-SN25 can be randomly allocated to reaction chambers C1, C3, C4, and C6 according to the value 45.

[0105] Table 4

[0106] SN1 SN2 SN3 SN4 SN5 SN6 SN7 SN8 … SN25 2 2 2 2 2 16 16 45 … 45

[0107] By requiring the identification number of the reaction chamber to meet the above three conditions during the process of setting the identification number of the reaction chamber, the occurrence of confusion in allocation logic can be avoided during the control chip allocation process, which provides a basis for automatic control chip allocation.

[0108] It should also be noted that, in the exemplary embodiment of the present disclosure, in the process of determining the preset designated control piece, that is, in the process of determining the control piece that meets the predetermined conditions, the preset designated control piece can be determined from multiple control pieces according to the state of the control piece; when the state of the control piece meets the predetermined conditions, the control piece is determined as the preset designated control piece, wherein the state of the control piece can be at least one of the thickness, curvature, amount of surface dust, pollution level or number of times the control piece is used. Within the allowed number of times of use of the control piece, the surface particle size of the control piece generally meets the predetermined conditions of the control piece; since the reaction chambers of processes with different pollution levels cannot share the control piece, the pollution level of the control piece can be used to select a suitable control piece as the preset designated control piece. In other words, by determining the state of the control piece according to the historical use data of the control piece, the preset designated control piece can be automatically assigned to the preset designated reaction chamber, further avoiding manual participation and improving the efficiency of control piece allocation.

[0109] However, in the actual test process of the control piece, even if the number of uses exceeds the allowed number of uses, the particle size of the control piece does not exceed the predetermined condition, that is, the control piece may still be tested; in this case, if the control piece is scrapped simply based on the number of uses, it will cause a certain amount of waste. Therefore, in the exemplary embodiment of the present disclosure, it is also possible to Figure 3 and Figure 4 The preset designated control slices are manually determined in the operation interfaces 300 and 400 shown, that is, the staff can specify one or several control slices for use in a certain reaction chamber on the operation interface, that is, specify the preset designated control slices for use in the preset designated reaction chamber, thereby improving the utilization rate of the control slices, reducing the waste of resources, and achieving the purpose of saving resources.

[0110] Specifically, Figure 3 As shown, when the automatic allocation button is clicked, it is displayed that each control chip can be used for any reaction chamber without specifying the preset designated reaction chamber of the control chip. Figure 4 As shown, when the manual allocation button is clicked, if there is a need to specify a preset designated reaction chamber for a control chip, for example, identification number 2 can be set for control chips SN1-SN5. At this time, the designated reaction chamber of control chips SN1-SN5 is C2, and the designated reaction chambers of the remaining control chips SN6-SN25 can be any one of C1, C3-C6.

[0111] When the control piece completes the test task or reaches the final use state, the control piece can be replaced according to the control piece state. That is, if the control piece state of the control piece exceeds the preset limit, the control piece is marked and replaced. The specific replacement method is not repeated in the exemplary embodiment of this disclosure.

[0112] Among them, the preset restrictions may include at least one of the thickness range, curvature range, surface dust quantity range, pollution level range or usage number range of the control sheet, and the exemplary embodiments of the present disclosure do not make special limitations on this.

[0113] It should be noted that a FOUP can usually accommodate 25 wafers. If the number of wafers used on a machine is less than 25, the remaining wafers can be transported to the next machine for testing through the FOUP. The transport of wafers is not limited to the above FOUP, but can also be other handling equipment, etc., and the exemplary embodiments of the present disclosure do not specifically limit this.

[0114] In addition, the wafer control method is not only applicable to wafer control tests, but also to the allocation of wafers during the processing and production process.

[0115] In summary, by setting an identification number that meets the above three conditions for the reaction chamber, and determining the slot number for the control chip according to the identification number, and finally allocating the control chip according to the slot number and the identification number, on the one hand, the automatic allocation function of the control chip is realized, the allocation efficiency is improved, the process time is shortened, the utilization rate of the control chip is increased, and the labor cost is saved. Especially in the process of mass production, in the case of automatic allocation, product contamination caused by human factors can be avoided, and the yield rate can be improved. On the other hand, it avoids errors caused by human marking of the control chip during the test or production process, so as to achieve the purpose of matching the actual situation of the control chip with the account data.

[0116] It should be noted that, although the steps of the method of the present invention are described in a specific order in the drawings, this does not require or imply that the steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps, etc.

[0117] In addition, in this exemplary embodiment, a wafer control device is also provided for a machine having multiple reaction chambers, wherein the wafer control device part can inherit the relevant description in the wafer control method part, so that the wafer control device embodiment can obtain the support of the relevant specific description of the method embodiment.

[0118] refer to Figure 5 The chip control device 500 may include: an identification number setting module 510, a slot number determination module 520 and a chip allocation module 530, wherein:

[0119] An identification number setting module 510, used to set different identification numbers for the plurality of reaction chambers;

[0120] A slot number determination module 520, configured to determine the slot number of the control chip according to the identification number of the reaction chamber;

[0121] The control chip allocation module 530 is used to allocate the control chip according to the slot number of the control chip and the identification number of the reaction chamber.

[0122] In practical applications, the chip control device can be set in the manufacturing execution system (MES) of the semiconductor processing machine equipment. The manufacturing execution system is used to manage and control the complex manufacturing environment. It will record all chip manufacturing process information and past chip manufacturing history, thereby providing a data basis for the allocation of chip control.

[0123] In some embodiments of the present disclosure, the slot number determination module 520 may include: a calculation submodule, which is used to set the slot number of the control chip to the identification number of the reaction chamber that needs to be specified when the reaction chamber needs to specify a control chip; and set the slot number of the control chip to the sum of the identification numbers of the reaction chambers that do not need to be specified when the reaction chamber does not need to specify a control chip.

[0124] In some embodiments of the present disclosure, the control chip allocation module 530 can be used to allocate the control chip to one of the reaction chambers if the slot number of the control chip is equal to the identification number of the reaction chamber; if the slot number of the control chip is equal to the sum of the identification numbers of multiple reaction chambers, allocate the control chip to one of the multiple reaction chambers.

[0125] In some embodiments of the present disclosure, referring to Figure 6 As shown, the control piece control device 500 also includes: a preset designated control piece determination module 640, which can be used to determine a preset designated control piece from multiple control pieces according to the control piece state, or manually determine the preset designated control piece, and the preset designated control piece is used to be allocated to a reaction chamber that needs to specify a corresponding control piece; the control piece state includes at least one of the thickness, curvature, amount of surface dust, pollution level or number of uses of the control piece.

[0126] In some embodiments of the present disclosure, the control piece control device 500 also includes: a marking replacement module 650, which can be used to mark the control piece and replace the control piece if the control piece state of the control piece exceeds the preset limit; the preset limit includes at least one of the thickness range, curvature range, surface dust quantity range, pollution level range or usage count range of the control piece.

[0127] The specific details of the virtual modules of each chip control device mentioned above have been described in detail in the corresponding chip control method, so they will not be repeated here.

[0128] It should be noted that although several modules or units of the chip control device are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided into multiple modules or units for embodiment.

[0129] In this exemplary embodiment, a control chip test method is also provided, referring to Figure 7 The control chip testing method may include the following steps:

[0130] Step S710, allocating control chips according to the above control chip control method;

[0131] Step S720, using the allocated control wafer to test the reaction chamber;

[0132] Step S730, obtaining the control sheet status of the control sheet after the test; wherein the control sheet status includes at least one of the thickness, curvature, amount of surface dust, pollution level or number of times of use of the control sheet.

[0133] The chip control testing method provided in this exemplary embodiment can improve the efficiency and accuracy of chip control allocation by allocating chip controls according to the above-mentioned chip control method; the task of testing the working status of the reaction chamber can be completed by testing the reaction chamber through the chip controls; finally, the chip control status obtained after the test can be used in the chip control method to allocate chip controls according to the chip control status, thereby achieving a complementary closed-loop operation process and improving the automation and efficiency of the chip use process.

[0134] In some embodiments of the present disclosure, obtaining the control chip status of the control chip after the test may specifically include: obtaining the reaction process performed in the reaction chamber before and during the test to determine the contamination level of the control chip; counting the number of times the control chip after the test is used; using a measuring machine to measure at least one of the thickness, curvature, and surface dust quantity of the control chip. The above-mentioned control chip status obtained can be used to guide the allocation of control chips. The specific operation process is not repeated here.

[0135] In practical applications, the pollution level can be determined in the following way: when the control wafer is in the initial state, it is not polluted, so the pollution level is relatively low and can be set to 1; when the control wafer undergoes certain processes (process reactions of the test), such as exposure and development or copper process, the pollution level will become higher. For example, the pollution level after the front-end exposure and development process is 2, the back-end general pollution level is 3, the back-end exposure and development process is 4, and the back-end metal process pollution level is 5.

[0136] Assume that the initial contamination level of the control wafer is 1, and the contamination level remains unchanged after the front-end general process, and becomes 3 after the back-end general process; or if the most recent reaction of the test reaction chamber is a front-end exposure reaction or the contamination level of the wafer participating in the reaction is 2, then regardless of whether the test is a front-end general process or a front-end exposure and development process, the contamination level of the control wafer after the test reaction becomes 2, that is, the higher contamination level is used to determine the actual contamination level of the control wafer.

[0137] In an exemplary embodiment of the present disclosure, an electronic device capable of implementing the above method is also provided.

[0138] It will be appreciated by those skilled in the art that various aspects of the present invention may be implemented as a system, method or program product. Therefore, various aspects of the present invention may be specifically implemented in the following forms, namely: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or a combination of hardware and software, which may be collectively referred to herein as a "circuit", "module" or "system".

[0139] Refer to the following Figure 8 An electronic device 800 according to this embodiment of the present invention will be described. Figure 8 The electronic device 800 shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present invention.

[0140] like Figure 8 As shown, the electronic device 800 is in the form of a general computing device. The components of the electronic device 800 may include, but are not limited to: the at least one processing unit 810, the at least one storage unit 820, a bus 830 connecting different system components (including the storage unit 820 and the processing unit 810), and a display unit 840.

[0141] The storage unit 820 stores program codes, which can be executed by the processing unit 810, so that the processing unit 810 performs the steps according to various exemplary embodiments of the present invention described in the above “Exemplary Method” section of this specification. For example, the processing unit 810 can perform the following steps: Figure 2 In step S210, different identification numbers are set for multiple reaction chambers; in step S220, the slot number of the control chip is determined according to the identification number of the reaction chamber; in step S230, the control chip is allocated according to the slot number of the control chip and the identification number of the reaction chamber. The processing unit 810 can also perform the following steps: Figure 7In step S710 shown in the figure, control films are allocated according to the above-mentioned control film control method; in step S720, the reaction chamber is tested using the allocated control films; in step S730, the control film state of the control film after the test is obtained; wherein the control film state includes at least one of the thickness, curvature, amount of surface dust or number of uses of the control film.

[0142] The storage unit 820 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 8201 and / or a cache memory unit 8202 , and may further include a read-only memory unit (ROM) 8203 .

[0143] The storage unit 820 may also include a program / utility 8204 having a set (at least one) of program modules 8205, such program modules 8205 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0144] Bus 830 may represent one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

[0145] The electronic device 800 may also communicate with one or more external devices 870 (e.g., keyboards, pointing devices, Bluetooth devices, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device 800, and / or communicate with any device that enables the electronic device 800 to communicate with one or more other computing devices (e.g., routers, modems, etc.). Such communication may be performed via an input / output (I / O) interface 850. Furthermore, the electronic device 800 may also communicate with one or more networks (e.g., local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) via a network adapter 860. As shown, the network adapter 860 communicates with other modules of the electronic device 800 via a bus 830. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 800, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.

[0146] Through the description of the above implementation, it is easy for those skilled in the art to understand that the example implementation described here can be implemented by software, or by software combined with necessary hardware. Therefore, the technical solution according to the implementation of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, including several instructions to enable a computing device (which can be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the implementation of the present disclosure.

[0147] In an exemplary embodiment of the present disclosure, a computer-readable storage medium is also provided, on which a program product capable of implementing the above method of the present specification is stored. In some possible implementations, various aspects of the present invention can also be implemented in the form of a program product, which includes a program code, and when the program product is run on a terminal device, the program code is used to enable the terminal device to execute the steps according to various exemplary embodiments of the present invention described in the above "Exemplary Method" section of the present specification.

[0148] The program product for implementing the above method according to an embodiment of the present invention may adopt a portable compact disk read-only memory (CD-ROM) and include program code, and may be run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited thereto, and in this document, a readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, apparatus, or device.

[0149] The program product may use any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0150] Computer readable signal media may include data signals propagated in baseband or as part of a carrier wave, in which readable program code is carried. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Readable signal media may also be any readable medium other than a readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0151] The program code embodied on the readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination of the foregoing.

[0152] Program code for performing the operations of the present invention may be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving a remote computing device, the remote computing device may be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0153] In addition, the above-mentioned figures are only schematic illustrations of the processes included in the method according to an exemplary embodiment of the present invention, and are not intended to be limiting. It is easy to understand that the processes shown in the above-mentioned figures do not indicate or limit the time sequence of these processes. In addition, it is also easy to understand that these processes can be performed synchronously or asynchronously, for example, in multiple modules.

[0154] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure. The specification and examples are to be considered as exemplary only, and the true scope and spirit of the present disclosure are indicated by the claims.

[0155] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A chip control method for a machine with multiple reaction chambers, characterized in that: The method comprises: Setting different identification numbers for the plurality of reaction chambers; Determining the slot number of the control chip according to the identification number of the reaction chamber; Allocating the control chip according to the slot number of the control chip and the identification number of the reaction chamber; Determining the slot number of the control chip according to the identification number of the reaction chamber includes: In the case where the reaction chamber needs to specify the control chip, the slot number of the control chip is set to the identification number of the reaction chamber that needs to be specified; In the case where the reaction chamber does not need to specify the control chip, the slot number of the control chip is set to the sum of the identification numbers of the reaction chambers that do not need to be specified; Allocating the control chip according to the slot number and the identification number includes: If the slot number of the control chip is equal to the identification number of one of the reaction chambers, the control chip is allocated to the reaction chamber; If the slot number of the control chip is equal to the sum of the identification numbers of the plurality of reaction chambers, the control chip is allocated to one of the plurality of reaction chambers.

2. The chip control method according to claim 1, characterized in that: The sum of the identification numbers of any plurality of the reaction chambers is not equal to the identification number of any other reaction chamber.

3. The chip control method according to claim 2, characterized in that: The sum of the identification numbers of any number of the reaction chambers is not equal to the sum of the identification numbers of any other number of the reaction chambers.

4. The chip control method according to claim 1, characterized in that: The method further comprises: According to the state of the control piece, a preset designated control piece is determined from a plurality of the control pieces, or the preset designated control piece is manually determined, and the preset designated control piece is used to be allocated to the reaction chamber that needs to be designated; the state of the control piece includes at least one of the thickness of the control piece, the curvature, the amount of surface dust, the pollution level or the number of times it is used.

5. The chip control method according to claim 4, characterized in that: The method further comprises: If the control sheet state of the control sheet exceeds preset limits, the control sheet is marked and replaced; the preset limits include at least one of the thickness range, curvature range, surface dust quantity range, pollution level range or usage count range of the control sheet.

6. A wafer control device for a machine with multiple reaction chambers, characterized in that: The device comprises: an identification number setting module, used for setting different identification numbers for the plurality of reaction chambers; A slot number determination module, used to determine the slot number of the control chip according to the identification number of the reaction chamber; A control chip allocation module, used to allocate the control chip according to the slot number of the control chip and the identification number of the reaction chamber; The slot number determination module includes: a calculation submodule, configured to set the slot number of the control chip to the identification number of the reaction chamber that needs to be specified when the reaction chamber needs to specify the control chip; and to set the slot number of the control chip to the sum of the identification numbers of the reaction chambers that do not need to be specified when the reaction chamber does not need to specify the control chip; The control chip allocation module is used to allocate the control chip to the reaction chamber if the slot number of the control chip is equal to the identification number of one of the reaction chambers; if the slot number of the control chip is equal to the sum of the identification numbers of multiple reaction chambers, allocate the control chip to one of the multiple reaction chambers.

7. The chip control device according to claim 6, characterized in that: The device also includes: A preset designated control piece determination module is used to determine a preset designated control piece from a plurality of control pieces according to a control piece state, or to manually determine the preset designated control piece, wherein the preset designated control piece is used to be allocated to the reaction chamber to be designated; the control piece state includes at least one of the thickness, curvature, amount of surface dust, pollution level or number of uses of the control piece.

8. The chip control device according to claim 7, characterized in that: The device also includes: A marking replacement module is used to mark the control sheet and replace the control sheet if the control sheet state exceeds a preset limit; the preset limit includes at least one of the thickness range, curvature range, surface dust quantity range, pollution level range or usage count range of the control sheet.

9. A control chip testing method, characterized in that: The method comprises: Allocating control chips according to the control chip control method according to any one of claims 1 to 5; Using the allocated control sheet to test the reaction chamber; Acquiring a control chip status of the control chip after the test; The control sheet state includes at least one of the thickness, curvature, amount of surface dust, pollution level or number of times of use of the control sheet.

10. The chip control test method according to claim 9, characterized in that: The obtaining of the control chip status of the control chip after the test includes: Obtaining the reaction process performed in the reaction chamber before and during the test to determine the contamination level of the control wafer; Counting the number of times the control sheet is used after the test; A measuring machine is used to measure at least one of the thickness, curvature, and the amount of surface dust of the control sheet.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the chip control method described in any one of claims 1 to 5 or the chip control testing method described in any one of claims 9 to 10 is implemented.

12. An electronic device, characterized in that: include: processor; as well as A memory, configured to store executable instructions of the processor; The processor is configured to execute the chip control method described in any one of claims 1 to 5, or the chip control testing method described in any one of claims 9 to 10 by executing the executable instructions.

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