Programmable pixel mixing pipeline device, method and computer equipment

Abstract

The present application relates to a programmable pixel blending method, device, computer equipment, storage medium and computer program product. The method comprises: performing rasterization processing on a first triangle, a second triangle and a third triangle through a rasterization unit, and obtaining triangle coverage information corresponding to each triangle; sending the triangle coverage information to a thread assembly unit and a thread sorting unit respectively, the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to an application thread interface according to the first thread information, and executes the first thread based on a thread information buffer, a thread synchronization unit, a thread sorting unit, a pixel write-back unit, an interpolation unit and an execution unit. After the first thread is executed, the thread assembly unit continues to assemble the third triangle and completes the drawing of the third triangle, thereby improving the flexibility and expansibility of pixel blending.

Description

Technical Field

[0001] The present application relates to the field of graphics rendering technology, and in particular to a programmable pixel mixing pipeline device, method, computer equipment, storage medium and computer program product. Background Art

[0002] Pixel blending is the output merging stage of the graphics rendering pipeline. The conventional method is to perform a specified arithmetic operation on the source value and the target value through a fixed function.

[0003] During the graphics rendering process, the pixel shader is called once for each pixel and the instructions in the shader are executed, ultimately outputting one or zero pixels. The output merging stage can be functionally divided into a depth test unit and a pixel operation unit. The depth test unit performs a depth test based on the depth value of the current pixel and the depth value in the storage unit. If the test result is successful, the pixel is passed to the pixel operation unit; otherwise, the pixel is discarded. The pixel operation unit writes the color value of the valid pixel into the drawing object. The storage space for storing depth values ​​and color values ​​is usually called a frame buffer. The data in the frame buffer, after being exchanged, is displayed on the screen and is called a frame image.

[0004] Existing pixel blending technologies support conventional blending formulas, but some graphics libraries require hardware support for more complex blending formulas. For example, OpenGL requires support for advanced blending, which requires complex mathematical calculations, such as the square root calculation required in the SOFTLIGHT_KHR blending mode. Existing pixel blending methods cannot arbitrarily set blending equations, resulting in limited flexibility and scalability. Summary of the Invention

[0005] Based on this, it is necessary to provide a programmable pixel mixing pipeline device, method, computer equipment, storage medium and computer program product that can improve flexibility and scalability to address the above technical problems.

[0006] In a first aspect, the present application provides a programmable pixel mixing pipeline device, comprising:

[0007] Rasterization unit, used to rasterize triangles;

[0008] Output merging unit, used to combine the depth and shading of a single fragment generated by the pixel shader with the frame buffer;

[0009] Thread assembly unit, used to assemble hardware threads;

[0010] An interpolation unit, which is used to interpolate based on the input attributes of the pixel shader and send a thread end signal to the execution unit;

[0011] Pixel shader construction unit, used to allocate resources required by threads;

[0012] Execution unit, used to execute instructions in various shaders;

[0013] A thread overlap detection unit, used to detect whether different pixels in a thread overlap;

[0014] The thread sorting unit is used to sort different threads to ensure that multiple threads with overlapping pixels are executed in the order in which the threads are started;

[0015] The pixel write-back unit is used to read the color value of the pixel in the current thread from the frame buffer and assemble it into a Quad and return it to the execution unit.

[0016] In one embodiment, the thread overlap detection unit specifically includes:

[0017] A triangle memory is used to store triangles in the thread currently being assembled; the stored information includes but is not limited to position information, pixel coverage information, and information on whether the current triangle is valid;

[0018] a control unit, configured to receive an input triangle and send a read request to the triangle memory;

[0019] The memory read interface and the memory write interface are used to represent the read and write interfaces of the triangle memory; wherein the memory write interface is also used to receive a release request sent by an external module and mark the triangle to be released as invalid;

[0020] The triangle overlap comparator is used to determine whether there is overlap between two triangles in screen space. If there is pixel overlap, the currently assembling thread is forced to start; otherwise, the input triangle will be written to the memory and the triangle will be forwarded to the lower-level module.

[0021] In one embodiment, the line sorting unit specifically includes: an input buffer for receiving and storing input triangles;

[0022] The thread splitting unit is used to determine the number of triangles in the input buffer that belong to the current thread based on the number of Quads in the thread information. If a triangle spans two threads, the triangle is split into two parts. The sub-triangles in the front half belong to the current thread, and the sub-triangles in the back half belong to the next thread.

[0023] The intermediate buffer is used to store all triangles contained in the current thread;

[0024] Triangle memory, used to store all triangles from the previous thread; the stored information includes but is not limited to: position information, pixel coverage information, and information on whether the current triangle is valid;

[0025] A triangle memory control unit, used to control the reading and writing of the memory and release the specified triangle;

[0026] The hit / miss test unit compares the triangles in the current thread with those in the triangle memory. If the two overlap in screen space, it is considered a hit, otherwise it is a miss. If the result is a hit, the current thread is blocked from entering the triangle memory. If the result is a miss, all triangles of the current thread are written to the triangle memory and a start signal is sent to the pixel write back unit.

[0027] The traversal unit is used to traverse all triangles in the intermediate buffer and write them into the triangle memory, while sending a start signal to the lower-level module.

[0028] In one embodiment, the pixel write-back unit specifically includes: an address calculation unit, configured to calculate the address of each pixel in the storage space;

[0029] The memory access interface is the interface for accessing the physical space where the frame buffer is located;

[0030] Pixel color buffer, used to receive and store data returned by the frame buffer;

[0031] The Quad assembly unit is used to read the color value of the current Quad from the pixel buffer and then assemble the color value into the Quad;

[0032] A format conversion unit, configured to convert the pixel storage format of the rendering object into the data format required by the execution unit;

[0033] The Quad merging unit is used to assemble the maximum number of Quad data according to the width of the interface and send it to the execution unit; after the colors of all pixels in the current thread are returned to the execution unit, a thread end signal is sent to the execution unit, and the execution unit starts executing the instructions in the thread after receiving the signal

[0034] In a second aspect, the present application provides a programmable pixel blending method. The method comprises:

[0035] Performing rasterization processing on the first triangle, the second triangle, and the third triangle by a rasterization unit to obtain triangle coverage information corresponding to each triangle;

[0036] Sending the triangle coverage information to a thread assembly unit and a thread sorting unit respectively, wherein the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread from a thread application interface according to the first thread information;

[0037] executing the first thread based on the thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write-back unit, the interpolation unit, and the execution unit;

[0038] After the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle.

[0039] In one embodiment, executing the first thread based on the first thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write-back unit, the interpolation unit, and the execution unit includes:

[0040] A first thread information buffer receives and stores the first thread information, a thread synchronization unit reads a corresponding triangle from an input buffer according to the first thread information, and simultaneously sends the first thread information to a thread sorting unit and an interpolation unit;

[0041] The thread sorting unit performs a hit / miss test based on the received first thread information, and if the test result is a miss, sends a start signal to the pixel write back unit;

[0042] The pixel write-back unit reads the color value of the pixel in the first thread from the frame buffer and sends the color value to the execution unit;

[0043] The interpolation unit interpolates the pixel points inside the triangle according to the triangle information received from the first thread and the interpolation method of the input attributes specified in the pixel shader, and sends the interpolation result to the execution unit;

[0044] The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the first thread information and the color value returned by the pixel write-back unit, and sends the color value to the output merging unit after the execution is completed;

[0045] The output merging unit writes the color data into the frame buffer and sends a request message for releasing the first thread to the thread sorting unit.

[0046] In one embodiment, the thread assembly unit continues to assemble the third triangle, and completing the drawing of the third triangle includes:

[0047] The thread assembly unit assembles the third triangle into a second thread, and the thread sorting unit performs a hit / miss test based on the received second thread information. If the test result is a miss, a start signal is sent to the pixel write back unit.

[0048] The pixel write-back unit reads the color value of the pixel in the second thread from the frame buffer and sends the color value to the execution unit;

[0049] The interpolation unit interpolates the pixel points inside the triangle according to the triangle information received from the second thread and the interpolation method of the input attributes specified in the pixel shader, and sends the interpolation result to the execution unit;

[0050] The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the second thread information and the color value returned by the pixel write-back unit, and sends the color value to the output merging unit after the execution is completed;

[0051] The output merging unit writes the color data into the frame buffer and sends a request message for releasing the second thread to the thread sorting unit.

[0052] In a third aspect, the present application further provides a programmable pixel mixing device. The device comprises:

[0053] a rasterization module, configured to perform rasterization processing on the first triangle, the second triangle, and the third triangle through a rasterization unit, and obtain triangle coverage information corresponding to each triangle;

[0054] an assembling module, configured to send the triangle coverage information to a thread assembling unit and a thread sorting unit respectively, wherein the thread assembling unit assembles the first triangle and the second triangle into a first thread, and applies for a thread from a thread application interface according to the first thread information;

[0055] an execution module, configured to execute the first thread based on the thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write-back unit, the interpolation unit, and the execution unit;

[0056] The output merging module is configured to enable the thread assembling unit to continue assembling the third triangle after the first thread is executed, thereby completing the drawing of the third triangle.

[0057] In a fourth aspect, the present application further provides a computer device. The computer device includes a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0058] Performing rasterization processing on the first triangle, the second triangle, and the third triangle by a rasterization unit to obtain triangle coverage information corresponding to each triangle;

[0059] Sending the triangle coverage information to a thread assembly unit and a thread sorting unit respectively, wherein the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread from a thread application interface according to the first thread information;

[0060] executing the first thread based on the thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write-back unit, the interpolation unit, and the execution unit;

[0061] After the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle.

[0062] In a fifth aspect, the present application further provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the following steps: performing rasterization processing on the first triangle, the second triangle, and the third triangle through a rasterization unit to obtain triangle coverage information corresponding to each triangle; sending the triangle coverage information to a thread assembly unit and a thread sorting unit respectively; the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to a thread application interface based on the first thread information; executing the first thread based on a thread information cache, a thread synchronization unit, a thread sorting unit, a pixel write-back unit, an interpolation unit, and an execution unit; after the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle.

[0063] The above-mentioned programmable pixel blending method, apparatus, computer equipment, storage medium and computer program product perform rasterization processing on the first triangle, the second triangle and the third triangle through a rasterization unit to obtain triangle coverage information corresponding to each triangle; the triangle coverage information is sent to the thread assembly unit and the thread sorting unit respectively, the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to the thread application interface according to the first thread information, executes the first thread based on the thread information cache, the thread synchronization unit, the thread sorting unit, the pixel write back unit, the interpolation unit and the execution unit, and after the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle, thereby improving the flexibility and scalability of pixel blending. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1A schematic diagram of a graphics drawing pipeline in the prior art;

[0065] Figure 2 Schematic diagram of a hardware pipeline for implementing color mixing in the prior art;

[0066] Figure 3 A programmable pixel mixing pipeline device in one embodiment;

[0067] Figure 4 The pipeline does not support programmable mixing operations in the prior art;

[0068] Figure 5 A thread overlap detection unit in one embodiment;

[0069] Figure 6 A schematic diagram of a thread sorting unit in one embodiment;

[0070] Figure 7 A schematic diagram of a pixel write-back unit in one embodiment;

[0071] Figure 8 A programmable pixel blending method in one embodiment;

[0072] Figure 9 A programmable pixel mixing device in one embodiment;

[0073] Figure 10 FIG. 1 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0074] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0075] The diagram of the graphics drawing pipeline is as follows Figure 1 As shown, Figure 1The application in the text specifically refers to applications related to graphics drawing; the graphics card driver is a configuration file written by the hardware manufacturer according to the operating system, and is a bridge for interaction between the upper-level application and the graphics card; the command parsing and vertex assembly unit has two functions, one is to receive the command sent by the graphics card driver and dispatch it to the specified hardware module, and the other function is to assemble the primitives according to the topology type set by the application and send the vertices to the lower-level module; the vertex shader receives a vertex and outputs a vertex; the geometry processing unit is responsible for primitive clipping, viewport conversion and triangle establishment; the rasterization unit is responsible for calculating the coverage information of different points in the primitive in the screen space; the pixel shader receives a pixel and outputs one or zero pixels; the depth test unit is responsible for testing the depth value and judging whether to discard the pixel based on the test result; the pixel write back unit is responsible for writing valid pixels to the rendering object.

[0076] Pixel blending is typically performed in the pixel write-back unit, which performs arithmetic operations on the color values ​​output by the pixel shader and the values ​​in the render object, and writes the result as the final color value to the render object. Pixel blending is used to solve the problem of drawing semi-transparent objects in graphics. Different pixels can have different levels of transparency, ranging from completely transparent to opaque. Therefore, in addition to the three color channels (red, green, and blue (RGB), each pixel's color value also has an alpha channel that represents the current pixel's transparency, ranging from 0 to 1, with 0 representing completely transparent and 1 representing opaque. Therefore, pixel blending in Direct3D is called transparency blending. For example, if two triangles are drawn at the same position on the screen, the first triangle is pure white with an alpha value of 1, while the second triangle is pure black with an alpha value of 0.5, without pixel blending, the final color value drawn is black, which is obviously incorrect. However, with pixel blending, the color becomes gray.

[0077] To address color mixing in the graphics rendering pipeline, the graphics processing unit (GPU) uses an arithmetic logic unit (ALU) in the pixel write-back unit to calculate the color mixing formula and write the final result to the render object. The conventional color mixing formula is as follows: (A*B)⊕(C*D).

[0078] Among them, A represents the source value, that is, the color value output by the pixel shader; B represents the weight coefficient of the source value; C represents the target value, that is, the color value in the rendering object storage space; D represents the weight coefficient of the target value; ⊕ represents the operation code, including addition, subtraction, maximum, and minimum.

[0079] Figure 2 Schematic diagram of the hardware pipeline for color mixing. Figure 2The address calculation and RAW detection units in the pipeline have two functions. The address calculation unit calculates the current pixel's storage address in the frame buffer based on the pixel's spatial coordinates and other attributes of the rendered object. The RAW detection unit ensures that the value read from the frame buffer is the latest value. That is, if a write operation is performed on the pixel, the write operation must be completed before a read operation can be sent to the storage unit. Otherwise, the read value will be incorrect, resulting in incorrect blending results. The data format conversion unit converts the pixel shader output value according to its storage format to the data format required by the ALU for the blending operation. This design decouples the color data type of the shader output from the data type of the ALU operation, making it independent of the pixel shader output data format. The blend parameter calculation unit calculates the source and destination blend coefficients based on the blend coefficients specified in the application and the input source and destination values, which are then used as input for the next stage in the pipeline. The ALU operates on the input values ​​based on the blend opcode value and passes the result to the write-back unit.

[0080] Figure 2 The result selection unit in the _ALU_ is responsible for selecting the final result based on the type of the blend opcode and the adder output value, and passing it to the write-back unit. The write-back unit receives the output of the blend operation and converts it to the format used by the render object. The target format is the storage format of the render object, while the source format is the data format used by the ALU operation. Figure 2 The methods in

[15] can support conventional blending operation formulas, but some graphics libraries also require hardware support for more complex blending operation formulas. For example, OpenGL needs to support advanced blending. These blending operation formulas are more numerous and involve complex mathematical calculations. For example, in the SOFTLIGHT_KHR blending operation mode, square roots need to be calculated. Figure 2 If the mixing operation in RGB-D images is to support this feature, complex computing units and control logic are required, and the programmable pixel mixing method can solve this problem well.

[0081] Therefore, the hybrid operation pipeline method of the fixed pipeline usually has the following shortcomings: from the perspective of chip design, the fixed ALU can only support specific opcodes and data formats. For newly added data formats and opcodes, the ALU usually needs to be redesigned; from the perspective of chip power consumption, the more opcodes that need to be supported, the more transistors in the ALU, which increases the chip's power consumption.

[0082] In one embodiment, Figure 3 As shown, a programmable pixel mixing pipeline device is provided, including:

[0083] Rasterization unit, used to rasterize triangles;

[0084] Output merging unit, used to combine the depth and shading of a single fragment generated by the pixel shader with the frame buffer;

[0085] Thread assembly unit, used to assemble hardware threads;

[0086] An interpolation unit, which is used to interpolate based on the input attributes of the pixel shader and send a thread end signal to the execution unit;

[0087] Pixel shader construction unit, used to allocate resources required by threads;

[0088] Execution unit, used to execute instructions in various shaders;

[0089] A thread overlap detection unit, used to detect whether different pixels in a thread overlap;

[0090] The thread sorting unit is used to sort different threads to ensure that multiple threads with overlapping pixels are executed in the order in which the threads are started;

[0091] The pixel write-back unit is used to read the color value of the pixel in the current thread from the frame buffer and assemble it into a Quad and return it to the execution unit.

[0092] Specifically, if Figure 4The figure shows a pipeline that doesn't support programmable blending. Specifically, it includes: 1. The rasterizer unit, which rasterizes triangles and determines which integer grid regions in screen coordinates are occupied by the triangle. 2. The output merger unit, which combines the depth and color of individual fragments generated by the pixel shader with the frame buffer. In hardware, this unit is typically divided into two parts: the depth test unit and the pixel color manipulation unit. 3. The thread assembly unit, which assembles hardware threads (warps). The basic process is as follows: The quad count unit counts the number of valid quads (2x2 pixel blocks) in the current triangle and updates the total number of quads. If the total number of quads is greater than or equal to the number of quads that can be accommodated in the warp, or if other boundary conditions are met (such as if the current triangle is the last triangle in a drawing command), a thread request is sent to the thread request interface. 4. The thread request interface is responsible for sending a thread request to the pixel shader construction unit. The thread assembly unit then receives the thread ID returned by the thread construction unit and writes the thread ID and the number of quads in the thread into the thread information buffer. After receiving the thread information, the thread synchronization unit will read all the triangles input to the current thread from the input triangle buffer, and package the triangle information and thread information and send them to the interpolation unit. 5. The interpolation unit interpolates according to the interpolation mode of the pixel shader's input attributes. The interpolation method is to calculate the attribute value of each pixel in the tile contained in the current thread based on the attribute interpolation of the three vertices of the triangle. Send a signal to the execution unit to indicate the end of the thread, that is, after sending the last piece of data, it will notify the execution unit that the attribute value of the thread has been transmitted. 6. The pixel shader construction unit is responsible for allocating various resources required by the thread, such as general registers, thread slots, etc. 7. The execution unit is responsible for executing instructions in various shaders. It receives input values ​​from external modules and outputs the final calculation results to the lower-level modules. For example, the pixel shader receives the input attribute values ​​of each quad sent by the upper-level module, and outputs color and depth to the lower-level modules.

[0093] and Figure 4 Compared with pipelines that do not support programmable mixed operations, Figure 3 The programmable pixel mixing pipeline device also includes: a thread overlap detection unit, which is used to detect whether different pixels in a thread overlap; a thread sorting unit, which is used to sort different threads to ensure that multiple threads with overlapping pixels are executed in the order in which the threads are started; a pixel write-back unit, which is used to read the color values ​​of the pixels in the current thread from the frame buffer and assemble them into Quads and return them to the execution unit.

[0094] In this embodiment, in the pixel blending pipeline, a thread overlap detection unit is used to detect whether different pixels in a thread overlap, and a thread sorting unit is used to sort different threads to ensure that multiple threads with overlapping pixels are executed in the order in which the threads are started. The pixel write-back unit reads the color value of the pixel in the current thread from the frame buffer and assembles it into a Quad and returns it to the execution unit, thereby improving the diversity and scalability of the pixel blending operation formula, enabling the pixel blending pipeline to adapt to the new blending operation features required by future graphics libraries, and improving the flexibility and scalability of the pixel blending pipeline.

[0095] In one embodiment, the thread overlap detection unit specifically includes:

[0096] A triangle memory is used to store triangles in the thread currently being assembled; the stored information includes but is not limited to position information, pixel coverage information, and information on whether the current triangle is valid;

[0097] a control unit, configured to receive an input triangle and send a read request to the triangle memory;

[0098] The memory read interface and the memory write interface are used to represent the read and write interfaces of the triangle memory; wherein the memory write interface is also used to receive a release request sent by an external module and mark the triangle to be released as invalid;

[0099] The triangle overlap comparator is used to determine whether there is overlap between two triangles in screen space. If there is pixel overlap, the currently assembling thread is forced to start; otherwise, the input triangle will be written to the memory and the triangle will be forwarded to the lower-level module.

[0100] Specifically, Figure 5 This is a schematic diagram of a thread overlap detection unit, as shown in Figure 5 As shown, the thread overlap detection unit includes a triangle memory, which stores triangles in the thread currently being assembled through the thread overlap detection unit; the stored information includes but is not limited to position information, pixel coverage information and information on whether the current triangle is valid; the input triangle is received through the control unit, and a read request is sent to the triangle memory; the read and write interface of the triangle memory is represented by a memory read interface and a memory write interface; wherein the memory write interface is also used to receive a release request sent by an external module, and mark the triangle to be released as invalid; and the triangle overlap comparator is used to determine whether there is overlap between two triangles in the screen space. If there is pixel overlap, the thread currently being assembled is forced to start; otherwise, the input triangle will be written to the memory, and the triangle will be forwarded to the lower-level module.

[0101] In this embodiment, a thread overlap detection unit is used to detect whether there is overlap between two triangles in the screen space. When there is pixel overlap, the currently assembling thread is forced to start; otherwise, the input triangle will be written to the memory, and the triangle will be forwarded to the lower-level module, thereby realizing the assembly of different triangles into threads.

[0102] In one embodiment, the thread sorting unit specifically includes: an input buffer for receiving and storing input triangles;

[0103] The thread splitting unit is used to determine the number of triangles in the input buffer that belong to the current thread based on the number of Quads in the thread information. If a triangle spans two threads, the triangle is split into two parts. The sub-triangles in the front half belong to the current thread, and the sub-triangles in the back half belong to the next thread.

[0104] The intermediate buffer is used to store all triangles contained in the current thread;

[0105] Triangle memory, used to store all triangles from the previous thread; the stored information includes but is not limited to: position information, pixel coverage information, and information on whether the current triangle is valid;

[0106] A triangle memory control unit, used to control the reading and writing of the memory and release the specified triangle;

[0107] The hit / miss test unit compares the triangles in the current thread with those in the triangle memory. If the two overlap in screen space, it is considered a hit, otherwise it is a miss. If the result is a hit, the current thread is blocked from entering the triangle memory. If the result is a miss, all triangles of the current thread are written to the triangle memory and a start signal is sent to the pixel write back unit.

[0108] The traversal unit is used to traverse all triangles in the intermediate buffer and write them into the triangle memory, while sending a start signal to the lower-level module.

[0109] Specifically, Figure 6 A schematic diagram of a thread sorting unit is shown below. Figure 6As shown, the line sorting unit includes an input buffer for receiving and storing input triangles; a thread splitting unit for determining the number of triangles in the input buffer belonging to the current thread based on the number of quads in the thread information; if a triangle spans two threads, the triangle is split into two parts, with the sub-triangles in the front half belonging to the current thread and the sub-triangles in the back half belonging to the next thread; an intermediate buffer for storing all triangles contained in the current thread; a triangle memory for storing all triangles from previous threads; stored information includes but is not limited to: position information, pixel coverage information, and information on whether the current triangle is valid; a triangle memory control unit for controlling memory reads and writes and releasing specified triangles; a hit / miss test unit for comparing triangles in the current thread with triangles in the triangle memory. If the two overlap in screen space, it is considered a hit; otherwise, it is a miss. If the result is a hit, the current thread is blocked from entering the triangle memory; if the result is a miss, all triangles of the current thread are written to the triangle memory, and a start signal is sent to the pixel write-back unit. A traversal unit for traversing all triangles in the intermediate buffer and writing them to the triangle memory, while sending a start signal to the lower-level module. Because overlapping pixels may exist between different threads, a ready thread is blocked until the preceding thread completes execution before it can read data from the render object storage space. Therefore, the hardware requires a sorting unit to ensure the order of thread execution.

[0110] In this embodiment, the hardware ensures the order of thread execution by setting a sorting unit during thread execution, so that the pixel blending pipeline can adapt to the new blending operation characteristics required by future graphics libraries, thereby improving the flexibility and scalability of the pixel blending pipeline.

[0111] In one embodiment, the pixel write-back unit specifically includes: an address calculation unit, configured to calculate the address of each pixel in the storage space;

[0112] The memory access interface is the interface for accessing the physical space where the frame buffer is located;

[0113] Pixel color buffer, used to receive and store data returned by the frame buffer;

[0114] The Quad assembly unit is used to read the color value of the current Quad from the pixel buffer and then assemble the color value into the Quad;

[0115] A format conversion unit, configured to convert the pixel storage format of the rendering object into the data format required by the execution unit;

[0116] The Quad merging unit is used to assemble the maximum number of Quad data according to the width of the interface and send it to the execution unit; after the colors of all pixels in the current thread are returned to the execution unit, a thread end signal is sent to the execution unit, and after receiving the signal, the execution unit starts executing the instructions in the thread.

[0117] Specifically, Figure 7 Schematic diagram of pixel write back unit, such as Figure 7 As shown, for the current thread, the hardware module needs to read the color of each rendering object from the frame buffer and write the color back to the general register in the execution unit. When the last data in the thread is returned to the general register, the execution unit needs to be notified that the data reading is complete before the execution unit can start executing the instructions in the thread. The pixel write-back unit includes an address calculation unit, which is used to calculate the address of each pixel in the storage space; a memory access interface is an interface for accessing the physical space where the frame buffer is located; a pixel color buffer, which is used to receive and store the data returned by the frame buffer; a Quad assembly unit, which is used to read the color value of the current Quad from the pixel buffer and then assemble the color value in the Quad; a format conversion unit, which is used to convert the pixel storage format of the rendering object into the data format required by the execution unit; a Quad merging unit, which is used to assemble the maximum number of Quad data according to the width of the interface and send it to the execution unit; after the colors of all pixels in the current thread are returned to the execution unit, a thread end signal is sent to the execution unit, and the execution unit starts executing the instructions in the thread after receiving the signal.

[0118] In this embodiment, for the current thread, the color of each rendering object is read from the frame buffer through the pixel write-back unit, and the color is written back to the general register in the execution unit. When the last data in the thread is returned to the write-back general register, the execution unit needs to be notified that the data reading needs to be completed before the execution unit can start executing the instructions in the thread, thereby improving the flexibility and scalability of the pixel blending pipeline.

[0119] In one embodiment, Figure 8 As shown, a programmable pixel mixing method is provided, comprising the following steps:

[0120] Step 802 : Perform rasterization processing on the first triangle, the second triangle, and the third triangle through a rasterization unit to obtain triangle coverage information corresponding to each triangle.

[0121] Specifically, the first, second, and third triangles are rasterized by the rasterization unit to obtain triangle coverage information corresponding to each triangle. For example, triangle 1, triangle 2, and triangle 3 are named T0, T1, and T2, respectively. The function of the rasterization unit is to rasterize the triangles, that is, to determine which integer grid areas in the screen coordinates are occupied by the triangles. The rasterization unit is used to rasterize T0, T1, and T2, and the triangle coverage information is sent to the thread assembly unit and the thread sorting unit in sequence to obtain the triangle coverage information corresponding to the first, second, and third triangles.

[0122] Step 804 : Send the triangle coverage information to a thread assembly unit and a thread sorting unit respectively. The thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread from a thread application interface according to the first thread information.

[0123] Specifically, T0, T1, and T2 enter the input buffer respectively, and send the triangle coverage information to the thread assembly unit and the thread sorting unit respectively. The thread assembly unit assembles the first triangle (T0) and the second triangle (T1) into the first thread, and applies for a thread to the application thread interface based on the first thread information. The thread assembly unit assembles T0 and T1 into a new thread, recorded as the first thread Warp0, and sends the application thread to the application thread interface.

[0124] Step 806 : Execute the first thread based on the thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write-back unit, the interpolation unit, and the execution unit.

[0125] Specifically, the first thread information is received and stored through the thread information buffer, and the thread synchronization unit reads the corresponding triangle from the input buffer according to the first thread information, and sends the first thread information to the thread sorting unit and the interpolation unit at the same time. The thread sorting unit then performs a hit / miss test based on the received first thread information. If the test result is miss, a start signal is sent to the pixel write back unit. The pixel write back unit then reads the color value of the pixel in the first thread from the frame buffer and sends the color value to the execution unit. The interpolation unit interpolates the pixel points inside the triangle according to the interpolation method of the input attribute specified in the pixel shader based on the received triangle information of the first thread, and sends the interpolation result to the execution unit. The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the first thread information and the color value returned by the pixel write back unit, and sends the color value to the output merging unit after execution is completed. Finally, the output merging unit writes the color data into the frame buffer and sends a request message to the thread sorting unit to release the first thread.

[0126] Step 808: After the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle.

[0127] Specifically, after the first thread Warp0 is executed, the thread assembly unit assembles the third triangle T2 into the second thread Warp1. The thread sorting unit performs a hit / miss test based on the received second thread information. If the test result is miss, a start signal is sent to the pixel write back unit. The pixel write back unit reads the color value of the pixel in the second thread Warp1 from the frame buffer and sends the color value to the execution unit. The interpolation unit interpolates the pixel points inside the triangle according to the interpolation method of the input attribute specified in the pixel shader based on the triangle information received from the second thread Warp1, and sends the interpolation result to the execution unit. Finally, the execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the second thread information and the color value returned by the pixel write back unit, and after execution is completed, the color value is sent to the output merging unit. The output merging unit writes the color data into the frame buffer and sends a request information for releasing the second thread Warp1 to the thread sorting unit, completing the drawing of the third triangle T2.

[0128] In the above-mentioned programmable pixel blending method, the first triangle, the second triangle and the third triangle are rasterized by the rasterization unit to obtain the triangle coverage information corresponding to each triangle; the triangle coverage information is sent to the thread assembly unit and the thread sorting unit respectively, the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to the thread application interface according to the first thread information, and executes the first thread based on the thread information cache, the thread synchronization unit, the thread sorting unit, the pixel write back unit, the interpolation unit and the execution unit. After the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle, thereby improving the flexibility and scalability of pixel blending.

[0129] In one embodiment, executing the first thread based on the thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write back unit, the interpolation unit, and the execution unit includes:

[0130] The thread information buffer receives and stores the first thread information, the thread synchronization unit reads the corresponding triangle from the input buffer according to the first thread information, and sends the first thread information to the thread sorting unit and the interpolation unit at the same time;

[0131] The thread sorting unit performs a hit / miss test based on the received first thread information, and if the test result is a miss, sends a start signal to the pixel write back unit;

[0132] The pixel write-back unit reads the color value of the pixel in the first thread from the frame buffer and sends the color value to the execution unit;

[0133] The interpolation unit interpolates the pixel points inside the triangle according to the triangle information received from the first thread and the interpolation method of the input attributes specified in the pixel shader, and sends the interpolation result to the execution unit;

[0134] The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the first thread information and the color value returned by the pixel write-back unit, and sends the color value to the output merging unit after the execution is completed;

[0135] The output merging unit writes the color data into the frame buffer and sends a request message for releasing the first thread to the thread sorting unit.

[0136] Specifically, the thread information buffer receives and stores the first thread information, and the thread synchronization unit reads the corresponding triangles, namely the first triangle and the second triangle, from the input buffer according to the first thread information, and simultaneously sends the first thread information to the thread sorting unit and the interpolation unit. The thread sorting unit performs a hit / miss test based on the received first thread information. After the test, if the test result is miss, a start signal is sent to the pixel write back unit; the interpolation unit interpolates the pixel points inside the triangle according to the interpolation method of the input attributes specified in the pixel shader based on the received triangle information of the first thread, and sends the interpolation result to the execution unit. The pixel write back unit reads the color value of the pixel in the first thread from the frame buffer and sends the color value to the execution unit; the execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the first thread information and the color value returned by the pixel write back unit, and sends the color value to the output merging unit after execution is completed; the output merging unit writes the color data into the frame buffer and sends a request message to release the first thread to the thread sorting unit.

[0137] In this embodiment, the thread information cache receives and stores the first thread information, the thread synchronization unit reads the corresponding triangle from the input buffer according to the first thread information, and sends the first thread information to the thread sorting unit and the interpolation unit at the same time. Thereafter, the color value is obtained through the pixel write back unit, the interpolation unit, and the execution unit. Finally, the color data is written into the frame buffer, and an application is made to release the first thread, thereby realizing the execution of the first thread.

[0138] In one embodiment, the thread assembly unit continues to assemble the third triangle, and completing the drawing of the third triangle includes:

[0139] The thread assembly unit assembles the third triangle into a second thread, and the thread sorting unit performs a hit / miss test based on the received second thread information. If the test result is a miss, a start signal is sent to the pixel write back unit.

[0140] The pixel write-back unit reads the color value of the pixel in the second thread from the frame buffer and sends the color value to the execution unit;

[0141] The interpolation unit interpolates the pixel points inside the triangle according to the triangle information received from the second thread and the interpolation method of the input attributes specified in the pixel shader, and sends the interpolation result to the execution unit;

[0142] The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the second thread information and the color value returned by the pixel write-back unit, and sends the color value to the output merging unit after the execution is completed;

[0143] The output merging unit writes the color data into the frame buffer and sends a request message for releasing the second thread to the thread sorting unit.

[0144] Specifically, after the first thread is executed, the thread assembly unit assembles the third triangle T2 into the second thread Warp1, and the thread sorting unit performs a hit / miss test based on the received second thread information. If the test result is miss, a start signal is sent to the pixel write back unit; the pixel write back unit reads the color value of the pixel in the second thread Warp1 from the frame buffer and sends the color value to the execution unit; the interpolation unit interpolates the pixel points inside the triangle according to the interpolation method of the input attribute specified in the pixel shader based on the received triangle information of the second thread, and sends the interpolation result to the execution unit. The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the second thread information and the color value returned by the pixel write back unit, and sends the color value to the output merging unit after execution is completed. The output merging unit writes the color data into the frame buffer and sends a request information for releasing the second thread Warp1 to the thread sorting unit.

[0145] In this embodiment, after the first thread is executed, the second thread is executed based on the thread information cache, thread synchronization unit, thread sorting unit, pixel write back unit, interpolation unit and execution unit to complete the drawing of the third triangle, thereby improving the flexibility and scalability of pixel blending.

[0146] It should be understood that, although the various steps in the flowcharts involved in the various embodiments described above are displayed in sequence according to the instructions of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowcharts involved in the various embodiments described above can include multiple steps or multiple stages, and these steps or stages are not necessarily executed and completed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of steps or stages in other steps.

[0147] Based on the same inventive concept, embodiments of the present application further provide a programmable pixel mixing device for implementing the programmable pixel mixing method described above. The solution provided by this device is similar to the solution described in the method described above. Therefore, the specific limitations of one or more programmable pixel mixing device embodiments provided below can be found in the above-mentioned limitations of the programmable pixel mixing method and will not be further elaborated here.

[0148] In one embodiment, Figure 9 As shown, a programmable pixel mixing device is provided, including: a rasterization module 902, an assembly module 904, an execution module 906 and an output merging module 908, wherein:

[0149] A rasterization module 902 is configured to perform rasterization processing on the first triangle, the second triangle, and the third triangle through a rasterization unit to obtain triangle coverage information corresponding to each triangle;

[0150] An assembly module 904 is configured to send the triangle coverage information to a thread assembly unit and a thread sorting unit respectively. The thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread from a thread application interface according to the first thread information.

[0151] an execution module 906, configured to execute the first thread based on the thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write-back unit, the interpolation unit, and the execution unit;

[0152] The output merging module 908 is configured to enable the thread assembling unit to continue assembling the third triangle after the first thread is executed, thereby completing the drawing of the third triangle.

[0153] The above-mentioned programmable pixel mixing device performs rasterization processing on the first triangle, the second triangle and the third triangle through the rasterization unit to obtain triangle coverage information corresponding to each triangle; the triangle coverage information is sent to the thread assembly unit and the thread sorting unit respectively, the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to the thread application interface according to the first thread information, executes the first thread based on the thread information cache, the thread synchronization unit, the thread sorting unit, the pixel write back unit, the interpolation unit and the execution unit, after the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle, thereby improving the flexibility and scalability of pixel mixing.

[0154] Each module in the programmable pixel blending device can be implemented in whole or in part through software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in the computer device in the form of software, so that the processor can call and execute the corresponding operations of each module.

[0155] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 10 As shown. The computer device includes a processor, a memory, and a network interface connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a programmable pixel blending method is implemented.

[0156] Those skilled in the art will understand that Figure 10 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0157] In one embodiment, a computer device is provided, comprising a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the following steps when executing the computer program: rasterizing a first triangle, a second triangle, and a third triangle through a rasterization unit to obtain triangle coverage information corresponding to each triangle; sending the triangle coverage information to a thread assembly unit and a thread sorting unit, respectively; the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to a thread application interface based on the first thread information; executing the first thread based on a thread information cache, a thread synchronization unit, a thread sorting unit, a pixel write back unit, an interpolation unit, and an execution unit; after the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle.

[0158] In one embodiment, when the processor executes the computer program, the following steps are further implemented: the thread assembly unit assembles the third triangle into a second thread, the thread sorting unit performs a hit / miss test based on the received second thread information, and if the test result is miss, sends a start signal to the pixel write back unit; the pixel write back unit reads the color value of the pixel in the second thread from the frame buffer and sends the color value to the execution unit; the interpolation unit interpolates the pixel points inside the triangle according to the interpolation method of the input attribute specified in the pixel shader based on the received triangle information of the second thread, and sends the interpolation result to the execution unit; the execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the second thread information and the color value returned by the pixel write back unit, and sends the color value to the output merging unit after execution is completed; the output merging unit writes the color data into the frame buffer and sends a request information for releasing the second thread to the thread sorting unit.

[0159] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented: rasterizing a first triangle, a second triangle, and a third triangle through a rasterization unit to obtain triangle coverage information corresponding to each triangle; sending the triangle coverage information to a thread assembly unit and a thread sorting unit respectively, the thread assembly unit assembling the first triangle and the second triangle into a first thread, and applying for a thread to a thread application interface based on the first thread information; executing the first thread based on a thread information cache, a thread synchronization unit, a thread sorting unit, a pixel write back unit, an interpolation unit, and an execution unit; after the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle.

[0160] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: the thread assembly unit assembles the third triangle into a second thread, the thread sorting unit performs a hit / miss test based on the received second thread information, and if the test result is miss, sends a start signal to the pixel write back unit; the pixel write back unit reads the color value of the pixel in the second thread from the frame buffer and sends the color value to the execution unit; the interpolation unit interpolates the pixel points inside the triangle according to the interpolation method of the input attribute specified in the pixel shader based on the received triangle information of the second thread, and sends the interpolation result to the execution unit; the execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the second thread information and the color value returned by the pixel write back unit, and sends the color value to the output merging unit after execution is completed; the output merging unit writes the color data into the frame buffer and sends a request information for releasing the second thread to the thread sorting unit.

[0161] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0162] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, database or other media used in the embodiments provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory may include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, distributed databases based on blockchains. The processor involved in the various embodiments provided herein may be, but are not limited to, a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, and the like.

[0163] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0164] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A programmable pixel mixing pipeline device, characterized in that: include: A rasterization unit, used to rasterize triangles; Output merging unit, used to combine the depth and shading of a single fragment generated on the pixel shader with the framebuffer; A thread assembly unit, used to assemble hardware threads; An interpolation unit, which is used to interpolate based on the input attributes of the pixel shader and send a thread end signal to the execution unit; The pixel shader construction unit is used to allocate resources required by threads; Execution unit, used to execute instructions in various shaders; A thread overlap detection unit, used to detect whether different pixels in a thread overlap; A thread sorting unit is used to sort different threads to ensure that multiple threads with overlapping pixels are executed in the order in which the threads are started; The pixel write-back unit is used to read the color value of the pixel in the current thread from the frame buffer and assemble it into a Quad and return it to the execution unit; The thread overlap detection unit specifically includes: A triangle memory, used to store triangles in the thread currently being assembled; wherein the stored information includes but is not limited to position information, pixel coverage information, and information on whether the current triangle is valid; a control unit, configured to receive an input triangle and send a read request to the triangle memory; The memory read interface and the memory write interface are used to represent the read and write interfaces of the triangle memory; wherein the memory write interface is also used to receive a release request sent by an external module and mark the triangle to be released as invalid; The triangle overlap comparator is used to determine whether there is overlap between two triangles in the screen space. If there is pixel overlap, the currently assembling thread is forced to start; otherwise, the input triangle will be written to the memory and the triangle will be forwarded to the lower-level module.

2. The programmable pixel mixing pipeline device according to claim 1, characterized in that: The thread sorting unit specifically includes: An input buffer for receiving and storing input triangles; The thread splitting unit is used to determine the number of triangles in the input buffer that belong to the current thread according to the number of Quads in the thread information; if a triangle spans two threads, the triangle is split into two parts, the sub-triangles in the front part belong to the current thread, and the sub-triangles in the back part belong to the next thread; The intermediate buffer is used to store all triangles contained in the current thread; Triangle memory, used to store all triangles in the previous thread; the stored information includes but is not limited to: position information, pixel coverage information, and information on whether the current triangle is valid; A triangle memory control unit, used to control the reading and writing of the memory and release the specified triangle; The hit / miss test unit is used to compare the triangles in the current thread with the triangles in the triangle memory. If the two overlap in the screen space, it is considered a hit, otherwise it is a miss. If the result is a hit, the current thread will be blocked from entering the triangle memory. If the result is a miss, all triangles of the current thread will be written into the triangle memory, and a start signal will be sent to the pixel write back unit. The traversal unit is used to traverse all triangles in the intermediate buffer and write them into the triangle memory, and send a start signal to the lower-level module at the same time.

3. The programmable pixel mixing pipeline device according to claim 2, characterized in that: The pixel write-back unit specifically includes: An address calculation unit, used to calculate the address of each pixel in the storage space; The memory access interface is the interface for accessing the physical space where the frame buffer is located; Pixel color buffer, used to receive and store data returned by the frame buffer; The Quad assembly unit is used to read the color value of the current Quad from the pixel buffer and then assemble the color value into the Quad; A format conversion unit, used to convert the pixel storage format of the rendering object into a data format required by the execution unit; The Quad merging unit is used to assemble the maximum number of Quad data according to the width of the interface and send it to the execution unit; after the colors of all pixels in the current thread are returned to the execution unit, a thread end signal is sent to the execution unit, and the execution unit starts to execute the instructions in the thread after receiving the signal.

4. A programmable pixel mixing method, applicable to the programmable pixel mixing pipeline device in claim 1, characterized in that: The method comprises: Performing rasterization processing on the first triangle, the second triangle, and the third triangle by a rasterization unit to obtain triangle coverage information corresponding to each triangle; Sending the triangle coverage information to a thread assembly unit and a thread sorting unit respectively, wherein the thread assembly unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to a thread application interface according to the first thread information; executing the first thread based on a thread information buffer, a thread synchronization unit, a thread sorting unit, a pixel write-back unit, an interpolation unit, and an execution unit; After the first thread is executed, the thread assembly unit continues to assemble the third triangle to complete the drawing of the third triangle.

5. The method according to claim 4, characterized in that The executing the first thread based on the thread information buffer, the thread synchronization unit, the thread sorting unit, the pixel write back unit, the interpolation unit and the execution unit comprises: The thread information buffer receives and stores the first thread information, the thread synchronization unit reads the corresponding triangle from the input buffer according to the first thread information, and sends the first thread information to the thread sorting unit and the interpolation unit; The thread sorting unit performs a hit / miss test according to the received first thread information, and if the test result is a miss, sends a start signal to the pixel write back unit; The pixel write-back unit reads the color value of the pixel in the first thread from the frame buffer and sends the color value to the execution unit; The interpolation unit interpolates the pixel points inside the triangle according to the received triangle information of the first thread and the interpolation method of the input attribute specified in the pixel shader, and sends the interpolation result to the execution unit; The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the first thread information and the color value returned by the pixel write-back unit, and sends the color value to the output merging unit after the execution is completed; The output merging unit writes the color data into the frame buffer, and sends a request message for releasing the first thread to the thread sorting unit.

6. The method according to claim 5, characterized in that The thread assembly unit continues to assemble the third triangle, and completing the drawing of the third triangle includes: The thread assembly unit assembles the third triangle into a second thread, and the thread sorting unit performs a hit / miss test according to the received second thread information, and sends a start signal to the pixel write back unit if the test result is miss; The pixel write-back unit reads the color value of the pixel in the second thread from the frame buffer and sends the color value to the execution unit; The interpolation unit interpolates the pixel points inside the triangle according to the received triangle information of the second thread and the interpolation method of the input attribute specified in the pixel shader, and sends the interpolation result to the execution unit; The execution unit executes each instruction in the pixel shader based on the input attribute value of each Quad in the second thread information and the color value returned by the pixel write-back unit, and sends the color value to the output merging unit after the execution is completed; The output merging unit writes the color data into the frame buffer, and sends a request message for releasing the second thread to the thread sorting unit.

7. A programmable pixel mixing device, characterized in that: The device comprises: A rasterization module, used for performing rasterization processing on the first triangle, the second triangle and the third triangle through a rasterization unit to obtain triangle coverage information corresponding to each triangle; An assembling module, configured to send the triangle coverage information to a thread assembling unit and a thread sorting unit respectively, wherein the thread assembling unit assembles the first triangle and the second triangle into a first thread, and applies for a thread to a thread application interface according to the first thread information; an execution module, configured to execute the first thread based on a thread information buffer, a thread synchronization unit, a thread sorting unit, a pixel write-back unit, an interpolation unit, and an execution unit; an output merging module, configured to enable the thread assembling unit to continue assembling the third triangle after the first thread is executed, so as to complete drawing the third triangle; A thread overlap detection unit, used to detect whether different pixels in a thread overlap; The thread overlap detection unit specifically includes: A triangle memory, used to store triangles in the thread currently being assembled; wherein the stored information includes but is not limited to position information, pixel coverage information, and information on whether the current triangle is valid; a control unit, configured to receive an input triangle and send a read request to the triangle memory; The memory read interface and the memory write interface are used to represent the read and write interfaces of the triangle memory; wherein the memory write interface is also used to receive a release request sent by an external module and mark the triangle to be released as invalid; The triangle overlap comparator is used to determine whether there is overlap between two triangles in the screen space. If there is pixel overlap, the currently assembling thread is forced to start; otherwise, the input triangle will be written to the memory and the triangle will be forwarded to the lower-level module.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 4 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 4 to 6 are implemented.

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