Standard cell layout automatic transplantation method, device, terminal and storage medium

By pre-processing the level of standard units and angular hook chain algorithm calculation, the automatic transplantation of standard unit layout is achieved, solving the problem of gate size changes between different processes, and improving the transplant efficiency and accuracy.

CN118332995BActive Publication Date: 2025-01-17SUZHOU TENGXIN MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202410429836.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-04-10
Publication Date
2025-01-17
Estimated Expiration
2044-04-10

AI Technical Summary

Technical Problem

During semiconductor manufacturing, when the standard unit layout is transplanted between different processes or Foundary, the gate size will change, resulting in a lot of time for manual modification by layout engineers, and the accuracy and consistency of the transplantation are difficult to ensure.

Method used

By preprocessing the level of standard units, the gate structure and hierarchy information is determined, the angle hook chain algorithm is used to calculate the extended value and offset value, and the updated core layer, connection layer and boundary layer are generated to achieve automated layout transplantation.

Benefits of technology

It greatly shortens the cycle of standard unit layout transplantation, improves engineers' work efficiency, ensures the consistency of layout structure and functions after transplantation, reduces interference from human factors, and improves the accuracy of transplantation.

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Abstract

The present application discloses a method, device, terminal and storage medium for automatic layout transplantation of a standard cell, wherein the method includes obtaining an original standard cell from a standard cell library, obtaining all levels of the original standard cell; preprocessing all levels, obtaining the gate structure of the original standard cell and the hierarchical information of the original standard cell according to the preprocessing result; processing the gate structure and the core layer by a preset processing method, obtaining the extension value of the gate structure and the actual offset value of the core layer, generating an updated core layer according to the extension value and the actual offset value; determining the offset result of the connection layer connected to the core layer according to the actual offset value, generating an updated connection layer according to the offset result; generating an updated boundary layer according to the hierarchical information, the updated core layer and the updated connection layer; summarizing the updated core layer, the updated connection layer and the updated boundary layer to obtain the transplanted updated standard cell. The present application realizes the automatic transplantation of the standard cell layout, and improves the transplantation efficiency and accuracy.
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Description

Technical Field

[0001] The present application relates to the field of electronic design automation, and in particular to a method, device, terminal and storage medium for automatic layout transplantation of standard cells. Background Art

[0002] In integrated circuit design, Cell refers to a pre-designed circuit module with specific functions. These cells are usually standardized so that they can be reused in larger-scale circuit designs, so they are also called standard cells.

[0003] During the semiconductor manufacturing process, when the standard cell layout is ported between different processes or different foundries, the gate size will change. There are thousands of standard cells in each standard cell library. If each standard cell is modified manually, it will take a lot of time for the layout engineer, and the accuracy and consistency of the porting cannot be guaranteed.

[0004] Therefore, how to automatically migrate the layout between different standard cells to improve the work efficiency of engineers and the accuracy of layout migration is an urgent problem to be solved by technical personnel in this field. Summary of the invention

[0005] In order to reduce the workload of layout engineers and improve the efficiency and accuracy of layout migration between standard cells, the present application provides a method, device, terminal and storage medium for automatic layout migration of standard cells.

[0006] In a first aspect, the present application provides a method for automatic layout transplantation of a standard cell, which adopts the following technical solution: A method for automatic layout transplantation of a standard cell, comprising the following steps:

[0007] Acquire an original standard cell from a standard cell library, and obtain all layers of the original standard cell, wherein the layers at least include a core layer, a connection layer, and a boundary layer;

[0008] Preprocessing all the layers to obtain a preprocessing result, and obtaining the gate structure of the original standard cell and the layer information of the original standard cell according to the preprocessing result;

[0009] Processing the gate structure and the core layer by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and generating an updated core layer according to the extension value and the actual offset value;

[0010] Determine the offset result of the connection layer according to the actual offset value, and generate an updated connection layer according to the offset result; generate an updated boundary layer according to the layer information, the updated core layer and the updated connection layer;

[0011] The updated core layer, the updated connection layer and the updated boundary layer are aggregated to obtain a transplanted updated standard unit.

[0012] By adopting the above technical solution, the gate structure of the original standard cell is obtained according to all the levels of the original standard cell, and the offset value of the element structure in the core layer, the connection layer and the boundary layer is determined by the extension value of the gate structure, and then all the updated levels are obtained, completing the automated layout transplantation and improving the work efficiency of engineers.

[0013] Preferably, the preprocessing of all the layers to obtain a preprocessing result, and obtaining the gate structure of the original standard cell and the hierarchical information of the original standard cell according to the preprocessing result, specifically includes the following steps: breaking up all the layers in the original standard cell, and reorganizing all the broken up layers to obtain a flat unit, each of the layers includes a polygonal element structure, in the flat unit, all the element structures are merged into the same layer, the core layer is a polysilicon layer and a diffusion layer, and an overlapping area of ​​the polysilicon layer and the diffusion layer is obtained from the flat unit, and the gate structure of the original standard cell is determined according to the overlapping area;

[0014] Acquire the hierarchical information of the original standard cell from the flat cell, wherein the hierarchical information includes distance information between each of the hierarchical levels;

[0015] A preset setting file is obtained, wherein the setting file specifies the size of the gate structure after transplantation, the gate structure is compared with the gate structure after transplantation to obtain a comparison result, and the gate structure is divided into two categories according to the comparison result: horizontal rightward expansion and vertical upward expansion.

[0016] By adopting the above technical solution, all levels of structures in the original standard unit to be transplanted are broken up, the gate structure of the original standard unit is obtained based on the overlapping area, and the gate structure is classified into two types: rightward expansion and upward expansion, which are processed separately, providing a classification basis for subsequent automated processing.

[0017] Preferably, the gate structure and the core layer are processed by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and an updated core layer is generated according to the extension value and the actual offset value, specifically comprising the following steps:

[0018] For the gate structure extending horizontally to the right, vertically cut the element structure in the polysilicon layer and the diffusion layer into a plurality of vertically cut rectangles, and store the vertically cut rectangles into the created corner hook chain object;

[0019] Each gate structure that is horizontally extended to the right is positioned by the angle hook link object to obtain the vertical cut rectangle corresponding to each gate structure, the positioned vertical cut rectangle is identified as a gate rectangle, the extension value of the current gate rectangle is set according to the setting file, all the affected vertical cut rectangles on the right side of the current gate rectangle are confirmed by a preset angle hook link algorithm, and the offset value of the affected vertical cut rectangle is obtained, and the offset value is the same as the extension value of the current gate rectangle;

[0020] The expansion value of each gate rectangle and all the offset values ​​of each corresponding vertical cut rectangle are obtained from left to right, and stored in the corner hook link object, and the actual offset value of each vertical cut rectangle is obtained according to a preset calculation rule;

[0021] The gate structure corresponding to each gate rectangle is expanded to the right according to the expansion value, and each affected vertical cut rectangle is processed according to the actual offset value to obtain a result of the right expansion of the core layer.

[0022] By adopting the above technical solution, the corner hook chain data structure algorithm is used to determine which rectangles will be affected by the expanded gate structure, and the expansion value is passed to the affected rectangles. All offset values ​​of the affected rectangles are calculated, and the rectangles are shifted according to the sum of all offset values. The rightward expansion and transplantation of the element structure of the core layer is completed, providing a data basis for the subsequent transplantation of the connection layer.

[0023] Preferably, determining the offset result of the connection layer connected to the core layer according to the actual offset value, and generating an updated connection layer according to the offset result specifically comprises the following steps:

[0024] The connection layer includes a contact layer and a first metal layer. Each contact in the contact layer is located according to the corner hook link object, and the vertical cut rectangle connected to the contact in the diffusion layer is determined to obtain the actual offset value of the vertical cut rectangle. The offset value of the contact is the actual offset value of the vertical cut rectangle. The contact layer is transplanted according to the actual offset value to obtain the result of transplanting the contact layer to the right.

[0025] The first metal layer is cut horizontally, and the metal rectangle obtained after cutting is added to the angle hook link object. The result of transplanting the first metal layer to the right is obtained according to the offset value of the angle hook link object and the contact layer.

[0026] By adopting the above technical solution, the offset result of the contact layer connected to the diffusion layer is obtained based on the offset result of the diffusion layer, and then the offset result of the first metal layer connected to the contact layer is generated through the angle hook chain data structure algorithm and the offset result of the contact layer, providing a data basis for the subsequent offset of other metal layers and via layers.

[0027] Preferably, after obtaining and updating the first metal layer, the following steps are also included:

[0028] The connection layer also includes a plurality of via layers and other metal layers except the first metal layer, the contact layer is connected to the first metal layer, the via layer is connected to the other metal layers, and each of the via layers has a corresponding other metal layer; the offset value of each via in the via layer is obtained according to the result of the rightward transplantation of the first metal layer, and the via layer is transplanted according to the offset value of the via to obtain the result of the rightward transplantation of the via layer;

[0029] Then, the other metal layers corresponding to the current via layer are horizontally cut, and the metal rectangle obtained after cutting is added to the angle hook chain object. The metal layer transplantation results to the right of the other metal layers are obtained according to the offset values ​​of the angle hook chain object and the via layer. After all the via layers and the corresponding other metal layers are processed in turn, the contact layer transplantation results to the right, the first metal layer transplantation results to the right, the via layer transplantation results to the right and the metal layer transplantation results to the right are summarized to obtain the connection layer transplantation results to the right.

[0030] By adopting the above technical solution, the offset result of the via layer connected to the first metal layer is obtained based on the offset result of the first metal layer, and then the offset results of other metal layers connected to the via layer are generated through the angle hook data structure algorithm and the offset result of the via layer, thereby completing the rightward transplantation of the element structure of the connecting layer.

[0031] Preferably, the method further comprises the following steps:

[0032] For the gate structure that is vertically extended upward, the element structure in the polysilicon layer and the diffusion layer is horizontally cut into a number of cross-cut rectangles, and the cross-cut rectangles are stored in the corner hook link object to generate a core layer upward extension result and a connection layer upward transplantation result, and all metal layers in the connection layer are cut vertically;

[0033] The result of the rightward expansion of the core layer and the result of the upward expansion of the core layer are summarized to obtain an updated core layer, and the result of the rightward transplantation of the connection layer and the result of the upward transplantation of the connection layer are summarized to obtain an updated connection layer.

[0034] By adopting the above technical solution, the gate structure that expands vertically upward is expanded upward according to the previous step method of horizontally expanding to the right, so that the gate structures expanded in two different directions do not affect each other, ensuring the accuracy and consistency of the transplantation. After obtaining the results of upward expansion and transplantation, the upward and rightward results are merged to obtain a complete transplanted core layer and connection layer.

[0035] Preferably, generating an updated boundary layer according to the distance information, the updated core layer and the updated connection layer specifically comprises the following steps:

[0036] The element structures in the core layer and the connection layer are merged to obtain a maximum element structure range, the interval distance between the boundary range of the boundary layer and the maximum element structure range is determined based on the distance information in the hierarchical information, the updated maximum element structure range is obtained based on the updated core layer and the updated connection layer, and an updated boundary layer is created by combining the interval distance and the updated maximum element structure range.

[0037] By adopting the above technical solution, since the distance between the boundary range of the boundary layer and the maximum element structure of the remaining layers is unchanged, it is possible to create a transplanted update boundary layer based on this distance, combined with the remaining transplanted update core layers and update connection layers, and then obtain a complete transplanted update standard unit.

[0038] In a second aspect, the present application provides a layout automation transplantation device for standard cells, which adopts the following technical solution:

[0039] A layout automatic transplantation device for standard cells, comprising the following modules:

[0040] The original standard cell processing module is configured to obtain an original standard cell from a standard cell library, obtain all layers of the original standard cell, and the layers at least include a core layer, a connection layer, and a boundary layer; preprocess all the layers to obtain a preprocessing result, and obtain a gate structure of the original standard cell and hierarchical information of the original standard cell according to the preprocessing result;

[0041] A core layer update module is configured to process the gate structure and the core layer by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and generate an updated core layer according to the extension value and the actual offset value;

[0042] a connection layer update module, configured to determine an offset result of the connection layer connected to the core layer according to the actual offset value, and generate an updated connection layer according to the offset result;

[0043] The update standard cell generation module is configured to generate an update boundary layer according to the distance information, the update core layer and the update connection layer; and to aggregate the update core layer, the update connection layer and the update boundary layer to obtain a transplanted update standard cell.

[0044] By adopting the above technical solutions, a complete system for automatic layout migration has been built, which provides the necessary software technical support for the efficient migration of standard units in electronic design, significantly improves the efficiency and accuracy of the design and migration process, and meets the requirements of technological progress.

[0045] In a third aspect, the present application provides a smart terminal, which adopts the following technical solution:

[0046] An intelligent terminal includes a memory and a processor, wherein the memory stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the layout automatic transplantation method of the standard unit as described above.

[0047] In a fourth aspect, the present application provides a computer-readable storage medium, which adopts the following technical solution:

[0048] A computer-readable storage medium stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the layout automation transplantation method of the standard unit as described above.

[0049] In summary, this application has at least the following beneficial effects:

[0050] 1. The method of the present application breaks up the hierarchy of standard cells and combines the corner hook chain algorithm to determine the influence relationship between the element structures in the hierarchy. It can automatically complete the core work of layout transplantation of standard cells in a short time, greatly shortening the transplantation cycle and significantly improving the work efficiency of engineers.

[0051] 2. The method of the present application classifies the gate structure of the standard unit so that the rightward and upward expansion and transplantation do not affect each other, thereby reducing the possibility of transplantation errors. At the same time, since the processing process in the two directions is consistent, the consistency of the structure and function of the transplanted layout with the original layout can be ensured; and the interference of human factors is avoided through automated transplantation processing, further improving the accuracy of layout transplantation. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 It is a flow chart of a method for automatic layout transplantation of a standard cell according to an embodiment of the present application;

[0053] Figure 2 It is a schematic diagram of the vertical cutting process of the layout automatic transplantation method of the standard cell of the embodiment of the present application;

[0054] Figure 3 It is a hierarchical structure diagram of a layout automation transplantation method of a standard cell in an embodiment of the present application;

[0055] Figure 4 It is a schematic diagram of the architecture of the layout automatic transplantation device of the standard unit in the embodiment of the present application. DETAILED DESCRIPTION

[0056] The present application provides a method, device, terminal and storage medium for automatic layout transplantation of a standard unit. In order to make the purpose, technical solution and advantages of the present application clearer, the implementation method of the present application will be further described in detail below.

[0057] The following is a further detailed description of an embodiment of a method for automatic layout transplantation of a standard cell of the present application in conjunction with the accompanying drawings.

[0058] The present invention provides a layout automation transplantation method for a standard unit, the process is as follows Figure 1 As shown, the following steps are included:

[0059] S1. Obtain an original standard cell from a standard cell library, and obtain all layers of the original standard cell, where the layers at least include a core layer, a connection layer, and a boundary layer.

[0060] S2. Preprocess all the layers to obtain preprocessing results, and obtain the gate structure of the original standard cell and the hierarchical information of the original standard cell according to the preprocessing results. This step specifically includes the following process.

[0061] S21. Flatten all the levels in the original standard cell. In the field of electronic design automation, the flattening operation is mainly used to flatten the hierarchical structure of the layout design, which helps to view and manage the details of each level.

[0062] S22. All the broken levels are reorganized into flat units, each of which includes polygonal element structures. These polygonal element structures can represent the shape and size of the layout of each level. In the flat unit, all element structures are merged into the same layer. Through the breaking process, the element structures of all levels in the current original standard unit can be clearly seen.

[0063] S23. In an implementable specific scheme, the core layers are a polysilicon layer (poly layer) and a diffusion layer (diffusion), and the overlapping area of ​​the polysilicon layer and the diffusion layer is obtained from the flat unit. Specifically, AND processing is performed on the element structures in the polysilicon layer and the diffusion layer, and the result obtained is the overlapping area of ​​the two layers. Since the gate structure (gate) is the part where the polysilicon layer and the diffusion layer intersect, the gate structure of the original standard unit can be determined based on the overlapping area.

[0064] S24. Obtaining the hierarchical information of the original standard cell from the flat cell, the hierarchical information includes distance information between each level, specifically including the range size of the element structure of each level, through which the distance between the ranges of the element structures of each level can be inferred.

[0065] S25. Obtain a preset setting file, which is prepared in advance by an engineer. The setting file specifies the size of the gate structure after transplantation. The gate structure is compared with the gate structure after transplantation specified in the setting file to obtain a comparison result. According to the comparison result, the gate structure is divided into two categories: horizontal rightward expansion and vertical upward expansion.

[0066] In an implementable specific scheme, the above process specifically compares the sizes of the gate structures before and after transplantation. For example, if the horizontal length of the gate structure after transplantation specified in the setting file is longer than the horizontal length of the gate structure in the current original standard unit, it means that the gate structure is a type of horizontal rightward expansion. If the vertical length of the gate structure after transplantation specified in the setting file is longer than the vertical length of the gate structure in the current original standard unit, it means that the gate structure is a type of vertical upward expansion. It should be noted that each gate structure will only expand in one direction, that is, horizontal expansion or vertical expansion cannot exist in a gate structure at the same time.

[0067] S3. Process the gate structure and the core layer by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and generate an updated core layer based on the extension value and the actual offset value. This step specifically includes the following process.

[0068] In an implementable specific solution, in order to prevent the gate structures extending horizontally to the right and vertically upward from influencing each other during the extension process, these two types are processed separately, and the gate structure extending horizontally to the right is processed first.

[0069] S31, such as Figure 2 As shown, for the gate structure extending horizontally to the right, the element structure in the polysilicon layer and the diffusion layer is vertically cut into a plurality of vertically cut rectangles. Figure 2The red structure is the polysilicon layer, and the blue structure is the diffusion layer. Since the gate structure is the overlapping part of the polysilicon layer and the diffusion layer, Figure 2 There are 6 gate structures; A is a schematic diagram of the initial overlapping structure of the polysilicon layer and the diffusion layer, and horizontal lines and vertical dividing lines are divided in B.

[0070] First, perform NOT processing on the diffusion layer and the polysilicon layer to obtain diff_no_gate. diff_no_gate is the element structure of the diffusion layer after removing the gate structure. The element structure of the polygons in the polysilicon layer and diff_no_gate is vertically cut into several vertically cut rectangles, and the vertically cut rectangles obtained by cutting are stored in the created corner hook chain object.

[0071] Corner stitching is a data structure used to represent the positional relationship between rectangles in two-dimensional space. Each rectangle is represented by four corner points and links are established with other rectangles through these corner points. It mainly provides an efficient way to store and access the relative positional relationship between rectangles in two-dimensional space. It is often used to deal with problems involving rectangular objects in two-dimensional space, such as spatial queries.

[0072] S32. Position each gate structure extending horizontally to the right through the corner hook link object to obtain a vertical cut rectangle corresponding to each gate structure, and identify the positioned vertical cut rectangle as a gate rectangle.

[0073] The above-mentioned corner hook link object stores the rectangles cut from the polygon in a two-dimensional plane. Each rectangle has four pointers pointing to other rectangles in four directions. This structure can be used to quickly locate the corner points of the gate structure, thereby locating the gate rectangle corresponding to the gate structure.

[0074] S33, setting the extension value of the current gate rectangle according to the setting file, and confirming all affected vertical cut rectangles on the right side of the current gate rectangle through a preset corner hook chain algorithm;

[0075] In a specific feasible scheme, the expansion value is first assigned to the current gate rectangle, and a two-dimensional coordinate system is created in the corner hook link object. The pointers pointing to the surrounding areas of the gate rectangle are used to check whether the vertical cut rectangle on the right will be affected after the current gate rectangle has increased the expansion value. This can be simply understood as traversing the vertical cut rectangle on the right and judging whether it is affected based on the y coordinates of the gate rectangle and the vertical cut rectangle.

[0076] For example, each rectangle has two y coordinates, upper and lower. If the maximum y coordinate of the gate rectangle on the left is smaller than the minimum y coordinate of the vertically cut rectangle adjacent to the right, or the minimum y coordinate of the gate rectangle on the left is larger than the maximum y coordinate of the vertically cut rectangle adjacent to the right, it means that even if the gate rectangle expands to the right, it will not collide with the vertically cut rectangle on the right, and will not affect the vertically cut rectangle.

[0077] Similarly, the offset vertical cut rectangle can also determine the affected vertical cut rectangle on the right side according to this method, and the offset value is transferred to the right in sequence. According to this method, all affected vertical cut rectangles on the right side of the gate structure can be determined.

[0078] S34, obtaining the offset value of the affected vertical cut rectangle, the offset value being the same as the expansion value of the current gate rectangle. If it is the opposite of the above situation, the gate structure expands to the right and affects the vertical cut rectangle on the right, then all the affected vertical cut rectangles will be offset to the right by the same value as the gate rectangle expands to the right.

[0079] S35. Obtain the expansion value of each gate rectangle and all the corresponding offset values ​​of each affected vertical cut rectangle from left to right, and store them in the corner hook link object.

[0080] Some vertical cut rectangles may be offset several times because they may be affected by several gate structures extending horizontally to the right. Therefore, the offset value of each vertical cut rectangle is calculated in sequence from left to right, and the offset value of each vertical cut rectangle is stored in the corner hook link object.

[0081] S35, obtaining the actual offset value of each vertical cut rectangle according to a preset calculation rule. In an implementable specific solution, the calculation rule is to add up the offset values ​​of each vertical cut rectangle, and the obtained total offset value is the actual offset value of the current vertical cut rectangle, and the actual offset value of each vertical cut rectangle is calculated in turn.

[0082] S36. Expand the gate structure corresponding to each gate rectangle in the corner hook chain object to the right according to the expansion value, process each affected vertical cut rectangle according to the actual offset value, take out each vertical cut rectangle corresponding to the polysilicon layer and the diffusion layer in the corner hook chain object, add the expansion value and the actual offset value stored in the corner hook chain object, and obtain the result of the right expansion of the core layer, wherein the gate rectangle will expand to the right according to the expansion value of the corresponding gate structure.

[0083] In the above-mentioned result of the core layer expanding to the right, the polysilicon layer is directly converted from the corner hook link object, and because the gate structure part of the diffusion layer is removed, in addition to being converted from the corner hook link object, the gate structure part before expansion also needs to be added and filled into the corresponding part of the diffusion layer.

[0084] S4. Determine the offset result of the connection layer connected to the core layer according to the actual offset value, and generate an updated connection layer according to the offset result. This step specifically includes the following process.

[0085] S41, the connection layer includes the contact layer and the first metal layer, and each contact in the contact layer is located according to the angle hook link object, and the vertical cut rectangle connected to the contact in the diffusion layer is determined, specifically, the coordinates of the input contact are located according to the coordinates of a vertical cut rectangle in the angle hook link object, and the vertical cut rectangle of the diffusion layer connected to the contact can be obtained. In an practicable specific solution,

[0086] S42, obtaining the actual offset value of the vertical cut rectangle of the diffusion layer. Since contact is connected to the vertical cut rectangle, the offset value of each contact in the contact layer is the actual offset value of the vertical cut rectangle connected to it in the diffusion layer. The contact layer is transplanted according to the actual offset value to obtain the result of transplanting the contact layer to the right.

[0087] S43. Perform horizontal cutting on the first metal layer. Considering that the routing of the metal layer may be relatively long and complex, when expanding to the right, vertical cutting may eventually move the entire layer to the right, while horizontal cutting can only affect the part of the metal layer line, so that the area of ​​the transplanted graphic can be as small as possible.

[0088] S44. Add the metal rectangle obtained after cutting to the corner hook link object, and obtain the result of transplanting the first metal layer to the right according to the offset value of the corner hook link object and the contact layer.

[0089] In an implementable specific scheme, the offset value of each contact is obtained by the method of step S42, and then the offset value of the contact is added to the coordinates of the corresponding contact to obtain a new contact layer. A metal rectangle of the first metal layer is connected to the contact, and the offset value of the contact can be passed to the corresponding metal rectangle in the corner hook link object. The offset value of the metal rectangle is passed to the right through the corner hook link object and assigned to all metal rectangles on the right. Finally, the new first metal layer is calculated, that is, the result of transplanting the above-mentioned first metal layer to the right. The transplantation method of the above-mentioned first metal layer is the same as that of the core layer.

[0090] S5. Obtaining the rightward transplantation results of other metal layers and via layers in the connection layer, specifically including the following steps.

[0091] S51. The connection layer also includes several via layers, such as a via1 layer, a via2 layer, etc., and other metal layers except the first metal layer, such as a second metal layer, a third metal layer, etc.

[0092] Figure 3 The figure shows a schematic diagram of the layers among the polysilicon layer, the diffusion layer, the contact layer, the first metal layer, the via1 layer and the second metal layer in a specific feasible implementation scheme. In the original standard cell, the contact layer is connected to the first metal layer, that is, the contact layer is connected between the diffusion layer / polysilicon layer and the first metal layer, and the via layer is connected to other metal layers, that is, the via1 layer is connected between the first metal layer and the second metal layer, the via2 layer is connected between the second metal layer and the third metal layer, and so on, and each via layer has corresponding other metal layers.

[0093] According to the result of transplanting the first metal layer to the right, the offset value of each via in the via layer is obtained, and according to the offset value of the via, the via layer is transplanted to obtain the result of transplanting the via layer to the right. Similar to steps S41 and S42, since the first metal layer is connected to the via layer, the metal rectangle in the first metal layer connected to the current via can be obtained by inputting the coordinates of a certain via, and the offset value of the current metal rectangle is passed to the current via, and the offset values ​​of all vias are obtained in turn, and the result of transplanting the via layer to the right is obtained. Contact is the element structure in the contact layer, and via is the element structure in the via layer.

[0094] S52. Then horizontally cut the other metal layers corresponding to the current via layer, add the metal rectangle obtained after cutting to the corner hook link object, and obtain the metal layer rightward transplantation results of other metal layers according to the corner hook link object and the offset value of the via layer. The method of generating the metal layer rightward transplantation results of the above-mentioned other metal layers is exactly the same as the method of generating the first metal layer rightward transplantation results in steps S43 and S44, except that contact is replaced by via, which will not be repeated here.

[0095] S53, after processing all via layers and corresponding other metal layers in sequence, the contact layer right transplantation result, the first metal layer right transplantation result, the via layer right transplantation result and the metal layer right transplantation result are summarized to obtain the connection layer right transplantation result.

[0096] S6, after the gate structure is expanded horizontally to the right, the gate structure expanded vertically upward is expanded, which specifically includes the following steps.

[0097] S61. For the gate structure that expands vertically upward, the element structure in the polysilicon layer and the diffusion layer is horizontally cut into several cross-cut rectangles, and the cross-cut rectangles are stored in the corner hook link object to generate the core layer upward expansion result and the connection layer upward transplantation result. All metal layers in the connection layer are cut vertically.

[0098] The above-mentioned vertical upward expansion method is the same as the horizontal rightward expansion method in steps S3 to S5, except that the vertical cutting processing of the element structure of the core layer is changed to horizontal cutting, the expansion and transplantation are in the upward direction, and the horizontal cutting processing of all metal layers in the connection layer is changed to vertical cutting. The rest of the processing logic is exactly the same and will not be repeated here.

[0099] S62, summarizing the rightward expansion result of the core layer and the upward expansion result of the core layer to obtain an updated core layer, and summarizing the rightward transplantation result of the connection layer and the upward transplantation result of the connection layer to obtain an updated connection layer.

[0100] It should be noted that the correct implementation order is to first perform horizontal rightward expansion of the core layer and the connection layer, and then perform vertical upward expansion of the core layer and the connection layer, and finally combine the results of the horizontal rightward and vertical upward processing to obtain the updated core layer and connection layer. For ease of understanding, in the description of the general steps of step S3 and step S4, this embodiment is expressed as processing the core layer first and then the connection layer. The actual processing order should be carried out according to the description of the sub-steps of each general step.

[0101] S7. Generate an updated boundary layer based on the hierarchical information, the updated core layer, and the updated connection layer. This step specifically includes the following process.

[0102] S71. Merge the element structures in the core layer and the connection layer to obtain a maximum element structure range. The maximum element structure range is mainly to obtain the largest layout area in the original standard unit, so that when a new update boundary layer is generated, the new boundary can completely cover the area of ​​the largest layout.

[0103] S72. Determine the interval distance between the boundary range of the boundary layer and the maximum element structure range based on the distance information in the hierarchical information. The hierarchical information includes the element structure ranges of each level, and the distance information includes the calculated interval distances between the element structure ranges of each level.

[0104] S73. Obtain an updated maximum element structure range according to the updated core layer and the updated connection layer, and create an updated boundary layer in combination with the interval distance and the updated maximum element structure range.

[0105] In a specific feasible solution, taking the determination of the boundary range in the horizontal direction as an example, in a two-dimensional coordinate system, the minimum horizontal coordinate x1 and the maximum horizontal coordinate x2 of this range are first determined according to the updated maximum element structure range, then the minimum horizontal coordinate x3 of the updated boundary range in the updated boundary layer is,

[0106] x3=x1-d;

[0107] The maximum horizontal coordinate x4 of the update boundary range in the update boundary layer is,

[0108] x4=x1+d;

[0109] Where d is the distance between the boundary range of the boundary layer and the maximum element structure range.

[0110] S74. The original standard cell also includes boundary-related layers related to the boundary layer. The boundary-related layers include nplus layer, pplus layer and nwell layer, etc. These boundary-related layers belong to doping regions. The layout and configuration of these doping regions are crucial to ensuring the correct function and performance of the circuit.

[0111] In an implementable specific solution, the relevant boundary ranges of the boundary-related layers are larger than the boundary range, and the relevant interval distances between the relevant boundary ranges of these boundary-related layers and the boundary range of the boundary layer are determined from the level information.

[0112] S75. Obtain two horizontal coordinates and two vertical coordinates of the update boundary range from the above step S73, and calculate the horizontal and vertical coordinates of the relevant boundary range of each update boundary related layer according to the horizontal and vertical coordinates of the update boundary range according to the calculation method in the above step S73, thereby generating an update boundary related layer.

[0113] S8. Summarize the updated core layer, the updated connection layer, and the updated boundary layer to obtain the transplanted updated standard unit.

[0114] Based on the same inventive concept as above, the present application also discloses a layout automatic transplantation device for standard cells, the architecture of which is as follows: Figure 4 As shown, the device includes the following modules:

[0115] The original standard cell processing module is configured to obtain an original standard cell from the standard cell library, obtain all layers of the original standard cell, and the layers include at least a core layer, a connection layer, and a boundary layer; preprocess all the layers to obtain a preprocessing result, and obtain a gate structure of the original standard cell and hierarchical information of the original standard cell according to the preprocessing result;

[0116] The core layer update module is configured to process the gate structure and the core layer by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and generate an updated core layer according to the extension value and the actual offset value;

[0117] A connection layer update module is configured to determine an offset result of a connection layer connected to the core layer according to the actual offset value, and generate an updated connection layer according to the offset result;

[0118] The update standard unit generation module is configured to generate an update boundary layer according to the distance information, the update core layer and the update connection layer; and to aggregate the update core layer, the update connection layer and the update boundary layer to obtain a transplanted update standard unit.

[0119] In a specific implementation scheme, the original standard unit processing module includes the following units:

[0120] The gate structure generation unit is configured to break up all the levels in the original standard unit, and reorganize all the broken levels to obtain a flat unit, each level includes a polygonal element structure, in the flat unit, all the element structures are merged into the same layer, the core layer is the polysilicon layer and the diffusion layer, the overlapping area of ​​the polysilicon layer and the diffusion layer is obtained from the flat unit, and the gate structure of the original standard unit is determined based on the overlapping area.

[0121] The hierarchical information acquisition unit is configured to acquire hierarchical information of the original standard cell from the flat cell, wherein the hierarchical information includes distance information between various levels.

[0122] The gate structure classification unit is configured to obtain a preset setting file, which specifies the size of the gate structure after transplantation, compares the gate structure with the gate structure after transplantation to obtain a comparison result, and divides the gate structure into two categories: horizontal rightward expansion and vertical upward expansion based on the comparison result.

[0123] In a specific implementation scheme, the core layer update module includes the following units:

[0124] The element structure cutting unit is configured to vertically cut the element structure in the polysilicon layer and the diffusion layer into a plurality of vertically cut rectangles for the gate structure extending horizontally to the right, and store the vertically cut rectangles into the created corner hook chain object.

[0125] The positioning and expansion unit is configured to position each gate structure that expands horizontally to the right through an angle hook object, obtain the vertical cut rectangle corresponding to each gate structure, identify the located vertical cut rectangle as a gate rectangle, set the expansion value of the current gate rectangle according to a setting file, confirm all affected vertical cut rectangles on the right side of the current gate rectangle through a preset angle hook algorithm, and obtain the offset value of the affected vertical cut rectangle, which is the same as the expansion value of the current gate rectangle.

[0126] The actual offset value calculation unit is configured to obtain the expansion value of each gate rectangle and all the corresponding offset values ​​of each affected vertical cut rectangle from left to right, store them in the corner hook link object, and obtain the actual offset value of each vertical cut rectangle according to the preset calculation rules.

[0127] The core layer rightward expansion result generating unit is configured to rightward expand the gate structure corresponding to each gate rectangle according to the expansion value, and process each affected vertical cut rectangle according to the actual offset value to obtain the core layer rightward expansion result.

[0128] In a specific implementation scheme, the connection layer update module includes the following units:

[0129] The contact layer update unit is configured to connect the contact layer and the first metal layer, locate each contact in the contact layer according to the corner hook link object, and determine the vertical cut rectangle connected to the contact in the diffusion layer, obtain the actual offset value of the vertical cut rectangle, the offset value of the contact is the actual offset value of the vertical cut rectangle, and transplant the contact layer according to the actual offset value to obtain the result of transplanting the contact layer to the right;

[0130] The first metal layer update unit is configured to horizontally cut the first metal layer, add the metal rectangle obtained after cutting to the angle hook link object, and obtain the result of transplanting the first metal layer to the right according to the offset value of the angle hook link object and the contact layer.

[0131] The via layer update unit is configured as a connection layer which also includes several via layers and other metal layers except the first metal layer. The contact layer is connected to the first metal layer, the via layer is connected to the other metal layers, and each via layer has corresponding other metal layers. The offset value of each via in the via layer is obtained according to the result of transplanting the first metal layer to the right, and the via layer is transplanted according to the offset value of the via to obtain the result of transplanting the via layer to the right.

[0132] Other metal layer update units are configured to horizontally cut other metal layers corresponding to the current via layer, add the metal rectangle obtained after cutting to the corner hook chain object, obtain the metal layer rightward migration result of other metal layers according to the corner hook chain object and the offset value of the via layer, and process all the via layers and the corresponding other metal layers in sequence;

[0133] The connection layer right transplant result unit is configured to aggregate the contact layer right transplant result, the first metal layer right transplant result, the via layer right transplant result and the metal layer right transplant result to obtain the connection layer right transplant result.

[0134] In a specific implementation scheme, the standard unit generation module is updated to include the following units:

[0135] The update boundary layer generation unit is configured to merge the element structures in the core layer and the connection layer to obtain a maximum element structure range, determine the interval distance between the boundary range of the boundary layer and the maximum element structure range based on the distance information in the hierarchical information, obtain the updated maximum element structure range based on the updated core layer and the updated connection layer, and create an updated boundary layer in combination with the interval distance and the updated maximum element structure range.

[0136] In a specific possible implementation scheme, a layout automatic transplantation device for standard cells further includes the following modules:

[0137] The vertical upward expansion module is configured to horizontally cut the element structure in the polysilicon layer and the diffusion layer into several cross-cut rectangles for the vertically upward expanded gate structure, store the cross-cut rectangles in the corner hook link object, generate the core layer upward expansion results and the connection layer upward transplantation results, and all metal layers in the connection layer are cut vertically; the core layer right expansion results and the core layer upward expansion results are summarized to obtain an updated core layer, and the connection layer right transplantation results and the connection layer upward transplantation results are summarized to obtain an updated connection layer.

[0138] From the above functional introduction, it can be seen that the standard cell layout automatic transplantation device in this application has built a complete standard cell layout transplantation automation system based on the corner hook chain structure algorithm, which has improved the intelligence and automation level of standard cell layout transplantation in electronic design automation, improved the efficiency and accuracy of layout transplantation, and promoted the sustained, rapid and healthy development of the economy and society.

[0139] Based on the same inventive concept mentioned above, an embodiment of the present application also discloses a computer-readable storage medium, which stores at least one instruction, at least one program, code set or instruction set. The at least one instruction, at least one program, code set or instruction set can be loaded and executed by a processor to implement the layout automation transplantation method of the standard unit provided in the above method embodiment.

[0140] Also based on the same inventive concept mentioned above, an embodiment of the present application also discloses a computer-readable storage medium, in which at least one instruction, at least one program, code set or instruction set is stored, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the layout automation transplantation method of the standard unit as described above.

[0141] Those skilled in the art will appreciate that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in the computer-readable storage medium, which may include, for example, various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0142] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for automatic layout transplantation of a standard cell, characterized in that: The steps include: Obtain an original standard cell from a standard cell library, and obtain all layers of the original standard cell, wherein the layers at least include a core layer, a connection layer, and a boundary layer; preprocess all the layers to obtain a preprocessing result, and obtain a gate structure of the original standard cell and hierarchical information of the original standard cell according to the preprocessing result; Processing the gate structure and the core layer by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and generating an updated core layer according to the extension value and the actual offset value; Determine an offset result of the connection layer connected to the core layer according to the actual offset value, and generate an updated connection layer according to the offset result; generating an update boundary layer according to the layer information, the update core layer and the update connection layer; aggregating the update core layer, the update connection layer and the update boundary layer to obtain a transplanted update standard unit; The preprocessing of all the layers to obtain a preprocessing result, and obtaining the gate structure of the original standard cell and the hierarchical information of the original standard cell according to the preprocessing result, specifically includes the following steps: All the layers in the original standard cell are broken up, and all the broken up layers are reorganized to obtain a flat cell, each of the layers includes a polygonal element structure, and in the flat cell, all the element structures are merged into the same layer, the core layer is a polysilicon layer and a diffusion layer, an overlapping area of ​​the polysilicon layer and the diffusion layer is obtained from the flat cell, and a gate structure of the original standard cell is determined according to the overlapping area; The hierarchical information of the original standard cell is obtained from the flat cell, wherein the hierarchical information includes distance information between the levels.

2. The method for automatic layout transplantation of standard cells according to claim 1, characterized in that: The preprocessing of all the layers to obtain a preprocessing result, and obtaining the gate structure of the original standard cell and the hierarchical information of the original standard cell according to the preprocessing result, further includes the following steps: A preset setting file is obtained, wherein the setting file specifies the size of the gate structure after transplantation, the gate structure is compared with the gate structure after transplantation to obtain a comparison result, and the gate structure is divided into two categories according to the comparison result: horizontal rightward expansion and vertical upward expansion.

3. The method for automatic layout transplantation of standard cells according to claim 2, characterized in that: The gate structure and the core layer are processed by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and an updated core layer is generated according to the extension value and the actual offset value, specifically comprising the following steps: For the gate structure extending horizontally to the right, vertically cut the element structure in the polysilicon layer and the diffusion layer into a plurality of vertically cut rectangles, and store the vertically cut rectangles into the created corner hook chain object; Each gate structure that is horizontally extended to the right is positioned by the angle hook link object to obtain the vertical cut rectangle corresponding to each gate structure, the positioned vertical cut rectangle is identified as a gate rectangle, the extension value of the current gate rectangle is set according to the setting file, all the affected vertical cut rectangles on the right side of the current gate rectangle are confirmed by a preset angle hook link algorithm, and the offset value of the affected vertical cut rectangle is obtained, and the offset value is the same as the extension value of the current gate rectangle; The expansion value of each gate rectangle and all the offset values ​​of each corresponding vertical cut rectangle are obtained from left to right, and stored in the corner hook link object, and the actual offset value of each vertical cut rectangle is obtained according to a preset calculation rule; The gate structure corresponding to each gate rectangle is expanded to the right according to the expansion value, and each affected vertical cut rectangle is processed according to the actual offset value to obtain a result of the right expansion of the core layer.

4. The method for automatic layout transplantation of standard cells according to claim 3, characterized in that: Determining the offset result of the connection layer connected to the core layer according to the actual offset value, and generating an updated connection layer according to the offset result specifically includes the following steps: The connection layer includes a contact layer and a first metal layer. Each contact in the contact layer is located according to the corner hook link object, and the vertical cut rectangle connected to the contact in the diffusion layer is determined to obtain the actual offset value of the vertical cut rectangle. The offset value of the contact is the actual offset value of the vertical cut rectangle. The contact layer is transplanted according to the actual offset value to obtain the result of transplanting the contact layer to the right. The first metal layer is cut horizontally, and the metal rectangle obtained after cutting is added to the angle hook link object. The result of transplanting the first metal layer to the right is obtained according to the offset value of the angle hook link object and the contact layer.

5. The method for automatic layout transplantation of standard cells according to claim 4, characterized in that: After the first metal layer is updated, the following steps are also included: The connection layer further includes a plurality of via layers and other metal layers except the first metal layer, the contact layer is connected to the first metal layer, the via layer is connected to the other metal layers, and each of the via layers has a corresponding other metal layer; Obtaining the offset value of each via in the via layer according to the result of transplanting the first metal layer to the right, and transplanting the via layer according to the offset value of the via to obtain the result of transplanting the via layer to the right; Then, the other metal layers corresponding to the current via layer are horizontally cut, and the metal rectangle obtained after cutting is added to the angle hook chain object. The metal layer transplantation results to the right of the other metal layers are obtained according to the offset values ​​of the angle hook chain object and the via layer. After all the via layers and the corresponding other metal layers are processed in turn, the contact layer transplantation results to the right, the first metal layer transplantation results to the right, the via layer transplantation results to the right and the metal layer transplantation results to the right are summarized to obtain the connection layer transplantation results to the right.

6. The method for automatic layout transplantation of standard cells according to claim 5, characterized in that: The following steps are also included: For the gate structure that is vertically extended upward, the element structure in the polysilicon layer and the diffusion layer is horizontally cut into a number of cross-cut rectangles, and the cross-cut rectangles are stored in the corner hook link object to generate a core layer upward extension result and a connection layer upward transplantation result, and all metal layers in the connection layer are cut vertically; The result of the rightward expansion of the core layer and the result of the upward expansion of the core layer are summarized to obtain an updated core layer, and the result of the rightward transplantation of the connection layer and the result of the upward transplantation of the connection layer are summarized to obtain an updated connection layer.

7. The method for automatic layout transplantation of standard cells according to claim 2, characterized in that: The step of generating an updated boundary layer according to the layer information, the updated core layer and the updated connection layer specifically includes the following steps: The element structures in the core layer and the connection layer are merged to obtain a maximum element structure range, the interval distance between the boundary range of the boundary layer and the maximum element structure range is determined based on the distance information in the hierarchical information, the updated maximum element structure range is obtained based on the updated core layer and the updated connection layer, and an updated boundary layer is created by combining the interval distance and the updated maximum element structure range.

8. A layout automatic transplantation device for standard cells, characterized in that: The steps include: The original standard cell processing module is configured to obtain an original standard cell from a standard cell library, obtain all layers of the original standard cell, and the layers at least include a core layer, a connection layer, and a boundary layer; preprocess all the layers to obtain a preprocessing result, and obtain a gate structure of the original standard cell and hierarchical information of the original standard cell according to the preprocessing result; A core layer update module is configured to process the gate structure and the core layer by a preset processing method to obtain an extension value of the gate structure and an actual offset value of the core layer, and generate an updated core layer according to the extension value and the actual offset value; a connection layer update module, configured to determine an offset result of the connection layer connected to the core layer according to the actual offset value, and generate an updated connection layer according to the offset result; An update standard unit generation module is configured to generate an update boundary layer according to the hierarchical information, the update core layer and the update connection layer; and to aggregate the update core layer, the update connection layer and the update boundary layer to obtain a transplanted update standard unit; The original standard unit processing module includes the following units: The gate structure generation unit is configured to break up all the layers in the original standard cell, reorganize all the broken up layers to obtain a flat cell, each layer includes a polygonal element structure, in the flat cell, all the element structures are merged into the same layer, the core layer is a polysilicon layer and a diffusion layer, obtain an overlapping area of ​​the polysilicon layer and the diffusion layer from the flat cell, and determine the gate structure of the original standard cell according to the overlapping area; The hierarchical information acquisition unit is configured to acquire hierarchical information of the original standard cell from the flat cell, wherein the hierarchical information includes distance information between various levels.

9. An intelligent terminal, characterized in that: It comprises a memory and a processor, wherein the memory stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the layout automatic transplantation method of the standard unit as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The readable storage medium stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the layout automation transplantation method of the standard unit as described in any one of claims 1 to 7.

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