UPS power supply power detection circuit

By designing a UPS power supply power detection circuit including a single unit, total power detection and equalization adjustment module, the problems of small power detection range and unbalanced voltage in the prior art are solved, voltage equalization is achieved, and the service life of the UPS power supply is extended.

CN119001523BActive Publication Date: 2024-12-13FANSHI TECHNOLOGY DEVELOPMENT CO LTD
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Patent Information

Application Number
CN202411480908.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-23
Publication Date
2024-12-13
Estimated Expiration
2044-10-23

AI Technical Summary

Technical Problem

The existing UPS power supply power detection circuit cannot automatically change the detection method according to the number of battery packs, resulting in a small detection range and the average voltage required by each battery pack cannot be calculated, resulting in unbalanced voltage and reducing the service life of the UPS power supply.

Method used

A power detection circuit including a single-unit power detection module, a total power detection module, an average value detection module, a power comparison module and an equalization adjustment module was designed. By detecting the power and total power of each battery pack, each battery pack is calculated. The required power is controlled by the central control module to achieve voltage equalization.

Benefits of technology

It improves the service life of the UPS power supply, and changes the power detection mode according to the number of battery packs, increases the detection range, and ensures that each battery pack reaches the equalization voltage.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The present invention discloses a UPS power supply electric quantity detection circuit, which relates to the technical field of UPS power supply, and comprises a first battery module, a second battery module and a third battery module, all of which are used for energy storage and discharge; a single battery quantity detection module, which is used for electric quantity detection of the first battery module, the second battery module and the third battery module; a total electric quantity detection module, which is used for detecting the total electric quantity; a parameter adjustment module, which is used for providing negative electric energy and adjusting the voltage value of the negative electric energy; a mean value detection module, which is used for calculating the average voltage of a single battery group; an electric quantity comparison module, which is used for comparing the average voltage of a single battery group with the size of the output signal of the single battery quantity detection module; a central control module, which is used for signal reception and module control; and a balancing adjustment module, which is used for voltage balancing adjustment. The UPS power supply electric quantity detection circuit of the present invention improves the service life of the UPS power supply, and changes the electric quantity detection mode according to the number of battery groups of the UPS power supply, thereby increasing the detection range.
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Description

Technical Field

[0001] The invention relates to the technical field of UPS power supply, in particular to a UPS power supply electric quantity detection circuit. Background Art

[0002] UPS (Uninterrupted Power Supply) is an uninterruptible power supply containing an energy storage device. It is generally composed of multiple battery packs connected in series. It is widely used in backup power supply systems and emergency power supply systems. When a power outage occurs, it provides uninterrupted power to meet power supply needs. To ensure that the UPS is fully charged when not working, it is necessary to constantly detect the power status of the UPS. The power detection circuit of the UPS in the prior art generally detects the total power of the UPS and the single power of each battery pack separately. However, due to the different number of battery packs in each UPS, the UPS power detection circuit in the technology cannot automatically change the power detection method according to the number of battery packs in the UPS. The detection range is small, and the average voltage required for each battery pack cannot be calculated, resulting in voltage imbalance in each battery pack, which reduces the service life of the UPS. Therefore, there is room for improvement. Summary of the invention

[0003] The embodiment of the present invention provides a UPS power supply capacity detection circuit to solve the problems raised in the above background technology.

[0004] According to an embodiment of the present invention, a UPS power supply power detection circuit is provided, comprising: a first battery module, a second battery module, a third battery module, a single battery power detection module, a total power detection module, a central control module, a parameter adjustment module, a mean value detection module, a power comparison module and a balance adjustment module;

[0005] A first battery module, used to connect to the first battery pack and perform energy storage and discharge;

[0006] A second battery module is connected to the first battery module and is used to connect to the second battery pack and perform energy storage and discharge;

[0007] A third battery module, connected to the second battery module, and used to be connected to a third battery pack for energy storage and discharge;

[0008] A single battery power detection module is connected to the first battery module, the second battery module and the third battery module, and is used to detect the power of the first battery module, the second battery module and the third battery module and output a first detection signal, a second detection signal and a third detection signal respectively;

[0009] a total power detection module, connected to the single-cell power detection module, the first battery module, the second battery module and the third battery module, and configured to detect the total power of the first battery module and the second battery module connected in series and output a first power signal when receiving a second detection signal, and detect the total power of the first battery module, the second battery module and the third battery module connected in series and output a second power signal when receiving a third detection signal;

[0010] A parameter adjustment module, connected to the central control module, for providing negative electric energy and adjusting a voltage value of the negative electric energy according to a first adjustment signal output by the central control module;

[0011] A mean value detection module, connected to the parameter adjustment module and the total power detection module, for dividing the received first power signal or the second power signal by the received negative power and outputting a first mean value voltage and a second mean value voltage respectively;

[0012] The power comparison module is connected to the mean detection module, and is used to compare the first mean voltage with the voltages of the first detection signal, the second detection signal, and the third detection signal, and output a first comparison signal, a second comparison signal, and a third comparison signal, respectively;

[0013] A central control module is connected to the power comparison module, the single power detection module and the total power detection module, and is used to output a first adjustment signal and adjust the duty cycle of the first adjustment signal according to the received first detection signal, the second detection signal and the third detection signal, output a first discharge signal when the received first comparison signal is in a low level state, output a first charge signal when the first comparison signal is in a high level state, output a second discharge signal when the received second comparison signal is in a low level state, output a second charge signal when the second comparison signal is in a high level state, output a third discharge signal when the received third comparison signal is in a low level state, and output a third charge signal when the third comparison signal is in a high level state, and receive the first power signal and the second power signal;

[0014] The balancing adjustment module is connected to the central processing module, the first battery module, the second battery module and the third battery module, and is used to receive the first discharge signal, the second discharge signal and the third discharge signal and respectively control the discharge work of the first battery module, the second battery module and the third battery module, and receive the first charging signal, the second charging signal and the third charging signal and respectively control the energy storage work of the first battery module, the second battery module and the third battery module.

[0015] As a further solution of the present invention: the first battery module includes a first battery interface; the second battery module includes a second battery interface; the single cell power detection module includes a first resistor, a second resistor, a third resistor and a fourth resistor; the central processing module includes a first processor;

[0016] Preferably, the first end of the first battery interface is connected to the first end of the first resistor, the second end of the first resistor is connected to the IO9 end of the first processor and is connected to the second end of the first battery interface, the first end of the second battery interface and the first end of the third resistor through the second resistor, and the second end of the third resistor is connected to the IO10 end of the first processor and is connected to the second end of the second battery interface through the fourth resistor.

[0017] As a further solution of the present invention: the third battery module includes a third battery interface; the single cell power detection module also includes a fifth resistor and a sixth resistor;

[0018] Preferably, the first end of the third battery interface is connected to the second end of the second battery interface and the first end of the fifth resistor, the second end of the fifth resistor is connected to the IO11 end of the first processor and is connected to the second end of the third battery interface through the sixth resistor.

[0019] As a further solution of the present invention: the total power detection module includes an eleventh resistor, a twelfth resistor, a first analog switch, a first triode, a tenth diode and an eleventh diode;

[0020] Preferably, the first end of the eleventh resistor is connected to the first end of the first battery interface, the second end of the eleventh resistor is connected to the IO12 end of the first processor and the mean detection module and connected to the IN1 end and the IN2 end of the first analog switch through the twelfth resistor, the OUT1 end and the OUT2 end of the first analog switch are respectively connected to the second end of the second battery interface and the second end of the third battery interface, the CTRL1 end of the first analog switch is connected to the collector of the first transistor and the cathode of the tenth diode, the CTRL2 end of the first analog switch is connected to the base of the first transistor and the cathode of the eleventh diode, the anode of the tenth diode and the anode of the eleventh diode are respectively connected to the second end of the third resistor and the second end of the fifth resistor, and the emitter of the first transistor is grounded.

[0021] As a further solution of the present invention: the mean value detection module includes a seventh resistor, an eighth resistor, a ninth resistor, a first operational amplifier and a first phase detector;

[0022] Preferably, the inverting end of the first operational amplifier is connected to one end of the eighth resistor and is connected to the second end of the eleventh resistor and the IO12 end of the first processor through the seventh resistor, the inverting end of the first operational amplifier is grounded through the ninth resistor, the other end of the eighth resistor is connected to the IN2 end of the first phase detector, the IN1 end of the first phase detector is connected to the parameter adjustment module, and the OUT end of the first phase detector is connected to the output end of the first operational amplifier and the power comparison module.

[0023] As a further solution of the present invention: the parameter adjustment module includes a first power supply, a first capacitor, a first regulator, a second capacitor, a ninth diode, a second inductor, a third capacitor, a tenth resistor and a ninth field effect transistor;

[0024] Preferably, the seventh end of the first regulator is connected to the first power supply and grounded through the first capacitor, the eighth end of the first regulator is connected to one end of the second inductor and the cathode of the ninth diode and is connected to the first end of the first regulator through the second capacitor, the other end of the second inductor is connected to one end of the third capacitor, one end of the tenth resistor and the ground, the anode of the ninth diode is connected to the sixth end of the first regulator, the other end of the third capacitor, the source of the ninth field effect transistor and the IN1 terminal of the first phase detector, the drain of the ninth field effect transistor is connected to the other end of the tenth resistor and the fourth end of the first regulator, and the gate of the ninth field effect transistor is connected to the IO13 terminal of the first processor.

[0025] As a further solution of the present invention: the power comparison module includes a first comparator, a second comparator and a third comparator;

[0026] Preferably, the non-inverting end of the first comparator is connected to the non-inverting end of the second comparator, the non-inverting end of the third comparator and the output end of the first operational amplifier, and the inverting end of the first comparator, the inverting end of the second comparator and the inverting end of the third comparator are respectively connected to the second end of the third resistor, the second end of the first resistor and the second end of the fifth resistor.

[0027] As a further solution of the present invention: the balancing adjustment module includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, an eighth diode and a first inductor;

[0028] Preferably, the source of the first field effect transistor, the source of the second field effect transistor, the source of the third field effect transistor, the source of the fourth field effect transistor, the source of the fifth field effect transistor, the source of the sixth field effect transistor, the source of the seventh field effect transistor and the source of the eighth field effect transistor are respectively connected to the anode of the first diode, the anode of the second diode, the anode of the third diode, the anode of the fourth diode, the anode of the fifth diode, the anode of the sixth diode, the anode of the seventh diode and the anode of the eighth diode, the cathode of the fifth diode is connected to the cathode of the sixth diode, the cathode of the seventh diode and the cathode of the eighth diode and is connected to the drain of the fourth field effect transistor, the drain of the third field effect transistor, the drain of the second field effect transistor and the drain of the first field effect transistor through the first inductor, and the first diode The cathode of the tube is connected to the drain of the fifth field effect tube and the first end of the first battery interface, the cathode of the second diode is connected to the drain of the sixth field effect tube and the first end of the second battery interface, the cathode of the third diode is connected to the drain of the seventh field effect tube and the first end of the third battery interface, the cathode of the fourth diode is connected to the drain of the eighth field effect tube and the second end of the third battery interface, and the gate of the first field effect tube, the gate of the second field effect tube, the gate of the third field effect tube, the gate of the fourth field effect tube, the gate of the fifth field effect tube, the gate of the sixth field effect tube, the gate of the seventh field effect tube and the gate of the eighth field effect tube are respectively connected to the IO1 end, IO2 end, IO3 end, IO4 end, IO5 end, IO6 end, IO7 end and IO8 end of the first processor.

[0029] Compared with the prior art, the beneficial effects of the present invention are as follows: the UPS power supply power detection circuit of the present invention can detect the total power of the UPS power supply by the total power detection module, detect the power status of each battery group in the UPS power supply by the single-cell power detection module, cooperate with the mean detection module to calculate the power required for each battery group according to the number of output signals of the single-cell power detection module, and then detect the relationship between the power of each battery group and the calculated power of each battery group by the power comparison module, so that the central control module controls the balancing adjustment module to charge and discharge the first battery module, the second battery module and the third battery module according to the signal status output by the power comparison module, so that the UPS power supply reaches a balanced voltage, improves the service life of the UPS power supply, and changes the power detection mode according to the number of battery groups in the UPS power supply to increase the detection range. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0031] Figure 1A schematic block diagram of a UPS power supply power detection circuit provided in an embodiment of the present invention.

[0032] Figure 2 A circuit diagram of a UPS power supply power detection circuit provided in an embodiment of the present invention.

[0033] Figure 3 A circuit diagram of a parameter adjustment module provided in an embodiment of the present invention.

[0034] Figure 4 A circuit diagram of a total power detection module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] In one embodiment, see Figure 1 , UPS power supply power detection circuit, including: a first battery module 1, a second battery module 2, a third battery module 3, a single battery power detection module 4, a total power detection module 5, a central control module 6, a parameter adjustment module 7, a mean detection module 8, a power comparison module 9 and a balance adjustment module 10;

[0037] Specifically, the first battery module 1 is used to connect with the first battery pack and store and discharge energy;

[0038] The second battery module 2 is connected to the first battery module 1 and is used to connect to the second battery pack and perform energy storage and discharge;

[0039] A third battery module 3, connected to the second battery module 2, and used to be connected to a third battery pack for energy storage and discharge;

[0040] A single battery power detection module 4 is connected to the first battery module 1, the second battery module 2 and the third battery module 3, and is used to detect the power of the first battery module 1, the second battery module 2 and the third battery module 3 and output a first detection signal, a second detection signal and a third detection signal respectively;

[0041] The total power detection module 5 is connected to the single battery detection module 4, the first battery module 1, the second battery module 2 and the third battery module 3, and is used to detect the total power of the first battery module 1 and the second battery module 2 connected in series and output a first power signal when receiving a second detection signal, and detect the total power of the first battery module 1, the second battery module 2 and the third battery module 3 connected in series and output a second power signal when receiving a third detection signal;

[0042] The parameter adjustment module 7 is connected to the central control module 6 and is used to provide negative electric energy and adjust the voltage value of the negative electric energy according to the first adjustment signal output by the central control module 6;

[0043] The mean value detection module 8 is connected to the parameter adjustment module 7 and the total power detection module 5, and is used to divide the received first power signal or the second power signal by the received negative power and output a first mean value voltage and a second mean value voltage respectively;

[0044] The power comparison module 9 is connected to the mean detection module 8, and is used to compare the first mean voltage with the voltages of the first detection signal, the second detection signal, and the third detection signal, and output a first comparison signal, a second comparison signal, and a third comparison signal, respectively;

[0045] The central control module 6 is connected to the power comparison module 9, the single power detection module 4 and the total power detection module 5, and is used to output a first adjustment signal and adjust the duty cycle of the first adjustment signal according to the received first detection signal, the second detection signal and the third detection signal, and output a first discharge signal when the received first comparison signal is in a low level state, and output a first charging signal when the first comparison signal is in a high level state, and output a second discharge signal when the received second comparison signal is in a low level state, and output a second charging signal when the second comparison signal is in a high level state, and output a third discharge signal when the received third comparison signal is in a low level state, and output a third charging signal when the third comparison signal is in a high level state, and receive the first power signal and the second power signal;

[0046] The balancing adjustment module 10 is connected to the central processing module, the first battery module 1, the second battery module 2 and the third battery module 3, and is used to receive the first discharge signal, the second discharge signal and the third discharge signal and respectively control the discharge operation of the first battery module 1, the second battery module 2 and the third battery module 3, and receive the first charging signal, the second charging signal and the third charging signal and respectively control the energy storage operation of the first battery module 1, the second battery module 2 and the third battery module 3.

[0047] In a specific embodiment, the first battery module 1 can adopt a first battery circuit composed of a first battery interface to be connected to the first battery pack in the UPS power supply; the second battery module 2 can adopt a first battery circuit composed of a first battery interface to be connected to the first battery pack in the UPS power supply; the third battery module 3 can adopt a first battery circuit composed of a first battery interface to be connected to the first battery pack in the UPS power supply; the single cell power detection module 4 can adopt a single cell power detection circuit composed of resistors, which can respectively detect the power of the first battery module 1, the second battery module 2 and the third battery module 3; the total power detection module 5 can adopt a total power detection circuit composed of resistors, analog switches, transistors, etc., which can realize the total power detection of the first battery module 1 and the second battery module 2 according to the status of the second battery module 2 and the third battery module 3 detected by the single cell power detection module 4, and the total power detection of the first battery module 1, the second battery module 2 and the third battery module 3; The central control module 6 can adopt a central control circuit composed of a single-chip microcomputer, integrating many components such as an operator, a controller, a memory, and an input and output device to realize functions such as signal processing, data storage, module control, and timing control; the above-mentioned parameter adjustment module 7 can adopt a parameter adjustment circuit composed of a voltage regulator, a capacitor, a field effect transistor, etc., which is controlled by the central control module 6 and can provide negative electric energy to the mean detection module 8, so that the voltage of the negative electric energy changes according to the working state of the second battery module 2 and the third battery module 3; the above-mentioned mean detection module 8 can adopt a division circuit composed of an operational amplifier, a phase detector and a resistor to calculate the average voltage of a single battery group; the above-mentioned power comparison module 9 can adopt a power comparison circuit composed of a comparator to compare the voltages of the single power detection module 4 and the mean detection module 8; the above-mentioned balancing adjustment module 10 can adopt a balancing adjustment circuit composed of a field effect transistor and a diode to perform voltage balancing adjustment on the first battery module 1, the second battery module 2 and the third battery module 3.

[0048] In another embodiment, see Figure 1 , Figure 2 , Figure 3 and Figure 4 , the first battery module 1 includes a first battery interface; the second battery module 2 includes a second battery interface; the single cell power detection module 4 includes a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4; the central processing module includes a first processor U1;

[0049] Specifically, the first end of the first battery interface is connected to the first end of the first resistor R1, the second end of the first resistor R1 is connected to the IO9 end of the first processor U1 and is connected to the second end of the first battery interface, the first end of the second battery interface and the first end of the third resistor R3 through the second resistor R2, and the second end of the third resistor R3 is connected to the IO10 end of the first processor U1 and is connected to the second end of the second battery interface through the fourth resistor R4.

[0050] In a specific embodiment, the first resistor R1 and the second resistor R2 detect the power of the first battery interface, and the third resistor R3 and the fourth resistor R4 detect the power of the second battery interface; the first processor U1 can be a STM32 microcontroller.

[0051] Furthermore, the third battery module 3 includes a third battery interface; the single cell power detection module 4 also includes a fifth resistor R5 and a sixth resistor R6;

[0052] Specifically, the first end of the third battery interface is connected to the second end of the second battery interface and the first end of the fifth resistor R5, the second end of the fifth resistor R5 is connected to the IO11 end of the first processor U1 and is connected to the second end of the third battery interface through the sixth resistor R6.

[0053] In a specific embodiment, the fifth resistor R5 and the sixth resistor R6 are used to detect the power level of the second battery interface.

[0054] Further, the total power detection module 5 includes an eleventh resistor R11, a twelfth resistor R12, a first analog switch U3, a first transistor VT1, a tenth diode D10 and an eleventh diode D11;

[0055] Specifically, the first end of the eleventh resistor R11 is connected to the first end of the first battery interface, the second end of the eleventh resistor R11 is connected to the IO12 end of the first processor U1 and the mean detection module 8 and is connected to the IN1 end and the IN2 end of the first analog switch U3 through the twelfth resistor R12, the OUT1 end and the OUT2 end of the first analog switch U3 are respectively connected to the second end of the second battery interface and the second end of the third battery interface, the CTRL1 end of the first analog switch U3 is connected to the collector of the first transistor VT1 and the cathode of the tenth diode D10, the CTRL2 end of the first analog switch U3 is connected to the base of the first transistor VT1 and the cathode of the eleventh diode D11, the anode of the tenth diode D10 and the anode of the eleventh diode D11 are respectively connected to the second end of the third resistor R3 and the second end of the fifth resistor R5, and the emitter of the first transistor VT1 is grounded.

[0056] In a specific embodiment, the above-mentioned first analog switch U3 can use a CD4066 analog switch. When the second battery module 2 is connected to the second battery pack, the IN1 terminal and the OUT1 terminal of the first analog switch U3 are turned on. When the third battery module 3 is connected to the third battery pack, the IN2 terminal and the OUT2 terminal of the first analog switch U3 are turned on. The above-mentioned first transistor VT1 can use an NPN transistor.

[0057] Further, the mean value detection module 8 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first operational amplifier OP1 and a first phase detector U2;

[0058] Specifically, the inverting end of the first operational amplifier OP1 is connected to one end of the eighth resistor R8 and is connected to the second end of the eleventh resistor R11 and the IO12 end of the first processor U1 through the seventh resistor R7. The inverting end of the first operational amplifier OP1 is grounded through the ninth resistor R9. The other end of the eighth resistor R8 is connected to the IN2 end of the first phase detector U2. The IN1 end of the first phase detector U2 is connected to the parameter adjustment module 7. The OUT end of the first phase detector U2 is connected to the output end of the first operational amplifier OP1 and the power comparison module 9.

[0059] In a specific embodiment, the first operational amplifier OP1 can be an OP07 operational amplifier, which cooperates with the first phase detector U2, the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 to perform division processing, wherein the coefficient K of the first phase detector U2 is 1.

[0060] Further, the parameter adjustment module 7 includes a first power supply VCC1, a first capacitor C1, a first regulator U4, a second capacitor C2, a ninth diode D9, a second inductor L2, a third capacitor C3, a tenth resistor R10 and a ninth field effect transistor Q9;

[0061] Specifically, the seventh end of the first regulator U4 is connected to the first power supply VCC1 and is grounded through the first capacitor C1, the eighth end of the first regulator U4 is connected to one end of the second inductor L2 and the cathode of the ninth diode D9 and is connected to the first end of the first regulator U4 through the second capacitor C2, the other end of the second inductor L2 is connected to one end of the third capacitor C3, one end of the tenth resistor R10 and the ground, the anode of the ninth diode D9 is connected to the sixth end of the first regulator U4, the other end of the third capacitor C3, the source of the ninth field effect transistor Q9 and the IN1 end of the first phase detector U2, the drain of the ninth field effect transistor Q9 is connected to the other end of the tenth resistor R10 and the fourth end of the first regulator U4, and the gate of the ninth field effect transistor Q9 is connected to the IO13 end of the first processor U1.

[0062] In a specific embodiment, the above-mentioned first regulator U4 can use a TPS4530 chip, and the voltage value output by the first regulator U4 is adjusted by the signal fed back by the tenth resistor R10 and the ninth field effect transistor Q9, wherein the ninth field effect transistor Q9 can use an N-channel field effect transistor, and the conductivity of the ninth field effect transistor Q9 is adjusted by the IO13 terminal of the first processor U1, so that the voltage output by the sixth terminal of the first regulator U4 is adjusted with the working status of the second battery module 2 and the third battery module 3. Specifically, when the second battery interface is connected to the second battery pack, a -2V voltage is output, and when the third battery interface is connected to the third battery pack, a -3V voltage is output.

[0063] Further, the power comparison module 9 includes a first comparator A1, a second comparator A2 and a third comparator A3;

[0064] Specifically, the non-inverting end of the first comparator A1 is connected to the non-inverting end of the second comparator A2, the non-inverting end of the third comparator A3 and the output end of the first operational amplifier OP1, and the inverting end of the first comparator A1, the inverting end of the second comparator A2 and the inverting end of the third comparator A3 are respectively connected to the second end of the third resistor R3, the second end of the first resistor R1 and the second end of the fifth resistor R5.

[0065] In a specific embodiment, the first comparator A1, the second comparator A2 and the third comparator A3 can all be LM358 comparators.

[0066] Further, the balancing and regulating module 10 includes a first field effect transistor Q1, a second field effect transistor Q2, a third field effect transistor Q3, a fourth field effect transistor Q4, a fifth field effect transistor Q5, a sixth field effect transistor Q6, a seventh field effect transistor Q7, an eighth field effect transistor Q8, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a seventh diode D7, an eighth diode D8 and a first inductor L1;

[0067] Specifically, the source of the first field effect transistor Q1, the source of the second field effect transistor Q2, the source of the third field effect transistor Q3, the source of the fourth field effect transistor Q4, the source of the fifth field effect transistor Q5, the source of the sixth field effect transistor Q6, the source of the seventh field effect transistor Q7 and the source of the eighth field effect transistor Q8 are respectively connected to the anode of the first diode D1, the anode of the second diode D2, the anode of the third diode D3, the anode of the fourth diode D4, the anode of the fifth diode D5, the anode of the sixth diode D6, the anode of the seventh diode D7 and the anode of the eighth diode D8, and the cathode of the fifth diode D5 is connected to the cathode of the sixth diode D6, the cathode of the seventh diode D7 and the cathode of the eighth diode D8 and is connected to the drain of the fourth field effect transistor Q4, the drain of the third field effect transistor Q3, the drain of the second field effect transistor Q2 and the first field effect transistor Q1 through the first inductor L1. The cathode of the first diode D1 is connected to the drain of the fifth field effect transistor Q5 and the first end of the first battery interface, the cathode of the second diode D2 is connected to the drain of the sixth field effect transistor Q6 and the first end of the second battery interface, the cathode of the third diode D3 is connected to the drain of the seventh field effect transistor Q7 and the first end of the third battery interface, the cathode of the fourth diode D4 is connected to the drain of the eighth field effect transistor Q8 and the second end of the third battery interface, and the gate of the first field effect transistor Q1, the gate of the second field effect transistor Q2, the gate of the third field effect transistor Q3, the gate of the fourth field effect transistor Q4, the gate of the fifth field effect transistor Q5, the gate of the sixth field effect transistor Q6, the gate of the seventh field effect transistor Q7 and the gate of the eighth field effect transistor Q8 are respectively connected to the IO1 end, IO2 end, IO3 end, IO4 end, IO5 end, IO6 end, IO7 end and IO8 end of the first processor U1.

[0068] In a specific embodiment, the first field effect transistor Q1, the second field effect transistor Q2, the third field effect transistor Q3, the fourth field effect transistor Q4, the fifth field effect transistor Q5, the sixth field effect transistor Q6, the seventh field effect transistor Q7 and the eighth field effect transistor Q8 can all be N-channel field effect transistors.

[0069] In the UPS power supply power detection circuit of this embodiment, when the detected UPS power supply is composed of a first battery group and a second battery group, the first battery interface and the second battery interface are connected to the first battery group and the second battery group in the UPS power supply, and the first resistor R1 and the second resistor R2 and the third resistor R3 and the fourth resistor R4 respectively perform power detection. At this time, the CTRL1 end of the first analog switch U3 is at a high level, and the IN1 end and the OUT1 end of the first analog switch U3 are turned on, so that the eleventh resistor R11 and the second resistor R2 detect the total power of the first battery interface and the second battery interface. Since only two battery groups are connected at this time, the first processor U1 adjusts the conduction degree of the ninth field effect transistor Q9, so that the first regulator U4 outputs a -2V voltage, and the first operational amplifier OP1 cooperates with the first phase detector U2, the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 to divide the total amount of electricity detected and the -2V voltage to calculate the average amount of electricity required for each battery group. At the same time, when the signals detected by the first resistor R1 and the second resistor R2 are less than the average amount of electricity, the first comparator A1 outputs a high level, which means that the amount of electricity in the first battery group is lower than the average amount of electricity, and the amount of electricity in the second battery group will be higher than the average amount of electricity. The central control module 6 will output a second discharge signal, that is, the IO6 terminal and the IO3 terminal of the first processor U1 will respectively control the conduction degree of the sixth field effect transistor Q6 and the third field effect transistor Q3, so that the second battery interface connected to the first battery group is connected to the second battery interface. The second battery pack is discharged and stored by the first inductor L1 until the charge of the second battery pack reaches the average charge value. The central control module 6 will output a first charging signal, that is, the IO1 terminal and IO6 terminal of the first processor U1 will respectively control the conduction degree of the first field effect transistor Q1 and the sixth field effect transistor Q6, so that the electric energy stored in the first inductor L1 is transmitted to the first battery pack connected to the first battery interface. When the charge of the first battery pack is higher than the average charge value, the IO5 terminal and IO2 terminal of the first processor U1 respectively control the conduction of the fifth field effect transistor Q5 and the second field effect transistor Q2 for discharging, and then the IO2 terminal and IO7 terminal of the first processor U1 control the conduction of the second field effect transistor Q2 and the seventh field effect transistor Q7 for charging. Similarly, When the UPS power supply to be detected consists of a first battery pack, a second battery pack and a third battery pack, the first battery interface, the second battery interface and the third battery interface are respectively connected to the first battery pack, the second battery pack and the third battery pack in the UPS power supply, the fifth resistor R5 and the sixth resistor R6 detect the power of the third battery pack, at this time, the first transistor VT1 is turned on, the CTRL2 of the first analog switch U3 becomes a high level, the eleventh resistor R11 and the twelfth resistor R12 detect the total power of the first battery pack, the second battery pack and the third battery, the IO13 end of the first processor U1 adjusts the conduction degree of the ninth field effect tube Q9 according to the number of connected battery packs, so that the first regulator U4 outputs a -3V voltage,The first operational amplifier OP1 cooperates with the first phase detector U2, the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 to calculate the average power value required for each battery group. The first comparator A1, the second comparator A2 and the comparator A3 compare the detected power of the first battery group, the second battery group and the third battery group with the average power value, so as to first control the discharge of the battery group with a power value higher than the average power value, and then control the charging of the battery group with a power value lower than the average power value, so as to complete the voltage balancing control of the first battery group, the second battery group and the third battery group.

[0070] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0071] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. UPS power supply power detection circuit, Features: The UPS power supply power detection circuit includes: a first battery module, a second battery module, a third battery module, a single battery power detection module, a total power detection module, a central control module, a parameter adjustment module, a mean value detection module, a power comparison module and a balance adjustment module; The first battery module is used to connect to the first battery pack and store and discharge energy; The second battery module is connected to the first battery module and is used to connect to the second battery pack and perform energy storage and discharge; The third battery module is connected to the second battery module and is used to connect to the third battery pack and perform energy storage and discharge; The single battery power detection module is connected to the first battery module, the second battery module and the third battery module, and is used to detect the power of the first battery module, the second battery module and the third battery module and output a first detection signal, a second detection signal and a third detection signal respectively; The total power detection module is connected to the single battery detection module, the first battery module, the second battery module and the third battery module, and is used to detect the total power of the first battery module and the second battery module connected in series and output a first power signal when receiving a second detection signal, and detect the total power of the first battery module, the second battery module and the third battery module connected in series and output a second power signal when receiving a third detection signal; The parameter adjustment module is connected to the central control module and is used to provide negative electric energy and adjust the voltage value of the negative electric energy according to the first adjustment signal output by the central control module; The mean value detection module is connected to the parameter adjustment module and the total power detection module, and is used to divide the received first power signal or the second power signal by the received negative power and output a first mean value voltage and a second mean value voltage respectively; The power comparison module is connected to the mean detection module, and is used to compare the first mean voltage with the voltages of the first detection signal, the second detection signal, and the third detection signal, and output a first comparison signal, a second comparison signal, and a third comparison signal, respectively; The central control module is connected to the power comparison module, the single power detection module and the total power detection module, and is used to output a first adjustment signal and adjust the duty cycle of the first adjustment signal according to the received first detection signal, the second detection signal and the third detection signal, and output a first discharge signal when the received first comparison signal is in a low level state, and output a first charge signal when the first comparison signal is in a high level state, and output a second discharge signal when the received second comparison signal is in a low level state, and output a second charge signal when the second comparison signal is in a high level state, and output a third discharge signal when the received third comparison signal is in a low level state, and output a third charge signal when the third comparison signal is in a high level state, and receive the first power signal and the second power signal; The balancing adjustment module is connected to the central processing module, the first battery module, the second battery module and the third battery module, and is used to receive the first discharge signal, the second discharge signal and the third discharge signal and respectively control the discharge operation of the first battery module, the second battery module and the third battery module, and receive the first charge signal, the second charge signal and the third charge signal and respectively control the energy storage operation of the first battery module, the second battery module and the third battery module.

2. The UPS power supply power detection circuit according to claim 1, It is characterized in that The first battery module includes a first battery interface; the second battery module includes a second battery interface; the single cell power detection module includes a first resistor, a second resistor, a third resistor and a fourth resistor; the central processing module includes a first processor; The first end of the first battery interface is connected to the first end of the first resistor, the second end of the first resistor is connected to the IO9 end of the first processor and is connected to the second end of the first battery interface, the first end of the second battery interface and the first end of the third resistor through the second resistor, and the second end of the third resistor is connected to the IO10 end of the first processor and is connected to the second end of the second battery interface through the fourth resistor.

3. The UPS power supply power detection circuit according to claim 2, It is characterized in that The third battery module includes a third battery interface; the single cell power detection module also includes a fifth resistor and a sixth resistor; The first end of the third battery interface is connected to the second end of the second battery interface and the first end of the fifth resistor, the second end of the fifth resistor is connected to the IO11 end of the first processor and is connected to the second end of the third battery interface through the sixth resistor.

4. The UPS power supply power detection circuit according to claim 3, It is characterized in that The total power detection module includes an eleventh resistor, a twelfth resistor, a first analog switch, a first triode, a tenth diode and an eleventh diode; The first end of the eleventh resistor is connected to the first end of the first battery interface, the second end of the eleventh resistor is connected to the IO12 end of the first processor and the mean detection module and connected to the IN1 end and the IN2 end of the first analog switch through the twelfth resistor, the OUT1 end and the OUT2 end of the first analog switch are respectively connected to the second end of the second battery interface and the second end of the third battery interface, the CTRL1 end of the first analog switch is connected to the collector of the first transistor and the cathode of the tenth diode, the CTRL2 end of the first analog switch is connected to the base of the first transistor and the cathode of the eleventh diode, the anode of the tenth diode and the anode of the eleventh diode are respectively connected to the second end of the third resistor and the second end of the fifth resistor, and the emitter of the first transistor is grounded.

5. The UPS power supply power detection circuit according to claim 4, It is characterized in that The mean value detection module includes a seventh resistor, an eighth resistor, a ninth resistor, a first operational amplifier and a first phase detector; The inverting end of the first operational amplifier is connected to one end of the eighth resistor and connected to the second end of the eleventh resistor and the IO12 end of the first processor through the seventh resistor, the inverting end of the first operational amplifier is grounded through the ninth resistor, the other end of the eighth resistor is connected to the IN2 end of the first phase detector, the IN1 end of the first phase detector is connected to the parameter adjustment module, and the OUT end of the first phase detector is connected to the output end of the first operational amplifier and the power comparison module.

6. The UPS power supply power detection circuit according to claim 5, It is characterized in that The parameter adjustment module includes a first power supply, a first capacitor, a first regulator, a second capacitor, a ninth diode, a second inductor, a third capacitor, a tenth resistor and a ninth field effect transistor; The seventh end of the first regulator is connected to the first power supply and grounded through the first capacitor, the eighth end of the first regulator is connected to one end of the second inductor and the cathode of the ninth diode and is connected to the first end of the first regulator through the second capacitor, the other end of the second inductor is connected to one end of the third capacitor, one end of the tenth resistor and the ground, the anode of the ninth diode is connected to the sixth end of the first regulator, the other end of the third capacitor, the source of the ninth field effect tube and the IN1 end of the first phase detector, the drain of the ninth field effect tube is connected to the other end of the tenth resistor and the fourth end of the first regulator, and the gate of the ninth field effect tube is connected to the IO13 end of the first processor.

7. The UPS power supply power detection circuit according to claim 6, It is characterized in that The power comparison module includes a first comparator, a second comparator and a third comparator; The non-inverting end of the first comparator is connected to the non-inverting end of the second comparator, the non-inverting end of the third comparator and the output end of the first operational amplifier, and the inverting end of the first comparator, the inverting end of the second comparator and the inverting end of the third comparator are respectively connected to the second end of the third resistor, the second end of the first resistor and the second end of the fifth resistor.

8. The UPS power supply power detection circuit according to claim 7, It is characterized in that The balancing and regulating module includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, an eighth diode and a first inductor; The source of the first field effect transistor, the source of the second field effect transistor, the source of the third field effect transistor, the source of the fourth field effect transistor, the source of the fifth field effect transistor, the source of the sixth field effect transistor, the source of the seventh field effect transistor and the source of the eighth field effect transistor are respectively connected to the anode of the first diode, the anode of the second diode, the anode of the third diode, the anode of the fourth diode, the anode of the fifth diode, the anode of the sixth diode, the anode of the seventh diode and the anode of the eighth diode, the cathode of the fifth diode is connected to the cathode of the sixth diode, the cathode of the seventh diode and the cathode of the eighth diode and is connected to the drain of the fourth field effect transistor, the drain of the third field effect transistor, the drain of the second field effect transistor and the drain of the first field effect transistor through the first inductor, and the cathode of the fifth diode is connected to the cathode of the sixth diode, the cathode of the seventh diode and the cathode of the eighth diode. The cathode of the second diode is connected to the drain of the fifth field effect transistor and the first end of the first battery interface, the cathode of the second diode is connected to the drain of the sixth field effect transistor and the first end of the second battery interface, the cathode of the third diode is connected to the drain of the seventh field effect transistor and the first end of the third battery interface, the cathode of the fourth diode is connected to the drain of the eighth field effect transistor and the second end of the third battery interface, and the gate of the first field effect transistor, the gate of the second field effect transistor, the gate of the third field effect transistor, the gate of the fourth field effect transistor, the gate of the fifth field effect transistor, the gate of the sixth field effect transistor, the gate of the seventh field effect transistor and the gate of the eighth field effect transistor are respectively connected to the IO1 end, IO2 end, IO3 end, IO4 end, IO5 end, IO6 end, IO7 end and IO8 end of the first processor.

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