Over-temperature voltage regulation circuit and over-temperature voltage regulation method

Abstract

The present invention relates to the field of over-temperature protection circuits, and in particular to an over-temperature voltage regulation circuit and an over-temperature voltage regulation method, comprising a constant current generating branch, a first current mirror module, an output branch, a negative growth current generating branch, a second current mirror module and a compensation branch; an external reference voltage output module outputs a reference voltage V BG To the input end of the constant current generating branch and the negative growth current generating branch, the output end of the constant current generating branch is electrically connected to the input end of the first current mirror module; the input end of the output branch is electrically connected to the first current mirror module; the output end of the negative growth current generating branch is electrically connected to the input end of the second current mirror module; the output end of the compensation branch is electrically connected to the output branch, and outputs V REF Voltage, select MOS tubes with different width-to-length ratios to accurately control the over-temperature point T0 and the shutdown temperature point T1.

Description

Technical Field

[0001] The present invention relates to the field of over-temperature protection circuits, and in particular to an over-temperature voltage regulation circuit and an over-temperature voltage regulation method. Background Art

[0002] The over-temperature voltage regulator circuit is a commonly used electronic circuit used to protect electronic devices from damage caused by overheating and overvoltage. The circuit usually consists of a temperature sensor and a comparator. When it detects that the temperature of the device exceeds the set threshold, the comparator triggers a switch to disconnect the power supply or limit the current to prevent the device from overheating. The over-temperature voltage regulator circuit can also be used to detect situations when the voltage exceeds the maximum value that the device can withstand. Once an overvoltage is detected, the comparator triggers the same protection mechanism to prevent damage to the device. In practical applications, the over-temperature voltage regulator circuit is a very important electronic protection device that can help extend the life of the device and ensure its safe operation.

[0003] At present, the existing over-temperature compensation voltage is usually determined based on the junction voltage of the transistor, which cannot accurately adjust the over-temperature point and has a poor over-temperature protection effect. Summary of the invention

[0004] The object of the present invention is to provide an over-temperature voltage regulation circuit and an over-temperature voltage regulation method, aiming to improve the problem that the over-temperature point cannot be accurately controlled and the over-temperature protection is poor.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] An over-temperature voltage regulating circuit comprises a constant current generating branch, a first current mirror module, an output branch, a negative growth current generating branch, a second current mirror module and a compensation branch;

[0007] The external reference voltage output module outputs the reference voltage V BG To the input end of the constant current generating branch and the negative growth current generating branch, the output end of the constant current generating branch is electrically connected to the input end of the first current mirror module; the input end of the output branch is electrically connected to the first current mirror module;

[0008] The output end of the negative growth current generating branch is electrically connected to the input end of the second current mirror module; the input end of the compensation branch is electrically connected to the output ends of the first current mirror module and the second current mirror module, and the output end of the compensation branch is electrically connected to the output branch and outputs V REF Voltage.

[0009] Furthermore, the constant current generating branch includes an operational amplifier 100, a MOS tube N0, and resistors R0 and R1.

[0010] The external reference voltage output module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier 100, the output terminal of the operational amplifier is electrically connected to the gate of the MOSFET N0, and the drain of the MOSFET N0 is electrically connected to the input terminal of the first current mirror module; the resistor R0 and the resistor R1 are connected in series to the reverse input terminal of the operational amplifier 100 and the source of the MOSFET N0, and are grounded.

[0011] Furthermore, the first current mirror module includes a MOSFET P0 and a MOSFET P1.

[0012] The sources of the MOS tube P0 and the MOS tube P1 are both electrically connected to the power supply VDD.

[0013] The gate and drain of the MOSFET P0 are electrically connected to the gate of the MOSFET P1, the drain of the MOSFET N0 and the output branch;

[0014] The drain of the MOS tube P1 is electrically connected to the output end of the second current mirror module and the input end of the compensation branch.

[0015] Furthermore, the output branch includes a MOS tube P2 and resistors R3 and R4.

[0016] The source of the MOS tube P2 is electrically connected to the power supply VDD.

[0017] The gate of the MOS tube P2 is electrically connected to the gate and drain of the MOS tube P0 and the gate of the MOS tube P1. The drain of the MOS tube P2 is electrically connected to one end of the resistor R3 and the output end of the compensation branch, and outputs V REF The other end of the resistor R3 is electrically connected to one end of the resistor R4, and the other end of the resistor R4 is grounded.

[0018] Furthermore, the resistor R0 and the resistor R3 are both negative temperature coefficient resistors, and the resistor R1 and the resistor R4 are both positive temperature coefficient resistors.

[0019] Furthermore, the negative growth current generating branch includes an operational amplifier 101, a MOS tube N1 and a resistor R2.

[0020] The external reference voltage output module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier 101, the output terminal of the operational amplifier is electrically connected to the gate of the MOSFET N1, and the drain of the MOSFET N1 is electrically connected to the input terminal of the second current mirror module; the reverse input terminal of the operational amplifier 101 and the source of the MOSFET N1 are both electrically connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

[0021] Furthermore, the second current mirror module includes MOS tube P3, MOS tube P4, MOS tube N2 and MOS tube N3.

[0022] The sources of the MOS tube P3 and the MOS tube P4 are both electrically connected to the power supply VDD.

[0023] The gate and drain of the MOSFET P3 are electrically connected to the gate of the MOSFET P4 and the drain of the MOSFET N1; the drain of the MOSFET P4 is electrically connected to the drain, gate of the MOSFET N2 and the gate of the MOSFET N3, the drain of the MOSFET N3 is electrically connected to the output end of the first current mirror module and the input end of the compensation branch, and the source of the MOSFET N2 and the source of the MOSFET N3 are both grounded.

[0024] Furthermore, the compensation branch includes MOS tube N4 and MOS tube N5.

[0025] The gate and drain of the MOS tube N4 are electrically connected to the gate of the MOS tube N5, the drain of the MOS tube N3 and the output end of the first current mirror module. The drain of the MOS tube N5 is electrically connected to the output branch and outputs V REF Voltage, the source of the MOS tube N4 and the source of the MOS tube N5 are both grounded.

[0026] Furthermore, the resistor R2 is a positive temperature coefficient resistor.

[0027] To achieve the above object, the present invention adopts the following technical solutions:

[0028] The over-temperature voltage regulation method is characterized by applying the above-mentioned over-temperature voltage regulation circuit and satisfying the following formula:

[0029]

[0030]

[0031]

[0032]

[0033]

[0034] Among them, A, B, C and D are proportional coefficients, and A>1, B>1, C>1 and D>1, and satisfy:

[0035]

[0036]

[0037]

[0038]

[0039] Said (W / L) P0 is the width-to-length ratio of MOS tube P0; (W / L) P1 is the width-to-length ratio of MOS tube P1; (W / L) P2 is the width-to-length ratio of MOS tube P2; (W / L) N2 is the width-to-length ratio of MOS tube N2; (W / L) N3 is the width-to-length ratio of MOS tube N3; (W / L) N4 is the width-to-length ratio of MOS tube N4; (W / L) N5 is the width-to-length ratio of MOS tube N5;

[0040] T0 is the over-temperature point, T1 is the shutdown temperature point, k2 is the first-order temperature coefficient of the resistors R1, R2 and R4; R0, R1 and R2 are the resistance values ​​of the resistors R0, R1 and R2 respectively.

[0041] After adopting the above technical solution, the present invention has the following advantages compared with the background technology:

[0042] 1. In this solution, the resistors R0 and R1 on the constant current generating branch are respectively negative temperature coefficient resistors and positive temperature coefficient resistors, and the resistors R3 and R4 on the output branch are respectively negative temperature coefficient resistors and positive temperature coefficient resistors, which effectively eliminate the resistance change caused by temperature change, and the resistor R2 on the negative growth current generating branch is a positive temperature coefficient resistor. As the temperature rises, the output current of the negative growth current generating branch decreases accordingly, which can accurately control the values ​​of the over-temperature point T0 and the shutdown temperature point T1, thereby achieving a better over-temperature protection effect.

[0043] 2. In this solution, the first current mirror module replicates the current generated by the constant current generating branch, and the second current mirror module replicates the current generated by the negative growth current generating branch. In the initial state, the current output by the second current mirror module is greater than the current output by the first current mirror, and the compensation branch has no current, V REF The voltage is output stably; as the temperature rises, the current generated by the negative growth current generating branch decreases. When the temperature reaches the over-temperature point T0, the current output by the second current mirror module is equal to the current output by the first current mirror, and the compensation branch generates current, pulling down V REF voltage; when the temperature continues to rise, the current generated by the negative growth current generating branch continues to decrease. When the temperature reaches the overtemperature point T1, V REFThe voltage is zero. By adjusting the replication ratio of the first current mirror module and the second current mirror module, the over-temperature point T0 and the shutdown temperature point T1 are accurately set. When the over-temperature point T0 is reached, the output voltage is stepped down and regulated until the shutdown temperature point T1 is reached. V REF The voltage is zero, turning off the circuit.

[0044] 3. In this scheme, the constant current generating branch is connected in series with a positive temperature coefficient resistor and a negative temperature coefficient resistor for temperature compensation. The first-order coefficients of the positive and negative temperature resistors are accurately quantified and matched to generate an approximately constant resistance resistor. The reference voltage and the resistor generate a constant current to ensure the output voltage V REF Stable output. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 is a system block diagram of the over-temperature voltage regulation circuit of the present invention;

[0046] Figure 2 is a circuit diagram of the over-temperature voltage regulating circuit of the present invention;

[0047] Figure 3 This is an output voltage waveform diagram of the over-temperature voltage regulating circuit of the present invention.

[0048] Description of reference numerals:

[0049] 1. Constant current generating branch; 2. Negative growth current generating branch; 3. First current mirror module; 4. Second current mirror module; 5. Compensation branch; 6. Output branch. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0051] In addition, it should be noted that the terms "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element of the present invention must have a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0052] When an element is referred to as being “fixed to” or “disposed on” or “provided on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0053] Unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the invention can be understood according to specific circumstances. Example

[0054] Please refer to Figure 1-3 As shown, this embodiment provides an over-temperature voltage regulation circuit, a constant current generating branch 1, a first current mirror module 3, an output branch 6, a negative growth current generating branch 2, a second current mirror module 4 and a compensation branch 5. The external reference voltage output module outputs a reference voltage V BG To the input end of the constant current generating branch 1 and the negative growth current generating branch 2, the output end of the constant current generating branch 1 is electrically connected to the input end of the first current mirror module 3. The input end of the output branch 6 is electrically connected to the first current mirror module 3. The output end of the negative growth current generating branch 2 is electrically connected to the input end of the second current mirror module 4; the input end of the compensation branch 5 is electrically connected to the output end of the first current mirror module 3 and the second current mirror module 4, the output end of the compensation branch 5 is electrically connected to the output branch 6, and outputs V REF In the initial state, the current of the MOSFET N3 in the second current mirror module 4 is greater than the current of the MOSFET P1 in the first current mirror module 3, and there is no current in the compensation branch 5. REF The voltage is output stably. When the temperature rises to the over-temperature point T0, the current of the MOSFET N3 in the second current mirror module 4 is equal to the current of the MOSFET P1 in the first current mirror module 3; when the temperature continues to rise and exceeds the over-temperature point T0, the compensation branch 5 generates current, pulling down V REF voltage, to achieve over-temperature voltage reduction, until the temperature rises to the shutdown temperature point T1, V REF The voltage is zero.

[0055] Specifically, the constant current generating branch 1 includes an operational amplifier 100, a MOSFET N0, and resistors R0 and R1; the first current mirror module 3 includes a MOSFET P0 and a MOSFET P1; the output branch 6 includes a MOSFET P2 and resistors R3 and R4; the negative growth current generating branch 2 includes an operational amplifier 101, a MOSFET N1, and a resistor R2; the second current mirror module 4 includes a MOSFET P3, a MOSFET P4, a MOSFET N2, and a MOSFET N3; the compensation branch 5 includes a MOSFET N4 and a MOSFET N5.

[0056] The external reference voltage output module outputs the reference voltage V BGTo the same-direction input terminal of the operational amplifier 100, the output terminal of the operational amplifier is electrically connected to the gate of the MOSFET N0, and the drain of the MOSFET N0 is electrically connected to the input terminal of the first current mirror module 3; the resistor R0 and the resistor R1 are connected in series to the reverse input terminal of the operational amplifier 100 and the source of the MOSFET N0, and are grounded.

[0057] The sources of MOSFET P0 and MOSFET P1 are electrically connected to the power supply VDD, and the gate and drain of MOSFET P0 are electrically connected to the gate of MOSFET P1, the drain of MOSFET N0 and the output branch 6. The drain of MOSFET P1 is electrically connected to the output end of the second current mirror module 4 and the input end of the compensation branch 5.

[0058] The source of MOS tube P2 is electrically connected to the power supply VDD, the gate of MOS tube P2 is electrically connected to the gate and drain of MOS tube P0 and the gate of MOS tube P1, the drain of MOS tube P2 is electrically connected to one end of resistor R3 and the output end of compensation branch 5, and outputs V REF voltage, the other end of the resistor R3 is electrically connected to one end of the resistor R4, and the other end of the resistor R4 is grounded.

[0059] The external reference voltage output module outputs the reference voltage V BG To the same-direction input terminal of the operational amplifier 101, the output terminal of the operational amplifier is electrically connected to the gate of the MOSFET N1, and the drain of the MOSFET N1 is electrically connected to the input terminal of the second current mirror module 4; the reverse input terminal of the operational amplifier 101 and the source of the MOSFET N1 are both electrically connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

[0060] The sources of MOSFET P3 and MOSFET P4 are both electrically connected to the power supply VDD, and the gate and drain of MOSFET P3 are both electrically connected to the gate of MOSFET P4 and the drain of MOSFET N1. The drain of MOSFET P4 is electrically connected to the drain, gate and gate of MOSFET N2 and the gate of MOSFET N3, and the drain of MOSFET N3 is electrically connected to the output end of the first current mirror module 3 and the input end of the compensation branch 5, that is, the drain of MOSFET N3 is electrically connected to the drain of MOSFET P1 and the input end of the compensation branch 5. The source of MOSFET N2 and the source of MOSFET N3 are both grounded.

[0061] The gate and drain of MOSFET N4 are electrically connected to the gate of MOSFET N5, the drain of MOSFET N3 and the output end of the first current mirror module 3, that is, the gate and drain of MOSFET N4 are electrically connected to the gate of MOSFET N5, the drain of MOSFET N3 and the drain of MOSFET P1. The drain of MOSFET N5 is electrically connected to the output branch 6, that is, the drain of MOSFET N5 is electrically connected to the drain of MOSFET P2 and one end of resistor R3, and outputs V REFVoltage. The source of MOSFET N4 and the source of MOSFET N5 are both grounded.

[0062] In this embodiment, an over-temperature voltage regulation method is also disclosed, which uses the above-mentioned over-temperature voltage regulation circuit.

[0063] Specifically, the resistor R0 and the resistor R3 are both negative temperature coefficient resistors, the first-order temperature coefficient of the resistor R0 and the resistor R3 is k1, the resistor R1, the resistor R2 and the resistor R4 are all positive temperature coefficient resistors, the first-order temperature coefficient of the resistor R1, the resistor R2 and the resistor R4 is k2, that is, k1﹤0, k2﹥0, and the second-order nonlinear coefficients are ignored.

[0064] Specifically, MOS tube P0, MOS tube P1, MOS tube P2, MOS tube P3 and MOS tube P4 are PMOS tubes, and MOS tube N0, MOS tube N1, MOS tube N2, MOS tube N3, MOS tube N4 and MOS tube N5 are NMOS tubes. And the following formula is satisfied:

[0065]

[0066]

[0067]

[0068]

[0069]

[0070]

[0071] Among them, A, B, C and D are proportional coefficients, and A>1, B>1, C>1 and D>1. Among them (W / L) Nx is the width-to-length ratio of the MOS tube Nx; (W / L) Px is the width-to-length ratio of the MOS tube Px; that is (W / L) P0 is the width-to-length ratio of MOS tube P0; (W / L) P1 is the width-to-length ratio of MOS tube P1; (W / L) P2 is the width-to-length ratio of MOS tube P2; (W / L) P3 is the width-to-length ratio of MOS tube P3; (W / L) P4 is the width-to-length ratio of MOS tube P4;

[0072] (W / L) N0 is the width-to-length ratio of MOS tube N0; (W / L) N1 is the width-to-length ratio of MOS tube N1; (W / L) N2 is the width-to-length ratio of MOS tube N2; (W / L) N3is the width-to-length ratio of MOS tube N3; (W / L) N4 is the width-to-length ratio of MOS tube N4; (W / L) N5 is the width-to-length ratio of MOS tube N5.

[0073] Please refer to the attached Figure 2 and Figure 3 , from the circuit structure and current mirror relationship, we can know that:

[0074]

[0075]

[0076]

[0077] The following currents are superimposed:

[0078]

[0079] The conversion can be obtained as formula 1:

[0080] ;

[0081]

[0082]

[0083]

[0084]

[0085]

[0086] Substituting the superimposed current into the output voltage formula yields:

[0087]

[0088]

[0089]

[0090] When the temperature changes,

[0091]

[0092]

[0093] but

[0094]

[0095]

[0096] In this embodiment, R0 / R1 = -k2 / k1, then

[0097]

[0098]

[0099] it can be approximately considered that the resistance value does not change with temperature T.

[0100] Similarly,

[0101]

[0102] In this embodiment, R3 / R4 = -k2 / k1, then

[0103]

[0104]

[0105] it can be approximately considered that the resistance value does not change with temperature T.

[0106] Let the over-temperature point be T0 and the turn-off temperature point be T1, and T1 > T0.

[0107] When T = T0, I N4 = 0, such that I N3 = I P1 At the same time, I N5 = 0.

[0108] When T = T1, I R3 = 0, such that I N5 = I P2 At this time, V REF is close to 0V.

[0109] When the temperature T < T0:

[0110] I N3 ﹥ I P1 That is,

[0111]

[0112] Theoretically, from Formula 1, I N4 ﹤ 0, I N5 ﹤ 0. However, from actual experiments, at this time I N4 = 0, I N5 = 0. Because at this time, MOS transistor N3 does not operate in the saturation region, and the mirror current relationship between MOS transistor N3 and MOS transistor N2 is not the proportionality coefficient C.

[0113] Then the output voltage is:

[0114]

[0115]

[0116]

[0117] Assume m=(R3+R4) / (R0+R1), then the output voltage formula is:

[0118]

[0119] When the temperature T rises but is lower than the overtemperature point T0,

[0120] Since the resistors R0 and R3, and the resistors R1 and R4 are of the same type, and R0 / R1=-k2 / k1, R3 / R4=-k2 / k1, m=(R3+R4) / (R0+R1);

[0121] at this time

[0122]

[0123]

[0124]

[0125]

[0126] Where m = (R3 + R4) / (R0 + R1),

[0127] Right now

[0128]

[0129] Output voltage V REF Remain unchanged.

[0130] at the same time,

[0131]

[0132] Since k2>0, I N3 ’ It decreases with increasing temperature T.

[0133] When the temperature T is equal to the over-temperature point T0, I N3 ’ =I P1 ’ That is I N4 ’ =0,

[0134]

[0135]

[0136]

[0137]

[0138]

[0139]

[0140] That is, according to the target over-temperature point T0, in combination with the above formula, a specific A value, C value, resistance value of resistor R0, resistance value of resistor R1, resistance value of resistor R2 and first-order temperature coefficient k2 of resistor R2 can be set.

[0141] When T0 < T < T1, since the resistor R0 is a resistor with a negative temperature coefficient k1 (k1 < 0); the resistors R1, R2 and R4 are resistors with a positive temperature coefficient k2 (k2 > 0), the following currents are superimposed:

[0142]

[0143]

[0144]

[0145]

[0146] because

[0147]

[0148]

[0149]

[0150]

[0151] but

[0152]

[0153]

[0154]

[0155]

[0156]

[0157] Substitute the above formula into the output voltage formula:

[0158]

[0159]

[0160]

[0161]

[0162]

[0163] in:

[0164]

[0165]

[0166] In this embodiment, k2>0, it can be seen from the above formula that V REF ’ It decreases with increasing temperature T.

[0167] When the temperature T is equal to the shutdown temperature point T1, I R3 ’ =0

[0168]

[0169]

[0170]

[0171]

[0172] in

[0173]

[0174] That is, according to the target shutdown temperature point T1, in combination with the above formula, a specific A value, B value, C value, D value and the first-order temperature coefficient of the resistor R2 can be set to k2.

[0175] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. An over-temperature voltage regulation method, characterized in that: Its over-temperature voltage regulation circuit includes a constant current generating branch, a first current mirror module, an output branch, a negative growth current generating branch, a second current mirror module and a compensation branch; The external reference voltage output module outputs the reference voltage V BG To the input end of the constant current generating branch and the negative growth current generating branch, the output end of the constant current generating branch is electrically connected to the input end of the first current mirror module; the input end of the output branch is electrically connected to the first current mirror module; The output end of the negative growth current generating branch is electrically connected to the input end of the second current mirror module; the input end of the compensation branch is electrically connected to the output ends of the first current mirror module and the second current mirror module, and the output end of the compensation branch is electrically connected to the output branch and outputs V REF Voltage; The first current mirror module includes MOS tube P0 and MOS tube P1; the output branch includes MOS tube P2, resistor R3 and resistor R4; the second current mirror module includes MOS tube P3, MOS tube P4, MOS tube N2 and MOS tube N3; the compensation branch includes MOS tube N4 and MOS tube N5; The source of the MOSFET P0, the source of the MOSFET P1, the source of the MOSFET P2, the source of the MOSFET P3 and the source of the MOSFET P4 are all electrically connected to the power supply VDD. The gate and drain of the MOSFET P0 are electrically connected to the gate, constant current generating branch and output branch of the MOSFET P1, and the drain of the MOSFET P1 is electrically connected to the output end of the second current mirror module and the input end of the compensation branch; The gate of the MOS tube P2 is electrically connected to the gate and drain of the MOS tube P0 and the gate of the MOS tube P1. The drain of the MOS tube P2 is electrically connected to one end of the resistor R3 and the output end of the compensation branch, and outputs V REF voltage, the other end of the resistor R3 is electrically connected to one end of the resistor R4; The gate and drain of the MOSFET P3 are electrically connected to the gate of the MOSFET P4 and the drain of the MOSFET N1; the drain of the MOSFET P4 is electrically connected to the drain and gate of the MOSFET N2 and the gate of the MOSFET N3; the drain of the MOSFET N3 is electrically connected to the output end of the first current mirror module and the input end of the compensation branch; The gate and drain of the MOS tube N4 are electrically connected to the gate of the MOS tube N5, the drain of the MOS tube N3 and the output end of the first current mirror module. The drain of the MOS tube N5 is electrically connected to the output branch and outputs V REF Voltage, The other end of the resistor R4, the source of the MOSFET N2, the source of the MOSFET N3, the source of the MOSFET N4 and the source of the MOSFET N5 are all grounded; The constant current generating branch includes resistors R0 and R1; the negative growth current generating branch includes resistor R2; The resistors R0 and R3 are both negative temperature coefficient resistors, and the resistors R1, R2 and R4 are all positive temperature coefficient resistors; The over-temperature voltage regulation method includes setting an over-temperature point T0 and a shutdown temperature point T1 based on the over-temperature voltage regulation circuit, wherein: ,in, ; ,in, ; In the formula, A, B, C and D are proportional coefficients, and A>1, B>1, C>1 and D>1, and satisfy: Said (W / L) P0 is the width-to-length ratio of MOS tube P0; (W / L) P1 is the width-to-length ratio of MOS tube P1; (W / L) P2 is the width-to-length ratio of MOS tube P2; (W / L) N2 is the width-to-length ratio of MOS tube N2; (W / L) N3 is the width-to-length ratio of MOS tube N3; (W / L) N4 is the width-to-length ratio of MOS tube N4; (W / L) N5 is the width-to-length ratio of MOS tube N5; The k2 is the first-order temperature coefficient of the resistor R1, the resistor R2 and the resistor R4; the R0, R1 and R2 are the resistance values ​​of the resistor R0, the resistor R1 and the resistor R2 respectively.

2. An over-temperature voltage regulation circuit using the over-temperature voltage regulation method according to claim 1, characterized in that: The constant current generating branch also includes an operational amplifier 100 and a MOSFET N0. The external reference voltage output module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier 100, the output terminal of the operational amplifier is electrically connected to the gate of the MOSFET N0, and the drain of the MOSFET N0 is electrically connected to the input terminal of the first current mirror module; the resistor R0 and the resistor R1 are connected in series to the reverse input terminal of the operational amplifier 100 and the source of the MOSFET N0, and are grounded.

3. The over-temperature voltage regulating circuit according to claim 2, characterized in that: The negative growth current generating branch also includes an operational amplifier 101 and a MOS tube N1. The external reference voltage output module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier 101, the output terminal of the operational amplifier is electrically connected to the gate of the MOSFET N1, and the drain of the MOSFET N1 is electrically connected to the input terminal of the second current mirror module; the reverse input terminal of the operational amplifier 101 and the source of the MOSFET N1 are both electrically connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

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