Design Optimization Method for Silicon-Based MOSFET Trench Structure

Abstract

This application provides a design optimization method for silicon-based MOSFET trench structures, relating to the field of semiconductor device technology. The method includes: performing scenario analysis of a set of application scenarios and establishing performance biases and constraints for silicon-based MOSFET trenches based on general and extreme scenarios; performing data filtering in the design database; updating the initial solution set according to the optimization order of first-level and second-level optimization features; evaluating the fitness of each solution and finding the optimal solution within the solution space; completing joint optimization; filtering the optimization results; and optimizing the design of the silicon-based MOSFET trench structure. This application addresses the technical problem in existing technologies where the difficulty in precisely controlling and dynamically optimizing geometric parameters leads to the inability to simultaneously balance on-resistance, withstand voltage performance, and switching speed during the design process. It achieves the technical effect of simultaneously improving the balance of on-resistance, withstand voltage performance, and switching speed in high-voltage applications.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a design optimization method for a silicon-based MOSFET trench structure. Background Art

[0002] Silicon-based MOSFET (metal oxide semiconductor field effect transistor) is a core component in modern semiconductor devices and is widely used in power electronics, integrated circuits and other fields. It is widely adopted due to its good switching characteristics and low power consumption advantages.

[0003] At present, there are limitations in the geometric structure optimization in the existing trench MOSFET design. Specifically, key geometric parameters such as the depth, width and layout of the gate material of the trench are difficult to accurately control and dynamically optimize during the design process. Since these parameters have a direct impact on the device's on-resistance, voltage resistance, switching speed and other performance, existing optimization methods often find it difficult to take into account multiple performance indicators at the same time. For example, in high-voltage application scenarios, deeper trenches can improve voltage resistance, but may lead to an increase in on-resistance, thereby affecting the efficiency of the device. Therefore, how to achieve a balance between multiple design parameters has become a technical problem.

[0004] In summary, the existing technology has technical problems in that it is difficult to achieve precise control and dynamic optimization of geometric structure parameters, resulting in the inability to simultaneously take into account the balance of on-resistance, voltage resistance and switching speed during the design process, further affecting the overall efficiency and reliability of trench MOSFET in high voltage and high performance applications. Summary of the invention

[0005] The purpose of this application is to provide a design optimization method for a silicon-based MOSFET trench structure, in order to solve the technical problem in the prior art that it is difficult to achieve precise control and dynamic optimization of geometric structure parameters, resulting in the inability to simultaneously take into account the balance of on-resistance, withstand voltage performance and switching speed during the design process, further affecting the overall efficiency and reliability of trench MOSFET in high voltage and high performance applications.

[0006] In view of the above problems, the present application provides a design optimization method for a silicon-based MOSFET groove structure, including: establishing a usage scenario set of power devices, performing scenario analysis of the usage scenario set, establishing general scenarios and extreme scenarios, and establishing performance biases and constraints of silicon-based MOSFET grooves with the general scenarios and extreme scenarios; using the constraints as screening conditions, performing data screening of a design database, and establishing a solution space; using the depth and width of the groove as primary optimization features, and using the gate material layout and oxide layer features as secondary optimization features, after creating an initial solution set in the solution space, updating the initial solution set according to the optimization order of the primary optimization features and the secondary optimization features; configuring a fitness evaluation function of performance parameters using performance bias, and performing fitness evaluation of each solution based on the fitness evaluation function, and optimizing in the solution space with the fitness evaluation results; completing joint optimization according to the optimization results, screening the optimization results through a cost evaluation function, and using the screening results to optimize the design of the silicon-based MOSFET groove structure.

[0007] One or more technical solutions provided in this application have at least the following technical effects or advantages:

[0008] By establishing a usage scenario set of power devices, performing scenario analysis of the usage scenario set, establishing general scenarios and extreme scenarios, and using the general scenarios and extreme scenarios to establish performance biases and constraints of silicon-based MOSFET grooves; using the constraints as screening conditions, performing data screening of a design database, and establishing a solution space; taking the depth and width of the groove as primary optimization features, and taking the gate material layout and oxide layer features as secondary optimization features, after creating an initial solution set in the solution space, updating the initial solution set according to the optimization order of the primary optimization features and the secondary optimization features; configuring a fitness evaluation function of the performance parameters using performance bias, and performing fitness evaluation of each solution based on the fitness evaluation function, and searching for the best solution in the solution space based on the fitness evaluation results; completing joint optimization based on the optimization results, screening the optimization results through a cost evaluation function, and using the screening results to optimize the design of the silicon-based MOSFET groove structure, achieving the technical goal of precise control and dynamic optimization of key geometric parameters such as groove depth, width, and gate material layout, and achieving the technical effect of simultaneously improving the balance of on-resistance, withstand voltage performance, and switching speed in high-voltage application scenarios.

[0009] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented according to the contents of the specification, and in order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are specifically cited below. It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easy to understand through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the present application or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only exemplary, and for ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0011] Figure 1 A schematic diagram of the process of designing and optimizing the trench structure of a silicon-based MOSFET according to the present application;

[0012] Figure 2 This is a structural schematic diagram of the initial solution set update in the design optimization method of the silicon-based MOSFET trench structure of the present application. DETAILED DESCRIPTION

[0013] This application provides a design optimization method for a silicon-based MOSFET trench structure, which solves the technical problem in the prior art that it is difficult to achieve precise control and dynamic optimization of geometric structure parameters, resulting in the inability to simultaneously balance the on-resistance, withstand voltage performance, and switching speed during the design process, further affecting the overall efficiency and reliability of trench MOSFETs in high-voltage and high-performance applications. The technical goal of achieving precise control and dynamic optimization of key geometric parameters such as trench depth, width, and gate material layout is achieved, achieving the technical effect of simultaneously improving the balance of on-resistance, withstand voltage performance, and switching speed in high-voltage application scenarios.

[0014] Below, the technical solutions in the present application will be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments of the present application. It should be understood that the present application is not limited to the example embodiments described herein. Based on the embodiments of the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application. It should also be noted that, for the convenience of description, only the parts related to the present application are shown in the accompanying drawings, rather than all of them.

[0015] Please see attached Figure 1, the present application provides a design optimization method for a silicon-based MOSFET trench structure, specifically comprising:

[0016] Step 1: Establish a usage scenario set for power devices, perform scenario analysis on the usage scenario set, establish general scenarios and extreme scenarios, and establish performance bias and constraint conditions for silicon-based MOSFET trenches based on the general scenarios and extreme scenarios.

[0017] Specifically, the specific usage of power devices in different applications is collected and summarized as a set of usage scenarios, such as different voltages, currents, ambient temperatures, and other parameters involved in electric vehicles, home appliances, or industrial equipment. Then, scenario analysis of the usage scenario set is performed, and the collected usage scenario set is deeply analyzed to determine the key requirements and potential challenges in each scenario, such as usage scenarios with higher current load requirements and usage scenarios that are more sensitive to temperature fluctuations.

[0018] Then, common scenarios and extreme scenarios are established. Common scenarios refer to standard scenarios where power devices work under daily or most conditions, such as 5 volts and 10 amps at 25 degrees Celsius. Extreme scenarios refer to the worst conditions that power devices may encounter, such as a sudden increase in current to 50 amps or a rapid increase in temperature from minus 40 degrees Celsius to 100 degrees Celsius.

[0019] Next, performance bias refers to the intentional adjustment or setting of specific performance parameters of components so that they perform as expected under certain conditions. Biasing means tilting components in certain aspects to achieve better results in specific scenarios. For example, in a certain application, it may be necessary to slightly reduce the on-voltage of the MOSFET so that it performs better when operating at low voltage. Constraints are restrictions or boundary conditions that must be followed to ensure that components do not fail or exceed the acceptable operating range under various conditions. Constraints are formulated based on extreme scenarios and general scenarios, and include upper and lower limits for parameters such as power, temperature, voltage, and current. For example, the operating voltage of a power device cannot exceed 10 volts, and the operating current cannot exceed 50 amps. Based on general scenarios, the performance bias of silicon-based MOSFET trenches is established. Based on extreme scenarios, constraints for silicon-based MOSFET trenches are established to ensure that the MOSFET trenches can operate efficiently under normal conditions and remain stable under extreme conditions.

[0020] Step 2: Using the constraint conditions as screening conditions, perform data screening of the design database and establish a solution space.

[0021] Specifically, the design database contains many different design parameter combinations, such as design solutions for different voltages, currents, and temperature ranges. Using constraints as screening conditions, select design solutions or components that meet the requirements of extreme scenarios from the existing design database to establish a solution space, which includes a set of design solutions that meet all constraints after screening. The solution space constitutes a possible space for solving the problem.

[0022] Step 3: Take the depth and width of the trench as the first-level optimization features, and the gate material layout and oxide layer features as the second-level optimization features. After creating the initial solution set in the solution space, update the initial solution set according to the optimization order of the first-level optimization features and the second-level optimization features.

[0023] Specifically, the depth and width of the groove directly affect the current conduction capability and heat dissipation performance of the components. Taking the depth and width of the groove as the first-level optimization features, optimizing the depth and width of the MOSFET groove structure will help optimize the on-resistance and capacitance characteristics of the device. Next, the gate material layout and oxide layer characteristics affect the switching speed and voltage resistance of the components. Taking the gate material layout and oxide layer characteristics as the second-level optimization features means further optimization of the distribution of the gate material and the thickness and quality of the oxide layer.

[0024] Step 4: Use the performance bias to configure the fitness evaluation function of the performance parameters, and perform fitness evaluation on each solution based on the fitness evaluation function, and use the fitness evaluation result to find the best solution in the solution space.

[0025] Specifically, the performance bias is used to configure the fitness evaluation function of the performance parameters, that is, the fitness evaluation function of the performance parameters is constructed according to the parameter target of the performance bias to measure the pros and cons of the design scheme. The fitness evaluation function is used to obtain parameters that better meet the performance bias, and then find the design scheme with the best performance in the solution space.

[0026] Step 5: Complete joint optimization based on the optimization results, screen the optimization results through the cost evaluation function, and use the screening results to optimize the design of the silicon-based MOSFET trench structure.

[0027] Specifically, the results obtained from the optimization are combined with different performance and design requirements to perform a global optimization. Joint optimization optimizes multiple parameters at the same time to find the best solution under various constraints. For example, on the basis of meeting the standards for on-resistance, withstand voltage and other factors, other performance optimizations need to be considered.

[0028] The various optimized design solutions are evaluated through the cost evaluation function to screen out the solution that achieves the best balance between performance and cost. Among them, the cost evaluation function takes into account the costs of materials, processes, packaging and other aspects. Then, the screening results are used to further optimize the geometric parameters of the trench structure, such as depth and width, to improve the overall performance of the device.

[0029] The design optimization method of the silicon-based MOSFET trench structure can achieve the technical goal of precise control and dynamic optimization of key geometric parameters such as trench depth, width and gate material layout, and achieve the technical effect of simultaneously improving the balance of on-resistance, voltage resistance and switching speed in high-voltage application scenarios.

[0030] For further information, please see the attached Figure 2 , this application also includes:

[0031] Establish dynamic interaction between primary optimization features and secondary optimization features; after creating the initial solution set, use the primary optimization features to update and optimize, and perform fitness threshold judgment on the updated optimization solution; if the updated optimization solution meets the preset fitness threshold, the updated optimization solution will be identified as a potential solution, and the dynamic interaction will be activated synchronously to perform secondary optimization feature optimization; complete the initial solution set update according to the optimization results of the secondary optimization feature.

[0032] Specifically, through the interaction between the primary optimization features and the secondary optimization features, a dynamic interaction between the primary optimization features and the secondary optimization features is established. Among them, the geometric characteristics of the groove affect the effect of the material layout, and vice versa. For example, if the groove is too deep, the effective area of ​​the gate material becomes smaller, thereby affecting the switching performance.

[0033] After the initial solution set is randomly created in the solution space, an update optimization is performed with the primary optimization feature, that is, a set of possible design solutions are obtained by optimizing the depth and width of the groove to obtain an updated optimization solution. The updated optimization solution is subjected to a fitness threshold determination, that is, the updated optimization solution is evaluated to see whether it meets the preset fitness threshold. The fitness threshold is obtained by a person skilled in the art by custom setting according to actual conditions.

[0034] If the updated optimal solution meets the preset fitness threshold, the updated optimal solution will be regarded as a potential design scheme, and the dynamic interaction will be activated simultaneously to further optimize the secondary features such as the gate material and the oxide layer, thereby adjusting the microstructure of the material or changing the thickness of the oxide layer.

[0035] Finally, the initial solution set is updated according to the optimization results of the secondary optimization features, that is, after completing the optimization of the secondary features, a complete and optimized design solution set is obtained. The design is gradually optimized through primary and secondary optimizations and through the dynamic interaction between the two.

[0036] Furthermore, the present application also includes:

[0037] The optimization results of the secondary optimization features are used to perform adaptation analysis on the gate material layout and the oxide layer features, and establish the adaptation analysis results; if the adaptation analysis results are unsuitable results, a rollback instruction is generated; based on the rollback instruction, the corresponding solution set is rolled back to the primary optimization stage, and the primary optimization features are re-adjusted.

[0038] Specifically, the optimization results of the secondary optimization features are used to perform adaptation analysis of the gate material layout and oxide layer features to ensure that the gate material and oxide layer can work together in the design to achieve the expected performance effect and establish the adaptation analysis results. For example, if the combination of gate material layout and oxide layer thickness can shorten the switching time of the device to less than 10 nanoseconds, the gate material layout and oxide layer features are considered to be adapted.

[0039] Next, if the adaptation analysis result is an incompatible result, that is, the gate material layout after the second-level optimization is incompatible with the oxide layer characteristics, resulting in the device failing to achieve the expected performance, such as the switching time being greater than 10 nanoseconds or the voltage resistance being insufficient, a rollback instruction is generated to return to the first-level optimization stage to readjust the design.

[0040] Based on the rollback instruction, the corresponding solution set is rolled back to the first-level optimization stage, and the first-level optimization features are readjusted. That is, the original design solution set is rolled back to the stage of geometric structure optimization, and the first-level optimization features such as the depth and width of the groove are readjusted to ensure that the gate material and oxide layer features can be better adapted in the subsequent second-level optimization.

[0041] Through the adaptation analysis of the secondary optimization features, it is ensured that the gate material and oxide layer features can work together. If the analysis results are not suitable, it will fall back to the primary optimization stage for readjustment to optimize the adjustment effect.

[0042] Furthermore, the present application also includes:

[0043] Record the simulation values ​​of the secondary optimization stage, and feed the simulation values ​​back to the primary optimization stage; use the simulation values ​​to establish fitness compensation for the primary optimization stage; use the fitness compensation to dynamically expand the solution set range of the primary optimization stage to complete the initial solution set update.

[0044] Specifically, when optimizing the gate material layout and oxide layer characteristics in the secondary optimization stage, simulation is performed and the resulting performance parameters are recorded as simulation values, including on-resistance, switching speed, withstand voltage performance, etc.

[0045] Next, the simulation values ​​are fed back to the first-level optimization stage to adjust the optimization strategy for the groove geometry (depth, width) during the first-level optimization process, so that the first-level optimization can refer to the results of the second-level optimization, making the entire optimization process more coherent. For example, if the second-level optimization shows that the groove width is too small, resulting in too high on-resistance, the first-level optimization can increase the groove width accordingly after feedback.

[0046] In the first-level optimization stage, a fitness compensation mechanism is established based on the simulation values ​​fed back to correct the objective function or evaluation criteria of the first-level optimization to better reflect the impact of the second-level optimization on the overall performance. For example, if the simulation results show that the on-resistance is higher than expected, the fitness compensation can adjust the goal in the first-level optimization to put more weight on reducing the on-resistance.

[0047] Then, fitness compensation is used to dynamically expand the solution set range of the first-level optimization stage. For example, the design range of the groove width may be expanded from 0.3 microns to 0.5 microns to 0.3 microns to 0.6 microns, so as to find a more satisfactory solution in a wider design space.

[0048] Finally, after applying simulation feedback and fitness compensation, the initial design solution set, that is, the initial solution set, is improved and updated, and ultimately a design solution that better meets the performance requirements can be output.

[0049] By obtaining simulation data from the secondary optimization stage and feeding it back to the primary optimization, the fitness standard of the primary optimization is adjusted using the simulation data, thereby expanding the scope of the design scheme, improving the initial design solution set, and making the optimized design scheme meet the performance requirements.

[0050] Furthermore, the present application also includes:

[0051] Call the deviation target value of the gate charge and / or parasitic capacitance in the adaptation analysis result; determine whether the deviation target value is within a predetermined level range; if the deviation target value is within the predetermined level range, retain the groove depth characteristics of the corresponding solution set with a rollback instruction, and roll back the solution set after retaining the groove depth characteristics to the first-level optimization stage; if the deviation target value is not within the predetermined level range, directly roll back the corresponding solution set to the first-level optimization stage, and re-adjust the first-level optimization characteristics.

[0052] Specifically, since the gate charge determines the switching speed of the MOSFET and the parasitic capacitance affects its performance, data related to the gate charge and parasitic capacitance are extracted from the adaptation analysis, arbitrary data are randomly called and the gap with the preset design target is calculated as the deviation from the target value.

[0053] Next, due to the different degrees of deviation of gate charge and parasitic capacitance from the target value, the solution set for falling back to the first-level optimization stage may be different. A slight deviation can retain the original trench depth and only adjust the width, while a severe deviation requires the trench depth and width to be readjusted at the same time, thereby generating a predetermined level range. The predetermined level range is obtained by a technician in this field according to the actual situation.

[0054] Determine whether the deviation from the target value is within the predetermined level range, that is, determine whether the deviation calculated by the evaluation is within the allowable error range. If the deviation from the target value is within the predetermined level range, it means that although the design plan has a certain deviation, it is still acceptable, and then return to the first-level optimization stage for some local adjustments. At this time, the groove depth feature will be retained and does not need to be modified, which has little impact on the current optimization result, while other parameters such as width may need to be optimized and adjusted.

[0055] If the deviation from the target value is not within the predetermined level range and exceeds the allowable range, the corresponding solution set will be directly returned to the first-level optimization stage, and the first-level optimization features will be re-adjusted, including the groove depth and width. The current design scheme cannot meet the performance requirements, so all geometric features need to be re-optimized.

[0056] The design is evaluated by calling the deviation data of gate charge and parasitic capacitance to see if it meets the target. If the deviation is within the allowable range, some geometric features are retained and local optimization is performed; if the deviation is too large, it is necessary to fully roll back and re-optimize the first-level features to optimize the adjustment effect.

[0057] Furthermore, the present application also includes:

[0058] The usage scenario set is classified by domain, standard working conditions mapped with the domain are established, and the standard working conditions are used as general scenarios; extreme environmental data faced by the usage scenario set is obtained, and the extreme environmental data includes large current impact data and rapid temperature change data; protection expansion is performed on the extreme environmental data, and the protection expansion result is used as the extreme scenario.

[0059] Specifically, the use scenario set is classified into different fields or scenarios to distinguish the different fields or scenarios of the component application, so that it can be optimized according to different needs and characteristics during design. For example, the needs of the consumer electronics field and the industrial field are different, and the environmental conditions they face are also different, so different fields need to be divided.

[0060] Next, we establish standard working conditions that are mapped to the domain, and find the corresponding standard working state for each classified usage scenario, such as typical operating conditions such as voltage, current, and temperature. Taking the standard working condition as a common scenario means that the standard working condition is the most basic and most commonly encountered working state in the design.

[0061] Then, obtain the extreme environment data faced by the use scenario set to better ensure that the components can still work normally in harsh environments. Extreme environment data includes high current impact data and rapid temperature change data. High current impact data refers to the situation where the current that electronic components are subjected to suddenly increases in a short period of time, which occurs when the circuit is started, switched or fails. High current impact data includes the peak value of the current, duration, and number of impacts. For example, the high current impact data is a sudden increase from the working current of 2 amps to 100 amps, the duration is 10 milliseconds, and this impact may occur every few seconds or minutes. High current impact data helps to test the reliability of components during such short and drastic current changes. Rapid temperature change data refers to the situation where the ambient temperature rises or falls sharply in a short period of time, and the components need to maintain normal working performance under such changes. Rapid temperature change data includes the amplitude of temperature change, the rate of change, and the periodicity of change. For example, the rapid temperature change data is a change from minus 40 degrees Celsius to plus 85 degrees Celsius, and the time span may be only a few seconds or even shorter. Rapid temperature fluctuations put great pressure on the thermal expansion coefficient, electrical properties and structural integrity of the material.

[0062] Finally, the protection of extreme environmental data is expanded, that is, by adding protection measures to deal with the harsh conditions corresponding to the extreme environmental data, ensuring that the components will not be damaged under the extreme environmental data, and taking the results of the added protection measures as the extreme scenario, so as to maintain the reliability and stability of the components under the conditions of extreme environmental data.

[0063] By classifying the usage scenarios in different fields, determining the standard working conditions for each field, and obtaining relevant data under extreme environments, we finally expand the protection mechanism to ensure that components can work stably under extreme conditions, thereby remaining safe and stable.

[0064] Furthermore, the present application also includes:

[0065] Establish key factors for cost evaluation, including material cost, process cost, packaging heat dissipation cost, and reliability cost; establish a cost evaluation function through the formula as follows: ;in, is the total number of key factors, Characterization A key factor, For the The weight of the key factors, For the The cost of each key factor is calculated, and the optimization results are screened using the cost evaluation function.

[0066] Specifically, cost factors are introduced during joint optimization, and the factors that have the greatest impact on the total cost are determined. Key factors include material cost, process cost, package heat dissipation cost, and reliability cost. For example, material cost may include the cost of semiconductor materials, process cost involves the technology and equipment used in the manufacturing process, package heat dissipation cost is related to the thermal management design of components, and reliability cost reflects the life and performance stability of components in long-term use. Each key factor has an important impact on the overall cost of the final product.

[0067] In order to evaluate and quantify the costs of different design options, a formula is used to weight the key cost factors, which helps to consider the contribution of each key factor to the total cost when optimizing the design.

[0068] in, is the total number of key factors. In the cost function, there are There are several key factors to consider, each with a different index. If there are 4 key factors, That is 4. They can represent material cost, process cost, packaging heat dissipation cost and reliability cost respectively.

[0069] For the The weight of each key factor is determined by the weight of the key factors. Since each cost factor has different importance, different weights are assigned to determine the proportion of a factor in the total cost. The weights are customized by technicians in this field according to actual conditions. For the The cost of each key factor, that is, the specific cost value of each key factor, is used to screen the optimization results and finally select the solution with the best balance in terms of performance and cost.

[0070] The performance and cost factors are comprehensively considered through the optimization results, and then the cost evaluation function is constructed to combine factors such as materials, processes, packaging heat dissipation, and reliability. Finally, the optimal design solution is found through screening.

[0071] Furthermore, the present application also includes:

[0072] A distance constraint is established using the spatial range of the solution space; the trustworthiness of the historical data is obtained, and a call constraint of the historical data is established based on the trustworthiness; and an initial solution set is constructed in the solution space based on the distance constraint and the call constraint.

[0073] Specifically, by measuring the distance between design schemes, the variation range of each scheme is limited within a specific range to ensure that different design schemes do not deviate too far, thereby ensuring the feasibility of each scheme.

[0074] Next, historical data is obtained from past optimization processes or experimental results, and the historical data is evaluated for trust. Trust represents the reliability or reference value of historical data in the current optimization. Data with high trust are more likely to be used as a reference for the current optimization, while data with low trust may be partially or completely ignored. For example, the effect of the groove width measured in the optimization on the withstand voltage performance has been verified many times, and its trust is high, so it can be used in the new design.

[0075] Then, through the distance constraint and historical data call constraint, a suitable initial solution set is selected in the solution space. The initial solution set is the starting point of the optimization process and consists of multiple design schemes that meet the distance constraint and call constraint conditions. For example, the initial solution set contains different trench widths, depths, and gate material combinations, but all meet the established distance range and historical data call conditions.

[0076] The distance constraints in the solution space are used to limit the range of change in the design solution. At the same time, the trustworthiness of historical data is combined to screen reference data, and finally an initial solution set is constructed to improve optimization efficiency.

[0077] In summary, the design optimization method of the silicon-based MOSFET trench structure provided in this application has the following technical effects:

[0078] By establishing a usage scenario set of power devices, performing scenario analysis of the usage scenario set, establishing general scenarios and extreme scenarios, and using the general scenarios and extreme scenarios to establish performance biases and constraints of silicon-based MOSFET grooves; using the constraints as screening conditions, performing data screening of a design database, and establishing a solution space; taking the depth and width of the groove as primary optimization features, and taking the gate material layout and oxide layer features as secondary optimization features, after creating an initial solution set in the solution space, updating the initial solution set according to the optimization order of the primary optimization features and the secondary optimization features; configuring a fitness evaluation function of the performance parameters using performance bias, and performing fitness evaluation of each solution based on the fitness evaluation function, and searching for the best solution in the solution space based on the fitness evaluation results; completing joint optimization based on the optimization results, screening the optimization results through a cost evaluation function, and using the screening results to optimize the design of the silicon-based MOSFET groove structure, achieving the technical goal of precise control and dynamic optimization of key geometric parameters such as groove depth, width, and gate material layout, and achieving the technical effect of simultaneously improving the balance of on-resistance, withstand voltage performance, and switching speed in high-voltage application scenarios.

[0079] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

[0080] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application belong to the scope of the present application and its equivalent technology, the present application is also intended to include these modifications and variations.

Claims

1. A design optimization method for a silicon-based MOSFET trench structure, characterized in that: Methods include: Establishing a usage scenario set of power devices, performing scenario analysis of the usage scenario set, establishing general scenarios and extreme scenarios, and establishing performance bias and constraint conditions of silicon-based MOSFET trenches based on the general scenarios and extreme scenarios; Using the constraint conditions as screening conditions, performing data screening of the design database to establish a solution space; The depth and width of the trench are used as the first-level optimization features, and the gate material layout and oxide layer features are used as the second-level optimization features. After the initial solution set is created in the solution space, the initial solution set is updated according to the optimization order of the first-level optimization features and the second-level optimization features; Using the performance bias to configure the fitness evaluation function of the performance parameter, and based on the fitness evaluation function, performing fitness evaluation on each solution, and searching for the best solution in the solution space with the fitness evaluation result; Complete joint optimization based on the optimization results, screen the optimization results through the cost evaluation function, and use the screening results to optimize the design of the silicon-based MOSFET trench structure; After the initial solution set is created in the solution space, the initial solution set is updated according to the optimization order of the primary optimization features and the secondary optimization features, including: Establish dynamic interaction between primary optimization features and secondary optimization features; After the initial solution set is created, the first-level optimization feature is used to update the optimization, and the fitness threshold of the updated optimization solution is determined; If the updated optimal solution meets the preset fitness threshold, the updated optimal solution is marked as a potential solution, and the dynamic interaction is activated synchronously to perform secondary optimization feature optimization; Complete the initial solution set update according to the secondary optimization feature optimization results; The updating of the initial solution set according to the optimization result of the secondary optimization feature includes: Use the secondary optimization feature optimization results to perform gate material layout and oxide layer feature adaptation analysis and establish the adaptation analysis results; If the adaptation analysis result is an incompatible result, a rollback instruction is generated; Based on the rollback instruction, the corresponding solution set is rolled back to the first-level optimization stage, and the first-level optimization feature is adjusted again; The step of rolling back the corresponding solution set to the first-level optimization stage based on the rollback instruction and re-adjusting the first-level optimization features includes: Calling the deviation target value of gate charge and / or parasitic capacitance in the adaptation analysis result; Determining whether the deviation from the target value is within a predetermined level range; If the deviation from the target value is within a predetermined level range, a rollback instruction is used to retain the groove depth feature of the corresponding solution set, and the solution set after retaining the groove depth feature is rolled back to the first-level optimization stage; If the deviation target value is not within the predetermined level range, the corresponding solution set is directly returned to the first-level optimization stage, and the first-level optimization feature adjustment is performed again; The performing of scenario analysis of the usage scenario set to establish a general scenario and an extreme scenario includes: Classifying the usage scenario set by domain, establishing standard working conditions mapped with the domain, and using the standard working conditions as general scenarios; Acquire extreme environment data faced by the usage scenario set, wherein the extreme environment data includes high current impact data and rapid temperature change data; Performing protection expansion on the extreme environment data, and using the protection expansion result as an extreme scenario; Based on common scenarios, the performance bias of silicon-based MOSFET trenches is established; Based on extreme scenarios, the constraints of silicon-based MOSFET trenches are established.

2. The design optimization method of the silicon-based MOSFET trench structure according to claim 1, characterized in that: The method also includes: Recording simulation values ​​of the secondary optimization stage, and feeding the simulation values ​​back to the primary optimization stage; Using the simulation value to establish fitness compensation in the first-level optimization stage; The fitness compensation is used to dynamically expand the solution set range of the first-level optimization stage to complete the initial solution set update.

3. The design optimization method of the silicon-based MOSFET trench structure according to claim 1, characterized in that: The method further includes screening the optimization results by using the cost evaluation function and optimizing the design of the silicon-based MOSFET trench structure by using the screening results: Establish key factors for cost evaluation, including material cost, process cost, packaging heat dissipation cost, and reliability cost; The cost evaluation function is established through the formula as follows: ; in, is the total number of key factors, Characterization A key factor, For the The weight of the key factors, For the The cost of each key factor is calculated, and the optimization results are screened using the cost evaluation function.

4. The design optimization method of the silicon-based MOSFET trench structure according to claim 1, characterized in that: The method also includes: Use the spatial extent of the solution space to establish distance constraints; Obtaining the trustworthiness of historical data, and establishing a call constraint for the historical data according to the trustworthiness; An initial solution set is constructed in the solution space based on the distance constraint and the call constraint.

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