Battery unit internal resistance detection circuit and detection method

Abstract

According to the battery unit internal resistance detection circuit and detection method provided by the invention, the working frequency of the first switch is controlled, and the disturbance current with a certain frequency is generated on the battery unit based on the discharge current generation circuit, so that the voltage on the battery generates certain disturbance; the disturbance quantity of the voltage is converted into a first digital signal through a first analog-to-digital converter, and the internal resistance of the corresponding battery is detected based on the first digital signal and the bleeder current or a second digital signal converted from a current sampling signal of the bleeder current. Through the arrangement, compared with the mode that the battery voltage is directly sent to the first analog-to-digital converter to be converted, the difference value between the battery voltage and the reference voltage is sent to the first analog-to-digital converter to be converted, so that the voltage range to be quantized by the first analog-to-digital converter is small, the resolution is improved, the quantization error is reduced, and the detection precision is improved. In this way, the use of a blocking filter capacitor is avoided, the area is saved, and integration and miniaturization are facilitated.

Description

Technical Field

[0001] The present invention relates to the technical field of batteries, and in particular to a battery cell internal resistance detection circuit and a detection method. Background Art

[0002] In the prior art, batteries are often used to power electronic devices, and it is usually necessary to measure the internal resistance of the battery, which is an important parameter for evaluating the battery life and health status. The method of measuring the internal resistance of the battery in the prior art often requires a DC blocking filter capacitor, through which the disturbance of the battery voltage can be obtained, and the corresponding battery internal resistance can be obtained based on the ratio of the voltage disturbance to the discharge current. The frequency band for measuring the internal resistance of the battery is generally wide, and the DC blocking filter capacitor is usually set larger, which will make it occupy a larger area, which is not conducive to miniaturization and integration. Therefore, it is necessary to improve the problems existing in the prior art to solve the problems existing in the prior art. Summary of the invention

[0003] In order to solve the above technical problems, the present invention provides a battery cell internal resistance detection circuit and a detection method thereof.

[0004] According to a first aspect of the present invention, a battery cell internal resistance detection circuit is provided, wherein the battery cell comprises N sub-batteries connected in series, where N is a natural number greater than or equal to 1; the battery cell internal resistance detection circuit comprises:

[0005] The first to fourth ports, the positive end of the battery cell is connected to the first port, the negative end of the battery cell is connected to the second port; the third port is connected to the positive end of one of the sub-batteries, and the fourth port is connected to the negative end of the sub-battery;

[0006] A discharge current generating circuit and a first switch, wherein the discharge current generating circuit and the first switch are arranged in series on a branch between the first port and the second port, and the discharge current generating circuit is used to generate a discharge current; and a current disturbance is generated on the battery cell by controlling the operating frequency of the first switch;

[0007] a first analog-to-digital converter, based on the current disturbance, converting a difference between the voltage of the third port and a reference voltage into a first digital signal; the reference voltage is generated by the reference voltage generating circuit;

[0008] A control logic module, wherein the control logic module controls the operating frequency of the first switch, and obtains the internal resistance of the sub-battery connected between the third port and the fourth port based on the first digital signal and the discharge current or a second digital signal converted from the current sampling signal of the discharge current; or, the logic control module sends the first digital signal and the discharge current signal or the second digital signal converted from the current sampling signal of the discharge current to a processor, and the processor processes and obtains the internal resistance of the sub-battery connected between the third port and the fourth port.

[0009] Optionally, the detection circuit further includes a current sampling circuit, which is used to sample the discharge current to obtain a current sampling signal, and the first analog-to-digital converter is further used to convert the current sampling signal into a second digital signal.

[0010] Optionally, the reference voltage generating circuit is a digital-to-analog converter, and the digital-to-analog converter is used to convert a digital signal received by it into the reference voltage.

[0011] Optionally, the digital signal is a digital signal output by the control logic module, or is a digital signal converted by the first analog-to-digital converter from the maximum voltage detected on the third port when the first switch is disconnected.

[0012] Optionally, when the control logic module controls the first switch to operate at a certain frequency, the reference voltage is an average value of the voltage on the third port.

[0013] Optionally, the reference voltage generating circuit includes a second analog-to-digital converter and a digital-to-analog converter; the input end of the second analog-to-digital converter is connected to the third port, and when the control logic module controls the first switch to operate at a certain frequency, the second analog-to-digital converter performs analog-to-digital conversion on the voltage on the third port within M consecutive switching cycles and calculates the average value to output a third digital signal, or the second analog-to-digital converter can also output the third digital signal every time a certain time is reached, wherein the second analog-to-digital converter performs analog-to-digital conversion on the voltage on the third port within the timing time and calculates the average value to output the third digital signal; the digital-to-analog converter converts the third digital signal into the reference voltage; M is greater than or equal to 1.

[0014] Optionally, the detection circuit further includes a second switch and a third switch; the second switch is connected to a branch between the reference voltage generating circuit and the first analog-to-digital converter; the third switch is connected to a branch between the third port and the first analog-to-digital converter; the control logic module controls the on and off of the second switch and the third switch;

[0015] When the second switch and the third switch are turned on, the first analog-to-digital converter converts a difference between a voltage at the third port and a reference voltage into a first digital signal.

[0016] Optionally, the current sampling circuit is a resistor, and the resistor is connected in series to the branch where the discharge current generating circuit is located; the current sampling signal is obtained based on the voltage on the resistor;

[0017] The detection circuit further includes a fourth switch and a fifth switch; the fourth switch is connected to a branch between the first end of the resistor and the first analog-to-digital converter; the fifth switch is connected to a branch between the second end of the resistor and the first analog-to-digital converter; the control logic module controls the on and off of the fourth switch and the fifth switch;

[0018] When the fourth switch and the fifth switch are turned on, the first analog-to-digital converter converts the current sampling signal into a second digital signal.

[0019] Optionally, when N is greater than 1, the current detection circuit further includes a multiplexer, which is connected to the positive and negative ends of the N sub-batteries; the multiplexer is used to time-share select the positive end of the i-th sub-battery to be connected to the third port, and to connect the negative end of the i-th sub-battery to the fourth port; 1≤i≤N.

[0020] Optionally, a Kelvin connection is used to obtain a voltage on a sub-battery connected between the third port and the fourth port.

[0021] Optionally, the battery cell internal resistance detection circuit is integrated into one chip; or, in addition to the processor, the battery cell internal resistance detection circuit is integrated into one chip.

[0022] The present invention also provides a method for detecting the internal resistance of a battery cell, wherein the battery cell comprises N sub-batteries connected in series, where N is a natural number greater than or equal to 1; the method is characterized in that the method comprises:

[0023] The discharge current generating circuit and the first switch are arranged in series on a branch between the positive terminal and the negative terminal of the battery unit; and a current disturbance is generated on the battery unit by controlling the operating frequency of the first switch;

[0024] Connecting the positive terminal of one of the sub-batteries to the third port, and connecting the fourth port to the negative terminal of the sub-battery; based on the current disturbance, converting the difference between the voltage on the third port and the reference voltage into a first digital signal through a first analog-to-digital converter;

[0025] The internal resistance of the sub-battery connected between the third port and the fourth port is obtained based on the first digital signal and the discharge current or a second digital signal converted from a current sampling signal of the discharge current; or, the first digital signal and the discharge current signal or a second digital signal converted from a current sampling signal of the discharge current are sent to a processor, and the processor processes and obtains the internal resistance of the sub-battery connected between the third port and the fourth port.

[0026] Optionally, the discharge current is sampled to obtain a current sampling signal, and the first analog-to-digital converter converts the current sampling signal into a second digital signal.

[0027] Optionally, the reference voltage is obtained by conversion by a digital-to-analog converter, and the digital-to-analog converter is used to convert a digital signal received by it into the reference voltage.

[0028] Optionally, the digital signal is a digital signal output by the control logic module, or is a digital signal converted by the first analog-to-digital converter from the maximum voltage on the third port when the first switch is disconnected.

[0029] Optionally, when the control logic module controls the first switch to operate at a certain frequency, the reference voltage is an average value of the voltage on the third port.

[0030] Optionally, when N is greater than 1, the positive and negative ends of the N sub-batteries are connected through a multiplexer; the multiplexer is used to time-share select the positive end of the i-th sub-battery to be connected to the third port, and connect the negative end of the i-th sub-battery to the fourth port; 1≤i≤N.

[0031] Optionally, a Kelvin connection is used to obtain the voltage of the sub-battery connected between the third port and the fourth port.

[0032] The beneficial effects of the present invention include at least:

[0033] The battery cell internal resistance detection circuit and detection method provided by the present invention controls the operating frequency of the first switch through a logic control module, generates a disturbance current of a certain frequency on the battery cell, and then causes a certain disturbance in the voltage on the battery, and converts the voltage disturbance amount (or the difference between the voltage of the third port and the reference voltage) into a first digital signal through a first analog-to-digital converter, and realizes the detection of the internal resistance of the corresponding battery based on the first digital signal and the discharge current. In this paper, by sending the difference between the voltage on the third port VBAT and the reference voltage VREF to the first analog-to-digital converter for conversion, compared with directly sending the voltage on VBAT directly to the first analog-to-digital converter for conversion, the voltage range to be quantized by the first analog-to-digital converter can be smaller, the resolution can be improved, the quantization error can be reduced, and the detection accuracy can be improved. In this way, the use of DC blocking filter capacitors is avoided, area is saved, and integration and miniaturization are facilitated.

[0034] Furthermore, a current sampling module can be set to sample the size of the discharge current, and the current sampling signal is converted into a second digital signal through a first analog-to-digital converter, and the internal resistance of the corresponding battery is detected based on the first digital signal and the second digital signal. Through the above settings, since the first digital signal and the second digital signal are both converted by the first analog-to-digital converter, the gain error caused by different analog-to-digital converters can be avoided, and the accuracy of battery internal resistance detection can be improved. And under the same detection accuracy, the scheme of this article can reduce the setting of the discharge current, thereby reducing the power consumption of the system.

[0035] Furthermore, the reference voltage in this article can be converted by a digital-to-analog converter, wherein the digital signal can be a digital signal output by the control logic module, or a digital signal converted by the first analog-to-digital converter from the maximum value of the battery voltage. The reference voltage can also be the average value of the battery voltage. That is, the magnitude of the reference voltage in this article can be adjusted according to the corresponding digital signal, which improves flexibility.

[0036] It should be noted that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 A schematic diagram of a battery cell internal resistance detection circuit provided in this article is shown;

[0038] Figure 2 A working waveform diagram of the battery cell internal resistance detection circuit provided in this article is shown;

[0039] Figure 3 A schematic diagram of a reference voltage generating circuit provided in this article is shown;

[0040] Figure 4Another schematic diagram of the reference voltage generating circuit provided in this article is shown;

[0041] Figure 5 Another schematic diagram of the battery cell internal resistance detection circuit provided in this article is shown;

[0042] Figure 6 Another schematic diagram of the battery cell internal resistance detection circuit provided in this article is shown. DETAILED DESCRIPTION

[0043] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0044] Figure 1 The schematic diagram of the battery cell detection circuit provided by the present invention includes a battery cell BAT, wherein the battery cell may include N sub-batteries connected in series, N is a natural number greater than or equal to 1, Figure 1In the example, N is equal to 1 (i.e., the battery cell BAT includes one sub-battery). It should be noted that when N is equal to 1, the battery cell BAT can also represent multiple sub-batteries connected in parallel; the detection circuit also includes a discharge current generating circuit 10, a first switch SW1, a reference voltage generating circuit 30, a first analog-to-digital converter, and a control logic module. The detection circuit also has first to fourth ports, the positive end of the battery cell BAT is connected to the first port VBATP, and the negative end of the battery cell BAT is connected to the second port VBATN. The discharge current generating circuit 10 is arranged on a branch between the first port VBATP and the second port VBATN, and is used to generate a discharge current between the first port VBATP and the second port VBATN. The first switch SW1 is connected in series to the branch where the discharge current generating circuit 10 is located. The on and off of the first switch SW1 is controlled by the control logic module, that is, the control logic module controls the operating frequency of the first switch. By controlling the on and off of the first switch, a current disturbance of a certain frequency can be generated on the battery cell BAT; the current disturbance will then cause a certain fluctuation in the voltage on the battery cell BAT. The positive terminal of the battery cell BAT is connected to the third port VBAT, and the negative terminal of the battery cell BAT is connected to the fourth port VGND, and the voltage on the battery cell BAT is detected through the third port VBAT. A first analog-to-digital converter is used to convert the difference between the voltage of the third port VBAT and the reference voltage VREF (the difference can represent the voltage fluctuation on the battery cell) into a first digital signal; wherein the reference voltage is generated by a reference voltage generating circuit 30. As a first embodiment of this invention, the control logic module can obtain the internal resistance of the battery cell VBAT based on the first digital signal and the size of the discharge current, or, as Figure 1 As shown in , the detection circuit can also be provided with a processor, and the processor processes the first digital signal and the discharge current to obtain the internal resistance of the battery cell BAT. In this paper, by sending the difference between the voltage on the third port VBAT and the reference voltage VREF to the first analog-to-digital converter for conversion, compared with directly sending the voltage on VBAT directly to the first analog-to-digital converter for conversion, the voltage range to be quantized by the first analog-to-digital converter can be smaller, the resolution can be improved, the quantization error can be reduced, and the detection accuracy can be improved. In this way, the use of DC blocking filter capacitors is avoided, area is saved, and integration and miniaturization are facilitated.

[0045] However, the above solution of directly using the discharge current to calculate the battery internal resistance requires a high accuracy of the discharge current design. To address this problem, further, Figure 1As shown in , as the second embodiment of this article, the detection circuit is further provided with a current sampling circuit 20, which is arranged on the branch where the discharge current generating circuit is located, and is used to sample the discharge current to obtain a current sampling signal, and the first analog-to-digital converter is also used to convert the current sampling signal into a second digital signal. At this time, the control logic module can obtain the internal resistance of the battery cell VBAT based on the first digital signal and the second digital signal, or, as Figure 1 As shown in , the detection circuit can also be provided with a processor, and the logic control module sends the first digital signal and the second digital signal to the processor, and the processor processes the first digital signal and the second digital signal to obtain the internal resistance of the battery cell BAT. In this embodiment, the magnitude of the discharge current is also sampled by the current sampling circuit, which can avoid the problem of low accuracy of battery internal resistance detection when the discharge current design accuracy is not high, that is, the battery detection accuracy can be improved; at the same time, the first digital signal representing the voltage disturbance and the second digital signal representing the current sampling signal are both converted by the first analog-to-digital converter. Therefore, when calculating the internal resistance of the battery cell based on these two digital signals, the gain error caused by using different analog-to-digital converters can be avoided, and the detection accuracy of the battery internal resistance can be further improved. Of course, for applications where the accuracy of battery internal resistance detection is not high, two analog-to-digital converters can also be set to perform analog-to-digital conversion on the corresponding voltage and current sampling signals respectively.

[0046] like Figure 1 As shown in , the discharge current generating circuit 10 is represented by a current source I1, and the specific generating method of the current source I1 is not limited in this article. The resistor R1 is used as a current sampling circuit 20, and a current sampling signal is obtained based on the voltage on the resistor R1. It should be noted that the current sampling signal in this article is not limited to a current signal, but can also be a voltage signal; of course, other methods can also be used to sample the current. The resistor R1 is also connected to the branch where the discharge current generating circuit is located, and a fourth switch SW4 is provided between the first end of the resistor R1 and the first analog-to-digital converter; a fifth switch SW5 is provided between the second end of the resistor R1 and the first analog-to-digital converter, and the conduction and shutdown of the fourth switch and the fifth switch are controlled by the control logic module. The detection circuit also includes a second switch SW2 and a third switch SW3; the second switch SW2 is connected between the reference voltage generating circuit 30 and the first analog-to-digital converter; the third switch SW3 is connected between the third port VBAT and the first analog-to-digital converter; the conduction and shutdown of the second switch and the third switch are also controlled by the control logic module. It should be noted that the connection of A between B and C described herein is not limited to the case where A is directly connected to B and C, but also includes the case where components other than A are connected between B and C. The internal resistance of the battery cell can be detected by controlling the on and off of the first to fifth switches.

[0047] Figure 2 The following is a working waveform diagram of the detection circuit. Figure 2 The principle of the detection circuit in this embodiment is further explained. Before time t0, the first switch SW1 is in an off state. After time t0, the control logic module controls the first switch SW1 to operate at a certain frequency (i.e., alternately turned on and off). The first switch is controlled to be turned on between t0-t1 and to be turned off between t1-t2. t0-t2 is a switching cycle T, and so on. As the first switch is turned on and off, a disturbance current of a certain frequency is generated on the battery cell BAT. The disturbance current causes the voltage VBAT on the battery cell BAT to be as follows: Figure 2 In the first switching cycle T1, between t0 and t1, the fourth switch SW4 and the fifth switch SW5 are turned on by the control logic module. At this time, the first analog-to-digital converter receives the voltage on the resistor R1 and converts the voltage value into a second digital signal. The control logic module receives the second digital signal. The current flowing through the resistor R1 (that is, the discharge current I1) is the ratio of the voltage to the resistor R1. Figure 1 In the embodiment shown, the voltage value is used to characterize the corresponding current sampling signal. The fourth switch and the fifth switch are controlled to be turned off between t1-t2. In the second switching cycle T2 (t2-t3), the control logic module controls the second switch SW2 and the third switch SW3 to be turned on. At this time, the first analog-to-digital converter can receive the voltage VBAT and the reference voltage VREF on the battery cell, and convert the difference △V between the two voltages into a first digital signal, and the control logic module receives the first digital signal; the control logic module processes the first digital signal and the second digital signal to obtain the internal resistance of the battery cell, or, as other embodiments, the control logic module can also send the first digital signal and the second digital signal to the processor, and the processor performs corresponding processing to obtain the internal resistance of the battery cell. As other embodiments of the present application, a corresponding division circuit can also be set before the first analog-to-digital converter, and the magnitude of the current flowing through the resistor R1 is directly obtained through the division circuit, and the first analog-to-digital converter converts the current into a second digital signal. After t3, the working process of the first switching cycle and the second switching cycle is repeated.

[0048] Further, the reference voltage VREF may be generated by a digital-to-analog converter, which is used to convert a digital signal received by it into the reference voltage VREF. The digital signal may come from a control logic module or may be generated by other means. For example, Figure 3 FIG. 1 is an embodiment of a reference voltage generating circuit provided by the present invention. Figure 3In the embodiment, the digital signal of the digital-to-analog converter is generated by the first analog-to-digital converter. Specifically, when the first switch SW1 is disconnected, the third switch SW3 can be controlled to be closed. At this time, the maximum value of the voltage VBAT on the battery cell is used as the input of the first analog-to-digital converter, and the first analog-to-digital converter converts it into a corresponding digital signal as the input of the digital-to-analog converter. Specifically, the maximum value of the VBAT voltage can be obtained by setting a corresponding circuit, which is not elaborated in detail in this article; or another branch can be set to detect the maximum value voltage, and this application does not make specific restrictions on this. That is, at this time, the reference voltage VREF is Figure 2 The voltage at the maximum value of VBAT in. In addition, the full scale of the first analog-to-digital converter can be switched accordingly to perform analog-to-digital conversion for different needs. Registers, switches and other modules can also be set before or after the digital-to-analog converter to obtain the reference voltage VREF through corresponding deformation. After obtaining the reference voltage VREF, based on the principle of calculating the internal resistance of the battery cell BAT, the on and off of the first to fifth switches are controlled by the control logic module, so as to detect the internal resistance of the battery cell BAT.

[0049] Further, the reference voltage VREF may be an average value of the voltage VBAT on the battery cell, for example, Figure 4 Another embodiment of the reference voltage generating circuit provided by the present invention is shown. In this case, the reference voltage generating circuit 30 includes a second analog-to-digital converter and a digital-to-analog converter; the input end of the second analog-to-digital converter is connected to the third port VBAT; specifically, when the control logic module controls the first switch SW1 to work at a certain frequency, the second analog-to-digital converter can perform analog-to-digital conversion on the voltage on the third port within M consecutive switching cycles and obtain the average value to output a third digital signal, or the second analog-to-digital converter can also output the third digital signal every time a certain time is reached (the time can be set according to the actual application), wherein the second analog-to-digital converter performs analog-to-digital conversion on the voltage on the third port within the timing time and obtains the average value to output the third digital signal; the digital-to-analog converter converts the third digital signal into a reference voltage VREF; wherein M is greater than or equal to 1. As other embodiments of the present invention, the reference voltage VREF can also be obtained by limiting the number of sampling conversions of the first analog-to-digital converter. In addition, modules such as registers and switches can be set before or after the digital-to-analog converter, that is, the embodiment can be modified accordingly to obtain the reference voltage VREF. After the reference voltage VREF is obtained, similarly, based on the principle of calculating the internal resistance of the battery cell BAT, the internal resistance of the battery cell BAT can be detected by controlling the on and off of the first to fifth switches through the control logic module.

[0050] It should be noted that Figure 1 , Figure 3 , Figure 4The circuit schematic diagram in the figure is only a part of the embodiments of this article, and this article is not limited to this. It is also within the scope of this article to achieve the same function by making corresponding modifications to it.

[0051] In the above text, the principle of the internal resistance detection circuit of the battery cell BAT is explained by taking N equal to 1 as an example. Of course, N can also be greater than 1. Figure 5 Another embodiment of the battery cell internal resistance detection circuit provided by the present invention is shown. In this embodiment, N is greater than 1, that is, the battery cell BAT includes more than 1 sub-battery (i.e., sub-batteries BAT1, BAT2...BATn). In this embodiment, the detection circuit also includes a multiplexer, which is used to select the positive end of the i-th sub-battery to be connected to the third port VBAT in time-sharing mode, and connect the negative end of the i-th sub-battery to the fourth port VGND; 1≤i≤N. That is, through the multiplexer, N sub-batteries share one internal resistance detection circuit to detect the internal resistance of each sub-battery. As one of the embodiments of this article, the operation of the multiplexer can be controlled by a control logic module.

[0052] Furthermore, to ensure the accuracy of the disturbance voltage measurement, a Kelvin connection method may be used to obtain the voltage of the sub-battery connected between the third port and the fourth port.

[0053] Furthermore, if Figure 1 , Figure 3-Figure 5 As shown in , in addition to the processor, the battery cell internal resistance detection circuit can be integrated into a chip 100, and the control logic module can realize information interaction with the processor through another port. Of course, the processor can also be integrated into the chip 100 at the same time. In addition, when there is a multiplexer, the multiplexer can also be integrated into the chip 100. The specific integration method can be set according to the actual application.

[0054] Furthermore, when the battery unit BAT includes more than two sub-batteries (ie, N is greater than 1), here, N is equal to 2 as an example for explanation, Figure 6As shown in , the detection circuit is also provided with a fifth port VBAT2 and a sixth port VGND2. The positive terminal of the first sub-battery BAT1 is connected to the third port, and the negative terminal of the first sub-battery BAT1 is connected to the fourth port; the positive terminal of the second sub-battery BAT2 is connected to the fifth port, and the negative terminal of the second sub-battery BAT2 is connected to the sixth port. Among them, the circuit module connected to the fifth port and the sixth port can have the same function as the circuit module connected to the third port and the fourth port, which will not be described in detail here, so as to realize the measurement of the voltage disturbance on the first sub-battery BAT1 through the third port and the fourth port; realize the measurement of the voltage disturbance on the second sub-battery BAT2 through the fifth port and the sixth port, and then realize the detection of the internal resistance of the corresponding sub-batteries respectively. When N is other values, a corresponding number of ports can also be set to realize the detection of the internal resistance of the N sub-batteries at the same time.

[0055] Furthermore, when the battery cell BAT includes multiple sub-batteries (N is greater than 2), it can also be as follows Figure 5 As shown in , a multiplexer is used to time-divisionally multiplex the third to sixth ports to detect the internal resistances of two sub-batteries at the same time.

[0056] In addition, a final battery pack can be formed by connecting K battery cells BAT described above in series to power electronic devices, where K is a natural number greater than or equal to 1.

[0057] In summary, the battery cell internal resistance detection circuit and detection method provided by the present invention controls the operating frequency of the first switch through the logic control module, generates a disturbance current of a certain frequency on the battery cell, and then causes a certain disturbance in the voltage on the battery, and converts the difference between the voltage of the third port and the reference voltage into a first digital signal through the first analog-to-digital converter, and realizes the detection of the internal resistance of the corresponding battery based on the first digital signal and the discharge current. In this paper, by sending the difference between the voltage on the third port VBAT and the reference voltage VREF to the first analog-to-digital converter for conversion, compared with directly sending the voltage on VBAT directly to the first analog-to-digital converter for conversion, the voltage range to be quantized by the first analog-to-digital converter can be smaller, the resolution can be improved, the quantization error can be reduced, and the detection accuracy can be improved. In this way, the use of DC blocking filter capacitors is avoided, area is saved, and integration and miniaturization are facilitated.

[0058] Furthermore, a current sampling module can be set to sample the size of the discharge current, and the current sampling signal is converted into a second digital signal through a first analog-to-digital converter, and the internal resistance of the corresponding battery is detected based on the first digital signal and the second digital signal. Through the above settings, since the first digital signal and the second digital signal are both converted by the first analog-to-digital converter, the gain error caused by different analog-to-digital converters can be avoided, and the accuracy of battery internal resistance detection can be improved. And under the same detection accuracy, the scheme of this article can reduce the setting of the discharge current, thereby reducing the power consumption of the system.

[0059] Furthermore, the reference voltage in this article can be converted by a digital-to-analog converter, wherein the digital signal can be a digital signal output by the control logic module, or a digital signal converted by the first analog-to-digital converter from the maximum value of the battery voltage. The reference voltage can also be the average value of the battery voltage. That is, the magnitude of the reference voltage in this article can be adjusted according to the corresponding digital signal, which improves flexibility.

[0060] Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly explaining the present invention, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present invention.

Claims

1. A battery cell internal resistance detection circuit, wherein the battery cell comprises N sub-batteries connected in series, where N is a natural number greater than or equal to 1; characterized in that: The battery cell internal resistance detection circuit comprises: The first to fourth ports, the positive end of the battery cell is connected to the first port, the negative end of the battery cell is connected to the second port; the third port is connected to the positive end of one of the sub-batteries, and the fourth port is connected to the negative end of the sub-battery; A discharge current generating circuit and a first switch, wherein the discharge current generating circuit and the first switch are arranged in series on a branch between the first port and the second port, and the discharge current generating circuit is used to generate a discharge current; and a current disturbance is generated on the battery cell by controlling the operating frequency of the first switch; a first analog-to-digital converter, based on the current disturbance, converting a difference between the voltage of the third port and a reference voltage into a first digital signal; the reference voltage is generated by the reference voltage generating circuit; A control logic module, wherein the control logic module controls the operating frequency of the first switch, and obtains the internal resistance of the sub-battery connected between the third port and the fourth port based on the first digital signal and the discharge current or a second digital signal converted from the current sampling signal of the discharge current; or, the logic control module sends the first digital signal and the discharge current signal or the second digital signal converted from the current sampling signal of the discharge current to a processor, and the processor processes and obtains the internal resistance of the sub-battery connected between the third port and the fourth port.

2. The detection circuit according to claim 1, characterized in that: The detection circuit also includes a current sampling circuit for sampling the discharge current to obtain a current sampling signal, and the first analog-to-digital converter is also used to convert the current sampling signal into a second digital signal.

3. The detection circuit according to claim 1, characterized in that: The reference voltage generating circuit is a digital-to-analog converter, and the digital-to-analog converter is used to convert the digital signal it receives into the reference voltage.

4. The detection circuit according to claim 3, characterized in that: The digital signal is a digital signal output by the control logic module, or is a digital signal converted by the first analog-to-digital converter from the maximum voltage detected on the third port when the first switch is disconnected.

5. The detection circuit according to claim 1, characterized in that: When the control logic module controls the first switch to operate at a certain frequency, the reference voltage is an average value of the voltage on the third port.

6. The detection circuit according to claim 5, characterized in that: The reference voltage generating circuit includes a second analog-to-digital converter and a digital-to-analog converter; the input end of the second analog-to-digital converter is connected to the third port, and when the control logic module controls the first switch to operate at a certain frequency, the second analog-to-digital converter performs analog-to-digital conversion on the voltage on the third port within M consecutive switching cycles and calculates the average value to output a third digital signal, or the second analog-to-digital converter outputs the third digital signal every time a certain time is reached, wherein the second analog-to-digital converter performs analog-to-digital conversion on the voltage on the third port within the timing time and calculates the average value to output the third digital signal; the digital-to-analog converter converts the third digital signal into the reference voltage; M is greater than or equal to 1.

7. The detection circuit according to claim 1, characterized in that: The detection circuit further includes a second switch and a third switch; the second switch is connected to a branch between the reference voltage generating circuit and the first analog-to-digital converter; the third switch is connected to a branch between the third port and the first analog-to-digital converter; the control logic module controls the on and off of the second switch and the third switch; When the second switch and the third switch are turned on, the first analog-to-digital converter converts a difference between a voltage at the third port and a reference voltage into a first digital signal.

8. The detection circuit according to claim 2, characterized in that: The current sampling circuit is a resistor, and the resistor is connected in series to the branch where the discharge current generating circuit is located; the current sampling signal is obtained based on the voltage on the resistor; The detection circuit further includes a fourth switch and a fifth switch; the fourth switch is connected to a branch between the first end of the resistor and the first analog-to-digital converter; the fifth switch is connected to a branch between the second end of the resistor and the first analog-to-digital converter; the control logic module controls the on and off of the fourth switch and the fifth switch; When the fourth switch and the fifth switch are turned on, the first analog-to-digital converter converts the current sampling signal into a second digital signal.

9. The detection circuit according to claim 1, characterized in that: When N is greater than 1, the current detection circuit further includes a multiplexer, which is connected to the positive and negative ends of the N sub-batteries; the multiplexer is used to time-share select the positive end of the i-th sub-battery to be connected to the third port, and to connect the negative end of the i-th sub-battery to the fourth port; 1≤i≤N.

10. The detection circuit according to claim 1, characterized in that: The voltage on the sub-battery connected between the third port and the fourth port is obtained by using a Kelvin connection method.

11. The detection circuit according to any one of claims 1 to 10, characterized in that: The battery cell internal resistance detection circuit is integrated into one chip; or, in addition to the processor, the battery cell internal resistance detection circuit is integrated into one chip.

12. A method for detecting internal resistance of a battery cell, wherein the battery cell comprises N sub-batteries connected in series, where N is a natural number greater than or equal to 1; characterized in that: The detection method comprises: The discharge current generating circuit and the first switch are arranged in series on a branch between the positive terminal and the negative terminal of the battery unit; and a current disturbance is generated on the battery unit by controlling the operating frequency of the first switch; Connecting the positive terminal of one of the sub-batteries to the third port, and connecting the fourth port to the negative terminal of the sub-battery; based on the current disturbance, converting the difference between the voltage on the third port and the reference voltage into a first digital signal through a first analog-to-digital converter; The internal resistance of the sub-battery connected between the third port and the fourth port is obtained based on the first digital signal and the discharge current or a second digital signal converted from a current sampling signal of the discharge current; or, the first digital signal and the discharge current signal or a second digital signal converted from a current sampling signal of the discharge current are sent to a processor, and the processor processes and obtains the internal resistance of the sub-battery connected between the third port and the fourth port.

13. The detection method according to claim 12, characterized in that: The discharge current is sampled to obtain a current sampling signal, and the first analog-to-digital converter converts the current sampling signal into a second digital signal.

14. The detection method according to claim 12, characterized in that: The reference voltage is obtained by conversion by a digital-to-analog converter, and the digital-to-analog converter is used to convert a digital signal received by the digital-to-analog converter into the reference voltage.

15. The detection method according to claim 14, characterized in that: The digital signal is a digital signal output by the control logic module, or is a digital signal converted by the first analog-to-digital converter from the maximum voltage on the third port when the first switch is disconnected.

16. The detection method according to claim 12, characterized in that: When the control logic module controls the first switch to operate at a certain frequency, the reference voltage is an average value of the voltage on the third port.

17. The detection method according to claim 12, characterized in that: When N is greater than 1, the positive terminal and negative terminal of the N sub-batteries are connected through a multiplexer; the multiplexer is used to time-share select the positive terminal of the i-th sub-battery to be connected to the third port, and connect the negative terminal of the i-th sub-battery to the fourth port; 1≤i≤N.

18. The detection method according to claim 12, characterized in that: The voltage of the sub-battery connected between the third port and the fourth port is obtained by using a Kelvin connection method.

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