Programmable temperature compensation current source circuit
By introducing a current mirror array network and a digital control network into the current reference circuit, the positive and negative adjustment of the temperature coefficient is achieved, solving the limitations of the fixed temperature coefficient PTAT current, and improving the tuning range and cost-effectiveness of the current reference circuit.
Patent Information
- Application Number
- CN202411167976.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-23
- Publication Date
- 2024-12-10
AI Technical Summary
Ordinary current reference circuits can only generate a fixed temperature coefficient PTAT current, and the range of temperature coefficient implementation is very limited and cannot meet the temperature coefficient adjustment requirements of different functional circuits.
A programmable temperature compensation current source circuit is designed, including a positive temperature coefficient current reference network, a zero temperature coefficient current reference network, a current mirror array network and a digital control network. The replication ratio of the current mirror array network and the regulation of the digital control network are , realize positive and negative adjustment of the temperature coefficient.
The temperature slope of the current reference generation circuit is adjusted positively and negatively, the tuning range is larger, the circuit design structure is simple, and the cost is lower, and it meets the demand for temperature coefficients of different functional circuits.
Smart Images
Figure CN119105612A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of current source circuits, and in particular relates to a programmable temperature compensated current source circuit. Background Art
[0002] The application of bandgap references in the design of analog integrated circuits is becoming more and more common and more and more important. Bandgap references provide voltage references and current references for circuits. Voltage references provide reference voltages to other functional modules, and current source references provide reference currents to other functional modules. Circuits with different functions may require currents and voltages with different temperature coefficients, and the temperature coefficients need to be adjusted during circuit simulation debugging. In addition, in some special-purpose integrated circuit products, it is also necessary to save chip area, save space and reduce costs.
[0003] Ordinary current reference circuits can only generate fixed temperature coefficient PTAT currents, and the achievable range of their temperature coefficients is very limited. Summary of the invention
[0004] The present invention provides a programmable temperature compensated current source circuit, which solves the problem that a common current reference circuit can only generate a fixed temperature coefficient PTAT current and the range of the temperature coefficient that can be achieved is very limited.
[0005] In order to solve the above technical problems, the technical solution of the present invention is: a programmable temperature compensated current source circuit, including a positive temperature coefficient current reference network, a zero temperature coefficient current reference network, a current mirror array network, a current reference generation network and a digital control network;
[0006] The first output end of the positive temperature coefficient current reference network and the output end of the zero temperature coefficient current reference network are respectively connected to the input end of the current mirror array network; the second output end of the positive temperature coefficient current reference network is connected to the input end of the zero temperature coefficient current reference network; the output end of the current mirror array network is connected to the input end of the current reference generation network; the output end of the current reference generation network is the output end of the programmable temperature compensated current source circuit; and the digital control network is respectively connected to the current mirror array network and the current reference generation network.
[0007] Further, the positive temperature coefficient current reference network includes an amplifier U1, a transistor Q1, a transistor Q2, a transistor Q3, a transistor M1, a transistor M2, a transistor M3, a transistor M4, a resistor R1 and a resistor R2;
[0008] The output end of the amplifier U1 is respectively connected to the gate of the transistor M1, the gate of the transistor M2, the gate of the transistor M3 and the gate of the transistor M4; the source of the transistor M1, the source of the transistor M2, the source of the transistor M3 and the source of the transistor M4 are all connected to the power supply VCC; the negative input end of the amplifier U1 is respectively connected to the drain of the transistor M1 and the emitter of the transistor Q1; the positive input end of the amplifier U1 is respectively connected to the drain of the transistor M2 and one end of the resistor R1; the resistor R The other end of 1 is connected to the emitter of the transistor Q2; the drain of the transistor M3 is connected to one end of the resistor R2 and serves as the second output end of the positive temperature coefficient current reference network; the other end of the resistor R2 is connected to the emitter of the transistor Q3; the drain of the transistor M4 serves as the first output end of the positive temperature coefficient current reference network; the base of the transistor Q1, the collector of the transistor Q1, the base of the transistor Q2, the collector of the transistor Q2, the base of the transistor Q3 and the collector of the transistor Q3 are grounded.
[0009] Further, the zero temperature coefficient current reference network includes an amplifier U2, a transistor M5, a transistor M6 and a grounding resistor R3;
[0010] The negative input terminal of the amplifier U2 serves as the input terminal of the zero temperature coefficient current reference network; the positive input terminal of the amplifier U2 is respectively connected to the drain of the transistor M5 and the grounding resistor R3; the output terminal of the amplifier U2 is respectively connected to the gate of the transistor M5 and the gate of the transistor M6; the source of the transistor M5 and the source of the transistor M6 are both connected to the power supply VCC; the drain of the transistor M6 serves as the output terminal of the zero temperature coefficient current reference network.
[0011] Furthermore, the current mirror array network includes a transistor M1, a transistor M2, a transistor M3, a transistor M 1i , transistor M 1i0 and transistor M 1i1 , where i = 0, 1, ..., n, and n represents the number of mirror-scale replica transistors;
[0012] The drain of the transistor M2 is connected to the gate of the transistor M2 and the gate of the transistor M3 respectively, and serves as the input end of the current mirror array network; the source of the transistor M2 and the source of the transistor M3 are grounded; the drain of the transistor M3 is connected to the drain of the transistor M1, the gate of the transistor M1 and the gate of the transistor M3 respectively. 1i0 The source of the transistor M1 is connected to the drain of the transistor M 1i1 The source of transistor M 1i The source of the transistor M is connected to the power supply VCC; 1i0The source of transistor M 1i1 The drain of transistor M 1i The gate of the transistor M 1i The drains of the transistors M are connected to each other and serve as the output end of the current mirror array network; 1i0 The gate and transistor M 1i1 The gates of the i connect.
[0013] Furthermore, the control bit signal Ci is output by a digital control network.
[0014] Further, the current reference generation network includes a current source ZTC1, a current source ZTC2, a current source PTAT1, a current source PTAT2, a transistor M7, a transistor M8, a transistor M9 and a transistor M10;
[0015] The current source ZTC1, the current source ZTC2, the current source PTAT1 and the current source PTAT2 are collectively used as the input end of the current reference generation network; the negative electrode of the current source ZTC1 and the negative electrode of the current source PTAT2 are respectively connected to the power supply VCC; the positive electrode of the current source ZTC1 is respectively connected to the negative electrode of the current source PTAT1, the drain of the transistor M7, the gate of the transistor M7 and the gate of the transistor M8; the positive electrode of the current source PTAT1 is grounded; the source of the transistor M7 and the source of the transistor M8 are grounded; the positive electrode of the current source PTAT2 is respectively connected to the negative electrode of the current source ZTC2, the drain of the transistor M9, the gate of the transistor M9 and the gate of the transistor M10; the positive electrode of the current source ZTC2 is grounded; the source of the transistor M9 and the source of the transistor M10 are grounded; the drain of the transistor M8 and the drain of the transistor M10 serve as the output end of the current reference generation network.
[0016] Furthermore, the digital control network controls the temperature coefficients of the current source ZTC1 , the current source ZTC2 , the current source PTAT1 , and the current source PTAT2 .
[0017] The beneficial effects of the present invention are as follows: (1) the current reference generation circuit adopts the principle of current subtraction to realize a positive temperature coefficient reference current source and a negative temperature coefficient reference current source;
[0018] (2) Combined with a programmable digital control network, a temperature-compensated reference current source with an adjustable temperature slope can be realized;
[0019] (3) Compared with the traditional temperature compensated current reference, the current source circuit disclosed in the present invention is simple to tune, has a larger tuning range, a simple circuit design structure, and a lower cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 The schematic diagram of the programmable temperature compensation current source circuit of the present invention is shown in FIG.
[0021] Figure 2 The circuit diagram of the positive temperature coefficient current reference network of the present invention is shown in FIG.
[0022] Figure 3 It is a circuit diagram of the zero temperature coefficient current reference network of the present invention.
[0023] Figure 4 FIG. 4 is a circuit diagram of a current mirror array network of the present invention.
[0024] Figure 5 The circuit diagram of the current reference generation network of the present invention.
[0025] Figure 6 This is the simulation result of the programmable temperature compensated current source of the present invention. DETAILED DESCRIPTION
[0026] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.
[0027] Example
[0028] like Figure 1 As shown, the present invention provides a programmable temperature compensated current source circuit, including a positive temperature coefficient current reference network, a zero temperature coefficient current reference network, a current mirror array network, a current reference generation network and a digital control network;
[0029] The first output end of the positive temperature coefficient current reference network and the output end of the zero temperature coefficient current reference network are respectively connected to the input end of the current mirror array network; the second output end of the positive temperature coefficient current reference network is connected to the input end of the zero temperature coefficient current reference network; the output end of the current mirror array network is connected to the input end of the current reference generation network; the output end of the current reference generation network is the output end of the programmable temperature compensated current source circuit; and the digital control network is respectively connected to the current mirror array network and the current reference generation network.
[0030] like Figure 2 As shown, the positive temperature coefficient current reference network includes an amplifier U1, a transistor Q1, a transistor Q2, a transistor Q3, a transistor M1, a transistor M2, a transistor M3, a transistor M4, a resistor R1 and a resistor R2;
[0031] The output end of the amplifier U1 is respectively connected to the gate of the transistor M1, the gate of the transistor M2, the gate of the transistor M3 and the gate of the transistor M4; the source of the transistor M1, the source of the transistor M2, the source of the transistor M3 and the source of the transistor M4 are all connected to the power supply VCC; the negative input end of the amplifier U1 is respectively connected to the drain of the transistor M1 and the emitter of the transistor Q1; the positive input end of the amplifier U1 is respectively connected to the drain of the transistor M2 and one end of the resistor R1; the resistor R The other end of 1 is connected to the emitter of the transistor Q2; the drain of the transistor M3 is connected to one end of the resistor R2 and serves as the second output end of the positive temperature coefficient current reference network; the other end of the resistor R2 is connected to the emitter of the transistor Q3; the drain of the transistor M4 serves as the first output end of the positive temperature coefficient current reference network; the base of the transistor Q1, the collector of the transistor Q1, the base of the transistor Q2, the collector of the transistor Q2, the base of the transistor Q3 and the collector of the transistor Q3 are grounded.
[0032] like Figure 3 As shown, the zero temperature coefficient current reference network includes an amplifier U2, a transistor M5, a transistor M6 and a grounding resistor R3;
[0033] The negative input terminal of the amplifier U2 serves as the input terminal of the zero temperature coefficient current reference network; the positive input terminal of the amplifier U2 is respectively connected to the drain of the transistor M5 and the grounding resistor R3; the output terminal of the amplifier U2 is respectively connected to the gate of the transistor M5 and the gate of the transistor M6; the source of the transistor M5 and the source of the transistor M6 are both connected to the power supply VCC; the drain of the transistor M6 serves as the output terminal of the zero temperature coefficient current reference network.
[0034] like Figure 4 As shown, the current mirror array network includes transistor M1, transistor M2, transistor M3, transistor M 1i , transistor M 1i0 and transistor M 1i1 , where i = 0, 1, ..., n, and n represents the number of mirror-scale replica transistors;
[0035] The drain of the transistor M2 is connected to the gate of the transistor M2 and the gate of the transistor M3 respectively, and serves as the input end of the current mirror array network; the source of the transistor M2 and the source of the transistor M3 are grounded; the drain of the transistor M3 is connected to the drain of the transistor M1, the gate of the transistor M1 and the gate of the transistor M3 respectively. 1i0 The source of the transistor M1 is connected to the drain of the transistor M 1i1 The source of transistor M 1iThe source of the transistor M is connected to the power supply VCC; 1i0 The source of transistor M 1i1 The drain of transistor M 1i The gate of the transistor M 1i The drains of the transistors M are connected to each other and serve as the output end of the current mirror array network; 1i0 The gate and transistor M 1i1 The gates of the i connect.
[0036] The control bit signal Ci is output by a digital control network.
[0037] like Figure 5 As shown, the current reference generation network includes a current source ZTC1, a current source ZTC2, a current source PTAT1, a current source PTAT2, a transistor M7, a transistor M8, a transistor M9 and a transistor M10;
[0038] The current source ZTC1, the current source ZTC2, the current source PTAT1 and the current source PTAT2 are collectively used as the input end of the current reference generation network; the negative electrode of the current source ZTC1 and the negative electrode of the current source PTAT2 are respectively connected to the power supply VCC; the positive electrode of the current source ZTC1 is respectively connected to the negative electrode of the current source PTAT1, the drain of the transistor M7, the gate of the transistor M7 and the gate of the transistor M8; the positive electrode of the current source PTAT1 is grounded; the source of the transistor M7 and the source of the transistor M8 are grounded; the positive electrode of the current source PTAT2 is respectively connected to the negative electrode of the current source ZTC2, the drain of the transistor M9, the gate of the transistor M9 and the gate of the transistor M10; the positive electrode of the current source ZTC2 is grounded; the source of the transistor M9 and the source of the transistor M10 are grounded; the drain of the transistor M8 and the drain of the transistor M10 serve as the output end of the current reference generation network.
[0039] The digital control network controls the temperature coefficients of the current source ZTC1 , the current source ZTC2 , the current source PTAT1 , and the current source PTAT2 .
[0040] In this embodiment, the positive temperature coefficient current reference network is a common bandgap reference circuit, which generates a fixed positive temperature coefficient current I PTAT1 , the sizes of transistors M1-M4 are the same, and the size ratio of transistors Q1 and Q2 is 1:a, then the positive temperature coefficient current I PTAT1 =V T lna / R1, zero temperature coefficient bandgap base voltage V REF =V be,Q3 +R2V T lna / R1.
[0041] The positive temperature coefficient current reference network generates a zero temperature coefficient reference voltage V REF , the zero temperature coefficient current reference network generates a zero temperature coefficient output current I ZTC1 =V REF / R3, wherein the grounding resistor R3 is a resistor with a zero temperature coefficient.
[0042] In this embodiment, Figure 4 The current mirror array network with switchable replication ratio is shown. The input current I in For I PTAT1 and I ZTC1 , and output 2 sets of positive and zero temperature coefficient current I out1 (I PTAT2_1 , I ZTC2_1 ) and I out2( I PTAT2_2 , I ZTC2_2 ).
[0043] By adjusting the current mirror array replication ratio, I ZTC2_1 Greater than I PTAT2_1 , then the first group current (I PTAT2_1 , I ZTC2_1 ) can be used to synthesize a negative temperature coefficient current by adjusting the current mirror array replication ratio so that I PTAT2_2 Greater than I ZTC2_2 , then the second group current (I PTAT2_2 , I ZTC2_2 ) can be used to synthesize a positive temperature coefficient current.
[0044] In the current mirror array network, transistor M 1i The transistor M is a mirror-scale replica transistor. 1i The size of transistor M1 is a weighted ratio of the size of transistor M2. 1i / M1=2 i , where i = 0, 1, ..., n. The total output mirror copy current I out =(2 0 C0+2 1 C1+2 2 ·C2+···+2 n ·C n )I in , where C0,…,C n is the control bit of the mirror transistor, C0~C n =0 or 1, by changing the control codeword, any 1 to 2 n The internal register of the chip can be controlled by SPI (serial-to-parallel conversion circuit) to change C0~C nControl codeword to achieve adjustable current mirror replication ratio coefficient.
[0045] In this embodiment, the current reference generation network with adjustable temperature coefficient is mainly implemented by a current subtraction circuit. Figure 5 As shown in (a), due to I ZTC Than I PTAT The current flowing into transistor M7 is I ZTC -I PTAT Since transistor M8 is a mirror image of transistor M7, the output current is also I ZTC -I PTAT , by controlling Figure 4 The replication ratio of the current mirror changes with I ZTC and I PTAT The current size can realize any CTAT reference current with negative temperature coefficient.
[0046] Similarly, Figure 5 In (b), due to I PTAT Than I ZTC The current flowing into transistor M9 is I PTAT -I ZTC Since transistor M10 is a mirror image of transistor M9, the output current is also I PTAT -I ZTC , by controlling Figure 4 The replication ratio of the current mirror changes with I PTAT and I ZTC The current size can achieve a PTAT reference current with a positive temperature coefficient.
[0047] In this embodiment, it is assumed that the current of the input PTAT current source (current source PTAT1 or current source PTAT2) at high temperature T1 is I PTAT_T1 , at low temperature T0 the current is I PTAT_T0 , the current of the input ZTC current source (current source ZTC1 or current source ZTC2) is I ZTC .
[0048] Then the temperature coefficient TC1 of the PTAT current source is:
[0049] TC1=2*(I PTAT_T1 -I PTAT_T0 ) / (I PTAT_T1 +I PTAT_T0 ) / (T1-T0)
[0050] The principle of generating an arbitrary negative temperature coefficient current source is:
[0051] When I ZTC >I PTAT_T1When the current reference generation network is used, the input ZTC current source is subtracted from the PTAT current source to obtain a new negative temperature current coefficient reference current, whose temperature coefficient TC2 is:
[0052] TC2=2*(I PTAT_T1 -I PTAT_T0 ) / (I PTAT_T1 +I PTAT_T0 -2*I ZTC ) / (T1-T0)
[0053] The ratio of the negative temperature current coefficient to the positive temperature current coefficient is:
[0054] TC2 / TC1=(I PTAT_T1 +I PTAT_T0 ) / (I PTAT_T1 +I PTAT_T0 -2*I ZTC )
[0055] =1 / (1-2*I ZTC / (I PTAT_T1 +I PTAT_T0 ))
[0056] Because I ZTC >I PTAT_T1 >I PTAT_T0 By adjusting the positive and zero temperature coefficient currents of the input current reference synthesis circuit, 2*I ZTC / (I PTAT_T1 +I PTAT_T0 ) is any value greater than 1.
[0057] Therefore, TC2 = TC1 / (1-2*IZTC / (IPTAT_T1+IPTAT_T0)), and any negative temperature coefficient current source can be realized.
[0058] The principle of generating an arbitrary positive temperature coefficient current source is:
[0059] When I PTAT_T0 >I ZTC When the current reference generation network is used, the PTAT current source can be subtracted from the input ZTC current source to obtain a new positive temperature current coefficient reference current, whose temperature coefficient TC3 is:
[0060] TC3=2*(I PTAT_T1 -I PTAT_T0 ) / (I PTAT_T1 +I PTAT_T0 -2*I ZTC ) / (T1-T0)
[0061] TC3 / TC1=(I PTAT_T1 +IPTAT_T0 ) / (I PTAT_T1 +I PTAT_T0 -2*I ZTC )
[0062] =1 / (1-2*I ZTC / (I PTAT_T1 +I PTAT_T0 ))
[0063] Because I PTAT_T1 >I PTAT_T0 >I ZTC >0, then we can deduce:
[0064] 0 / (I PTAT_T1 +I PTAT_T0 )<2*I ZTC / (I PTAT_T1 +I PTAT_T0 )<2*I ZTC / (I ZTC +I ZTC )
[0065] 0<2*I ZTC / (I PTAT_T1 +I PTAT_T0 )<1
[0066] Therefore, by adjusting the positive and zero temperature coefficient currents of the input current reference synthesis circuit, 2*I ZTC / (I PTAT_T1 +I PTAT_T0 ) any value between 0 and 1.
[0067] Therefore, TC3 = TC1 / (1-2*I ZTC / (I PTAT_T1 +I PTAT_T0 )), any positive temperature coefficient current source with a temperature coefficient greater than TC1 can be realized.
[0068] In this embodiment, Figure 6 FIG. 4 shows a simulation result of a programmable temperature-compensated current source, whereby the present invention can realize a temperature-compensated reference current source with a positive or negative adjustable temperature slope.
[0069] In summary, the positive temperature coefficient and zero temperature coefficient current reference network in the present invention provides positive and zero temperature coefficient current inputs for the current mirror array, and the current mirror array copies the input positive and zero temperature coefficient currents to the temperature coefficient adjustable current reference generation circuit according to a specific ratio to generate a temperature adjustable current. Among them, the copy ratio of the current mirror array and the temperature coefficient of the current reference generation circuit are both adjusted by the digital control circuit.
[0070] The current reference generating circuit with adjustable temperature coefficient in the present invention can adjust the temperature coefficient of the generated reference current to any positive, negative or zero value through a programmable digital circuit, and the circuit structure is simple.
Claims
1. A programmable temperature compensated current source circuit, characterized in that: Including positive temperature coefficient current reference network, zero temperature coefficient current reference network, current mirror array network, current reference generation network and digital control network; The first output terminal of the positive temperature coefficient current reference network and the output terminal of the zero temperature coefficient current reference network are respectively connected to the input terminal of the current mirror array network; The second output terminal of the positive temperature coefficient current reference network is connected to the input terminal of the zero temperature coefficient current reference network; The output end of the current mirror array network is connected to the input end of the current reference generation network; The output end of the current reference generation network is the output end of the programmable temperature compensation current source circuit; the digital control network is connected to the current mirror array network and the current reference generation network respectively.
2. The programmable temperature compensated current source circuit according to claim 1, characterized in that: The positive temperature coefficient current reference network includes an amplifier U1, a transistor Q1, a transistor Q2, a transistor Q3, a transistor M1, a transistor M2, a transistor M3, a transistor M4, a resistor R1 and a resistor R2; The output end of the amplifier U1 is respectively connected to the gate of the transistor M1, the gate of the transistor M2, the gate of the transistor M3 and the gate of the transistor M4; the source of the transistor M1, the source of the transistor M2, the source of the transistor M3 and the source of the transistor M4 are all connected to the power supply VCC; the negative input end of the amplifier U1 is respectively connected to the drain of the transistor M1 and the emitter of the transistor Q1; the positive input end of the amplifier U1 is respectively connected to the drain of the transistor M2 and one end of the resistor R1; the resistor R The other end of 1 is connected to the emitter of the transistor Q2; the drain of the transistor M3 is connected to one end of the resistor R2 and serves as the second output end of the positive temperature coefficient current reference network; the other end of the resistor R2 is connected to the emitter of the transistor Q3; the drain of the transistor M4 serves as the first output end of the positive temperature coefficient current reference network; the base of the transistor Q1, the collector of the transistor Q1, the base of the transistor Q2, the collector of the transistor Q2, the base of the transistor Q3 and the collector of the transistor Q3 are grounded.
3. The programmable temperature compensated current source circuit according to claim 1, characterized in that: The zero temperature coefficient current reference network includes an amplifier U2, a transistor M5, a transistor M6 and a grounding resistor R3; The negative input terminal of the amplifier U2 serves as the input terminal of the zero temperature coefficient current reference network; the positive input terminal of the amplifier U2 is respectively connected to the drain of the transistor M5 and the grounding resistor R3; the output terminal of the amplifier U2 is respectively connected to the gate of the transistor M5 and the gate of the transistor M6; the source of the transistor M5 and the source of the transistor M6 are both connected to the power supply VCC; the drain of the transistor M6 serves as the output terminal of the zero temperature coefficient current reference network.
4. The programmable temperature compensated current source circuit according to claim 1, characterized in that: The current mirror array network includes a transistor M1, a transistor M2, a transistor M3, a transistor M 1i , transistor M 1i0 and transistor M 1i1 , where i = 0, 1, ..., n, and n represents the number of mirror-scale replica transistors; The drain of the transistor M2 is connected to the gate of the transistor M2 and the gate of the transistor M3 respectively, and serves as the input end of the current mirror array network; the source of the transistor M2 and the source of the transistor M3 are grounded; the drain of the transistor M3 is connected to the drain of the transistor M1, the gate of the transistor M1 and the gate of the transistor M3 respectively. 1i0 The source of the transistor M1 is connected to the drain of the transistor M 1i1 The source of transistor M 1i The source of the transistor M is connected to the power supply VCC; 1i0 The source of transistor M 1i1 The drain of transistor M 1i The gate of the transistor M 1i The drains of the transistors M are connected to each other and serve as the output end of the current mirror array network; 1i0 The gate and transistor M 1i1 The gates of the i connect.
5. The programmable temperature compensated current source circuit according to claim 4, characterized in that: The control bit signal Ci is output by a digital control network.
6. The programmable temperature compensated current source circuit according to claim 1, characterized in that: The current reference generation network includes a current source ZTC1, a current source ZTC2, a current source PTAT1, a current source PTAT2, a transistor M7, a transistor M8, a transistor M9 and a transistor M10; The current source ZTC1, the current source ZTC2, the current source PTAT1 and the current source PTAT2 are collectively used as the input end of the current reference generation network; the negative electrode of the current source ZTC1 and the negative electrode of the current source PTAT2 are respectively connected to the power supply VCC; the positive electrode of the current source ZTC1 is respectively connected to the negative electrode of the current source PTAT1, the drain of the transistor M7, the gate of the transistor M7 and the gate of the transistor M8; the positive electrode of the current source PTAT1 is grounded; the source of the transistor M7 and the source of the transistor M8 are grounded; the positive electrode of the current source PTAT2 is respectively connected to the negative electrode of the current source ZTC2, the drain of the transistor M9, the gate of the transistor M9 and the gate of the transistor M10; the positive electrode of the current source ZTC2 is grounded; the source of the transistor M9 and the source of the transistor M10 are grounded; the drain of the transistor M8 and the drain of the transistor M10 serve as the output end of the current reference generation network.
7. The programmable temperature compensated current source circuit according to claim 6, characterized in that: The digital control network controls the temperature coefficients of the current source ZTC1 , the current source ZTC2 , the current source PTAT1 , and the current source PTAT2 .