Conductive connection structure and forming method thereof

Abstract

The invention provides a conductive connection structure and a forming method thereof, and belongs to the technical field of semiconductor device manufacturing. The forming method of the conductive connection structure comprises the following steps: providing a substrate, and forming a first dielectric layer on the surface of the substrate; forming a first opening in the first dielectric layer, wherein the first opening exposes a part of the surface of the substrate; forming a barrier layer on the inner wall of the bottom of the first opening, and forming a groove in the barrier layer; and forming a first metal layer in the first opening, wherein the first metal layer is located on the barrier layer and fills the first opening. The barrier layer is only formed at the bottom of the first opening, and the first metal layer is selectively deposited from the surface of the barrier layer from top to bottom, so that the first opening is uniformly filled with the formed conductive connection structure, and the resistance of the conductive connection structure formed in the small-contact-aperture opening is effectively reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device manufacturing, and in particular to a conductive connection structure and a forming method thereof. Background Art

[0002] With the rapid development of integrated circuit manufacturing technology, the size of semiconductor devices in integrated circuits is constantly shrinking, which effectively improves the operating speed of the entire integrated circuit. As the size requirements of device components are getting smaller and smaller, the size of the corresponding conductive connection structure is getting smaller and smaller.

[0003] The existing process forms an opening in the dielectric layer above the semiconductor device, and sequentially forms a metal liner and a metal layer in the opening, thereby forming a conductive connection structure between the semiconductor device and the upper structure. In order to adapt to the continuous reduction in the size of semiconductor devices, it is necessary to form an opening with a smaller contact aperture in the dielectric layer to achieve finer conductive interconnection in the integrated circuit.

[0004] However, the prior art is limited by the reduction of the filling process window when forming a conductive connection structure in a small contact aperture opening, which results in an increase in the resistance of the conductive connection structure, a decrease in the response speed of the semiconductor device, and a signal delay.

[0005] Therefore, it is necessary to design a conductive connection structure and a forming method thereof to solve the above problems. Summary of the invention

[0006] In view of the above shortcomings of the prior art, the present invention provides a conductive connection structure and a method for forming the same, so as to improve the technical problems of increased resistance and reduced reliability in the prior art when forming a conductive connection structure in a small contact aperture opening.

[0007] To achieve the above-mentioned object and other related objects, the present invention provides a method for forming a conductive connection structure, the method comprising: Providing a substrate, and forming a first dielectric layer on a surface of the substrate; forming a first opening on the first dielectric layer, wherein the first opening exposes a portion of the surface of the substrate; forming a barrier layer on the inner wall of the bottom of the first opening, and forming a groove in the barrier layer; A first metal layer is formed in the first opening, wherein the first metal layer is located on the barrier layer and fills up the first opening.

[0008] The present invention also provides a conductive connection structure, which includes a substrate, a first dielectric layer, a barrier layer and a first metal layer. The first dielectric layer is arranged on the substrate, and the first dielectric layer has a first opening, and the first opening exposes a part of the surface of the substrate; the barrier layer is arranged on the inner wall of the bottom of the first opening, and the barrier layer has a groove inside; the first metal layer is arranged on the barrier layer and fills the first opening.

[0009] In summary, the above-mentioned conductive connection structure and its formation method only form a barrier layer at the bottom of the first opening, and the first metal layer is selectively deposited from the bottom on the surface of the barrier layer, so that the formed conductive connection structure uniformly fills the first opening, thereby effectively reducing the resistance of the conductive connection structure formed in the small contact aperture opening. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other embodiments can be obtained based on these drawings without paying creative work.

[0011] Figure 1 Schematic diagram of a process for forming a conductive connection structure according to an embodiment of the present invention; Figure 2 It is a schematic diagram of forming a first opening on a first dielectric layer on a surface of a substrate in one embodiment of the present invention; Figure 3 This is a flow chart of step S3 in one embodiment of the present invention; Figures 4 to 8 A schematic diagram of forming a barrier layer at the bottom of the first opening in one embodiment of the present invention; Fig. 9 is a schematic diagram of forming a first metal layer in a first opening according to an embodiment of the present invention; Fig.10 is a schematic flow chart of a method for forming a conductive connection structure in another embodiment of the present invention; Fig.11 It is a schematic diagram of forming a second opening and a third opening on a second dielectric layer in another embodiment of the present invention; Fig.12 FIG. 4 is a schematic diagram of forming a second metal layer in the second opening and the third opening in another embodiment of the present invention.

[0012] Component number description 100, substrate; 110, source structure / drain structure; 111, metal silicide layer; 120, gate structure; 121, conductive layer; 200, first dielectric layer; 210, first opening; 220, barrier material layer; 230, barrier layer; 231, groove; 240, first sacrificial layer; 250, second sacrificial layer; 260, first metal layer; 300, second dielectric layer; 310, second opening; 311, second metal layer; 320, third opening; 321, third metal layer. DETAILED DESCRIPTION

[0013] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0014] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0015] In the present invention, it should be noted that, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, if the terms "first" and "second" appear, they are only used for description and distinction purposes, and cannot be understood as indicating or implying relative importance.

[0016] The contact plug is a conductive connection structure used to connect the device layer and the upper metal interconnection layer in the middle end of line (MEOL) process. The conventional process of the contact plug is to first form an opening in the interlayer dielectric layer, then deposit a barrier layer on the inner wall of the opening, and then fill the opening with a conductive material. The provision of the barrier layer can increase the adhesion between the interlayer dielectric layer and the conductive material of the contact plug, and reduce the gap between the two. However, in order to adapt to the continuous reduction in the size of semiconductor devices, the size of the opening between the device layer and the upper metal interconnection layer is also reduced. If the barrier layer and the metal layer are formed in sequence along the inner wall of the opening according to the existing process, the metal layer formed along the side wall will shrink during the filling process or even close the filling process window, resulting in gaps and defects in the metal layer filled inside the opening, uneven filling of the metal layer, and thus increasing the resistance of the conductive connection structure; and due to the existence of internal gaps and defects, the conductive connection structure is prone to oxidation corrosion and accumulated stress during subsequent processes and use, resulting in deformation, thereby affecting its reliability.

[0017] Based on the above problems, the present invention provides a conductive connection structure and a method for forming the same, wherein a barrier layer is first formed on the inner wall of the bottom of a first opening, and the barrier layer attached to the side wall of the first opening is subsequently removed, so that the formed barrier layer can reduce the contact resistance of the conductive connection structure while preventing the deposited metal from being generated along the side wall and causing the filling window to shrink; then a first metal layer is deposited from bottom to top on the surface of the barrier layer using a selective deposition process, so that the first metal layer formed in the first opening uniformly fills the first opening, thereby effectively reducing the resistance of the conductive connection structure formed in the small contact aperture opening, and effectively improving the reliability of the conductive connection structure, thereby improving the device yield.

[0018] See also Figures 1 to 9 , Figures 1 to 9 Schematic diagram of the process and structure corresponding to each step of the method for forming a conductive connection structure in some embodiments.

[0019] See also Figure 1 In one aspect, the present invention provides a method for forming a conductive connection structure. In some embodiments, the method for forming the conductive connection structure comprises the following steps: S1, providing a substrate 100, and forming a first dielectric layer 200 on the surface of the substrate 100; (see Figure 2 ) S2, forming a first opening 210 on the first dielectric layer 200, wherein the first opening 210 exposes a portion of the surface of the substrate 100; (See Figure 2 ) S3, forming a barrier layer 230 on the inner wall of the bottom of the first opening 210, and forming a groove 231 in the barrier layer 230; (See Figure 8 ) S4, forming a first metal layer 260 in the first opening 210, wherein the first metal layer 260 is located on the barrier layer 230 and fills the first opening 210. (See Fig. 9 ) Combine the following Figures 1 to 9 The steps of the method for preparing the conductive connection structure in the embodiment of the present invention are described in detail.

[0020] like Figure 2 As shown, in some embodiments, in step S1, the substrate 100 can be any material that meets the requirements of the bottom process of the integrated circuit. As an example, the substrate 100 can include any one or more combinations of semiconductor substrates and insulating materials. Among them, the semiconductor material substrate 100 can be selected from single crystal silicon (Si), single crystal germanium (Ge), silicon germanium (SiGe), silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs) or other III / V compound semiconductors. In addition to the semiconductor materials listed above, the substrate 100 can also be Si / SiGe, Si / SiC, silicon on insulator (SOI), germanium on insulator (GOI) or silicon germanium on insulator (SGOI), etc.; the insulating material can be an organic insulator, an inorganic insulator or a combination thereof. Optionally, in one embodiment, the substrate 100 is a semiconductor substrate, on which one or more semiconductor devices, such as transistors, memories, sensors, etc., can be manufactured.

[0021] The first dielectric layer 200 formed on the upper surface of the substrate 100 is used to provide support for the subsequent formation of a conductive connection structure. The first dielectric layer 200 selects any interlayer or intralayer interconnection dielectric material, including inorganic dielectric materials or organic dielectric materials. In some embodiments, the first dielectric layer 200 includes but is not limited to insulating materials such as silicon oxide (SiO2), silicon nitride (SiN), hydrogen silsesquioxane polymer (HSQ), methane silsesquioxane polymer (MSQ), methyl silicate compounds, and carbon-doped oxides. It should be noted that the first dielectric layer 200 is formed by conventional processes in the art such as chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma enhanced chemical vapor deposition (PECVD), and atomic layer deposition (ALD).

[0022] like Figure 2As shown, in some embodiments, in step S2, conventional photolithography means can be used to form a first opening 210 at a preset area of ​​the first dielectric layer 200, and the first opening 210 penetrates the first dielectric layer 200 and exposes a portion of the surface of the substrate 100, for example, the first opening 210 exposes the electrode lead-out area of ​​the source, drain, and gate of the semiconductor device on the substrate 100. In one example, a photoresist is coated on the surface of the first dielectric layer 200 to form a photoresist layer; the photoresist layer is exposed and developed to form a photoresist layer with an etching window; the patterned photoresist layer is used as a mask, and an etching process is used to etch the first dielectric layer 200 exposed by the etching window, wherein the etching process includes but is not limited to dry etching, wet etching, or a combination of dry etching and wet etching; after etching, a conventional ashing or stripping process is used to remove the photoresist, so that the first opening 210 is formed on the first dielectric layer 200.

[0023] like Figures 3 to 8 As shown, in some embodiments, in step S3, the barrier layer 230 is only formed at the bottom of the first opening 210, and a portion of the barrier layer 230 attached to the sidewall of the first opening 210 is removed, so that the barrier layer 230 forms a groove 231 at the bottom of the first opening 210. The barrier layer 230 is used to prevent metal ions from diffusing into the substrate 100, and provides a conductive base layer to promote the selective growth of subsequent metal materials. The metal material subsequently grown on the surface of the barrier layer 230 can form a first metal layer 260 from bottom to top to uniformly fill the first opening 210, thereby effectively avoiding the appearance of gaps or defects inside the first metal layer 260. Among them, on the one hand, the internal groove 231 of the barrier layer 230 facilitates the formation of metal silicide on the contact interface between the barrier layer 230 and the electrode lead-out area of ​​the source, drain and gate to reduce the contact resistance of the conductive connection; on the other hand, the close contact between the side wall of the groove 231 and the side wall of the first opening 210 makes the first metal layer 260 subsequently grown on the substrate of the barrier layer 230 in close contact with the side wall of the first opening 210, thereby avoiding the existence of a gap between the first metal layer 260 and the side wall of the first opening 210.

[0024] Specifically, Figure 3 As shown, step S3 includes the following steps: S31, forming a barrier material layer 220 on the inner wall of the first opening 210; like Figure 4As shown, in step S31, a conventional deposition or sputtering process may be used to form a barrier material layer 220 on the inner wall (bottom wall and side wall) of the first opening 210. For example, the barrier material layer 220 may be formed by a deposition process such as PVD, CVD or ALD, or a process such as sputtering. The material of the barrier material layer 220 may be, for example, tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), or any combination thereof, or a cobalt (Co)-based alloy, such as a conductive material such as Co-Ti, Co-W, Co-Mo or Co-Ta; optionally, in one example, the barrier material layer 220 includes a Ti material layer and a TiN material layer sequentially attached to the inner wall of the first opening 210.

[0025] S32, forming a first sacrificial layer 240 in the first opening 210, wherein the first sacrificial layer 240 is located on the barrier layer 230 and fills the first opening 210; like Figure 5 As shown, in step S32, a sacrificial material is filled in the first opening 210, so that the sacrificial material at least fills the first opening 210, so as to form a first sacrificial layer 240 in the first opening 210 and on the surface of the first dielectric layer 200. For example, the first sacrificial layer 240 is formed by filling the first opening 210 with any suitable deposition process such as CVD, PVD, PECVD, and ALD processes.

[0026] S33, removing part of the first sacrificial layer 240, and forming a second sacrificial layer 250 at the bottom of the first opening 210; like Figure 6 As shown, in step S33, a selective etching process (such as dry etching with better directionality) is used to remove part of the first sacrificial layer 240, for example, the first sacrificial layer 240 above the bottom of the first opening 210 is removed, and the first sacrificial layer 240 at the bottom of the first opening 210 is retained to form a second sacrificial layer 250 at the bottom of the first opening 210. In one example, the height of the second sacrificial layer 250 may be less than or equal to 1 / 4 of the height of the first opening 210.

[0027] S34, using the second sacrificial layer 250 as a mask, removing the barrier material layer 220 located on the sidewall of the first opening 210, and retaining the barrier material layer 220 surrounding the second sacrificial layer 250 along the bottom inner wall of the first opening 210 as the barrier layer 230; like Figure 7As shown, in step S34, the second sacrificial layer 250 is used as a mask and a selective etching process (such as wet etching) is adopted to remove the barrier material layer 220 located on the side wall of the first opening 210, and the barrier material layer 220 surrounding the second sacrificial layer 250 along the inner wall of the bottom of the first opening 210 is retained as the barrier layer 230. Since the retained barrier layer 230 surrounds the first sacrificial layer 240 along the bottom wall and side wall of the bottom of the first opening 210, a groove 231 for accommodating the second sacrificial layer 250 is formed inside the barrier layer 230.

[0028] In step S34, since the barrier material layer 220 located on the side wall of the first opening 210 is not blocked by the second sacrificial layer 250, it has a large etching area and is easy to be etched and removed. However, even after the top film layer is removed, the barrier material layer 220 surrounding the side of the second sacrificial layer 250 only has a small area between the second sacrificial layer 250 and the side wall of the first opening 210 that can be etched, which effectively slows down the etching rate of the barrier material layer 220 surrounding the side of the second sacrificial layer 250. The above process method improves the etching efficiency and ensures the success rate of forming the barrier layer 230 with the groove 231 at the bottom of the first opening 210, avoiding the side wall of the groove 231 in the barrier layer 230 being completely etched and leaving a gap between the side wall of the first opening 210. Furthermore, since the sidewalls of the groove 231 on the barrier layer 230 are formed by etching the barrier material layer 220 deposited on the sidewalls of the first opening 210, the thickness of the sidewalls of the groove 231 of the barrier layer 230 can be effectively limited, and the height of the sidewalls of the groove 231 can be limited based on the height of the second sacrificial layer 250 and the etching process. Therefore, the groove 231 formed on the barrier layer 230 does not have a negative impact on the deposition window of the first metal layer 260 due to its own small size.

[0029] S35, removing the second sacrificial layer 250, so that the barrier layer 230 forms a groove 231 at the bottom of the first opening 210; like Figure 8 As shown, in step S35, the second sacrificial layer 250 in the first opening 210 is removed by a selective etching process, and the barrier layer 230 is retained at the bottom of the first opening 210, and the surface of the barrier layer 230 has a groove 231 open upward. The method of etching the first sacrificial layer 240 includes one or a combination of dry etching and wet etching.

[0030] In addition, if Figure 4As shown, in some embodiments, the method for forming the conductive connection structure further includes forming a metal silicide layer 111 on the surface of the substrate 100 exposed by the first opening 210. It should be noted that the metal silicide layer 111 can be formed by a conventional process. For example, after forming the barrier layer 230 in the first opening 210, the contact area between the barrier layer 230 and the surface of the substrate 100 is annealed so that the metal element in the barrier layer 230 reacts with the silicon element in the substrate 100 to form the metal silicide layer 111. The annealing method may include a uniform temperature annealing process, a spike annealing process, a flash annealing process or a laser annealing process. In this embodiment, the spike annealing process is used for annealing.

[0031] like Fig. 9 As shown, in some embodiments, in step S4, a selective chemical deposition process is used to deposit a metal material from the surface of the barrier layer 230 from bottom to top until the first opening 210 is filled, thereby forming a first metal layer 260 in the first opening 210. Under the selective chemical deposition process, the metal material is deposited on the surface of the barrier layer 230 to form a film layer, but it is not easy to deposit on the first dielectric layer 200 to form a film layer, so that the metal material is deposited from bottom to top to form the first metal layer 260, which effectively prevents the deposited metal material from closing prematurely at the top of the first opening 210, thereby avoiding the formation of gaps in the first metal layer 260.

[0032] Furthermore, in step S4, since the sidewalls of the groove 231 in the barrier layer 230 are attached to the sidewalls of the first opening 210, the first metal layer 260 formed from bottom to top on the barrier layer 230 under selective chemical deposition will not leave a gap with the first opening 210, and has better structural stability.

[0033] In addition, step S4 also includes removing the first metal layer 260 above the surface of the first opening 210 so that the first metal layer 260 is flush with the surface of the first dielectric layer 200; for example, a chemical mechanical polishing (CMP) process is used to polish the surface of the first dielectric layer 200 so that the first metal layer 260 is flush with the surface of the first dielectric layer 200.

[0034] In step S4, the material of the first metal layer 260 formed by deposition can be selected from conventional materials with better electrical conductivity in the art. In some embodiments, the material of the first metal layer 260 includes one or more combinations of tungsten (W), cobalt (Co), copper (Cu), molybdenum (Mo), ruthenium (Ru), and titanium (Ti). That is, the material of the first metal layer 260 can be selected from any one of the materials listed above, such as tungsten or cobalt, etc.; or any two or more combinations of the materials listed above can be selected, such as tungsten-cobalt alloy, or tungsten-titanium alloy, etc. In some embodiments, the material of the first metal layer 260 is selected from tungsten, which has low resistivity, high resistance to electromigration, and excellent flatness when filling small through holes, which can further reduce the resistance of the conductive connection structure and improve the structural stability of the conductive connection structure.

[0035] See also Figures 10 to 12 , Figures 10 to 12 Schematic diagram of the corresponding process and structure of each step of the method for forming a conductive connection structure in some other embodiments after step S4.

[0036] like Fig.10 As shown, in some other embodiments, steps S1 to S4 in the method for forming the conductive connection structure of this embodiment are the same as those of the above embodiment, and will not be repeated here. The forming method further includes the following steps after step S4: S5. Form a second dielectric layer 300 on the first dielectric layer 200, and form a second opening 310 and a third opening 320 on the second dielectric layer 300; wherein the second opening 310 is located above the first opening 210, and the second opening 310 penetrates the second dielectric layer 300 and is connected to the first opening 210, thereby exposing the top surface of the first metal layer 260; the third opening 320 penetrates the second dielectric layer 300 and extends into the first dielectric layer 200, thereby exposing the device structure located on the surface of the substrate 100. like Fig.11 As shown, in step S5, conventional photolithography means can be used to form the second opening 310 and the third opening 320 in the preset area of ​​the second dielectric layer 300. In one example, photoresist is coated on the surface of the second dielectric layer 300 to form a photoresist layer; the photoresist layer is exposed and developed to form a photoresist layer with an etching window; the patterned photoresist layer is used as a mask, and the first dielectric layer 200 exposed by the window is etched by an etching process, wherein the etching process includes but is not limited to dry etching, wet etching, or a combination of dry etching and wet etching; after etching, the photoresist is removed by a conventional ashing or stripping process, so that the second opening 310 and the third opening 320 are formed on the second dielectric layer 300.

[0037] In addition, any interlayer or intralayer interconnect dielectric material can be selected for the second dielectric layer 300, including inorganic dielectric materials or organic dielectric materials. In some embodiments, the second dielectric layer 300 includes but is not limited to insulating materials such as silicon oxide, silicon nitride, silsesquioxane hydrogen polymer, silsesquioxane methane polymer, methyl silicate compounds, and carbon-doped oxides.

[0038] S6 , filling the second opening 310 to form a second metal layer 311 , and filling the third opening 320 to form a third metal layer 321 .

[0039] like Fig.12 As shown, in step S6, a selective chemical deposition process is used to deposit metal material in the second opening 310 and the third opening 320. Under the selective chemical vapor deposition process, the metal material is deposited from the second opening 310 and the bottom wall of the second opening 310 from bottom to top until the second opening 310 and the third opening 320 are evenly filled, thereby forming a second metal layer 311 in the second opening 310 and a third metal layer 321 in the third opening 320. This process effectively prevents the deposited metal material from closing prematurely at the top of the second opening 310 and the third opening 320, thereby avoiding the formation of gaps in the formed second metal layer 311 and the third metal layer 321.

[0040] Furthermore, since the depths of the second opening 310 and the third opening 320 are different, during the process of filling the metal material, the metal material layers deposited in the second opening 310 and the third opening 320 at the same time are at different heights, which enables the metal deposition processes for the source structure 110 / drain structure 110' and the gate structure 120 to be performed separately in the height direction, thereby reducing and avoiding the problem of seams or voids caused by significant through-hole heat differences.

[0041] It should be noted that in step S6, the materials of the second metal layer 311 and the third metal layer 321 formed by deposition can be selected from conventional materials with good electrical conductivity in the art, for example, one or more combinations of tungsten, cobalt, copper, molybdenum, ruthenium, and titanium can be selected. In some embodiments, in order to reduce the contact resistance between the second metal layer 311 and the first metal layer 260, the materials of the second metal layer 311 and the third metal layer 321 are the same as the material of the first metal layer 260, for example, the materials of the first metal layer 260, the second metal layer 311, and the third metal layer 321 are all tungsten.

[0042] In some embodiments, the conductive connection structure formed by the formation method can realize conductive connection between the gate structure 120, the source structure 110 and the drain structure 110' of the semiconductor device on the substrate 100 and the upper metal interconnection layer. Figure 2As shown, in step S1, a semiconductor device is provided on a substrate 100, and the semiconductor device includes a gate structure 120, a source structure 110 and a drain structure 110'. The gate structure 120 is located on the surface of the substrate 100, and the source structure 110 and the drain structure 110' are located in the substrate 100 on both sides of the gate structure 120; and a first dielectric layer 200 formed on the substrate 100 covers the gate structure 120, the source structure 110 and the drain structure 110'. For example, in one example, the semiconductor device formed on the substrate 100 is a MOS (Metal-Oxide-Semiconductor) device, and the MOS device specifically includes a gate structure 120, a source structure 110, and a drain structure 110', etc. The first metal layer 260 and the second metal layer 311 above the substrate 100 are the electrode lead-out parts of the drain or source of the device, and the third metal layer 321 is the electrode lead-out part of the gate. The MOS device insulates and isolates adjacent MOS devices through an isolation structure such as a shallow trench isolation (Shallow Trench Isolation, STI for short) structure.

[0043] like Figure 2 As shown, in step S2, the first opening 210 formed on the first dielectric layer 200 is located above the source structure 110 or the drain structure 110'. The first opening 210 penetrates the first dielectric layer 200 and exposes the source structure 110 or the drain structure 110'. Fig. 9 As shown, in step S4, the first metal layer 260 formed in the first opening 210 is conductively connected to the source structure 110 or the drain structure 110'. It should be noted that, Fig. 9 and Fig.12 The semiconductor device structure in the substrate 100 shown in the figure can be a source structure 110 or a drain structure 110', which is not limited to the specific type in the actual solution. The figure only shows the formation process and specific structure of the first opening 210 above the source structure 110 or the drain structure 110' and the first metal layer 260 therein.

[0044] like Fig.11 and Fig.12As shown, in step S5, the second opening 310 formed penetrates the second dielectric layer 300 and exposes the first metal layer 260; the third opening 320 formed is located above the gate structure 120, the third opening 320 penetrates the second dielectric layer 300 and extends into the first dielectric layer 200, and the third opening 320 exposes the conductive layer 121 on the surface of the gate structure 120. The material of the conductive layer 121 on the surface of the gate structure 120 is the same as that of the first metal layer 260, so that when depositing metal materials in the second opening 310 and the third opening 320 in the subsequent step S6, it is not necessary to form a barrier metal layer, and the metal material can be directly deposited on the surface of the gate structure 120. This allows the third metal layer 321 formed subsequently to be in direct contact with the gate structure 120, omitting the barrier metal layer, thereby effectively reducing the contact resistance between the third metal layer 321 and the gate structure 120.

[0045] like Fig.12 As shown, in step S6, under the selective chemical deposition process, in the second opening 310, the metal material is sequentially deposited from the surface of the first metal layer 260 from bottom to top to form the second metal layer 311; in the third opening 320, the metal material is sequentially deposited from the surface of the conductive layer 121 at the top of the gate structure 120 from bottom to top to form the third metal layer 321. The second metal layer 311 formed in the second opening 310 is in conductive contact with the first metal layer 260, thereby realizing conductive interconnection between the source structure 110 and the drain structure 110' on the substrate 100 and the upper metal interconnection layer; the third metal layer 321 formed in the third opening 320 is in conductive contact with the conductive layer 121 on the surface of the gate structure 120, thereby realizing conductive interconnection between the gate structure 120 and the upper metal interconnection layer on the substrate 100.

[0046] Furthermore, since the metal deposition processes for the source structure 110 / the drain structure 110 ′ and the gate structure 120 are performed separately in the height direction during the process of filling the metal material, the seam or void problem caused by the significant through-hole heat difference can be effectively reduced and avoided.

[0047] See also Fig. 9 In another aspect, the present invention provides a conductive connection structure, which is prepared by the formation method described above. The conductive connection structure includes a substrate 100, a first dielectric layer 200, a barrier layer 230 and a first metal layer 260.

[0048] The substrate 100 can be any material that meets the requirements of the underlying process of the integrated circuit. As an example, the substrate 100 can include any one or more combinations of semiconductor substrates and insulating materials. Among them, the semiconductor substrate 100 can be selected from single crystal silicon, single crystal germanium, silicon germanium, silicon carbide, gallium arsenide, indium arsenide or other III / V compound semiconductors. In addition to the semiconductor materials listed above, the substrate 100 can also be Si / SiGe, Si / SiC, silicon on insulator, germanium on insulator or silicon germanium on insulator, etc.; the insulating material can be an organic insulator, an inorganic insulator or a combination thereof. Optionally, in one embodiment, the substrate 100 is a semiconductor substrate, on which one or more semiconductor devices, such as transistors, memories, sensors, etc., can be manufactured.

[0049] The first dielectric layer 200 is formed on the surface of the substrate 100, and has a first opening 210 on the first dielectric layer 200. The first opening 210 penetrates the first dielectric layer 200 and exposes a portion of the surface of the substrate 100, for example, the first opening 210 exposes the electrode lead-out regions of the source, drain, and gate of the semiconductor device on the substrate 100. It should be noted that the first dielectric layer 200 is made of any interlayer or intralayer interconnection dielectric material, including inorganic dielectric materials or organic dielectric materials, for example, insulating materials such as silicon oxide, silicon nitride, silsesquioxane hydrogen polymer, silsesquioxane methane polymer, methyl silicate compound, carbon-doped oxide, etc.

[0050] The barrier layer 230 is located at the bottom of the first opening 210, and is arranged along the inner wall (bottom wall and side wall) of the first opening 210. The barrier layer 230 has a groove 231 inside. The barrier layer 230 is used to prevent metal ions from diffusing into the substrate 100, and provides a conductive base layer to promote the selective growth of subsequent metal materials. The barrier layer 230 material can be tantalum, tantalum nitride, titanium, titanium nitride or any combination thereof, and can also be a cobalt-based alloy, such as Co-Ti, Co-W, Co-Mo or Co-Ta and other conductive materials; optionally, in one example, the barrier material layer 220 includes a Ti material layer and a TiN material layer sequentially attached to the inner wall of the first opening 210.

[0051] The first metal layer 260 is disposed on the barrier layer 230 and fills the first opening 210 to achieve a conductive connection between the semiconductor device on the substrate 100 and the upper metal interconnect layer. The metal material of the first metal layer 260 includes one or more combinations of tungsten, cobalt, copper, molybdenum, ruthenium, and titanium. In some embodiments, the metal material of the first metal layer 260 is tungsten, which has low resistivity, high resistance to electromigration, and excellent flatness when filling small through holes, which can further reduce the resistance of the conductive connection structure and improve the structural stability of the conductive connection structure.

[0052] In addition, if Fig. 9 As shown, in some embodiments, a metal silicide layer 111 is further provided between the barrier layer 230 and the substrate 100. The metal silicide layer 111 is located between the top surface of the source structure 110 or the drain structure 110' and the barrier layer 230 to further improve the conductivity of the semiconductor device.

[0053] See also Fig.12 In some embodiments, a semiconductor device is provided on a substrate 100, and the semiconductor device includes a gate structure 120, a source structure 110, and a drain structure 110'. The gate structure 120 is located on the surface of the substrate 100, and the source structure 110 and the drain structure 110' are located in the substrate 100 on both sides of the gate structure 120; a first dielectric layer 200 covers the gate structure 120, the source structure 110, and the drain structure 110', and a first opening 210 in the first dielectric layer 200 exposes the surface of the source structure 110 or the drain structure 110', and a first metal layer 260 in the first opening 210 is conductively connected to the source structure 110 or the drain structure 110', and the first metal layer 260 realizes conductive connection between the source structure 110 or the drain structure 110' and the upper metal interconnection layer.

[0054] Furthermore, a second dielectric layer 300 is formed on the first dielectric layer 200, and a second opening 310 and a third opening 320 are provided in the second dielectric layer 300. The second opening 310 penetrates the second dielectric layer 300 and is connected to the first opening 210, thereby exposing the surface of the first metal layer 260. The third opening 320 penetrates the second dielectric layer 300 and extends into the first dielectric layer 200, and the third opening 320 exposes the conductive layer 121 on the surface of the gate structure 120, and the metal material on the surface of the gate structure 120 is the same as the material of the first metal layer 260.

[0055] It should be noted that any interlayer or intralayer interconnect dielectric material can be selected for the second dielectric layer 300, including inorganic dielectric materials or organic dielectric materials. In some embodiments, the second dielectric layer 300 includes but is not limited to insulating materials such as silicon oxide, silicon nitride, silsesquioxane hydrogen polymer, silsesquioxane methane polymer, methyl silicate compounds, and carbon-doped oxides.

[0056] The second opening 310 is filled with a second metal layer 311, and the second metal layer 311 is in conductive contact with the first metal layer 260, thereby realizing conductive interconnection between the source structure 110 and the drain structure 110' on the substrate 100 and the upper metal interconnection layer. The third opening 320 is filled with a third metal layer 321, and the third metal is in conductive contact with the conductive layer 121 on the surface of the gate structure 120, thereby realizing conductive interconnection between the gate structure 120 on the substrate 100 and the upper metal interconnection layer.

[0057] It should be noted that the metal material of the second metal layer 311 and the third metal layer 321 includes one or more combinations of tungsten, cobalt, copper, molybdenum, ruthenium, and titanium. The material of the second metal layer 311 and the third metal layer 321 is the same as the material of the first metal layer 260 to reduce the interface contact resistance in the conductive connection structure. For example, in one example, the materials of the first metal layer 260, the second metal layer 311, and the third metal layer 321 are all tungsten.

[0058] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for forming a conductive connection structure, characterized in that: include: Providing a substrate, and forming a first dielectric layer on a surface of the substrate; forming a first opening on the first dielectric layer, wherein the first opening exposes a portion of the surface of the substrate; forming a barrier layer on the inner wall of the bottom of the first opening, and forming a groove in the barrier layer; A first metal layer is formed in the first opening, wherein the first metal layer is located on the barrier layer and fills up the first opening.

2. The forming method according to claim 1, characterized in that: Forming a barrier layer on the inner wall of the bottom of the first opening and forming a groove in the barrier layer, comprising: forming a barrier material layer on an inner wall of the first opening; forming a first sacrificial layer in the first opening, wherein the first sacrificial layer is located on the barrier layer and fills the first opening; removing a portion of the first sacrificial layer to form a second sacrificial layer at the bottom of the first opening; Using the second sacrificial layer as a mask, removing the barrier material layer on the sidewall of the first opening, and retaining the barrier material layer surrounding the second sacrificial layer along the inner wall of the bottom of the first opening as a barrier layer; The second sacrificial layer is removed so that the barrier layer forms a groove at the bottom of the first opening.

3. The forming method according to claim 1, characterized in that: Forming a first metal layer in the first opening includes: A metal material is selectively deposited on the surface of the barrier layer to fill the first opening and form a first metal layer.

4. The forming method according to claim 1, characterized in that: The method further includes forming a metal silicide layer on the surface of the substrate exposed by the first opening.

5. The forming method according to claim 1, characterized in that: After forming the first metal layer in the first opening, the method further includes: forming a second dielectric layer on the first dielectric layer, and forming a second opening and a third opening on the second dielectric layer, wherein the second opening penetrates the second dielectric layer and exposes the first metal layer; and the third opening penetrates the second dielectric layer and extends into the first dielectric layer; The second opening is filled with a second metal layer, and the third opening is filled with a third metal layer. The materials of the second metal layer and the third metal layer are the same as that of the first metal layer.

6. The forming method according to claim 5, characterized in that: A gate structure is formed on the substrate, a source structure and a drain structure are provided in the substrate on both sides of the gate structure, the first dielectric layer covers the gate structure, the source structure and the drain structure; the first opening penetrates the first dielectric layer and exposes the source structure or the drain structure; The third opening penetrates the second dielectric layer and extends into the first dielectric layer to expose the gate structure; The metal material on the surface of the gate structure is the same as the material of the first metal layer.

7. A conductive connection structure, characterized in that: include: substrate; A first dielectric layer is disposed on the substrate, wherein the first dielectric layer has a first opening, and the first opening exposes a portion of a surface of the substrate; A barrier layer, which is arranged on the inner wall of the bottom of the first opening, and has a groove inside the barrier layer; A first metal layer is disposed on the barrier layer and fills the first opening.

8. The conductive connection structure according to claim 7, characterized in that: A metal silicide layer is disposed between the barrier layer and the substrate.

9. The conductive connection structure according to claim 7, characterized in that: The substrate has a gate structure, a source structure and a drain structure, the gate structure is located on the surface of the substrate, and the source structure and the drain structure are located in the substrate on both sides of the gate structure; wherein the first opening exposes the surface of the source structure or the drain structure.

10. The conductive connection structure according to claim 9, characterized in that: A second dielectric layer is disposed on the first dielectric layer, and the second dielectric layer has a second opening and a third opening; the second opening penetrates the second dielectric layer and exposes the surface of the first metal layer; The third opening penetrates the second dielectric layer and extends into the first dielectric layer to expose the surface of the gate structure; The second opening is filled with a second metal layer, and the third opening is filled with a third metal layer. The materials of the second metal layer and the third metal layer are the same as that of the first metal layer.

11. The conductive connection structure according to any one of claims 7 to 10, characterized in that: The material of the first metal layer is tungsten.

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