High-linearity low-noise amplifier based on post-distortion technology

Abstract

The invention discloses a high-linearity low-noise amplifier based on a post-distortion technology. The high-linearity low-noise amplifier comprises a cascode structure circuit, an input matching circuit, an output matching circuit, an auxiliary amplifying circuit and a neutralizing inductor, the cascode structure circuit comprises a first cascode tube and a second cascode tube; the auxiliary amplifying circuit comprises a first common-gate tube; a grid electrode and a source electrode of the first common source tube are connected with the input matching circuit; the drain electrode of the first common-source tube is connected with the output end of the neutralization inductor and the source electrode of the first common-gate tube; the source electrode of the second common-gate tube is connected with the input end of the neutralization inductor; the drain electrode and the grid electrode of the second common-gate tube are connected with the output matching circuit; and the source electrode and the grid electrode of the first common-gate tube are connected with the auxiliary amplifying circuit. According to the invention, the balance of multiple indexes such as linearity, power consumption, gain and matching can be realized. The invention can be widely applied to the technical field of radio frequency integrated circuits.

Description

Technical Field

[0001] The invention relates to the technical field of radio frequency integrated circuits, and in particular to a high linearity low noise amplifier based on post-distortion technology. Background Art

[0002] Low Noise Amplifier (LNA) is one of the key units in wireless communication systems. It is an amplifier with extremely low noise figure, mainly used to amplify weak signals. Its noise figure, gain, power consumption and linearity have an important impact on wireless communication systems.

[0003] In the spectrum allocation of 5G communication networks, the Sub-6GHz band and the millimeter wave band are the two main bands. Although the millimeter wave band has been rapidly developed and widely used in recent years due to its high speed and low latency, the Sub-6GHz band still shows significant advantages in terms of coverage, penetration, power consumption control, cost-effectiveness, and compatibility with other communication technologies. Therefore, the Sub-6GHz band is still the dominant band in the current 5G network layout.

[0004] With the continuous development of semiconductor technology, RF chip process materials are also constantly upgraded. From the first generation of RFCMOS to the third generation of GaN, each material has its unique advantages and application scenarios. However, considering the production cost, integration and process breakthroughs, silicon-based technology is still the most cost-effective solution in modern RF chip design.

[0005] Low noise amplifiers not only require low noise figures and high power gain, but also high linearity to maintain the shape and amplitude of the input signal and avoid distortion. However, for CMOS processes, the low electron mobility leads to limited linearity. Therefore, when using CMOS devices to implement RF front ends, methods to improve linearity must be considered.

[0006] Compared with the common source and common gate, the cascode structure has better linearity. Therefore, in Sub-6G, low noise amplifiers are usually designed based on the cascode structure. The traditional cascode structure improves linearity by selecting appropriate bias voltage and CMOS tube size. By adjusting the bias voltage, the third-order nonlinear coefficient can be reduced, thereby improving linearity. However, a lower third-order nonlinear coefficient usually requires the bias voltage to be in the weak inversion region and the linear region to be obtained, and the CMOS tube in the weak inversion region is easily affected by process deviations, resulting in the tube being turned off; the bias voltage of the CMOS tube in the linear region is higher, and the drain-source current is higher, resulting in increased power consumption; the third-order nonlinear coefficient can also be reduced by selecting a smaller CMOS tube size, but a smaller tube size cannot obtain a higher gain. Therefore, the existing low noise amplifier with a cascode structure cannot achieve a balance among multiple indicators such as linearity, power consumption, gain, and matching. Summary of the invention

[0007] In order to solve the above technical problems, the object of the present invention is to provide a high linearity low noise amplifier based on post-distortion technology, which can achieve a balance among multiple indicators such as linearity, power consumption, gain and matching.

[0008] The technical solution adopted by the present invention is: a high linearity low noise amplifier based on post-distortion technology, including a common source and common gate structure circuit, an input matching circuit, an output matching circuit, an auxiliary amplifier circuit and a neutralizing inductor, wherein:

[0009] The common-source and common-gate structure circuit comprises a first common-source transistor and a second common-gate transistor;

[0010] The auxiliary amplifier circuit includes a first common-gate tube, a third resistor, a fourth resistor, a fifth capacitor and a sixth capacitor;

[0011] The neutralizing inductor is used to neutralize the parasitic capacitance between the first common source transistor and the second common gate transistor, thereby improving reverse isolation;

[0012] The gate and source of the first common-source tube are connected to the input matching circuit; the drain of the first common-source tube is connected to the output end of the neutralization inductor and the source of the first common-gate tube; the source of the second common-gate tube is connected to the input end of the neutralization inductor; the drain and gate of the second common-gate tube are connected to the output matching circuit; the drain of the first common-gate tube is connected to the output end of the fourth resistor and the output end of the sixth capacitor; the input end of the fourth resistor is connected to the input end of the sixth capacitor, the output matching circuit, and the input end of the third resistor; the output end of the third resistor is connected to the gate of the first common-gate tube and the input end of the fifth capacitor; the output end of the fifth capacitor is grounded.

[0013] Further, the fourth resistor and the sixth capacitor form an RC parallel resonant network, wherein:

[0014] The fourth resistor provides a DC path for the first common-gate transistor, and biases the first common-gate transistor in a deep linear region through series voltage division;

[0015] The sixth capacitor is used to adjust the impedance of the auxiliary amplifier circuit, provide an AC path, keep the signal unimpeded, and thereby eliminate the nonlinearity of the first common source tube.

[0016] Furthermore, the first resistor of the input matching circuit, the second resistor of the output matching circuit and the third resistor are used to act as choke inductors to prevent the input radio frequency signal from interfering with the bias voltage of the gate of the common-source common-gate structure.

[0017] The beneficial effects of the present invention are as follows: the present invention introduces an auxiliary amplifier tube working in a strong inversion region to generate nonlinear characteristics opposite to those of the main amplifier tube, thereby offsetting the coefficient of the third-order nonlinearity, and improving the linearity without adjusting the bias voltage and size of the main amplifier tube; the auxiliary amplifier tube is connected to the output end of the main amplifier tube, which will not directly affect the design of input matching and output matching and the gain flatness, which makes the design of the matching network simpler, reduces the complexity of the design, and helps the designer to optimize the performance of the input and output ends respectively, thereby improving the overall design efficiency; in addition, in the RC parallel resonant network, the static operating point of the auxiliary amplifier tube is adjusted by selecting a suitable resistance value, and its drain-source voltage is reduced to bias it in a deep linear region, thereby minimizing the current introduced by the auxiliary branch, and minimizing the influence of the auxiliary amplifier tube on the overall power consumption and gain, and at the same time, the impedance of the auxiliary branch is adjusted by selecting a suitable capacitance value to achieve a better nonlinear elimination effect, and a balance of multiple indicators such as linearity, power consumption, gain and matching is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a circuit structure diagram of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0019] Figure 2 It is an equivalent schematic diagram of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0020] Figure 3 It is a schematic diagram of the influence of the sixth capacitor capacitance on the linearity of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0021] Figure 4 It is a schematic diagram of the effect of the capacitance of the sixth capacitor on the gain of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0022] Figure 5It is a schematic diagram of the influence of the resistance value of the fourth resistor on the linearity of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0023] Figure 6 It is a schematic diagram of the influence of the fourth resistor value on power consumption of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0024] Figure 7 It is a schematic diagram of the effect of the fourth resistor value on the gain of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0025] Figure 8 It is a schematic diagram of return loss and structural gain of a high linearity low noise amplifier based on post-distortion technology of the present invention;

[0026] Fig. 9 It is a schematic diagram comparing the linearity of the low noise amplifier of the structure of the present invention and the low noise amplifier of the traditional structure at a frequency of 1.9-2.1 GHz;

[0027] Fig.10 A schematic diagram showing a comparison of the gain of a low noise amplifier of the present invention and a low noise amplifier of a conventional structure at a frequency of 1.9-2.1 GHz;

[0028] Description of the drawings: RF in , RF signal input terminal; C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; C5, fifth capacitor; C6, sixth capacitor; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; L1, first inductor; L2, second inductor; L3, neutral inductor; L4, fourth inductor; L5, fifth inductor; RF out , RF signal output terminal; VG1, first power supply voltage; VDD, gate power supply voltage; M A , the first common source tube; M B , the first common-gate tube; M C , the second common-gate tube. DETAILED DESCRIPTION

[0029] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The step numbers in the following embodiments are only provided for the convenience of explanation and description, and the order between the steps is not limited in any way. The execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0030] Reference Figure 1 , a high linearity low noise amplifier based on post-distortion technology, including a common source and common gate structure circuit, an input matching circuit, an output matching circuit, an auxiliary amplification circuit and a neutralizing inductor L3, wherein:

[0031] The common-source common-gate structure circuit includes a first common-source transistor M A and the second common-gate tube M C ;

[0032] The auxiliary amplifier circuit includes a first common-gate transistor M B , a third resistor R3, a fourth resistor R4, a fifth capacitor C5 and a sixth capacitor C6;

[0033] The neutralizing inductor L3 is used to neutralize the first common source transistor M. A and the second common-gate tube M C The parasitic capacitance between them can improve the reverse isolation;

[0034] The gate and source of the first common source transistor are connected to the input matching circuit; the drain of the first common source transistor is connected to the output end of the neutralization inductor L3, the first common gate transistor M B The source of the second common-gate tube M C The source of the second common-gate transistor M is connected to the input end of the neutralizing inductor L3; C The drain and gate of the first common-gate transistor M are connected to the output matching circuit; B The drain of the fourth resistor R4 is connected to the output end of the fourth resistor R4 and the output end of the sixth capacitor C6; the input end of the fourth resistor R4 is connected to the input end of the sixth capacitor C6, the output matching circuit, and the input end of the third resistor R3; the output end of the third resistor R3 is connected to the first common-gate transistor M B The gate of the fifth capacitor C5 is connected to the input end of the fifth capacitor C5; the output end of the fifth capacitor C5 is grounded.

[0035] Preferably, the first common source tube M A is the main amplifier tube; the first common-grid tube M B is an auxiliary amplifier tube, the first common-gate tube M B Used to compensate the first common source tube M A The third-order nonlinearity of the first common source tube M A The output end is connected to reduce the impact on input matching, which is conducive to unidirectional design.

[0036] Preferably, the fourth resistor R4 and the sixth capacitor C6 form an RC parallel resonant network, wherein:

[0037] The fourth resistor R4 is connected to the first common-gate transistor M B Provide a DC path, through the series voltage divider to connect the first common-gate tube M A Biased in deep linear region;

[0038] The sixth capacitor C6 is used to provide an AC path to keep the signal flowing smoothly.

[0039] The input matching circuit includes a first capacitor, a first resistor, a first inductor, a second capacitor and a second inductor, wherein:

[0040] The first common source tube M A The source of the first common source transistor M is connected to the output end of the second capacitor C2 and the input end of the second inductor L2; the output end of the second inductor L2 is grounded; A The gate of the second capacitor C2 is connected to the input end and the output end of the first inductor L1; the input end of the first inductor L1 is connected to the output end of the first capacitor C1 and the output end of the first resistor R1; the input end of the first capacitor C1 is connected to the RF signal input end RF in Connection; the input end of the first resistor R1 is connected to the first power supply voltage VG1.

[0041] Preferably, the first capacitor C1 is a DC blocking capacitor, which does not participate in the impedance matching of the input end due to its large capacitance.

[0042] Preferably, the second inductor L2 is a source degeneration inductor, which is used to improve circuit stability and reduce circuit noise coefficient.

[0043] Preferably, the first inductor, the second inductor and the second capacitor jointly adjust the input matching to match the input capacitive impedance of the common-source common-gate structure circuit to 50 ohms.

[0044] Preferably, the output matching circuit includes a second resistor R2, a third capacitor C3, a fourth capacitor C4, a fourth inductor L4 and a fifth inductor L5, wherein:

[0045] The second common-gate transistor M C The drain of the fourth inductor L4 is connected to the output end of the fourth inductor L4; the input end of the fourth inductor L4 is connected to the input end of the fourth capacitor C4 and the output end of the fifth inductor L5; the output end of the fourth capacitor C4 is connected to the RF signal output end RF out The input end of the fifth inductor L5 is connected to the input end of the fourth resistor R4, the gate power supply voltage VDD, and the input end of the second resistor R2; the output end of the second resistor R2 is connected to the second common-gate transistor M C The gate of the capacitor C3 is connected to the input end of the third capacitor C3; the output end of the third capacitor C3 is grounded.

[0046] Preferably, the fifth inductor L5 is a radio frequency choke coil with a large inductance, which is used to block AC signals and provide a DC path to provide a stable gate power supply voltage for the output path.

[0047] The fourth capacitor C4 and the fifth inductor L5 jointly adjust the output matching to match the output capacitive impedance of the common source and common gate structure circuit to 50 ohms.

[0048] The third capacitor C3 and the fifth capacitor C5 are both bypass capacitors, which are used to short-circuit the radio frequency signal to the ground to prevent the radio frequency signal from interfering with the DC bias.

[0049] The first resistor R1 , the second resistor R2 , and the third resistor R3 are used to act as choke inductors to prevent input radio frequency signals from interfering with the bias voltage of the gate of the common-source common-gate structure.

[0050] The fourth inductor L4 is a series peaking inductor inserted between the second common-gate transistor M C and output matching network to extend bandwidth.

[0051] The circuit diagram of the present invention is simplified equivalently to obtain an equivalent schematic diagram as shown in FIG. Figure 2 As shown, Figure 2 The current i A The expression is as follows:

[0052] i A =g 1A v1+g 2A v1 2 +g 3A v1 3 (1)

[0053] Among them, i A Represents the first common source tube M g Current; g 1A represents the first-order derivative of the DC transfer characteristic of the first common source tube; g 2A represents the second-order derivative of the DC transfer characteristic of the first common source tube; g 3A It represents the third-order derivative of the DC transfer characteristic of the first common-source tube; v1 represents the gate-source voltage of the first common-source tube.

[0054] Current i B The expression is as follows:

[0055] i B =g 1B v2+g 2B v2 2 +g 3B v2 3 (2)

[0056] Among them, i B Represents the first common source tube M B Current; g 1B Represents the first-order derivative of the DC transfer characteristic of the first common-gate tube; g 2Brepresents the second-order derivative of the DC transfer characteristic of the first common-gate tube; g 3B represents the third-order derivative of the DC transfer characteristic of the first common-gate tube; v2 represents the first common-source tube M a The voltage at the drain terminal.

[0057] Current i out The expression is as follows:

[0058] i out =i A +i B (3)

[0059] Among them, i out Represents the drain-source current of the second common-gate tube.

[0060] Since the first common source tube M A The RF input signal is amplified in reverse, so the first common source tube M A The voltage v2 at the drain terminal can be expressed as:

[0061] v2=-b1v1,b1>0(4)

[0062] Among them, v2 represents the first common source tube M A The voltage at the drain terminal; b1 represents the linear gain of the first common source tube.

[0063] From formulas 1, 2, 3 and 4, we can get:

[0064] i out =(g 1A -b1g 1B )v1+(g 2A -b1 2 g 2B )v1 2 +(g 3A -b1 3 g 3B )v1 2 (5)

[0065] From Formula 5, we can see that as long as the third-order coefficient g 3A -b1 3 g 3B When the first common source transistor M is equal to 0, the linearity (OIP3) can be improved. A As the main amplifier tube needs to be biased in the saturation region, therefore, g 3A Less than 0, when g 3B When the value is negative, the auxiliary amplifier tube can eliminate the nonlinearity of the main amplifier tube. B It needs to be biased in the strong inversion region; in addition, the size of the auxiliary amplifier tube needs to be reasonably selected so that g 3A =b1 3 g3B , in order to eliminate the third-order nonlinearity and obtain good linearity. In the RC parallel resonant network, by selecting a suitable fourth resistor R4, adjusting the fourth resistor R4 and the auxiliary amplifier tube M B The voltage division of the two can more flexibly adjust the static operating point of the auxiliary amplifier tube, making its drain-source voltage as small as possible to bias it in the deep linear region. According to the current formula in the deep linear region, Among them, I D represents the current in the branch where the auxiliary amplifier is located; μ represents the electron mobility; C ox Represents the gate oxide capacitance per unit area; V GS Represents the gate-source voltage of the transistor; V TH Represents the threshold voltage of the transistor; V DS represents the drain-source voltage of the transistor; W represents the gate width of the transistor; L represents the channel length of the transistor. It can be known that reducing the drain-source voltage V DS Can reduce the current I in the branch where the auxiliary amplifier is located D , thereby reducing the additional power consumption, while reducing the current consumption can also reduce gain attenuation.

[0066] The influence of the resistance value of the fourth resistor R4 on linearity, power consumption and gain can be referred to Figure 5 , Figure 6 and Figure 7 It can be found that with the increase of R4 resistance, the linearity OIP3 increases first and then decreases. When R4=3.5kΩ, OIP3 reaches a peak value of 30.0dBm; in the range of R4=0~5kΩ, the power consumption introduced by the auxiliary branch decreases significantly with the increase of R4 resistance. After R4 is greater than 5kΩ, the power consumption introduced by the auxiliary branch is less affected by the resistance of R4. When R4=0Ω, the power consumption introduced by the auxiliary branch is as high as 2.6mW. When R4=50kΩ, the power consumption introduced by the auxiliary branch is only 0.03mW. The gain gradually increases with the increase of R4 resistance, that is, a slightly larger resistance can reduce the gain attenuation caused by the auxiliary amplifier tube, so the appropriate resistance should be selected in combination with the compromise of power consumption, gain and linearity.

[0067] Although increasing the resistance of the fourth resistor R4 can adjust the static operating point, it will increase the impedance of the branch where the auxiliary amplifier is located, affecting the elimination of nonlinearity. Therefore, the sixth capacitor C6 is used to adjust the impedance of the branch, so that the impedance of the RC resonant network at the operating frequency is minimized, and the signal can pass smoothly through the auxiliary amplifier, so that the nonlinearity of the main amplifier is fully eliminated, and the linearity OIP3 of the low-noise amplifier is improved. The influence of the capacitance of the sixth capacitor on linearity and gain can be referred to Figure 3 and Figure 4It can be found that as the capacitance of C6 increases, the linearity OIP3 increases first and then decreases. When C6=3p, OIP3 reaches a peak value of 23.6dBm; the gain gradually decreases with the increase of the capacitance of C6, that is, a larger capacitance will cause a certain degree of gain attenuation, so the appropriate capacitance should be selected in combination with the compromise between linearity and gain.

[0068] Reference Figure 8 It can be found that the circuit of the present invention achieves good input matching and output matching in the range of 1.9-2.1GHz, the input return loss is better than 16.8dB, and the output return loss is better than 13.6dB. At the same time, the gain flatness is high, the gain in this frequency band is 14.7-14.8dB, and the gain fluctuation within the band is only 0.1dB.

[0069] The specific embodiment of the present invention is simulated and compared with a low noise amplifier with a traditional structure at a frequency of 1.9-2.1 GHz to verify that the low noise amplifier with the structure of the present invention has superior performance.

[0070] Reference Fig. 9 In terms of linearity, the linearity OIP3 of the low noise amplifier of the traditional structure is 15.8dBm, while the linearity OIP3 of the low noise amplifier of the present invention structure is 23.6dBm, which is improved by 7dB; Fig.10 In terms of gain, the gain of the low noise amplifier with the traditional structure is 15.6dB, while the gain of the low noise amplifier with the structure of the present invention is 14.7dB, which is only reduced by 0.9dB; in addition, in terms of power consumption, the common source and common gate structure current of the low noise amplifier with the traditional structure is 9.943mA, and the overall power consumption is 17.897mW; while the common source and common gate structure current of the low noise amplifier with the structure of the present invention is 9.945mA, and the overall power consumption is 17.901mW, which are similar in power consumption.

[0071] In summary, the high linearity low noise amplifier based on the post-distortion technology of the present invention can maintain low power consumption and high gain while maintaining good linearity.

[0072] The above is a specific description of the preferred implementation of the present invention, but the invention is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A high linearity low noise amplifier based on post-distortion technology, It is characterized in that It includes a common source and common gate structure circuit, an input matching circuit, an output matching circuit, an auxiliary amplifier circuit and a neutralizing inductor, wherein: The common-source and common-gate structure circuit comprises a first common-source transistor and a second common-gate transistor; The auxiliary amplifier circuit includes a first common-gate tube, a third resistor, a fourth resistor, a fifth capacitor and a sixth capacitor; The neutralizing inductor is used to neutralize the parasitic capacitance between the first common source transistor and the second common gate transistor, thereby improving reverse isolation; The gate and source of the first common-source tube are connected to the input matching circuit; the drain of the first common-source tube is connected to the output end of the neutralization inductor and the source of the first common-gate tube; the source of the second common-gate tube is connected to the input end of the neutralization inductor; the drain and gate of the second common-gate tube are connected to the output matching circuit; the drain of the first common-gate tube is connected to the output end of the fourth resistor and the output end of the sixth capacitor; the input end of the fourth resistor is connected to the input end of the sixth capacitor, the output matching circuit, and the input end of the third resistor; the output end of the third resistor is connected to the gate of the first common-gate tube and the input end of the fifth capacitor; the output end of the fifth capacitor is grounded.

2. A high linearity low noise amplifier based on post-distortion technology according to claim 1, It is characterized in that The fourth resistor and the sixth capacitor form an RC parallel resonant network, wherein: The fourth resistor provides a DC path for the first common-gate transistor, and biases the first common-gate transistor in a deep linear region through series voltage division; The sixth capacitor is used to adjust the impedance of the auxiliary amplifier circuit, provide an AC path, keep the signal unimpeded, and thereby eliminate the nonlinearity of the first common source tube.

3. A high linearity low noise amplifier based on post-distortion technology according to claim 2, It is characterized in that The first resistor of the input matching circuit, the second resistor of the output matching circuit and the third resistor are used to act as choke inductors to prevent the input radio frequency signal from interfering with the bias voltage of the gate of the common-source common-gate structure.

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