Filter module

Abstract

A filter module is disclosed. The filter module includes a first ground layer, a second ground layer disposed spaced apart from the first ground layer, a first conductive pattern layer disposed between the first ground layer and the second ground layer, a second conductive pattern layer disposed on one side of the first ground layer or the second ground layer, and a through hole, the through hole connects at least two of the first ground layer, the second ground layer, the first conductive pattern layer and the second conductive pattern layer.

Description

Technical Field

[0001] Embodiments relate to an antenna module including a filter module or a Wi-Fi and Bluetooth antenna, and to a high-frequency module including the antenna module. Background Art

[0002] A filter configured to filter a signal within a desired frequency band can be applied to various devices or fields including antennas. Such a bandpass filter requires an inductor and a capacitor.

[0003] Implementing a bandpass filter using lumped inductors and capacitors presents various problems, including increased insertion loss, increased signal distortion, and increased thickness and size. Therefore, research is underway to address these issues.

[0004] The Bluetooth module is a device that includes a series of chips and an antenna and communicates in a frequency band of approximately 2.4 GHz to 2.5 GHz at a distance of approximately 10 to 100 meters according to the Bluetooth wireless interface standard.

[0005] A Wireless Fidelity (Wi-Fi) module is a device that performs short-range communication in the frequency band of approximately 2.4 GHz to 2.5 GHz or at a frequency band of approximately 5 GHz. A Wi-Fi module uses radio waves or infrared transmission schemes to implement wireless Internet access where a wireless access device (or access point (AP)) is installed, or communicates with another Wi-Fi module by directly connecting to it (Wi-Fi Direct) in a P2P network.

[0006] Conventionally, Bluetooth modules and Wi-Fi modules are implemented as independent (separate) modules and installed in electronic products. Therefore, when both Bluetooth modules and Wi-Fi modules need to be installed in a certain electronic product, various problems may arise in terms of product size reduction or system stability.

[0007] Specifically, both the Bluetooth module and the Wi-Fi module are devices that use radio frequency signals for communication. Therefore, some components may be included in the Bluetooth module and the Wi-Fi module. However, when the Bluetooth module and the Wi-Fi module are implemented as independent modules, such common components may be provided and used separately, which may make it difficult to reduce the size of the product and may lead to waste of electronic components and system instability.

[0008] Furthermore, the Bluetooth module uses channels that overlap with those of the Wi-Fi module, but does not use the 5 GHz to 6 GHz frequency band. Therefore, the Bluetooth antenna requires a filter capable of filtering the 5 GHz to 6 GHz frequency band. However, when configuring the circuit using passive components, its size may increase and its price competitiveness may decrease. Summary of the Invention

[0009] Technical issues

[0010] Embodiments provide a filter module with improved performance and structure.

[0011] The embodiment provides a novel antenna module that can solve the above problems.

[0012] The embodiment provides an antenna module including a filter for Bluetooth embedded in a board without using passive elements.

[0013] An embodiment provides an antenna module including an antenna module embedded in a board and connected to an antenna for Bluetooth without using passive elements.

[0014] Technical Solution

[0015] According to an embodiment, a filter module may include: a first ground layer, a second ground layer arranged to be spaced apart from the first ground layer, a first conductive pattern layer arranged between the first ground layer and the second ground layer, a second conductive pattern layer arranged on one side of the first ground layer or the second ground layer, and a through hole, wherein the through hole interconnects at least two of the first ground layer, the second ground layer, the first conductive pattern layer, and the second conductive pattern layer.

[0016] In an example, the first conductive pattern layer may include a capacitance pattern formed to include capacitance while facing at least one of the first ground layer or the second ground layer.

[0017] In an example, the first conductive pattern layer may include a first inductor pattern formed to include an inductor.

[0018] In an example, the second conductive pattern layer may include a second inductor pattern formed to include an inductor.

[0019] In an example, the inductor pattern may have a smaller width than the capacitor pattern.

[0020] In an example, the second conductive pattern layer may include a first opening formed in the second conductive pattern layer to allow the second inductor pattern to be disposed in the first opening, and the first ground layer may include a second opening formed in the first ground layer to vertically overlap the first opening.

[0021] In an example, each of the first and second inductor patterns may include an inductor pattern having a planar shape bent at least once in a horizontal direction, and a maximum number of bends of the first inductor pattern in the horizontal direction may be greater than a maximum number of bends of the second inductor pattern.

[0022] In an example, the capacitor pattern may include: a second capacitor pattern that forms a second capacitor; a first capacitor pattern that is arranged to be spaced apart from one side of the second capacitor pattern to form a first capacitor; and a third capacitor pattern that is arranged to be spaced apart from an opposite side of the second capacitor pattern to form a third capacitor.

[0023] In an example, the second capacitor pattern may include a first stub, a second stub disposed on one side of the first stub, and a third stub disposed on an opposite side of the first stub.

[0024] In an example, the first inductor pattern may include: a first inductor pattern configured to interconnect the first via and the second via to form a first inductor; a second inductor pattern configured to interconnect the first via and the first capacitor pattern to form a second inductor; a fifth inductor pattern configured to interconnect the third via and the third capacitor pattern to form a fifth inductor; and a sixth inductor pattern configured to interconnect the third via and the fourth via to form a sixth inductor.

[0025] In an example, the second inductor pattern may include: a third inductor pattern arranged to interconnect the first and fifth vias and the fifth and sixth vias to form a third inductor; and a fourth inductor pattern arranged to interconnect the sixth and third vias to form a fourth inductor. The sixth via may be connected to the second capacitor pattern.

[0026] In an example, at least one of the first to sixth inductor patterns may have a line width of 250 μm or less.

[0027] In an example, at least one of the first capacitor pattern or the third capacitor pattern may have a line width of 300 μm or more.

[0028] In an example, at least one of the first to sixth inductor patterns may have a length equal to or less than one eighth of a wavelength of the fundamental frequency.

[0029] According to another embodiment, a filter module may include: a second ground layer; a first conductive pattern layer stacked on the second ground layer and including a pattern for implementing an inductor and a capacitor; a first ground layer stacked on the first conductive pattern layer; a second conductive pattern layer stacked on the first ground layer and including a transmission line including a pattern for implementing an inductor; and a through-hole interconnecting the inductor and capacitor of the first conductive pattern layer and the inductor of the second conductive pattern layer in a vertical direction.

[0030] An antenna module according to an embodiment of the present disclosure may include a board to which a first antenna is coupled, a low-pass filter unit embedded in a portion of the board, and a first transmission line interconnecting the first antenna and the low-pass filter unit. The low-pass filter unit may include first to fourth conductive layers and first to third dielectric layers disposed between the first and fourth conductive layers, respectively. The first conductive layer may include a first pattern including a first through-hole, a second pattern connected between one end of the first pattern and a second through-hole, and a third pattern connected to the third through-hole. The second conductive layer may include a ground pattern spaced apart from the first through-holes formed therein by a predetermined gap. The third conductive layer may include a fourth pattern facing the first pattern and a fifth pattern spaced apart from the fourth pattern and facing the second through-holes and the third pattern. The fourth conductive layer may include a sixth pattern connected between the second through-hole and a ground through-hole formed therein, and a seventh pattern connected between the second through-hole and the third through-hole. The first and third patterns of the first conductive layer, the fourth and fifth patterns of the third conductive layer, and the first and second dielectric layers may form a first capacitor and a second capacitor. The second pattern, the sixth pattern, and the seventh pattern may have a line shape and may form first to third inductors.

[0031] According to an embodiment of the present disclosure, the first and third patterns of the first conductive layer and the fourth and fifth patterns of the third conductive layer may have polygonal plate shapes.

[0032] According to an embodiment of the present disclosure, an area of ​​an upper surface of the fifth pattern may be smaller than an area of ​​an upper surface of the third pattern, and may be larger than an area of ​​an upper surface of the first pattern.

[0033] According to an embodiment of the present disclosure, an area of ​​an upper surface of the third pattern may be smaller than an area of ​​an upper surface of the first pattern.

[0034] According to an embodiment of the present disclosure, the first conductive layer may include a first input / output pattern connected to the other end of the first pattern and the first transmission line, and a second input / output pattern connected to the second pattern and the second transmission line disposed on the opposite side of the low-pass filter unit.

[0035] According to an embodiment of the present disclosure, the sixth pattern may have a greater length than the second pattern.

[0036] According to an embodiment of the present disclosure, the number of bends of the sixth pattern may be greater than the number of bends of the second pattern and the seventh pattern.

[0037] According to an embodiment of the present disclosure, the first capacitor may include a first capacitance and a second capacitance, wherein the first capacitance is generated between a first pattern of the first conductive layer and a first circular pattern of a first through-hole connected to the second conductive layer by a first dielectric layer, and the second capacitance is generated between the first circular pattern and a fourth pattern by a second dielectric layer.

[0038] According to an embodiment of the present disclosure, the second capacitor may be connected to the fifth pattern, the third circular pattern (which is connected to the third through-hole of the second conductive layer), and the third pattern of the first conductive layer via the third through-hole connected to the seventh pattern of the fourth conductive layer. The second capacitor may include a third capacitor and a fourth capacitor, the third capacitor being generated between the third circular pattern and the fourth pattern, and the fourth capacitor being generated between the fifth pattern and the third circular pattern through the first dielectric layer.

[0039] According to an embodiment of the present disclosure, the second capacitor may include a fifth capacitor and a sixth capacitor, the fifth capacitor being generated by the first dielectric layer between the first through-hole of the first conductive layer and the second circular pattern connected to the second through-hole of the second conductive layer, and the sixth capacitor being generated by the second dielectric layer between the second circular pattern and the fourth circular pattern connected to the second through-hole of the third conductive layer.

[0040] According to an embodiment of the present disclosure, the third capacitor and the fifth capacitor may be connected to each other in parallel, and the fourth capacitor and the sixth capacitor may be connected to each other in parallel.

[0041] According to an embodiment of the present disclosure, the antenna module may include a Wi-Fi module connected to the low-pass filter unit via a second transmission line and a second antenna connected to the Wi-Fi module. The first antenna may be a Bluetooth antenna, and the second antenna may be a Wi-Fi antenna.

[0042] According to an embodiment of the present disclosure, the low-pass filter unit may pass a frequency band of 2402 MHz to 2480 MHz and may filter a frequency band of 5 GHz to 6 GHz.

[0043] A high-frequency module according to an embodiment of the present disclosure may include a low-pass filter unit configured such that a first input / output pattern is electrically connected to a Bluetooth antenna and a second input / output pattern is electrically connected to a Wi-Fi module. The low-pass filter unit may include: a first conductive layer to a fourth conductive layer; a dielectric layer respectively arranged between the first conductive layer to the fourth conductive layer; and a plurality of through holes vertically formed through the first conductive layer to the fourth conductive layer and the dielectric layer and selectively interconnecting the patterns of different conductive layers. The patterns on one side of each of the first conductive layer to the third conductive layer and the dielectric layer arranged between the first conductive layer to the third conductive layer may face each other and may form a first capacitor connected in parallel to a first branch node connected to the first input / output pattern. The first line pattern of the first conductive layer may form a first inductor connected in series to the first branch node. The second line pattern of the fourth conductive layer may form a second inductor connected in parallel to a third branch node connected to the other end of the first inductor. The third line pattern of the fourth conductive layer may form a third inductor connected in parallel to the second branch node connected between the second input / output pattern and the third branch node. The pattern on the other side of each of the first to third conductive layers and the dielectric layer provided between the first to third conductive layers may face each other and may form a second capacitor connected in series to the third inductor. The other end of the first capacitor, the other end of the second inductor, and the other end of the second capacitor may be connected to the ground pattern.

[0044] According to an embodiment of the present disclosure, the low-pass filter unit may pass a frequency band of 2402 MHz to 2480 MHz and may filter a frequency band of 5 GHz to 6 GHz.

[0045] According to an embodiment of the present disclosure, the first to third branch nodes may be respectively formed by through holes provided in the low-pass filter unit.

[0046] Beneficial effects

[0047] It is obvious from the above description that according to the filter module of the embodiment, an inductor of sufficient length can be ensured within a limited space, and therefore, the inductor can be designed to include the desired inductance. In addition, the frequency component can be increased and the insertion loss can be reduced. Therefore, the efficiency of the antenna can be improved, and thus the transmission distance and transmission rate can be increased. In addition, the delay can be improved, and thus the signal distortion rate can be reduced. In addition, compared with the filter module implemented using passive components, the thickness of the filter module can be reduced.

[0048] In addition, embodiments can reduce the size of the antenna module by embedding the filter in the board instead of using part of the inductor and capacitor. In addition, the cost of manufacturing the antenna module can be reduced. In addition, by connecting the low-pass filter (LPF) embedded in the board of the antenna module to the Bluetooth antenna, the 5 GHz to 6 GHz frequency band can be filtered. In addition, the insertion loss of the 5 GHz to 6 GHz frequency band can be equal to or less than -3 dB.

[0049] The features, structures, effects, etc. described above in the embodiments are included in at least one embodiment of the present disclosure, but are not necessarily limited to only one embodiment. In addition, the features, structures, effects, etc. illustrated in the corresponding embodiments can be combined with other embodiments or modified by those skilled in the art. Therefore, the content related to such combinations and modifications should be interpreted as falling within the scope of the present disclosure.

[0050] Although the present disclosure has been specifically shown and described with reference to the exemplary embodiments of the present disclosure, these embodiments are presented for illustrative purposes only and do not limit the present disclosure, and it is obvious to those skilled in the art that various changes in form and detail may be made without departing from the basic features of the embodiments set forth herein. For example, the corresponding configurations set forth in the embodiments may be modified and applied. In addition, differences in such modifications and applications should be interpreted as falling within the scope of the present disclosure as defined by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Arrangements and embodiments may be described in detail with reference to the following drawings, in which like reference numerals refer to like elements, and in which:

[0052] Figure 1 is a conceptual diagram schematically illustrating a filter module according to an embodiment;

[0053] Figure 2 It shows Figure 1 A circuit diagram of an embodiment of the filter module shown in FIG;

[0054] Figure 3A and Figure 3B They are Figure 1 A perspective view and a plan view of the second conductive pattern layer shown in FIG;

[0055] Figure 4A and Figure 4B They are Figure 1 A perspective view and a plan view of the first ground layer shown in FIG;

[0056] Figure 5A and Figure 5B They are Figure 1A perspective view and a plan view of the first conductive pattern layer shown in FIG;

[0057] Figure 6A and Figure 6B They are Figure 1 A perspective view and a plan view of the second ground layer shown in FIG;

[0058] Figure 7 is a graph showing the insertion loss of the filter module at each frequency according to the embodiment;

[0059] Figure 8 is a graph showing inductance achieved by the first inductor pattern and the sixth inductor pattern at each frequency;

[0060] Figure 9 is a graph showing capacitance of the second capacitor pattern at each frequency;

[0061] Figure 10 is a graph showing the insertion loss of a filter module according to a comparative example and the insertion loss of a filter module according to an embodiment;

[0062] Figure 11 is a diagram showing a connection structure of a filter module according to an embodiment;

[0063] Figure 12 is a block configuration diagram of an antenna module according to an embodiment of the present disclosure;

[0064] Figure 13 It shows Figure 12 A plan view of a portion of the antenna module shown in FIG.

[0065] Figure 14 yes Figure 13 A perspective view of a low-pass filter unit shown in FIG.

[0066] Figure 15 yes Figure 14 A side view of the low-pass filter unit shown in FIG.

[0067] Figure 16 is a diagram showing a circuit configuration of a low-pass filter according to the present disclosure;

[0068] Figure 17 yes Figure 14 An exploded perspective view of a low-pass filter unit shown in FIG.

[0069] Figure 18 It shows Figure 17 A diagram showing patterns of the first to fourth conductive layers of the low-pass filter unit shown in FIG.

[0070] Figure 19 It is along Figure 14A cross-sectional view taken along line AA in the low-pass filter unit shown in FIG.

[0071] Figure 20 It is along Figure 14 A cross-sectional view taken along line BB in the low-pass filter unit shown in ; and

[0072] Figure 21 is a graph illustrating operating characteristics of a low-pass filter unit of an antenna module according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0073] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0074] The technical spirit of the present disclosure is not limited to the embodiments to be described and can be implemented in various other forms, and one or more components can be selectively combined and replaced for use without departing from the scope of the technical spirit of the present disclosure.

[0075] In addition, unless specifically defined and clearly described, the terms (including technical terms and scientific terms) used in the embodiments of the present disclosure should be interpreted as having meanings that can be generally understood by ordinary technicians in the field to which the present disclosure belongs, and the meanings of commonly used terms such as terms defined in dictionaries should be interpreted in consideration of the context of the relevant technology.

[0076] In addition, the terms used in the embodiments of the present disclosure are used to illustrate the embodiments and are not intended to limit the present disclosure. In this specification, unless otherwise specifically stated in a phrase, a singular form may also include a plural form, and when "at least one (or one or more) of A, B or C" is stated, it may include one or more of all possible combinations of A, B and C.

[0077] In addition, when describing components of the embodiments of the present disclosure, terms such as "first," "second," "A," "B," "(a)," and "(b)" may be used. Such terms are used only to distinguish one component from another, and do not determine the nature, order, or procedure of the corresponding constituent elements.

[0078] In addition, when describing a component as being “connected,” “coupled,” or “engaged” to another component, the description may include not only being directly “connected,” “coupled,” or “engaged” to another component, but also being “connected,” “coupled,” or “engaged” through another component between the component and the other component.

[0079] In addition, when it is described that one component is formed or provided “above (upper)” or “below (lower)” another component, the description includes not only a case where the two components are in direct contact with each other, but also a case where one or more other components are formed or provided between the two components. In addition, when it is expressed as “above (upper)” or “below (lower)”, it can refer to a downward direction as well as an upward direction relative to an element.

[0080] Hereinafter, filter modules 10 and 10A according to embodiments will be described with reference to the accompanying drawings. For ease of description, a Cartesian coordinate system (x-axis, y-axis, z-axis) will be used to describe filter modules 10 and 10A, but other coordinate systems may also be used to describe filter modules 10 and 10A. In a Cartesian coordinate system, the x-axis, y-axis, and z-axis are perpendicular to each other, but embodiments are not limited thereto. That is, the x-axis, y-axis, and z-axis may intersect each other obliquely.

[0081] Figure 1 is a conceptual diagram schematically showing a filter module 10 according to an embodiment.

[0082] Figure 1 The filter module 10 shown in FIG may include a first ground (or reference potential) layer GL1, a second ground layer GL2, a first conductive pattern layer TL1, a second conductive pattern layer TL2, and a through hole VA. The first ground layer GL1, the second ground layer GL2, the first conductive pattern layer TL1, and the second conductive pattern layer TL2 may be referred to as a first layer, a second layer, a third layer, and a fourth layer, respectively.

[0083] The first ground layer GL1 and the second ground layer GL2 are disposed to be spaced apart from each other.

[0084] The first conductive pattern layer TL1 is disposed between the first ground layer GL1 and the second ground layer GL2 .

[0085] The second conductive pattern layer TL2 may be provided on one side of the first ground layer GL1 or the second ground layer GL2. Figure 1 As shown, the second conductive pattern layer TL2 may be disposed on the first ground layer GL1 .

[0086] As shown in the figure, the filter module 10 according to the embodiment may include a second conductive pattern layer TL2, a first ground layer GL1, a first conductive pattern layer TL1, and a second ground layer GL2 stacked on top of each other in a vertical direction (e.g., the z-axis direction). In other words, the second conductive pattern layer TL2 may be provided at the highest position within the filter module 10, the second ground layer GL2 may be provided at the lowest position within the filter module 10, and the first ground layer GL1 and the first conductive pattern layer TL1 may be provided in a stacked manner between the second conductive pattern layer TL2 and the second ground layer GL2.

[0087] The via VA may be provided between the first ground layer GL1, the second ground layer GL2, the first conductive pattern layer TL1, and the second conductive pattern layer TL2. The via may be formed in a groove or hole shape and may serve as an electrical signal connection path between layers.

[0088] The first conductive pattern layer TL1 includes a transmission line including patterns for implementing an inductor and a capacitor, and the second conductive pattern layer TL2 includes a transmission line including patterns for implementing an inductor. In this case, vias VA are used to vertically connect the inductor and capacitor of the first conductive pattern layer TL1 to the inductor of the second conductive pattern layer TL2. Furthermore, vias VA can also be used to vertically interconnect the first ground layer GL1, the second ground layer GL2, the first conductive pattern layer TL1, and the second conductive pattern layer TL2.

[0089] You can use the above reference Figure 1 The described filter module 10 implements a filter (eg, a bandpass filter) including various circuits.

[0090] Hereinafter, the Figure 1 The configuration and operation of the bandpass filter 10A according to the embodiment are realized by the filter module 10 shown in FIG. However, the present disclosure is not limited thereto. That is, Figure 1 The filter module 10 shown in FIG can also be implemented with Figure 2 The configuration or function of the bandpass filter 10A shown in FIG. 1 is different from that of the filter 10A.

[0091] Figure 2 It shows Figure 1 1 is a circuit diagram of an embodiment 10A of a filter module 10 shown in FIG.

[0092] Figure 2 The filter module 10A shown in FIG may include first, second, and third capacitors C1, C2, and C3, and first, second, third, fourth, fifth, and sixth inductors L1, L2, L3, L4, L5, and L6.

[0093] The first inductor L1 is connected between the first port P1 and the ground, and the sixth inductor L6 is connected between the second port P2 and the ground.

[0094] The second inductor L2 and the first capacitor C1 may be connected in series to each other between the first port P1 and the ground, and the fifth inductor L5 and the third capacitor C3 may be connected in series to each other between the second port P2 and the ground.

[0095] The third inductor L3 and the fourth inductor L4 may be connected in series with each other between the first port P1 and the second port P2. The second capacitor C2 may be connected between a node N between the third inductor L3 and the fourth inductor L4 and the ground.

[0096] In the following, reference will be made to Figures 3A to 6B Describe the implementation Figure 2 The bandpass filter shown in Figure 1 The configuration of the specific embodiment of the filter module 10 shown in FIG. However, the present disclosure is not limited thereto. In addition, the filter module 10 according to the embodiment will be described as being configured such that the second ground layer GL2, the first conductive pattern layer TL1, the first ground layer GL1 and the second conductive pattern layer TL2 are sequentially stacked on top of each other from bottom to top, as shown in FIG. Figure 1 However, the present disclosure is not limited thereto.

[0097] Figure 3A and Figure 3B They are Figure 1 1 and 2 are perspective views and plan views of the second conductive pattern layer TL2 shown in FIG. Figure 4A and Figure 4B They are Figure 1 , a perspective view and a plan view of the first ground layer GL1 are shown in FIG. Figure 5A and Figure 5B They are Figure 1 2 and 3. A perspective view and a plan view of the first conductive pattern layer TL1 are shown in FIG. Figure 6A and Figure 6B They are Figure 1 A perspective view and a plan view of the second ground layer GL2 are shown in FIG.

[0098] Reference Figure 3A and Figure 3B The second conductive pattern layer TL2 includes a first body B1 and a second inductor pattern. The first body B1 includes a first opening OP1. The first body B1 can be connected to ground. In this specification, the opening can be an area where no conductive material is provided by etching, etc., and the body can be a grounding area, which is a relatively wide area.

[0099] The second inductor pattern may be provided in the first opening OP1 and may be formed to include an inductor. That is, the second conductive pattern layer TL2 may be formed using a transmission line. Figure 2 , the inductance of each of the third inductor L3 and the fourth inductor L4 shown in FIG. In this case, if the width of the transmission line is too large, the total length of the third inductor L3 and the fourth inductor L4 may increase, and thus the size of the product may increase. Therefore, the line is made to have a small width. The line width will be described in detail later.

[0100] For example, the second inductor pattern may include a third inductor pattern LP3 and a fourth inductor pattern LP4.

[0101] The third inductor pattern LP3 may include a 3-1st inductor pattern LP31 and a 3-2nd inductor pattern LP32, the 3-1st inductor pattern LP31 being arranged to interconnect the first via VA1 and the fifth via VA5 to form a 3-1st inductor, and the 3-2nd inductor pattern LP32 being arranged to interconnect the fifth via VA5 and the sixth via VA6 to form a 3-2nd inductor. The third inductor composed of the 3-1st inductor and the 3-2nd inductor corresponds to Figure 2 The third inductor L3 is shown in FIG.

[0102] The fourth inductor pattern LP4 may be provided to interconnect the sixth via VA6 and the third via VA3 to form a fourth inductor. The fourth inductor formed by the fourth inductor pattern LP4 corresponds to Figure 2 The fourth inductor L4 is shown in FIG.

[0103] The first to fifth to sixth and third vias VA1 , VA5 , VA6 , and VA3 , and the third and fourth inductor patterns LP3 and LP4 disposed in the first opening OP1 are spaced apart from the first body B1 .

[0104] Figure 3B The first port P1 and the second port P2 shown in FIG correspond to Figure 2 . The first port P1 and the second port P2 shown in . The first port P1 can be an input port Rx, and the second port P2 can be an output port Tx. Alternatively, the first port P1 can be an output port Tx, and the second port P2 can be an input port Rx. For example, the first port P1 can be connected to an IC pad (not shown), and the second port P2 can be connected to a Bluetooth (BT) antenna (not shown). Alternatively, the first port P1 can be connected to a Bluetooth antenna, and the second port P2 can be connected to an IC pad. However, the present disclosure is not limited thereto.

[0105] Reference Figure 4A and Figure 4B The first ground layer GL1 includes a second body B2 including a second opening OP2. The second body B2 is connected to a ground or reference potential. The second opening OP2 can be arranged to overlap with the first opening OP1 in the z-axis direction, which is the vertical direction. Therefore, the first through-hole VA1, the fifth through-hole VA5, the sixth through-hole VA6, and the third through-hole VA3, which are arranged in the first opening OP1 and spaced apart from the first body B1, can be arranged to be spaced apart from the second body B2.

[0106] If the first ground layer GL1 does not include the second opening OP2 and is ground-shielded, the pattern can be implemented on the first conductive pattern layer TL1 without interference. However, the length of the line for implementing the third inductor pattern LP3 and the fourth inductor pattern LP4 may increase. For this reason, Figure 4B As shown in FIG, a second opening OP2 is formed in the first ground layer GL1 to realize a coplanar waveguide structure.

[0107] Reference Figure 5A and Figure 5B , the first conductive pattern layer TL1 includes a capacitor pattern and a first inductor pattern.

[0108] The capacitor pattern is formed to include capacitors while facing at least one of the first ground layer GL1 or the second ground layer GL2. In an embodiment, the capacitor pattern is formed to face both the first ground layer and the second ground layer.

[0109] The first inductor pattern is formed to include an inductor.

[0110] The capacitance pattern may include a first capacitor pattern CP1 , a second capacitor pattern CP2 , and a third capacitor pattern CP3 .

[0111] The first capacitor pattern CP1, the second capacitor pattern CP2 and the third capacitor pattern CP3 form a first capacitor, a second capacitor and a third capacitor, respectively. In this case, the first capacitor, the second capacitor and the third capacitor may correspond to Figure 2 The first capacitor C1, the second capacitor C2 and the third capacitor C3 shown in FIG.

[0112] The first capacitor pattern CP1 may be disposed to be spaced apart from one side of the second capacitor pattern CP2, and the third capacitor pattern CP3 may be disposed to be spaced apart from the opposite side of the second capacitor pattern CP2. Each of the first capacitor pattern CP1 and the third capacitor pattern CP3 is shown to have a rectangular planar shape, but the present disclosure is not limited to any particular planar shape of the pattern.

[0113] According to an embodiment, the second capacitor pattern CP2 may include a plurality of stubs. For example, the second capacitor pattern CP2 may include a first stub CP21, a second stub CP22, and a third stub CP23. The second stub CP22 and the third stub CP23 may be disposed on both sides of the first stub CP21, wherein the first stub CP21 is interposed between the second stub CP22 and the third stub CP23. In other words, the second stub CP22 may be disposed on one side of the first stub CP21, and the third stub CP23 may be disposed on the opposite side of the first stub CP21.

[0114] The sixth via VA6 connected between the third inductor pattern LP3 and the fourth inductor pattern LP4 may be connected to the second capacitor pattern CP2 in a vertical direction.

[0115] The first inductor pattern may include a first inductor pattern LP1 , a second inductor pattern LP2 , a fifth inductor pattern LP5 , and a sixth inductor pattern LP6 .

[0116] The first inductor pattern LP1 may be provided to interconnect the first via VA1 and the second via VA2 to form a first inductor. Here, the first inductor corresponds to Figure 2 The first inductor L1 is shown in FIG.

[0117] The second inductor pattern LP2 may be provided to interconnect the first via VA1 and the first capacitor pattern CP1 to form a second inductor. Here, the second inductor corresponds to Figure 2 The second inductor pattern LP2 may be connected to the third inductor pattern LP3 through the first via VA1.

[0118] The fifth inductor pattern LP5 may be provided to interconnect the third via VA3 and the third capacitor pattern CP3 to form a fifth inductor. Here, the fifth inductor corresponds to Figure 2 The fifth inductor L5 is shown in FIG.

[0119] The sixth inductor pattern LP6 may be provided to interconnect the third via VA3 and the fourth via VA4 to form a sixth inductor. Here, the sixth inductor corresponds to Figure 2 The sixth inductor L6 is shown in FIG.

[0120] The fifth and sixth inductor patterns LP5 and LP6 may be connected to the fourth inductor pattern LP4 through third vias VA3 .

[0121] According to an embodiment, the first inductor pattern or the second inductor pattern may have a planar shape bent at least once in a horizontal direction. Figure 5B As shown, each of the first and sixth inductor patterns LP1 and LP6 may have a plan shape bent twice in a horizontal direction, and each of the second and fifth inductor patterns LP2 and LP5 may have a plan shape bent once in the horizontal direction.

[0122] Reference Figure 6A and Figure 6B The second ground layer GL2 includes a third body B3. The third body B3 may be connected to the ground.

[0123] Figure 3B 、 Figure 4B and Figure 6BEach of the above-mentioned bodies B1, B2 and B3 shown in FIG can be made of a conductive material, and Figure 5B The capacitor pattern and the first inductor pattern shown in Figure 3B Each of the second inductor patterns shown in can also be made of a conductive material.

[0124] Reference Figure 4B and Figure 6B Each of the body B2 of the first ground layer GL1 and the body B3 of the second ground layer GL2 may include a third opening OP3 into which the shield case is inserted. Alternatively, the third opening OP3 may be omitted.

[0125] In addition, among the first through hole VA1 to the fifteenth through hole VA15, through holes other than the first through hole VA1, the third through hole VA3, the fifth through hole VA5 and the sixth through hole VA6 can also be used to interconnect the second conductive pattern layer TL2, the first ground layer GL1, the first conductive pattern layer TL1 and the second ground layer GL2 in the vertical direction.

[0126] Each of the first to fifteenth through holes VA1 to VA15 may be made of a conductive material. Figure 3B 、 Figure 4B and Figure 5B In each of the , the portion having the annular planar shape is a conductor area corresponding to the through hole.

[0127] The conductive material mentioned above may be copper (Cu), but the present disclosure is not limited to any particular material.

[0128] also, Figure 3B 、 Figure 4B 、 Figure 5B and Figure 6B The portion indicated by the white background in the figure and the first opening OP1 and the second opening OP2 may be filled with a dielectric material (or dielectric) EM. The dielectric material may also be filled between the second conductive pattern layer TL2 and the first ground layer GL1, between the first ground layer GL1 and the first conductive pattern layer TL1, and between the first conductive pattern layer TL1 and the second ground layer GL2.

[0129] Since the line width of each of the first to sixth inductor patterns LP1, LP2, LP3, LP4, LP5, and LP6 is reduced, its length can be designed to be shorter. With this in mind, according to embodiments, when the line width of each of the first to sixth inductor patterns LP1, LP2, LP3, LP4, LP5, and LP6 is greater than 250 μm, the efficiency of the inductor may decrease. Therefore, the line width of each of the first to sixth inductor patterns LP1, LP2, LP3, LP4, LP5, and LP6 may be 250 μm or less, but the present disclosure is not limited thereto.

[0130] On the other hand, when the line width of each of the first and third capacitor patterns CP1 and CP3 is less than 300 μm, the efficiency of the capacitor may be reduced. Therefore, according to an embodiment, the line width of each of the first and third capacitor patterns CP1 and CP3 may be 300 μm or greater, but the present disclosure is not limited thereto.

[0131] The length of each of the first to sixth inductor patterns LP1, LP2, LP3, LP4, LP5, and LP6 may be equal to or less than one eighth of the wavelength of a fundamental frequency (eg, 2.4 GHz) at which insertion loss is zero.

[0132] For example, the length of each of the first to sixth inductor patterns LP1, LP2, LP3, LP4, LP5, and LP6 may be the length thereof defined between the through holes. Figure 3B The length of the 3-1st inductor pattern LP31 disposed between the first and fifth vias VA1 and VA5 can be equal to or less than one-eighth of the wavelength of the fundamental frequency (e.g., 2.4 GHz), and the length of the 3-2nd inductor pattern LP32 disposed between the fifth and sixth vias VA5 and VA6 can be equal to or less than one-eighth of the wavelength of the fundamental frequency (e.g., 2.4 GHz). Furthermore, the length of each of the first and third capacitor patterns CP1 and CP3 in each of the x-axis and y-axis directions can also be equal to or less than one-eighth of the wavelength of the fundamental frequency (e.g., 2.4 GHz). For example, the length of each of the first to sixth inductor patterns LP1, LP2, LP3, LP4, LP5, and LP6, and the first and third capacitor patterns CP1 and CP3 can be 4.5 mm or less.

[0133] An area of ​​each of the first to sixth inductor patterns LP1 to LP6 and the first to third capacitor patterns CP1 , CP2 , and CP3 depends on the length and line width thereof.

[0134] Hereinafter, the operation of the filter module 10 or 10A according to the embodiment will be described with reference to the accompanying drawings. Figures 3A to 6B The configuration shown in Figure 2 The bandpass filter shown in .

[0135] Figure 7 is a graph showing the insertion loss of the filter module 10A according to the embodiment at each frequency, wherein the horizontal axis represents frequency and the vertical axis represents insertion loss.

[0136] Figure 8 is a graph illustrating inductance implemented by the first and sixth inductor patterns LP1 and LP6 at each frequency, wherein the horizontal axis represents frequency and the vertical axis represents inductance.

[0137] The line width and length of each of the first and sixth inductor patterns LP1 and LP6 may be adjusted so that the self-resonant frequency (SRF) of the first inductor pattern LP1 becomes f1, which is the second-order harmonic frequency of the Bluetooth antenna or Wi-Fi signal (see Figure 7 ), and makes the self-resonant frequency (SRF) of the sixth inductor pattern LP6 become f2, which is the second-order harmonic frequency of the Bluetooth antenna or Wi-Fi signal (see Figure 8 ). Here, when the fundamental frequency is 2.4 GHz, the transmission zero frequency f1 may be 4.8 GHz, and the transmission zero frequency f2 may be 5 GHz or 5.5 GHz. For this purpose, the line width may be 80 μm to 200 μm, and the length may be a quarter of the wavelength at 4.8 GHz. The point at which the transfer function of the first inductor L1, the second inductor L2, and the first capacitor C1 becomes zero corresponds to Figure 7 and Figure 8 , and the point at which the transfer function of the fifth inductor L5, the sixth inductor L6, and the third capacitor C3 becomes zero corresponds to Figure 7 and Figure 8 "f2" shown in .

[0138] Furthermore, the first inductor L1 and the sixth inductor L6 may also serve to remove low-frequency noise such as a DC component, and may also serve to perform impedance matching.

[0139] The second inductor L2 implemented by the second inductor pattern LP2 and the first capacitor C1 implemented by the first capacitor pattern CP1 create a transmission zero at the resonant frequency. Similarly, the fifth inductor L5 implemented by the fifth inductor pattern LP5 and the third capacitor C3 implemented by the third capacitor pattern CP3 create a transmission zero at the resonant frequency. Embodiments can be designed so that the resonant frequency is the second-order harmonic frequency of the Bluetooth antenna or Wi-Fi antenna.

[0140] Figure 9 is a graph showing capacitance of the second capacitor pattern CP2 at each frequency, wherein the horizontal axis represents frequency and the vertical axis represents capacitance.

[0141] The third inductor L3 implemented by the third inductor pattern LP3, the fourth inductor L4 implemented by the fourth inductor pattern LP4, and the second capacitor C2 implemented by the second capacitor pattern CP2 generate a transmission zero at the resonant frequency. The third inductor L3, the fourth inductor L4, and the second capacitor C2 can determine the bandwidth of the filter.

[0142] When the second capacitor C2 is designed as a parasitic component, there are two complete matching poles in the passband, and when the second capacitor C2 is designed as a resonator, there are three complete matching poles in the passband.

[0143] The second capacitor C2 may have a configuration consisting of three stubs. Figure 9 By combining the 2-1st capacitor C21 implemented by the first stub CP21, the 2-2nd capacitor C22 implemented by the second stub CP22, and the 2-3rd capacitor C23 implemented by the third stub CP23, the second capacitor C2 can be implemented to have a transmission zero at the frequency f3. Figure 9 , the resonance point f4 of the 2-1st capacitor C21 may be 9.6 GHz, the resonance point f5 of the 2-3rd capacitor C23 may be 12 GHz, the resonance point f6 of the 2-2nd capacitor C22 may be 14.4 GHz, and the total resonance point f3 of the second capacitor C2 may be 7.2 GHz.

[0144] The second capacitor C2 may have a configuration in which three resonators are combined, and may be designed so that its self-resonant frequency falls within a harmonic frequency of 2.4 GHz to 2.5 GHz. A plurality of resonators may be combined as needed.

[0145] Hereinafter, a filter module according to a comparative example and a filter module according to an embodiment will be described with reference to the accompanying drawings.

[0146] Figure 10 2 is a graph illustrating an insertion loss 200 of a filter module according to a comparative example and an insertion loss 210 of a filter module according to an embodiment, wherein the horizontal axis represents frequency and the vertical axis represents insertion loss.

[0147] Reference Figure 10 , the filter module 210 according to the embodiment has a passband of 2.4 GHz to 2.5 GHz, and a 3 dB bandwidth of 2.2 GHz to 3.2 GHz.

[0148] The filter module 200 of the comparative example uses capacitors or inductors as lumped elements to form a bandpass filter. Figure 10 It can be seen that, compared with the comparative example 200, the embodiment 210 exhibits an excellent isolation effect of at least -30 dB in the harmonic generation portion greater than 4.8 GHz.

[0149] In an embodiment, since each of the first inductor pattern LP1, the second inductor pattern LP2, the third inductor pattern LP3, the fifth inductor pattern LP5 and the sixth inductor pattern LP6 is formed to be bent at least once in the horizontal direction, a sufficient length thereof can be ensured in a limited space, and therefore, each of the inductors L1, L2, L3, L5 and L6 can be designed to include a desired inductance.

[0150] Furthermore, the filter module 10 or 10A according to the embodiment can reduce harmonic components other than the original signal caused by an oscillator (not shown) and a mixer (not shown) in the IC.

[0151] Furthermore, the filter module 10 or 10A according to the embodiment can improve impedance matching with respect to the transmission line by controlling the poles, thereby reducing insertion loss. That is, since impedance matching is improved when an antenna or element is connected to the first port P1 and the second port P2, the efficiency of the antenna can be improved, and thus the transmission distance and transmission rate can be increased.

[0152] The filter module of the comparative example uses capacitors or inductors as lumped elements to form a bandpass filter and is provided with a separate transmission line, resulting in large insertion loss. In contrast, according to the embodiment, since the bandpass filter is formed by inductors L3 and L4 implemented using transmission lines, the wavelength can be shortened, thereby improving group delay. As a result, the signal distortion rate can be reduced.

[0153] Therefore, in the filter module 10 or 10A according to the embodiment, the second conductive pattern layer TL2 is designed to be combined with the transmission line to minimize signal distortion. In addition, since the component for blocking harmonic components is located between the first ground layer GL1 and the second ground layer GL2 in a shielded state, noise can be easily removed by grounding without causing it to radiate. That is, since the embodiment is designed so that a signal with a main frequency of 2.4 GHz to 2.5 GHz is directly connected to the existing transmission line, impedance matching can be improved, insertion loss can be reduced, and signal distortion can be minimized. In addition, the blocked signal can be made to flow to the ground, thereby preventing it from being reintroduced or radiated.

[0154] The filter module according to the embodiment can be modularized and can be applied to communication devices or filters for communication devices (for example, such as organic light emitting diode (OLED) TVs, Wi-Fi / BT combination modules, multi-antenna systems, and repeaters for LTE / Wi-Fi 5G and 6G).

[0155] To help understand the implementation, Figure 11 : is a diagram showing a connection structure of a filter module according to an embodiment. Although it has been described above, in order to help understand the embodiment, Figure 11 The conductive pattern connection structure is shown in FIG.

[0156] Figure 12 is a block configuration diagram of an antenna module according to an embodiment of the present disclosure. Figure 13 It shows Figure 12 A plan view of a portion of the antenna module is shown in FIG. Figure 14 yes Figure 13 A perspective view of the low-pass filter unit shown in FIG. Figure 15 yes Figure 14 Side view of the low-pass filter unit shown in . Figure 16 is a diagram showing a circuit configuration of a low-pass filter according to the present disclosure. Figure 17 yes Figure 14 An exploded perspective view of the low-pass filter unit shown in FIG. Figure 18 It shows Figure 17 , which is a diagram showing patterns of the first to fourth conductive layers of the low-pass filter unit. Figure 19 It is along Figure 14 sectional view taken along line AA in the low-pass filter unit shown in . Figure 20 It is along Figure 14 sectional view taken along line BB in the low-pass filter unit shown in . Figure 21 is a graph illustrating operating characteristics of a low-pass filter unit of an antenna module according to an embodiment of the present disclosure.

[0157] Reference Figure 12 The antenna module includes a first antenna 210 configured to send and receive a first high-frequency signal, a low-pass filter unit 100 connected to transmission lines 251 and 252 of the first antenna 210, a second antenna 220 configured to send and receive a second high-frequency signal, and a communication signal processor 200 configured to generate and process transmission / reception signals of the first antenna 210 and the second antenna 220.

[0158] The first antenna 210 may be implemented as a Bluetooth antenna, the second antenna 220 may be implemented as a Wi-Fi antenna, and the communication signal processor 200 may be implemented as a WiFi module.

[0159] The first high-frequency signal includes, for example, a Bluetooth signal in the frequency band of 2402 MHz to 2480 MHz. The second high-frequency signal includes, for example, a Wi-Fi signal in the frequency band of 2400 MHz to 2483 MHz and a frequency band of 5 GHz to 6 GHz. Here, the first high-frequency signal uses a channel that overlaps with the low-frequency band of the second high-frequency signal (for example, 2402 MHz to 2480 MHz), but does not use a channel that overlaps with the high-frequency band of the second high-frequency signal (for example, 5 GHz to 6 GHz).

[0160] like Figures 13 to 15 As shown, the low-pass filter unit 100 can be connected to the transmission lines 251 and 252 between the first antenna 210 and the communication signal processor 200. The low-pass filter unit 100 can pass the low frequency band and filter the high frequency band. The low-pass filter unit 100 can be connected between the first transmission line 251 connected to the first antenna 210 and the second transmission line 252 connected to the communication signal processor 200. The first transmission line 251 and the second transmission line 252 are feed lines for feeding signals.

[0161] The low-pass filter unit 100 can form a resonant circuit using an inductor and a capacitor, and the inductor and the capacitor can be implemented by patterns of conductive layers and dielectric layers rather than by passive components. In this way, since passive components are not used, the cost of manufacturing the low-pass filter unit 100 and its size can be reduced.

[0162] The first antenna 210 and the second antenna 220 may be coupled to the board 250. The first antenna 210 may be coupled to the coupling portion 255 of the board 250, and the coupling portion 255 may be a coupling hole into which the lower coupling protrusion of the first antenna 210 is fitted. Any one of the coupling portions 255 of the board 250 may be connected to the first transmission line 251. The low-pass filter unit 100 may be embedded in the board 250 of the communication signal processor 200. The board 250 may be a multilayer board including a plurality of conductive layers.

[0163] like Figure 16 As shown, the circuit configuration of the low-pass filter unit 100 is implemented as a passive filter, which includes a first input / output port and a second input / output port configured to send and receive signals. One end of the first capacitor C1 is connected in parallel to a first branch node N1 connected to the first input / output port, and the other end of the first capacitor C1 is grounded. One end of the first inductor L1 is connected in series to the first branch node N1, and a third branch node N3 is connected to the other end of the first inductor L1. One end of the second inductor L2 is connected in parallel to the third branch node N3, and the other end of the second inductor L2 is grounded.

[0164] One end of the third inductor L3 is connected in parallel to the second branch node N2 connected to the second input / output port, one end of the second capacitor C2 is connected in series to the other end of the third inductor L3, and the other end of the second capacitor C2 is grounded. The second branch node N2 is connected in series to the third branch node N3.

[0165] The first input / output port can be connected to the first transmission line 251 or formed integrally therewith. The second input / output port can be connected to the second transmission line 252 or formed integrally therewith. The low-pass filter unit 100 passes a first frequency band (e.g., 2400 MHz to 2483 MHz) transmitted to the first input / output port and the second input / output port, and filters a second frequency band (e.g., 5 GHz to 6 GHz).

[0166] The first to third inductors L1, L2, and L3 may include different inductances within a range of 0.5 nH to 4 nH. For example, the first inductor L1 may include an inductance of 1.3 nH ± 0.2 nH, the second inductor L2 may include an inductance of 2.7 nH ± 0.2 nH, and the third inductor L3 may include an inductance of 1.5 nH ± 0.2 nH. The first capacitor C1 and the second capacitor C2 may include different capacitances within a range of 0.3 pF to 2.5 pF. For example, the first capacitor C1 may include a capacitance of 0.9 pF ± 0.05 pF, and the second capacitor C2 may include a capacitance of 0.5 pF ± 0.01 pF.

[0167] like Figure 14 、 Figure 15 and Figures 17 to 20 As shown, the low-pass filter unit 100 may be Figure 13 The portion of the plate 250 shown in FIG, or may be a plate region embedded in the plate 250 .

[0168] The low-pass filter unit 100 may include a plurality of conductive layers 110, 120, 130, and 140 and a plurality of dielectric layers 151, 152, and 153 respectively disposed between the plurality of conductive layers 110, 120, 130, and 140. Each of the plurality of conductive layers 110, 120, 130, and 140 may be made of copper, or may include a copper layer and at least one plating layer stacked on a surface of the copper layer. The plating layer may include at least one of nickel, gold, tin, lead, palladium, silver, or a mixture thereof.

[0169] The dielectric layers 151, 152, and 153 may include an insulating material, such as at least one of FR-4, CEM-1, RF-35, Teflon, polyimide, or polytetrafluoroethylene (PTFE). The dielectric layers 151, 152, and 153 may include a capacitor dielectric, such as Ta2O5, BaO4SrTi, TiO2, BaO, Al2O3, PbO, CaO, or B2O3.

[0170] The plurality of conductive layers 110, 120, 130, and 140 may include first to fourth conductive layers 110, 120, 130, and 140 stacked in a direction from the upper surface of the board 250 toward the lower surface of the board 250. The plurality of dielectric layers 151, 152, and 153 may include first to third dielectric layers 151, 152, and 153 respectively disposed between the first to fourth conductive layers 110, 120, 130, and 140. The first dielectric layer 151 and the second dielectric layer 152 may include the above-mentioned dielectric of the capacitor, and the thickness of the second dielectric layer 152 may be greater than the thickness of the first dielectric layer 151. For example, the first and third dielectric layers 151 and 153 may be formed to have a thickness of 300 μm or less (eg, 100 μm to 300 μm), and the second dielectric layer 152 may be formed to have a thickness of 300 μm or more (eg, 300 μm to 500 μm).

[0171] A first dielectric layer 151 is disposed between the first conductive layer 110 and the second conductive layer 120, a second dielectric layer 152 is disposed between the second conductive layer 120 and the third conductive layer 130, and a third dielectric layer 153 is disposed between the third conductive layer 130 and the fourth conductive layer 140. The first conductive layer 110 may be exposed on the upper surface of the board, and the fourth conductive layer 140 may be exposed on the lower surface of the board.

[0172] like Figure 14 and Figure 15 As shown, the low-pass filter unit 100 can be formed so that the width between its first side S1 and its third side S3 is less than the length between its second side surface S2 and its fourth side surface S4. Therefore, the long conductive pattern of the inductor can be arranged to extend from the second side surface S2 toward the fourth side surface S4 along the first direction (length direction). In addition, the short conductive pattern of the inductor can be arranged to extend from the first side surface S1 toward the third side surface S3 along the second direction (width direction). The first conductive layer 110 can be exposed on the upper surface of the board, and the fourth conductive layer 140 can be exposed on the lower surface of the board. As shown Figure 15 As shown, a portion of the pattern 132 of the second conductive layer 140 may be exposed on the third side surface S3 .

[0173] like Figure 15 and Figure 17As shown, the first conductive layer 110 may include a first pattern 111, a second pattern 112 and a third pattern 119, the second conductive layer 120 may include a ground pattern 121, the third conductive layer 130 may include a fourth pattern 131 and a fifth pattern 132 spaced apart from each other, and the fourth conductive layer 140 may include a sixth pattern 141 and a seventh pattern 142 connected to each other via a second through hole V2.

[0174] The first pattern 111 and the second pattern 112 of the first conductive layer 110 are connected to the first through-hole V1 and the second through-hole V2 spaced apart from each other in the first direction. The first pattern 111 is a polygonal plate-shaped pattern, and the second pattern 112 is a linear pattern having a smaller width than the plate-shaped pattern. The first pattern 111 includes the first through-hole V1 therein and is connected to one end of the second pattern 112, and the other end of the second pattern 112 is connected to the second through-hole V2. The second pattern 112 has a curved structure, for example, a structure that is bent two or more times or three or more times. The second pattern 112 can increase or decrease the value of the inductance according to its curved shape and length. The second pattern 112 (L1) can have a length of 0.5 mm to 3 mm. Here, the length of the second pattern 112 (L1) is the length extending from one end thereof to the other end thereof. The second pattern 112 (L1) can have a width of 10 μm to 200 μm.

[0175] The first pattern 111 is connected to the second pattern 112 at one end and to the first input / output pattern 113 at the other end, and the second pattern 112 and the second through hole V2 are connected to the second input / output pattern 114. The first input / output pattern 113 and the second input / output pattern 114 are the first input / output port and the second input / output port. The second through hole V2 may include a circular pattern on its periphery, and the diameter of the circular pattern may be greater than the width of the second pattern 112.

[0176] The third pattern 119 may be a plate-shaped pattern including a third through hole V3 and may be spaced apart from the first pattern 111 and the second pattern 112. The third pattern 119 may have a polygonal shape. The third through hole V3 may include a hemispherical pattern formed on one side of its periphery. The area of ​​the upper surface of the third pattern 119 may be smaller than the area of ​​the upper surface of the first pattern 111. The third through hole V3 may be arranged between the fifth through hole V5 and the seventh through hole V7 in the first direction and may be positioned closer to the seventh through hole V7 than the fifth through hole V5.

[0177] The patterns 115, 116, 117, and 118 including the fifth to eighth through holes V5 to V8 are disposed at respective corners of the first conductive layer 110 and are physically spaced apart from the first to third patterns 111, 112, and 119. In the first conductive layer 110, the patterns 115, 116, 117, and 118 including the fifth to eighth through holes V5 to V8 may have a polygonal shape.

[0178] like Figure 17 and Figure 18 As shown, the second conductive layer 120 includes a ground pattern 121. The ground pattern 121 is provided with a first circular pattern P1 connected to the first via V1, a second circular pattern P2 connected to the second via V2, and a third circular pattern P3 connected to the third via V3.

[0179] The first to third circular patterns P1, P2, and P3 may be spaced apart from the ground pattern 121 by predetermined gaps Q1, Q2, and Q3, respectively. Each of the first to third circular patterns P1, P2, and P3 is not physically connected to the ground pattern 121.

[0180] The ground pattern 121 is connected to the fifth to eighth vias V5 to V8 . The upper surface area of ​​the ground pattern 121 may be greater than that of the first conductive layer 110 or the third conductive layer 130 .

[0181] The third conductive layer 130 includes a fourth pattern 131 connected to the first via V1 and a fifth pattern 132 connected to the second via V2 and the third via V3. The fourth pattern 131 and the first pattern 111 of the first conductive layer 110 face each other, with the ground pattern 121 interposed therebetween. The upper surface of the fourth pattern 131 may be larger than the upper surface of the first pattern 111.

[0182] The second through hole V2 provided in the fifth pattern 132 may include a fourth circular pattern P4, and the fourth circular pattern P4 may be spaced apart from the fifth pattern 132 by a predetermined gap Q4. The fourth circular pattern P4 is not physically connected to the fifth pattern 132. The fifth pattern 132 may be connected to the third pattern 119 at its inner side. The fifth pattern 132, the second pattern 112, and the third pattern 119 face each other, with the ground pattern 121 interposed therebetween.

[0183] The fourth pattern 131 and the fifth pattern 132 may be implemented as polygonal plate patterns. The area of ​​the upper surface of the fourth pattern 131 may be larger than the area of ​​the upper surface of the first pattern 111, and may be larger than the area of ​​the upper surface of the fifth pattern 132. In addition, the area of ​​the upper surface of the fifth pattern 132 may be larger than the area of ​​the upper surface of the first pattern 111. Here, the polygonal shape may include a quadrilateral shape.

[0184] The fifth through holes V5 to the eighth through holes V8 may be provided at respective corners of the third conductive layer 130. The fifth through holes V5 to the eighth through holes V8 of the third conductive layer 130 may include a circular pattern. Figure 19 and Figure 20 As shown, gaps Q1 , Q2 , Q3 , and Q4 may be filled with material of a dielectric layer.

[0185] The fourth conductive layer 140 includes a sixth pattern 141 and a seventh pattern 142. The sixth pattern 141 and the seventh pattern 142 are connected to each other via the second through hole V2. The sixth pattern 141 is a line pattern extending between the second through hole V2 and the sixth through hole V6. The sixth pattern 141 can be formed into a line shape having a structure with two or more bends. For example, the sixth pattern 141 can be formed into a line shape having a structure with four or more bends.

[0186] The total length of the sixth pattern 141 may be greater than the total length of the second pattern 112. The number of bends in the sixth pattern 141 may be greater than the number of bends in the second pattern 112, for example, two or more. The sixth pattern 141 (L2) has a length (total length) of 3 mm to 10 mm. The sixth pattern 141 (L2) has a width of 10 μm to 200 μm.

[0187] The seventh pattern 142 is a line pattern connecting the second through hole V2 and the third through hole V3. The seventh pattern 142 can be formed into a line shape having a structure that is bent once or more. For example, the seventh pattern 142 can be formed into a line shape having a structure that is bent two or three times or more. The seventh pattern 142 (L3) has a length (total length) of 0.5 mm to 3 mm. The seventh pattern 142 (L3) has a width of 10 μm to 200 μm.

[0188] The fifth to eighth through holes V5 to V8 may be disposed at respective corners of the fourth conductive layer 140. The fifth to eighth through holes V5 to V8 of the fourth conductive layer 140 may include a circular pattern.

[0189] Here, the first capacitor C1 may include a first capacitor and a second capacitor. The first capacitor is generated between the first pattern 111 of the first conductive layer 110 and the first circular pattern P1 of the second conductive layer 120 via the first dielectric layer 151, and the second capacitor is generated between the first circular pattern P1 and the fourth pattern 131 via the second dielectric layer 152. The first pattern 111 of the first conductive layer 110 and the fourth pattern 131 of the third conductive layer 130 may serve as two electrode terminals of the first capacitor. The first capacitor and the second capacitor may be connected in series.

[0190] Here, the first inductor L1 is implemented as a second pattern 112 connected between the first pattern 111 and the second via V2. The inductance value of the first inductor L1 may vary depending on the length and / or area of ​​the second pattern 112. Each of the second pattern 112, the sixth pattern 116, and the seventh pattern 117 may be a line pattern for an inductor.

[0191] The second inductor L2 is implemented as a linear sixth pattern 141 connected between the second via V2 and the sixth via V6 of the fourth conductive layer 140. The inductance value of the second inductor L2 may vary depending on the length and / or area of ​​the sixth pattern 141. The second inductor L2 may be connected to the ground pattern 121 via the sixth via V6. The inductance value of the sixth pattern 141 may be greater than the inductance value of the second pattern 112.

[0192] The third inductor L3 is implemented as a linear seventh pattern 142 connected between the second via V2 and the third via V3. The inductance value of the third inductor L3 may vary depending on the length and / or area of ​​the seventh pattern 142. The inductance value of the seventh pattern 142 may be greater than the inductance value of the second pattern 112.

[0193] The second capacitor C2 can be formed to be connected to the fifth pattern 132, the third circular pattern P3 and the third pattern 119 via the third through-hole V3 connected to the seventh pattern 142. In this case, the second capacitor C2 may include a third capacitor and a fourth capacitor, the third capacitor being generated between the third pattern 119 and the third circular pattern P3 through the first dielectric layer 151, and the fourth capacitor being generated between the third circular pattern P3 and the fifth pattern 132 through the second dielectric layer 152. In addition, the second capacitor C2 may include a fifth capacitor and a sixth capacitor, the fifth capacitor being generated between the second through-hole V2 and the second circular pattern P2 through the first dielectric layer 151, and the sixth capacitor being generated between the second circular pattern P2 and the fourth circular pattern P4 through the second dielectric layer 152. The third capacitor and the fourth capacitor may be connected in series with each other, and the fifth capacitor and the sixth capacitor may be connected in series with each other. The third capacitor and the fifth capacitor may be connected in parallel with each other, and the fourth capacitor and the sixth capacitor may be connected in parallel with each other. Therefore, the second capacitor C2 may include third to sixth capacitances due to the patterns of the first and second dielectric layers 151 and 152 , and may be connected in series to the seventh pattern 142 .

[0194] Since the first pattern 111 has a larger area than the third pattern 119 and the fourth pattern 131 has a larger area than the fifth pattern 132 , the capacitance value of the second capacitor C2 may be smaller than the capacitance value of the first capacitor C1 .

[0195] like Figure 19 As shown, the first pattern 111 , the first circular pattern P1 , and the fourth pattern 131 are connected to the first through hole V1 , and the second pattern 112 , the second circular pattern P2 , the fourth circular pattern P4 , and the sixth pattern 141 are connected to the second through hole V2 .

[0196] like Figure 20 As shown, the third pattern 119, the third circular pattern P3, the fifth pattern 132, and the seventh pattern 142 are connected to the third through-hole V3. The fifth through-hole V5 is connected to the ground pattern 121 and is connected to the through-hole patterns of the first conductive layer 110, the third conductive layer 130, and the fourth conductive layer 140. The fifth through-hole V5 may not be connected to the through-hole patterns of the third conductive layer 130 and the fourth conductive layer 140. That is, the fifth through-hole V5, the seventh through-hole V7, and the eighth through-hole V8 of the third conductive layer and the fourth conductive layer may be patterns arranged to support the portion between two dielectric layers. The seventh through-hole V7 is connected to the ground pattern 121 and is connected to the through-hole patterns of the first conductive layer 110, the third conductive layer 130, and the fourth conductive layer 140.

[0197] The first to third branch nodes N1 , N2 , and N3 may be formed by first to third through holes V1 , V2 , and V3 , respectively, provided in the low-pass filter unit 100 .

[0198] As another example of the present disclosure, the arrangement positions of the conductive layer and the dielectric layer may be set to Figure 17 For example, the pattern of the first conductive layer 110 can be set on the fourth conductive layer, the pattern of the second conductive layer 110 can be set on the third conductive layer, the pattern of the third conductive layer 130 can be set on the second conductive layer, and the pattern of the fourth conductive layer 140 can be set on the first conductive layer. That is, by flipping the vertical Figure 17 The structure shown in Figure 17 The structure shown in FIG is rotated 180 degrees and embedded in the board to realize the pattern of each layer. In this case, the input / output pattern can be set on the fourth conductive layer 140 and can be connected to the transmission lines 251 and 252 via the lower surface of the board 250.

[0199] The low-pass filter unit 100 embedded in the board as described above may have Figure 21 The frequency response characteristics shown in . In the S parameter, "S21" represents the insertion loss of the low-pass filter, which indicates the comparison between the signal amplitude of the first input / output port and the signal amplitude output to the second input / output port. It can be seen that in the frequency band of 5GHz to 6GHz, the insertion loss is equal to or less than -3dB. That is, the low-pass filter unit 100 exhibits an excellent filtering effect in the frequency band of 5GHz to 6GHz. As the insertion loss approaches 0, the signal flows more smoothly. In the S parameter, "S11" represents the reflection coefficient or return loss at the first input / output port, and "S22" represents the reflection coefficient or return loss at the second input / output port. The frequencies of the transmission zeros (-22.41 and -26.01) in curves S11 and S22 can be adjusted. The transmission zero at 4.25GHz can be adjusted to be lower than the transmission zero at 2.45GHz. A portion of the input power can be transmitted in a frequency band of 5GHz or higher, so that it can be set to a value for controlling bandwidth and suppression frequency.

[0200] The antenna module according to an embodiment of the present disclosure is a Wi-Fi module including a Bluetooth antenna and a Wi-Fi antenna and may be applied to a high-frequency module for a mobile phone, a television configured to receive a high-frequency signal, a vehicle, or the like.

[0201] Method of invention

[0202] The embodiments of the present invention have been described in the above detailed description.

[0203] Industrial Applicability

[0204] The filter module according to the embodiment can be applied to fields such as a Wi-Fi module including a Bluetooth antenna and a Wi-Fi antenna, and to high-frequency modules for mobile phones, televisions configured to receive high-frequency signals, vehicles, etc.

Claims

1. A filter module, comprising: First ground plane; a second ground layer disposed to be spaced apart from the first ground layer; a first conductive pattern layer disposed between the first ground layer and the second ground layer; A second conductive pattern layer disposed on one side of the first ground layer or the second ground layer; as well as A through hole interconnects at least two of the first ground layer, the second ground layer, the first conductive pattern layer, and the second conductive pattern layer.

2. The filter module according to claim 1, wherein: The first conductive pattern layer includes a capacitance pattern formed to have capacitance while facing at least one of the first ground layer or the second ground layer.

3. The filter module according to claim 2, wherein: The first conductive pattern layer includes a first inductor pattern, and the first inductor pattern is formed to have inductance.

4. The filter module according to claim 2 or 3, wherein: The second conductive pattern layer includes a second inductor pattern, and the second inductor pattern is formed to have inductance.

5. The filter module according to claim 4, wherein: The inductor pattern has a smaller width than the capacitor pattern.

6. The filter module according to claim 5, wherein: The second conductive pattern layer includes a first opening formed in the second conductive pattern layer to allow the second inductor pattern to be disposed in the opening, and The first ground layer includes a second opening, and the second opening is formed in the first ground layer to vertically overlap with the first opening.

7. The filter module according to claim 5, wherein: Each of the first inductor pattern and the second inductor pattern includes an inductor pattern having a planar shape bent at least once in a horizontal direction, and The maximum number of bends of the first inductor pattern in the horizontal direction is greater than the maximum number of bends of the second inductor pattern.

8. The filter module according to claim 5, wherein: The capacitor pattern includes: a second capacitor pattern, the second capacitor pattern forming a second capacitor; a first capacitor pattern disposed to be spaced apart from one side of the second capacitor pattern to form a first capacitor; and A third capacitor pattern is disposed to be spaced apart from an opposite side of the second capacitor pattern to form a third capacitor.

9. The filter module according to claim 8, wherein: The second capacitor pattern includes: First stub; a second stub disposed on one side of the first stub; and A third stub is disposed on an opposite side of the first stub.

10. The filter module according to claim 8, wherein: The first inductor pattern comprises: a first inductor pattern configured to interconnect the first via and the second via to form a first inductor; a second inductor pattern disposed to interconnect the first via and the first capacitor pattern to form a second inductor; a fifth inductor pattern disposed to interconnect the third via and the third capacitor pattern to form a fifth inductor; and A sixth inductor pattern is provided to interconnect the third via and the fourth via to form a sixth inductor.

11. The filter module according to claim 5, wherein: The second inductor pattern comprises: a third inductor pattern disposed to interconnect the first via and the fifth via and to interconnect the fifth via and the sixth via to form a third inductor; and a fourth inductor pattern arranged to interconnect the sixth through-hole and the third through-hole to form a fourth inductor, and Wherein, the sixth through hole is connected to the second capacitor pattern.

12. The filter module according to claim 11, wherein: At least one of the first to sixth inductor patterns has a line width of 250 μm or less.

13. The filter module according to claim 8, wherein: At least one of the first capacitor pattern or the third capacitor pattern has a line width of 300 μm or more.

14. The filter module according to claim 11, wherein: At least one of the first to sixth inductor patterns has a length equal to or less than one eighth of a wavelength of a fundamental frequency.

15. A filter module, comprising: Second ground layer; a first conductive pattern layer stacked on the second ground layer, the first conductive pattern layer including patterns for implementing an inductor and a capacitor; a first ground layer stacked on the first conductive pattern layer; a second conductive pattern layer stacked on the first ground layer, the second conductive pattern layer comprising a transmission line, the transmission line comprising a pattern for implementing an inductor; as well as A through-hole interconnects the inductor and the capacitor of the first conductive pattern layer and the inductor of the second conductive pattern layer in a vertical direction.

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