Photoetching process window optimization method, mask and readable storage medium

Abstract

The invention relates to a photoetching process window optimization method, a mask and a readable storage medium. The method comprises the following steps: acquiring an area with the problem of insufficient photoetching process windows in a mask design pattern; obtaining a graph size adjustment parameter according to the size of the photoetching process window of the region; selecting a first pattern and a second pattern to be adjusted according to the morphology parameters and the adjacent edge included angles of the patterns to be adjusted; adjusting the position of the mask design graph according to the graph size adjusting parameters, and adjusting the position of the mask design graph to form a reconstructed graph; and performing optical proximity effect correction on the reconstructed pattern to obtain a mask plate making pattern. According to the invention, the pattern to be adjusted is selected for size adjustment according to the morphology parameters and the adjacent edge included angle of the pattern to be adjusted, so that the defect of a photoetching process window is overcome, and the circuit performance and the product yield are improved. Since no barrier layer is used to distinguish adjusted / unadjusted patterns, the cost is low.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a method for optimizing a photolithography process window, and also to a mask and a readable storage medium. Background Art

[0002] With the rapid development of ultra-large scale integrated circuits (ULSI), integrated circuit manufacturing processes have become increasingly complex and sophisticated. Among them, photolithography is the driving force behind the development of integrated circuit manufacturing processes and is also one of the most complex technologies. Compared with other single manufacturing technologies, the improvement of photolithography is of great significance to the development of integrated circuits. Before the photolithography process begins, the pattern must first be copied to the mask through a specific device, and then the pattern structure on the mask is copied to the silicon wafer through a photolithography machine. However, due to the reduction in the size of semiconductor devices, the wavelength used for exposure is greater than the size of the ideal pattern designed in the physical layout and the spacing between the patterns. The interference and diffraction effects of light waves cause a large difference between the physical pattern produced by actual photolithography and the ideal pattern designed in the layout. The shape and spacing of the actual pattern change greatly, and even affect the performance of the circuit. In order to solve this problem, the OPC (optical proximity correction) method is usually used to correct the mask design pattern.

[0003] In advanced manufacturing processes, insufficient process window (PW) of products will cause fluctuations in key device parameters, thus affecting overall product performance. For some special graphics, it is necessary to adjust their morphology to solve the problem of insufficient lithography process window. Summary of the invention

[0004] Based on this, it is necessary to provide a method for optimizing the photolithography process window.

[0005] A method for optimizing a photolithography process window comprises: obtaining an area in a mask design graphic where a photolithography process window is insufficient; obtaining a graphic size adjustment parameter according to the size of the photolithography process window in the area; selecting a first graphic and a second graphic to be adjusted according to the morphology parameters and adjacent edge angles of the graphic to be adjusted, wherein the first graphic includes a first edge, and the second graphic includes a second edge opposite to the first edge; the morphology parameters include at least one of the number of graphic vertices, projection length, width, and length; according to the graphic size adjustment parameter, positionally adjusting the common edge between the first edge and an overlapping area and the common edge between the second edge and the overlapping area, thereby enlarging a blank area between the first edge and the second edge, and the mask design graphic is used as a reconstructed graphic after the position adjustment; the overlapping area is an overlapping area of ​​a projection area formed by projecting the first edge onto the second edge and a projection area formed by projecting the second edge onto the first edge; performing optical proximity effect correction on the reconstructed graphic to obtain a mask plate making graphic.

[0006] The above-mentioned method for optimizing the photolithography process window does not use a block layer to distinguish between graphics that need to be adjusted and graphics that do not need to be adjusted. Instead, the graphics to be adjusted are selected for size adjustment based on the morphological parameters and adjacent edge angles of the graphics to be adjusted, thereby improving the insufficient photolithography process window and improving circuit performance and product yield. Since no block layer is used to distinguish between graphics to be adjusted / not adjusted, the cost is relatively low.

[0007] In one of the embodiments, the optimization method of the photolithography process window is performed through OPC software, and the graphic size adjustment parameter is an OPC adjustment parameter.

[0008] In one embodiment, the step of selecting the first pattern and the second pattern to be adjusted does not use a blocking layer to mark part of the mask design pattern.

[0009] In one embodiment, the step of adjusting the position of the common edge between the first edge and the overlapping area and the common edge between the second edge and the overlapping area includes: indenting the common edge between the first edge and the overlapping area toward the interior of the first figure, and indenting the common edge between the second edge and the overlapping area toward the interior of the second figure.

[0010] In one embodiment, the common edge of the first side and the overlapping area is retracted toward the inside of the first figure, and the common edge of the second side and the overlapping area is retracted toward the inside of the second figure, and the retracted distance is ≥ 7 nanometers.

[0011] In one embodiment, each of the first graphics corresponds to n second graphics, and n overlapping areas are formed between each of the first edges and n of the second edges, where n is an integer greater than 1.

[0012] In one embodiment, the second figure includes a rectangular portion and an L-shaped portion located at each of the four corners of the rectangular portion, and two adjacent sides of each L-shaped portion sandwiching the inner right angle of the L-shaped portion are located on the same straight line as the two corresponding adjacent sides of the rectangular portion.

[0013] In one of the embodiments, the step of selecting the first and second figures to be adjusted according to the morphological parameters and adjacent edge angles of the figures to be adjusted includes: selecting the second edge according to the number of vertices of the second figure and at least one of the width, length and projected length of the second edge; selecting the adjacent edge of the second edge according to the adjacent edge angle of the second edge and the length of the adjacent edge of the second edge; selecting the remaining edges of the second figure; and obtaining a second figure composed of all the edges of the second figure.

[0014] It is also necessary to provide a mask plate, which is made of a mask plate making pattern obtained according to the method for optimizing the photolithography process window described in any of the above embodiments.

[0015] It is also necessary to provide a readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the optical proximity effect correction method described in any of the above embodiments.

[0016] It is also necessary to provide a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the optical proximity effect correction method described in any of the above embodiments when executing the computer program.

[0017] It is also necessary to provide a computer program product, comprising a computer program, which, when executed by a processor, implements the steps of the optical proximity effect correction method described in any of the aforementioned embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 is a flow chart of a method for optimizing a photolithography process window in an embodiment of the present application;

[0020] Figure 2 is a schematic diagram of a graph to be adjusted in an embodiment of the present application;

[0021] Figure 3 yes Figure 2 A schematic diagram of the second figure shown;

[0022] Figure 4 is a flowchart of the sub-steps of step S130 in one embodiment of the present application;

[0023] Figure 5 is a schematic diagram of an overlapping area in an embodiment of the present application;

[0024] Figure 6 It is a schematic diagram of adjusting the position of a mask design pattern in one embodiment of the present application;

[0025] Figure 7 The first graphic 210a is changed after the position of the first graphic 210 is adjusted;

[0026] Figure 8 A schematic diagram of a mask plate making pattern in one embodiment of the present application;

[0027] Fig. 9 It is a schematic diagram of an exposure pattern obtained after exposing a mask plate making pattern in one embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0030] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. "Connection" in this specification should be understood as "electrical connection", "communication connection" and the like if the connected circuits, modules, units, etc. have transmission of electrical signals or data to each other. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

[0031] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0032] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present invention. When used herein, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It is understood that "at least one" refers to one or more, and "multiple" refers to two or more. "At least part of an element" refers to part or all of an element. It should also be understood that the terms "compose" and / or "comprise" when used in this specification determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0033] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the invention. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the invention should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the invention.

[0034] In order to solve the problem of insufficient lithography process window, we must first find the area (weakpoint) in the mask design graphics where the lithography process window is insufficient, and then adjust the morphology of the mask design graphics in the area to increase the process window. Specifically, we need to select a specific graphic edge related to the process window, and then adjust the selected graphic edge. An exemplary approach is: in order to avoid some graphics that do not want to be adjusted (for example, graphics that are not related to insufficient lithography process window) from being misadjusted, we can first generate a layer of blocking layer (block layer), and use the blocking layer to mark the graphics that we want to be specially adjusted in the mask design graphics to distinguish the graphics that need to be adjusted (do not adjust the graphics that are not marked by the block layer), and then select the graphics edge that needs to be adjusted in the graphics marked by the block layer according to the line (line segment) / space (i.e., the blank area between graphics on the layout) of the graphics edge that needs to be adjusted, and adjust it.

[0035] However, the above method requires the use of a block layer. In one case, the mask design pattern is provided by the customer who entrusts the Fab (wafer factory) to do the foundry work. Adding a block layer will bring higher costs and time requirements. The present application proposes a method for optimizing the lithography process window that does not require the addition of a block layer for distinguishing between patterns that need to be adjusted / do not need to be adjusted. Correction and adjustment of special patterns can be achieved without adding a block layer, which can save high costs, effectively increase the process window, and reduce process risks.

[0036] Figure 1 : is a flow chart of a method for optimizing a photolithography process window in an embodiment of the present application, comprising the following steps:

[0037] S110, obtaining an area in the mask design pattern where a photolithography process window is insufficient.

[0038] In one embodiment of the present application, the mask design pattern is provided by the customer who entrusts the Fab to do the manufacturing. Depending on the specific photolithography process used by the Fab during manufacturing, there may be a situation where the photolithography process window is insufficient.

[0039] S120, obtaining a pattern size adjustment parameter according to the size of the photolithography process window in the area where the photolithography process window is insufficient.

[0040] For the area with insufficient photolithography process window, the pattern size adjustment parameter is obtained according to the size of the photolithography process window required during actual photolithography. Subsequently, the morphology of the mask design pattern in the area with insufficient photolithography process window is adjusted according to the pattern size adjustment parameter.

[0041] S130, selecting the first and second graphics to be adjusted according to the morphological parameters and adjacent edge angles of the graphics to be adjusted.

[0042] According to the morphological parameters and adjacent edge angles of the graphics to be adjusted in the area where the lithography process window is insufficient, the first graphics and the second graphics to be adjusted are selected, the first graphics include a first edge, and the second graphics include a second edge opposite to the first edge. That is, the first graphics and the second graphics are adjacently arranged in the mask design graphics, there is a spacing area between the first edge and the second edge, the first edge and the second edge are located at the edge of the spacing area, the first edge can be parallel to the second edge, and the straight line where the first edge is located is not perpendicular to the straight line where the second edge is located. The morphological parameters include at least one of the number of graphics vertices, projection length, width, and length. The adjacent edge angle is the angle between each group of adjacent edges in the graphics to be adjusted, specifically including the angle of the angle.

[0043] Figure 2 2 is a schematic diagram of a graphic to be adjusted in an embodiment of the present application. The graphic to be adjusted includes a first graphic 210 and a second graphic 220. For ease of viewing, the first graphic 210 only shows a partial structure, that is, the first graphic 210 is Figure 2 The structures on the left, right and upper sides of the illustrated part are omitted. The first figure 210 includes a first side 211, and the second figure 220 includes a second side 221. The length of the first side 211 is a, and the length of the second side 221 is b.

[0044] See also Figure 4 In one embodiment of the present application, step S130 specifically includes:

[0045] S132, selecting a second edge according to the number of vertices of the second figure and the length of the second edge.

[0046] In one embodiment of the present application, the number of vertices of the second figure 220 is 20. First, the number of vertices of the figure is 20 as a screening condition for preliminary screening, and then in the figures in the screen, at least one of the parameters such as projection length, width (width), and length (length) is used as a screening condition to select the second edge 211.

[0047] S134: Select an adjacent side of the second side according to an included angle of the adjacent side of the second side and a length of the adjacent side of the second side.

[0048] After the second side 221 is selected, the adjacent side of the second side 221, that is, the side 222, is selected by using the angle between the side 221 and the length of the side itself as screening conditions. Similarly, the side 223 can be selected by using the length of the side itself and the angle between the side 222 and the side 223.

[0049] S136, selecting the remaining edges of the second figure.

[0050] Step S132 is to filter based on the number of vertices of the graphic and the morphological parameters of the edge itself, and step S134 is to filter based on the length of the edge itself and the angle with the selected edge. The remaining edges of the graphic are partially selected by step S132 and partially by step S134.

[0051] exist Figure 3 In the embodiment shown, the second figure 220 includes a rectangular portion and an L-shaped portion at each of the four corners of the rectangular portion, and two adjacent sides of each L-shaped portion sandwiching the inner right angle of the L-shaped portion are located on the same straight line as the two adjacent sides corresponding to the rectangular portion. In one embodiment of the present application, the four sides of the rectangular portion are selected by step S132, and the remaining sides of the second figure 220 are selected by step S134.

[0052] S138, obtaining a second graph consisting of all the edges of the second graph.

[0053] Through steps S132, S134, and S136, all edges of the second graph 220 are selected, thereby obtaining the second graph 220 composed of these selected edges.

[0054] Similarly, you can refer to Figure 4 The first graph 210 is obtained in the manner shown. At this point, step S130 is completed, and the next step is step S140.

[0055] S140, adjusting the position of the mask design pattern according to the pattern size adjustment parameter to obtain a reconstructed pattern.

[0056] According to the pattern size adjustment parameters obtained in step S120, the common edge of the first side 211 and the overlapping area 231, and the common edge of the second side 221 and the overlapping area 231 are adjusted, so that the blank area (space) between the first side 211 and the second side 221 becomes larger, and the mask design pattern is used as a retarget pattern after the position adjustment. The overlapping area 231 is the first side 211 ( Figure 5 The overlapping area of ​​the projection area formed by projecting the second side 221 and the projection area formed by projecting the second side 211 to the first side 211 is referred to as Figure 5 .

[0057] See also Figure 6 In one embodiment of the present application, the position adjustment of step S140 is to indent the common edge of the first edge 211 and the overlapping area 231 toward the inside of the first figure 210, and to indent the common edge of the second edge 221 and the overlapping area 231 toward the inside of the second figure 220. Figure 6 The dotted line in the figure is the outline of the figure obtained by indenting the first side 211 and the second side 221, and the lengths of the corresponding sides 211a and 221a are both b (ie, the length of the second side 221). Figure 7 Schematic diagram of the first graphic 210a (in the reconstructed graphic) after the position of the first graphic 210 is adjusted (indented).

[0058] S150, performing optical proximity effect correction on the reconstructed pattern to obtain a mask plate making pattern.

[0059] The reconstructed pattern is corrected for optical proximity effect using OPC software. The optical proximity effect correction in step S150 can be performed using conventional techniques in the art, and this application does not make any specific limitation thereto.

[0060] Figure 8 It is a schematic diagram of a mask plate making pattern in an embodiment of the present application. It can be understood that in some embodiments, regardless of whether the photolithography process window optimization of the present application is performed, the mask design pattern must eventually be subjected to optical proximity effect correction to obtain the mask plate making pattern. Figure 8 In the figure, the mask plate pattern obtained by the optimization method of the photolithography process window of the embodiment of the present application is filled with oblique lines, and the mask plate pattern of the comparative example is filled with dots. Since the mask plate pattern of the embodiment and the comparative example overlap, the oblique line filled area is semi-transparent to distinguish the graphics of the embodiment and the comparative example in the figure (the overlapping area of ​​the graphics of the embodiment and the comparative example is in Figure 8Specifically, the first pattern 210a in the reconstructed pattern is corrected for the optical proximity effect in step S150 to obtain the first plate-making pattern 410 (in the mask plate-making pattern), which corresponds to the pattern 310 in the comparative example. Figure 8 The second plate-making pattern 420 in the mask plate-making pattern of the embodiment, and the pattern 320 in the comparative example.

[0061] Fig. 9 It is a schematic diagram of an exposure pattern obtained after exposing a mask plate making pattern in one embodiment of the present application. Fig. 9 The exposure pattern obtained by optimizing the photolithography process window of the embodiment of the present application is indicated by the diagonal line filling, and the exposure pattern of the comparative example is indicated by the dot filling. Since the exposure patterns of the embodiment and the comparative example overlap, the diagonal line filling area is semi-transparent to distinguish the patterns of the embodiment and the comparative example in the figure (the overlapping area of ​​the patterns of the embodiment and the comparative example is in Fig. 9 Specifically, after the first plate-making pattern 410 is exposed, a first exposure pattern 610 is obtained, which corresponds to the pattern 510 in the comparative example. Accordingly, after the second plate-making pattern 420 is exposed, a second exposure pattern 620 is obtained, which corresponds to the pattern 520 in the comparative example.

[0062] The above-mentioned method for optimizing the photolithography process window does not use a block layer to distinguish between graphics that need to be adjusted and graphics that do not need to be adjusted. Instead, the graphics to be adjusted are selected according to the morphological parameters and adjacent edge angles of the graphics to be adjusted for size adjustment, thereby improving the insufficient photolithography process window and improving circuit performance and product yield. Since no block layer is used to distinguish between graphics to be adjusted / not adjusted, the cost is relatively low.

[0063] In one embodiment of the present application, the optimization method of the lithography process window is performed by OPC software, and the pattern size adjustment parameter in step S120 is an OPC adjustment parameter. Therefore, the operation of selecting the first pattern 210 and the second pattern 220 in step S130 needs to comply with the operation logic and function of the OPC software.

[0064] In one embodiment of the present application, the indentation of step S140 is to indent the common edge of the first edge 211 and the overlapping area 231 toward the interior of the first figure 210, and the indentation distance is ≥7 nanometers, and the common edge of the second edge 221 and the overlapping area 231 is indented toward the interior of the second figure 220, and the indentation distance is ≥7 nanometers.

[0065] See also Fig. 9, the first exposure pattern 610 obtained by the optimization method of the photolithography process window of the present application has a retraction distance c to the inside of the pattern (i.e., the direction away from the second exposure pattern 620) relative to the pattern 510 of the comparative example. In one embodiment of the present application, c is 7 nanometers. The retraction distance d of the second exposure pattern 620 to the inside of the pattern (i.e., the direction away from the first exposure pattern 610) relative to the pattern 510 of the comparative example. In one embodiment of the present application, d is 6 nanometers. Therefore, the optimization method of the photolithography process window of the present application can increase the photolithography process window by 6+7=13 nanometers.

[0066] In one embodiment of the present application, each first graphic 210 corresponds to n second graphics 220 , and n overlapping regions are formed between each first edge 211 and n second edges 221 , where n is an integer greater than 1. Figure 5 A portion of the first graphic 210 and three corresponding second graphics 220 are shown, but the first graphic 210 may correspond to more second graphics 220 .

[0067] The present application accordingly provides a mask made from a mask plate making pattern obtained according to the method for optimizing the photolithography process window described in any of the above embodiments.

[0068] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0069] The present application also provides a readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the optical proximity effect correction method described in any of the above embodiments are implemented.

[0070] The present application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the optical proximity effect correction method described in any of the above embodiments when executing the computer program.

[0071] The present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the optical proximity effect correction method described in any of the aforementioned embodiments.

[0072] It should be understood that, although the various steps in the flowchart of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0073] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0074] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0075] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for optimizing a photolithography process window, comprising: Acquire the area in the mask design pattern where the photolithography process window is insufficient; Obtaining a pattern size adjustment parameter according to the size of the photolithography process window of the region; According to the morphological parameters and adjacent edge angles of the figure to be adjusted, a first figure and a second figure to be adjusted are selected, wherein the first figure includes a first edge, and the second figure includes a second edge opposite to the first edge; the morphological parameters include at least one of the number of figure vertices, projected length, width, and length; According to the pattern size adjustment parameter, the common edge between the first side and the overlapping area and the common edge between the second side and the overlapping area are adjusted in position, so that the blank area between the first side and the second side becomes larger, and the mask design pattern is used as a reconstructed pattern after the position adjustment; the overlapping area is an overlapping area of ​​a projection area formed by projecting the first side onto the second side and a projection area formed by projecting the second side onto the first side; The reconstructed pattern is subjected to optical proximity effect correction to obtain a mask plate making pattern.

2. The method for optimizing the photolithography process window according to claim 1, characterized in that: The optimization method of the photolithography process window is performed through OPC software, and the graphic size adjustment parameter is an OPC adjustment parameter.

3. The method for optimizing the photolithography process window according to claim 1, characterized in that: The step of selecting the first pattern and the second pattern to be adjusted does not use the blocking layer to mark the mask design pattern.

4. The method for optimizing the photolithography process window according to claim 1, characterized in that: The step of adjusting the position of the common edge between the first edge and the overlapping area and the common edge between the second edge and the overlapping area comprises: The common edge of the first side and the overlapping area is retracted into the interior of the first figure, and the common edge of the second side and the overlapping area is retracted into the interior of the second figure.

5. The method for optimizing the photolithography process window according to claim 4, characterized in that: The common edge of the first side and the overlapping area is retracted toward the inside of the first figure, and the common edge of the second side and the overlapping area is retracted toward the inside of the second figure, and the retracted distance is greater than or equal to 7 nanometers.

6. The method for optimizing the photolithography process window according to any one of claims 1 to 5, characterized in that: Each of the first figures corresponds to n second figures, and n overlapping areas are formed between each of the first sides and n of the second sides, where n is an integer greater than 1.

7. The method for optimizing the photolithography process window according to claim 6, characterized in that: The second figure includes a rectangular portion and an L-shaped portion located at each of the four corners of the rectangular portion, and two adjacent sides of each L-shaped portion sandwiching the inner right angle of the L-shaped portion are located on the same straight line as the two corresponding adjacent sides of the rectangular portion.

8. The optical proximity effect correction method according to claim 1, characterized in that: The step of selecting the first and second graphics to be adjusted according to the morphological parameters and adjacent side angles of the graphics to be adjusted comprises: Selecting the second edge according to the number of vertices of the second figure and at least one of the width, length, and projected length of the second edge; Selecting an adjacent side of the second side according to an included angle of adjacent sides of the second side and a length of the adjacent side of the second side; Select the remaining edges of the second figure; A second graph consisting of all edges of the second graph is obtained.

9. A mask, characterized in that: The mask plate is made of a mask plate making pattern obtained by the optical proximity effect correction method according to any one of claims 1-8.

10. A readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.

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