Instruction selection optimization method for hybrid instruction set architecture

Abstract

The invention discloses a hybrid instruction set architecture-oriented instruction selection optimization method. The method comprises the following steps of: obtaining an IR tree of a source application program; traversing the IR tree, and recording the minimum cost of a sub-tree taking each node as a root in a node cost table (costTable); the IR tree is traversed, and an instruction value of each node is recorded in an instruction table; traversing the IR tree, matching each node with a pattern of a target platform instruction, and updating the minimum cost and instruction value corresponding to each node in a node cost table (costTable) and an instruction table (instructionTable) according to a matching result; and traversing the IR tree, generating a target code according to the updated instruction value of each node in the instruction table, and obtaining a target platform instruction of the source application program. According to the method, the global optimal code is generated by locally selecting the optimal instruction combination.

Description

Technical Field

[0001] The present invention relates to the field of computer software, and in particular to an instruction selection optimization method for a hybrid instruction set architecture. Background Art

[0002] In the computer field, the instruction set architecture (ISA) is the interface between software and hardware, which specifies what operations the software can perform and how the hardware performs these operations. The instruction set architecture is like a language that directly divides related hardware and software into different ecosystems. Hardware and software using the same instruction set architecture belong to the same ecosystem, and hardware and software using different instruction set architectures belong to different ecosystems. Binary applications compiled for one ecosystem cannot run on the hardware platform of another ecosystem. The hybrid instruction set architecture is a technology that solves the cross-platform running requirements of actual application binary applications. It supports the ARM instruction set architecture in the privileged state, and supports both ARM and RISC-V instruction set architectures in the user state, that is, it supports the running of applications of both ARM and RISC-V instruction set architectures.

[0003] The hybrid instruction set architecture uses execution pipeline design technology based on basic operators, mainly based on the ARM64 instruction execution pipeline to implement RV64G instructions. Some RV64G instructions are directly mapped to ARM64 instructions with equivalent functions, while some RV64G instructions are completed by a combination of multiple ARM64 instructions. There are even cases where two consecutive RV64G instructions are merged into one ARM64 instruction for execution. This processor microarchitecture implementation results in different RV64G instruction combinations with the same functions having significantly different operating efficiencies on hybrid instruction set architecture processors. When compiling RV64G applications, how to select instructions has a very important impact on the performance of the compiled executable code.

[0004] Instruction selection is a key step in compiler backend code generation. The compiler usually converts high-level language programs into intermediate representation (IR). After completing a series of analysis and optimization on the IR, the compiler backend converts the optimized IR into assembly code of the target instruction set. Instruction selection completes the work of mapping IR to the optimal target instruction set assembly code, which is crucial for generating efficient and optimized machine code. Currently, there are many studies on instruction selection methods for optimizing compilers, but there is no research directly on instruction selection methods for hybrid instruction set architectures. In the hybrid instruction set architecture, RV64G instructions will be mapped to ARM64 instructions for execution, which increases the difficulty of instruction selection in the RV64G application generation process. Existing compilers cannot generate the best performance code when compiling RV64G applications for hybrid instruction set architectures, and cannot meet the current application requirements of hybrid instruction set architectures. Therefore, instruction selection optimization methods for hybrid instruction set architectures are of great significance to the promotion and application of hybrid instruction set architectures. Summary of the invention

[0005] The technical problem to be solved by the present invention is as follows: In view of the above-mentioned problems in the prior art, an instruction selection optimization method for a hybrid instruction set architecture is provided, which adopts a tree traversal mapping method to carry out instruction selection optimization, uses an intermediate representation of the tree to perform code transformation, and generates a global optimal code by locally selecting the optimal instruction combination.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0007] An instruction selection optimization method for a hybrid instruction set architecture comprises the following steps:

[0008] Get the IR tree of the source application;

[0009] Traverse the IR tree and record the minimum cost of the subtree with each node as the root in the node cost table costTable;

[0010] Traverse the IR tree and record the instruction value of each node in the instruction table instructionTable;

[0011] Traverse the IR tree, match each node with the pattern patten of the target platform instruction, update the minimum cost corresponding to each node in the node cost table costTable according to the matching result, and update the instruction value corresponding to each node in the instruction table instructionTable;

[0012] The IR tree is traversed, and target code is generated according to the updated instruction value of each node in the instruction table instructionTable to obtain the target platform instruction of the source application program.

[0013] Furthermore, when recording the minimum cost of the subtree with each node as the root in the node cost table costTable, it specifically includes:

[0014] Determine whether the current node is empty, if not, execute the next step;

[0015] Add an item corresponding to the current node in the node cost table costTable;

[0016] Get all child nodes of the current node, select each child node in turn and calculate the corresponding cost;

[0017] According to the cost of each node, the minimum cost of the subtree with each node as the root is calculated respectively, and the item corresponding to each node is updated to the corresponding minimum cost.

[0018] Furthermore, when recording the instruction value of each node in the instruction table instructionTable, it specifically includes:

[0019] Determine whether the current node is empty, if not, execute the next step;

[0020] Add an item corresponding to the current node in the instruction table instructionTable;

[0021] Get all child nodes of the current node, select each child node in turn and calculate the corresponding instruction value;

[0022] Update the item corresponding to each node to the corresponding instruction value.

[0023] Furthermore, when selecting each child node in turn and calculating the corresponding instruction value, specifically, the machine instruction corresponding to the minimum cost of the subtree with the selected child node as the root is calculated.

[0024] Further, each node is matched with the pattern patten of the target platform instruction, the minimum cost corresponding to each node in the node cost table costTable is updated according to the matching result, and the instruction value corresponding to each node in the instruction table instructionTable is updated, including:

[0025] Determine whether the current node is empty, if not, execute the next step;

[0026] Get all patterns matched by the current node;

[0027] Select each pattern patten in turn, match the child nodes of the selected pattern patten with the node cost table costTable, and obtain the cost of the child nodes of the selected pattern patten;

[0028] Add the cost of all child nodes of the selected pattern patten to the cost of the selected pattern patten to obtain the total cost totalCost of the selected pattern patten;

[0029] If the total cost totalCost is less than the minimum cost corresponding to the current node, the minimum cost corresponding to the current node in the node cost table costTable is updated to the total cost totalCost. At the same time, a new instruction is generated according to the selected pattern patten and the current node, and the instruction value corresponding to the current node in the instruction table instructionTable is updated to the new instruction.

[0030] Furthermore, when generating the target code according to the updated instruction value of each node in the instruction table instructionTable, it includes:

[0031] Determine whether the current node is empty, if not, execute the next step;

[0032] Get the instruction value of the current node from the instruction table instructionTable and write it into the target code file.

[0033] Furthermore, traversing the IR tree specifically adopts a specified search algorithm to traverse the IR tree from the root node to the bottom.

[0034] Furthermore, the specified search algorithm specifically refers to a depth-first search algorithm.

[0035] The present invention also proposes an instruction selection optimization system for a hybrid instruction set architecture, comprising a microprocessor and a computer-readable storage medium connected to each other, wherein the microprocessor is programmed or configured to execute any one of the instruction selection optimization methods for a hybrid instruction set architecture.

[0036] The present invention also proposes a computer-readable storage medium, in which a computer program is stored. The computer program is used to be programmed or configured by a microprocessor to execute any one of the instruction selection optimization methods for a hybrid instruction set architecture.

[0037] Compared with the prior art, the advantages of the present invention are:

[0038] The present invention uses a dynamic programming method to recursively decompose the mapping problem of the entire IR tree into smaller subtree mapping problems, and saves the optimal solution of each subtree. Through a bottom-up calculation method, the optimal solution of each subproblem is merged layer by layer to obtain the optimal solution of the entire problem. The global optimal code is generated by locally selecting the optimal instruction combination, and the optimal selection of each subtree ensures the efficiency of the overall code. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 The figure is a flow chart of a method according to an embodiment of the present invention.

[0040] Figure 2 Flowchart of initializing a node cost table in an embodiment of the present invention.

[0041] Figure 3 This is a flow chart of initializing the instruction table in an embodiment of the present invention.

[0042] Figure 4 This is a flowchart of traversing the IR tree from bottom to top in an embodiment of the present invention.

[0043] Figure 5 This is a flowchart of performing pattern matching on traversed nodes in an embodiment of the present invention.

[0044] Figure 6 The flowchart of generating target instructions in an embodiment of the present invention. DETAILED DESCRIPTION

[0045] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0046] Before introducing the specific embodiments of the present invention, related concepts are first explained.

[0047] IR tree: An intermediate representation tree generated by the compiler based on a high-level language program, consisting of nodes and edges, where a node represents an operation and an operand, a leaf node represents a variable or constant, and an edge represents a child node relationship.

[0048] Pattern: A template used to search for matching IR and replace it with the target machine instructions. Each pattern contains a root node, which represents the operation, and several child nodes, which represent the operands of the pattern. In addition, the pattern also contains the cost of the operation itself and the corresponding machine instructions.

[0049] costTable: Node cost table, index is IR tree node, value is cost, i.e. clock cycle tree of target machine. Each item in the table is the minimum cost of the subtree with IR tree node as root, i.e. the minimum number of clock cycles to complete all operations of the subtree with this node as root.

[0050] instructionTable: instruction table, index is IR tree node, value is instruction, indicating the machine instruction corresponding to the node when the subtree cost with the IR tree node as the root is the smallest.

[0051] Embodiment 1

[0052] When compiling RV64G applications, the current problems include: code bloat, because each macro call may be expanded into multiple instructions, so macro expansion may cause the code size to increase; performance degradation, due to the increase in code volume, the overall performance of the program may decrease, especially in loops and frequently called functions; increased compilation time, because the compiler needs to process more instructions and potential complex expansion, which will increase the compilation time.

[0053] In order to solve the above problems, this embodiment proposes an instruction selection optimization method for a hybrid instruction set architecture, such as Figure 1 As shown, the following steps are included:

[0054] S1, obtaining the IR tree of the source application. In this embodiment, the source application is the RV64G application.

[0055] S2, initialize the node cost table costTable: traverse the IR tree of the RV64G application and record the minimum cost of the subtree with each node as the root in the node cost table costTable;

[0056] S3, initialize the instruction table instructionTabl: traverse the IR tree of the RV64G application and record the instruction value of each node in the instruction table instructionTable;

[0057] S4, using the depth-first search algorithm to traverse the IR tree from bottom to top: during the traversal process, the dynamic programming method is used to calculate the minimum cost of the subtree with each node as the root, and the instruction corresponding to the minimum cost is recorded. Specifically, the IR tree of the RV64G application is traversed, and each node is matched with the pattern patten of the target platform instruction. In this embodiment, the target platform instruction adopts the ARM64 instruction. The minimum cost corresponding to each node in the node cost table costTable is updated according to the matching result, and the instruction value corresponding to each node in the instruction table instructionTable is updated;

[0058] S5, target code generation: traverse the IR tree of the RV64G application, generate target code according to the updated instruction value of each node in the instruction table instructionTable, obtain the target platform instructions of the source application, and finally map the RV64G instructions to ARM64 instructions for execution.

[0059] Each step is described in detail below.

[0060] In step S2 of this embodiment, when recording the minimum cost of a subtree with each node as the root in the node cost table costTable, for a single node, the following steps are specifically included:

[0061] Determine whether the current node is empty. If it is not empty, execute the next step. If it is empty, select other nodes under the same parent node as the current node as the current node;

[0062] Add an item corresponding to the current node in the node cost table costTable;

[0063] Obtain all child nodes of the current node, select each child node in turn and calculate the corresponding cost, specifically, calculate the corresponding number of clock cycles according to the operation and operand of each child node. The relevant calculation process is well known to those skilled in the art and will not be described in detail in this embodiment;

[0064] After all child nodes of the current node are selected, select other nodes under the same parent node as the current node as the current node

[0065] By recursively calling the above steps for its nodes in the direction of IR tree traversal, the cost of each node and the subtree with each node as the root can be obtained, so that the minimum cost of the subtree with each node as the root can be calculated according to the cost of each node, and the item corresponding to each node can be updated to the corresponding minimum cost. How to calculate the minimum cost of a subtree with a certain node as the root according to the costs of all nodes of the subtree is well known to those skilled in the art and will not be repeated in this embodiment.

[0066] Specifically, take traversal from the root node as an example, Figure 2 As shown, the process of step S2 in this embodiment is as follows:

[0067] S21, obtain the root node of the IR tree and use it as the node;

[0068] S22, determine whether the node node is empty, if the node node is empty, jump to S29, otherwise execute S23;

[0069] S23, adding a new item in the node cost table costTable to record the minimum cost of the subtree with the node node as the root, with the index being node, and setting the initial value to the maximum value, that is, costTable[node]=MaxValue;

[0070] S24, get all the child nodes of node node;

[0071] S25, take out the first node from the children nodes, calculate the cost of the node, and use it as the new node node;

[0072] S26, recursively call steps S22 to S29 for the child node, so as to obtain the cost of each node in the subtree rooted at each node starting from the root node, and thereby obtain the minimum cost of the subtree rooted at each node, and update the corresponding costTable[node] value;

[0073] S27, determine whether all nodes in the child nodes children have been processed, if so, jump to S29, otherwise execute S28;

[0074] S28, take out the next child node from the child node children, and jump to step S26 for execution;

[0075] S29, return and select other nodes that have the same parent node as node node.

[0076] In step S3 of this embodiment, when recording the instruction value of each node in the instruction table instructionTable, for a single node, the following steps are specifically included:

[0077] Determine whether the current node is empty. If it is not empty, execute the next step. If it is empty, select other nodes under the same parent node as the current node as the current node;

[0078] Add an item corresponding to the current node in the instruction table instructionTable;

[0079] Obtain all child nodes of the current node, select each child node in turn and calculate the corresponding instruction value, specifically, calculate the machine instruction corresponding to the minimum cost of the subtree with the selected child node as the root. The relevant calculation process is well known to those skilled in the art and will not be described in detail in this embodiment;

[0080] After all child nodes of the current node are selected, select other nodes under the same parent node as the current node as the current node

[0081] According to the direction of IR tree traversal, the above steps are recursively called for its nodes to obtain the instruction value of each node, thereby updating the item corresponding to each node to the corresponding instruction value.

[0082] Specifically, take traversal from the root node as an example, Figure 3 As shown, the process of step S3 in this embodiment is as follows:

[0083] S31, obtain the root node of the IR tree and use it as the node;

[0084] S32, determine whether the node node is empty, if node is empty, jump to S39, otherwise execute S33;

[0085] S33, adding a new item in the instruction table instructinTable for recording the instruction selected for the node node, with the index being node, and setting the initial value to be null, instructionTable[node]=null;

[0086] S34, get all the child nodes of node node;

[0087] S35, taking the first child node from the child nodes children as the new node node, and calculating the instruction value according to the minimum cost value of costTable[node] of the child node in the node cost table costTable;

[0088] S36, recursively call steps S32 to S39 for the child nodes, so as to obtain the instruction value of each node starting from the root node, and update the value of the corresponding instructionTable[node];

[0089] S37, determine whether all nodes in the child nodes children have been processed, if so, jump to S39, otherwise execute S38;

[0090] S38, take out the next child node from the child node children, and jump to step S36 for execution;

[0091] S39, return and select other nodes that have the same parent node as the node node.

[0092] In step S4 of this embodiment, each node is matched with the pattern patten of the target platform instruction, the minimum cost corresponding to each node in the node cost table costTable is updated according to the matching result, and the instruction value corresponding to each node in the instruction table instructionTable is updated. For a single node, the following steps are specifically included:

[0093] Determine whether the current node is empty. If it is not empty, execute the next step. If it is empty, select other nodes under the same parent node as the current node as the current node;

[0094] Get all patterns matched by the current node;

[0095] Select each pattern patten in turn, match the child nodes of the selected pattern patten with the node cost table costTable, and obtain the cost of the child nodes of the selected pattern patten;

[0096] Add the cost of all child nodes of the selected pattern patten to the cost of the selected pattern patten to obtain the total cost totalCost of the selected pattern patten;

[0097] If the total cost totalCost is less than the minimum cost corresponding to the current node, the minimum cost corresponding to the current node in the node cost table costTable is updated to the total cost totalCost, and a new instruction is generated according to the selected pattern patten and the current node, and the instruction value corresponding to the current node in the instruction table instructionTable is updated to the new instruction;

[0098] According to the direction of IR tree traversal, recursively call the above steps for its nodes to obtain the new minimum cost and new instruction value of each node. It should be noted that during the traversal process, whenever the minimum cost of a node is updated, the minimum costs of all subtrees where the node is located will also be updated, and the instruction values ​​of the nodes corresponding to the roots of these subtrees will also be updated accordingly. When the nodes corresponding to the roots of these subtrees recursively call the above steps, the updated minimum cost will be compared with the total cost of the matched pattern patten.

[0099] Specifically, take traversal from the root node as an example, Figure 4 As shown, the process of step S4 in this embodiment is as follows:

[0100] S41, obtain the root node of the IR tree and use it as the node node;

[0101] S42, determine whether the node node is empty, if the node node is empty, jump to S49, otherwise execute S43;

[0102] S43, get all the child nodes of node node;

[0103] S44, take out the first child node from children as the new node node;

[0104] S45, recursively call steps S42 to S49 for the child nodes, so that each node can be matched with the pattern patten starting from the root node, and the minimum cost value and the instruction value are updated;

[0105] S46, determine whether all nodes in children have been processed, if so, jump to S48, otherwise execute S47;

[0106] S47, take out the next child node from the child node children, and jump to step S46 for execution;

[0107] S48, perform pattern matching on node node, calculate the minimum cost of the subtree with node node as the root and record the corresponding instructions, such as Figure 5 As shown, the process is as follows:

[0108] S481, obtain all patterns pattens matched by node node;

[0109] S482, taking out the first pattern patten from all pattern pattens;

[0110] S483, obtain all child nodes pattenChildren of the first pattern pattens[node] of node node;

[0111] S484, define a variable totalCost for recording the cost of the current pattern patten of the subtree with the node node as the root, and assign an initial value of 0 to totalCost;

[0112] S485, taking out the first child node pattenChildren of the first pattern;

[0113] S486, obtain the cost costTable[pattenChild] of the child node pattenChild from the node cost table costTable, calculate the sum of totalCost and costTable[pattenChild] and assign it to totalCost;

[0114] S487, determine whether all nodes in pattenChildren have been processed, if yes, jump to S489, otherwise, execute S488;

[0115] S488 takes the next child node pattenChildren from the first pattern and jumps to S486 for execution.

[0116] S489 calculates the sum of totalCost and the cost pattencost of the first pattern and assigns it to totalCost;

[0117] S4810 determines whether totalCost is less than the minimum cost costTable[node] of the subtree with node node as the root recorded in costTable. If so, execute S4811, otherwise jump to S4813;

[0118] S4811 updates the value of the node item in the node cost table costTable, costTable[node]=totalCost;

[0119] S4812 updates the value of the node item in the instruction table instructionTable, generates instruction inst according to pattern and node, and updates the value of the node item in the instruction table instructionTable[node]=inst;

[0120] S4813 determines whether all pattern pattens have been processed. If so, execute S4814. Otherwise, take out the next pattern patten in all pattern pattens and jump to S483 for execution.

[0121] S4814 returns and selects other nodes that have the same parent node as node node.

[0122] S49, return and select other nodes that have the same parent node as the node node.

[0123] In step S5 of this embodiment, when generating the target code according to the updated instruction value of each node in the instruction table instructionTable, for a single node, the following steps are specifically included:

[0124] Determine whether the current node is empty. If it is not empty, execute the next step. If it is empty, select other nodes under the same parent node as the current node as the current node;

[0125] Get the instruction value of the current node from the instruction table instructionTable and write it into the target code file.

[0126] According to the direction of IR tree traversal, the above steps are recursively called for its nodes, and the instruction value of each node can be written into the target code file, and finally the optimized target platform code file is obtained.

[0127] Specifically, take traversal from the root node as an example, Figure 6 As shown, the process of step S5 in this embodiment is as follows:

[0128] S51, obtain the root node of the IR tree and use it as node node;

[0129] S52, determine whether the node node is empty, if the node node is empty, jump to S59, otherwise execute S53;

[0130] S53, get all the child nodes of node node;

[0131] S54, take out the first child node from children as the new node node;

[0132] S55, recursively calling steps S52 to S59 for the child nodes, so that the instruction value of each node starting from the root node can be written into the target code file;

[0133] S56, determine whether all nodes in children have been processed, if so, jump to S58, otherwise execute S57;

[0134] S57, take out the next child node from the child node children, and jump to step S56 for execution;

[0135] S58, taking out the instruction value instructionTable[node] of the current node from the instruction table instructinTable and writing it into the target code file;

[0136] S59, return and select other nodes that have the same parent node as the node node.

[0137] Embodiment 2

[0138] This embodiment proposes an instruction selection optimization system for a hybrid instruction set architecture, including a microprocessor and a computer-readable storage medium connected to each other, and the microprocessor is programmed or configured to execute the instruction selection optimization method for the hybrid instruction set architecture described in Example 1.

[0139] This embodiment further proposes a computer-readable storage medium, in which a computer program is stored. The computer program is used to be programmed or configured by a microprocessor to execute any one of the instruction selection optimization methods for a hybrid instruction set architecture.

[0140] In summary, the present invention discloses an instruction selection optimization method for a hybrid instruction set architecture, which uses an intermediate representation of a tree for code transformation, uses a tree traversal mapping method to carry out instruction selection optimization, and uses a dynamic programming method to solve the optimal solution to the global problem. Specifically, a complex problem is decomposed into smaller sub-problems in a recursive manner, and a bottom-up calculation method is used. The optimal solution of each sub-problem is merged layer by layer to obtain the optimal solution of the entire problem. Thus, the global optimal code is generated by locally selecting the optimal instruction combination. It has the following advantages:

[0141] First, the present invention adopts the method of tree traversal mapping to carry out instruction selection optimization. By locally selecting the optimal instruction combination to generate the global optimal code, the optimal selection of each subtree ensures the efficiency of the overall code. The modular characteristics of this method facilitate the adaptation and expansion of different target architectures, with a clear structure and concise implementation, reducing development time and maintenance costs. Its flexibility allows the compiler to utilize all the characteristics of the target machine, optimize the quality of the generated code, and reduce redundant instructions and data movement. In addition, this method has good scalability and can adapt to the introduction of new instructions, and only needs to add or modify the tree mode.

[0142] Second, the present invention uses a dynamic programming method to solve the optimal solution to the problem. This method carries out instruction selection, which involves selecting the optimal instruction combination to map all nodes in the IR tree, which is essentially a combinatorial optimization problem. In the RV64G instruction set, there may be multiple matching modes for a segment of operation, resulting in multiple different instruction combination mapping methods for each IR tree. The dynamic programming method is used to recursively decompose the mapping problem of the entire IR tree into smaller subtree mapping problems, and the optimal solution of each subtree is saved through memory technology, which is used directly when needed to avoid repeated calculations, reduce complexity, and thus improve efficiency. Through a bottom-up calculation method, the optimal solution to each subproblem is merged layer by layer to obtain the optimal solution to the entire problem.

[0143] Third, the present invention accurately defines the cost of RV64G instructions in tree matching mode based on the mapping relationship between RV64G instructions and ARM64 instruction execution pipelines. The hybrid instruction set architecture maps RV64G instructions to ARM64 instruction execution, and by accurately defining the running cost of RV64G instructions on the hybrid instruction set architecture in the matching mode, the runtime overhead of RV64G applications can be more accurately calculated during the compilation phase.

[0144] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. An instruction selection optimization method for a hybrid instruction set architecture, characterized in that: The following steps are involved: Get the IR tree of the source application; Traverse the IR tree and record the minimum cost of the subtree with each node as the root in the node cost table costTable; Traverse the IR tree and record the instruction value of each node in the instruction table instructionTable; Traverse the IR tree, match each node with the pattern patten of the target platform instruction, update the minimum cost corresponding to each node in the node cost table costTable according to the matching result, and update the instruction value corresponding to each node in the instruction table instructionTable; The IR tree is traversed, and target code is generated according to the updated instruction value of each node in the instruction table instructionTable to obtain the target platform instruction of the source application program.

2. The instruction selection optimization method for a hybrid instruction set architecture according to claim 1, characterized in that: When recording the minimum cost of the subtree with each node as the root in the node cost table costTable, it specifically includes: Determine whether the current node is empty, if not, execute the next step; Add an item corresponding to the current node in the node cost table costTable; Get all child nodes of the current node, select each child node in turn and calculate the corresponding cost; According to the cost of each node, the minimum cost of the subtree with each node as the root is calculated respectively, and the item corresponding to each node is updated to the corresponding minimum cost.

3. The instruction selection optimization method for a hybrid instruction set architecture according to claim 1, characterized in that: When recording the instruction value of each node in the instruction table instructionTable, it specifically includes: Determine whether the current node is empty, if not, execute the next step; Add an item corresponding to the current node in the instruction table instructionTable; Get all child nodes of the current node, select each child node in turn and calculate the corresponding instruction value; Update the item corresponding to each node to the corresponding instruction value.

4. The instruction selection optimization method for a hybrid instruction set architecture according to claim 3, characterized in that: When selecting each child node in turn and calculating the corresponding instruction value, specifically, the machine instruction corresponding to the minimum cost of the subtree with the selected child node as the root is calculated.

5. The instruction selection optimization method for a hybrid instruction set architecture according to claim 1, characterized in that: Match each node to the target platform instruction pattern patten, update the minimum cost corresponding to each node in the node cost table costTable according to the matching result, and update the instruction value corresponding to each node in the instruction table instructionTable, including: Determine whether the current node is empty, if not, execute the next step; Get all patterns matched by the current node; Select each pattern patten in turn, match the child nodes of the selected pattern patten with the node cost table costTable, and obtain the cost of the child nodes of the selected pattern patten; Add the cost of all child nodes of the selected pattern patten to the cost of the selected pattern patten to obtain the total cost totalCost of the selected pattern patten; If the total cost totalCost is less than the minimum cost corresponding to the current node, the minimum cost corresponding to the current node in the node cost table costTable is updated to the total cost totalCost. At the same time, a new instruction is generated according to the selected pattern patten and the current node, and the instruction value corresponding to the current node in the instruction table instructionTable is updated to the new instruction.

6. The instruction selection optimization method for a hybrid instruction set architecture according to claim 1, characterized in that: When generating target code according to the updated instruction value of each node in the instruction table instructionTable, it includes: Determine whether the current node is empty, if not, execute the next step; Get the instruction value of the current node from the instruction table instructionTable and write it into the target code file.

7. The instruction selection optimization method for a hybrid instruction set architecture according to claim 1, characterized in that: Traversing the IR tree specifically involves adopting a specified search algorithm to traverse the IR tree from the root node to the bottom.

8. The instruction selection optimization method for a hybrid instruction set architecture according to claim 7, characterized in that: The specified search algorithm specifically refers to the depth-first search algorithm.

9. An instruction selection optimization system for a hybrid instruction set architecture, characterized in that: The invention comprises a microprocessor and a computer-readable storage medium connected to each other, wherein the microprocessor is programmed or configured to execute the instruction selection optimization method for a hybrid instruction set architecture as claimed in any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and the computer program is used to be programmed or configured by a microprocessor to execute the instruction selection optimization method for a hybrid instruction set architecture according to any one of claims 1 to 8.

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