Amplitude limiting dummy load circuit

Abstract

The invention provides an amplitude-limiting dummy load circuit. The amplitude-limiting dummy load circuit comprises a maximum voltage limiting circuit, a minimum voltage limiting circuit, a dummy load control circuit, a first triode and a first resistor, the third end of the dummy load control circuit is used for outputting a logic signal; the maximum voltage limiting circuit is used for limiting the maximum working voltage of the dummy load control circuit, the minimum voltage limiting circuit is used for limiting the minimum working voltage of the dummy load control circuit, and the dummy load control circuit is used for outputting a logic signal with a dummy load. Compared with the prior art, the low-cost and simple circuit is used, the voltage range needing to be provided with the dummy load can be conveniently adjusted, and finally mutual balance between the needed standby power consumption and the function of limiting the LED to output the highest voltage and other functions is achieved.

Description

Technical Field

[0001] The invention is applicable to the technical field of household appliances, and in particular relates to an amplitude limiting dummy load circuit. Background Art

[0002] As a type of power supply widely used in modern electronic devices, the performance stability and conversion efficiency of switching power supplies are the focus of attention during the design and development process. In practical applications, switching power supplies often face no-load or light-load operation. At this time, the output voltage is prone to rise due to the lack of effective load, resulting in voltage overshoot or instability. In addition, during the conversion process, the switching power supply may also exceed the normal working range due to sudden load changes or input voltage fluctuations, affecting the overall performance and life of the equipment.

[0003] In order to solve the above problems, the traditional method usually uses a fixed resistor as a dummy load to consume excess energy and stabilize the output voltage. The existing method is to use an operational amplifier to build a circuit to detect that the output voltage is within a certain range, and then give a corresponding control signal to control the on / off of the dummy load; or to divide the output voltage by resistors and capacitors and give the signal to the MCU to determine the output voltage at a certain moment, and then give a corresponding control signal to control the on / off of the dummy load. However, all of the above methods have the problem of requiring additional power supply voltage to the operational amplifier or MCU (microcontroller unit), complex circuit structure and high cost.

[0004] Therefore, a new limiting dummy load circuit is urgently needed to solve the above technical problems. Summary of the invention

[0005] The present invention proposes a limiting dummy load circuit, which aims to realize limiting voltage detection through simple discrete devices and avoid the use of integrated chips such as operational amplifiers and MCUs. The limiting dummy load circuit proposed by the present invention is low in price and easy to be used as a device replacement.

[0006] The present invention provides a limiting dummy load circuit, the limiting dummy load circuit comprising a maximum voltage limiting circuit, a minimum voltage limiting circuit, a dummy load control circuit, a first triode and a first resistor;

[0007] The first end of the maximum voltage limiting circuit is used to connect an external input signal, the second end of the maximum voltage limiting circuit is connected to the emitter of the first transistor, the third end of the maximum voltage limiting circuit is respectively connected to the base of the first transistor and the first end of the first resistor, the fourth end of the maximum voltage limiting circuit is respectively connected to the second end of the first resistor and the second end of the minimum voltage limiting circuit, the collector of the first transistor is connected to the first end of the minimum voltage limiting circuit, the third end of the minimum voltage limiting circuit is connected to the first end of the dummy load control circuit, the fourth end of the minimum voltage limiting circuit is connected to the second end of the dummy load control circuit, and the third end of the dummy load control circuit is used to output a logic signal;

[0008] The maximum voltage limiting circuit is used to limit the maximum operating voltage of the dummy load control circuit, the minimum voltage limiting circuit is used to limit the minimum operating voltage of the dummy load control circuit, and the dummy load control circuit is used to output a logic signal with a dummy load.

[0009] Preferably, the maximum voltage limiting circuit includes a first voltage zener diode, a second resistor, a third resistor and a second transistor, the first end of the second resistor serves as the first end of the maximum voltage limiting circuit, the second end of the second resistor is respectively connected to the cathode of the first voltage zener diode and the first end of the third resistor, the anode of the voltage zener diode serves as the fourth end of the maximum voltage limiting circuit, the second end of the third resistor is connected to the base of the second transistor, the emitter of the second transistor is connected to the first end of the second resistor, the emitter of the second transistor serves as the second end of the maximum voltage limiting circuit, and the collector of the second transistor serves as the third end of the maximum voltage limiting circuit.

[0010] Preferably, the minimum voltage limiting circuit includes a fourth resistor, a second voltage zener diode and a third transistor, the first end of the fourth resistor is connected to the emitter of the third transistor, the first end of the fourth resistor serves as the first end of the minimum voltage limiting circuit, the second end of the fourth resistor is respectively connected to the base of the third transistor and the cathode of the second voltage zener diode, the collector of the third transistor serves as the third end of the minimum voltage limiting circuit, and the anode of the second voltage zener diode serves as the second end of the minimum voltage limiting circuit and the fourth end of the minimum voltage limiting circuit.

[0011] Preferably, the dummy load control circuit includes a fifth resistor, a sixth resistor, a seventh resistor and a first MOS tube, the first end of the fifth resistor serves as the first end of the dummy load control circuit, the second end of the fifth resistor is respectively connected to the first end of the sixth resistor and the gate of the first MOS tube, the second end of the sixth resistor is connected to the source of the first MOS tube, the second end of the sixth resistor serves as the second end of the dummy load control circuit, the first end of the seventh resistor serves as the third end of the dummy load control circuit, and the second end of the seventh resistor is connected to the drain of the first MOS tube.

[0012] Compared with the prior art, the present invention adopts a limiting dummy load circuit, including a maximum voltage limiting circuit, a minimum voltage limiting circuit, a dummy load control circuit, a first transistor and a first resistor; the first end of the maximum voltage limiting circuit is used to connect an external input signal, the second end of the maximum voltage limiting circuit is connected to the emitter of the first transistor, the third end of the maximum voltage limiting circuit is respectively connected to the base of the first transistor and the first end of the first resistor, the fourth end of the maximum voltage limiting circuit is respectively connected to the second end of the first resistor and the second end of the minimum voltage limiting circuit, the collector of the first transistor is connected to the first end of the minimum voltage limiting circuit, the third end of the minimum voltage limiting circuit is connected to the first end of the dummy load control circuit, the fourth end of the minimum voltage limiting circuit is connected to the second end of the dummy load control circuit, and the third end of the dummy load control circuit is used to output a logic signal; the maximum voltage limiting circuit is used to limit the maximum operating voltage of the dummy load control circuit, the minimum voltage limiting circuit is used to limit the minimum operating voltage of the dummy load control circuit, and the dummy load control circuit is used to output a logic signal with a dummy load. In this way, the present invention uses a relatively cheap and simple circuit to conveniently adjust the voltage range required to carry a dummy load, and ultimately achieve a balance between the required standby power consumption and the function of limiting the maximum output voltage of the LED. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0014] Figure 1 It is a schematic diagram of the structure of a limiting dummy load circuit provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0015] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0016] Please refer to Figure 1The present invention provides a limiting dummy load circuit, the limiting dummy load circuit comprising a maximum voltage limiting circuit 1, a minimum voltage limiting circuit 2, a dummy load control circuit 3, a first transistor Q1 and a first resistor R1;

[0017] The first end of the maximum voltage limiting circuit 1 is used to connect an external input signal, the second end of the maximum voltage limiting circuit 1 is connected to the emitter of the first transistor Q1, the third end of the maximum voltage limiting circuit 1 is respectively connected to the base of the first transistor Q1 and the first end of the first resistor R1, the fourth end of the maximum voltage limiting circuit 1 is respectively connected to the second end of the first resistor R1 and the second end of the minimum voltage limiting circuit 2, the collector of the first transistor Q1 is connected to the first end of the minimum voltage limiting circuit 2, the third end of the minimum voltage limiting circuit 2 is connected to the first end of the dummy load control circuit 3, the fourth end of the minimum voltage limiting circuit is connected to the second end of the dummy load control circuit 3, and the third end of the dummy load control circuit 3 is used to output a logic signal;

[0018] The maximum voltage limiting circuit 1 is used to limit the maximum operating voltage of the dummy load control circuit 3, the minimum voltage limiting circuit 2 is used to limit the minimum operating voltage of the dummy load control circuit 3, and the dummy load control circuit 3 is used to output a logic signal with a dummy load (i.e., with the dummy load seventh resistor R7).

[0019] In the embodiment of the present invention, the maximum voltage limiting circuit 1 includes a first voltage zener diode ZD1, a second resistor R2, a third resistor R3 and a second transistor Q2, the first end of the second resistor R2 serves as the first end of the maximum voltage limiting circuit 1, the second end of the second resistor R2 is respectively connected to the cathode of the first voltage zener diode ZD1 and the first end of the third resistor R3, the anode of the voltage zener diode serves as the fourth end of the maximum voltage limiting circuit 1, the second end of the third resistor R3 is connected to the base of the second transistor Q2, the emitter of the second transistor Q2 is connected to the first end of the second resistor R2, the emitter of the second transistor Q2 serves as the second end of the maximum voltage limiting circuit 1, and the collector of the second transistor Q2 serves as the third end of the maximum voltage limiting circuit 1.

[0020] In an embodiment of the present invention, the minimum voltage limiting circuit 2 includes a fourth resistor R4, a second voltage zener diode ZD2 and a third transistor Q3, the first end of the fourth resistor R4 is connected to the emitter of the third transistor Q3, the first end of the fourth resistor R4 serves as the first end of the minimum voltage limiting circuit 2, the second end of the fourth resistor R4 is respectively connected to the base of the third transistor Q3 and the negative electrode of the second voltage zener diode ZD2, the collector of the third transistor Q3 serves as the third end of the minimum voltage limiting circuit 2, and the positive electrode of the second voltage zener diode ZD2 serves as the second end of the minimum voltage limiting circuit 2 and the fourth end of the minimum voltage limiting circuit 2.

[0021] In the embodiment of the present invention, the dummy load control circuit 3 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and a first MOS transistor Q4, the first end of the fifth resistor R5 serves as the first end of the dummy load control circuit 3, the second end of the fifth resistor R5 is respectively connected to the first end of the sixth resistor R6 and the gate of the first MOS transistor Q4, the second end of the sixth resistor R6 is connected to the source of the first MOS transistor Q4, the second end of the sixth resistor R6 serves as the second end of the dummy load control circuit 3, the first end of the seventh resistor R7 serves as the third end of the dummy load control circuit 3, and the second end of the seventh resistor R7 is connected to the drain of the first MOS transistor Q4.

[0022] Specifically, the working principle of the limiting dummy load circuit proposed in the present invention is as follows:

[0023] (1) When the LED+ voltage is lower than the voltage setting threshold of the second voltage zener diode ZD2, since no current is formed at the base of the third transistor Q3 in the minimum voltage limit circuit 2, the third transistor Q3 is turned off. Therefore, the gate of the first MOS transistor Q4 in the dummy load control circuit 3 is at a low level, the first MOS transistor Q4 is turned off, and the dummy load control circuit 3 does not work;

[0024] (2) When the LED+ voltage is higher than the voltage setting threshold of the second voltage zener diode ZD2 and lower than the voltage setting threshold of the first voltage zener diode ZD1, since the voltage is lower than the voltage threshold of the first voltage zener diode ZD1, the second transistor Q2 does not generate base current and the second diode is cut off; at this time, the first transistor Q1 generates base current through the first resistor R1, and the first transistor Q1 is saturated and turned on;

[0025] At this time, if the LED+ voltage is greater than (Veb voltage drop of the third transistor Q3+voltage threshold of the second voltage stabilizing diode ZD2), the base current of the third transistor Q3 is formed, and the third transistor Q3 is saturated and turned on; finally, after passing through the fifth resistor R5 and the sixth resistor R6, a sufficient threshold voltage is given to the first MOS transistor Q4, the first MOS transistor Q4 is turned on, and the dummy load control circuit 3 works;

[0026] (3) When the LED+ voltage is higher than the voltage setting threshold of the first voltage zener diode ZD1, the base current of the second transistor Q2 is formed through the emitter and base of the second transistor Q2, the first resistor R1, and the first voltage zener diode ZD1, and the second transistor Q2 is turned on; at this time, the voltage drop between the emitter and base of the first transistor Q1 is only the saturation conduction voltage drop of the second transistor Q2 (about 0.2V), which is not enough to turn on the emitter and base of the first transistor Q1, so the base current limiting circuit of the first transistor Q1 cannot be formed, and the first transistor Q1 is turned off; the subsequent minimum voltage limiting circuit 2 and the dummy load control circuit 3 do not work;

[0027] Compared with the prior art, the present invention adopts a limiting dummy load circuit, including a maximum voltage limiting circuit, a minimum voltage limiting circuit, a dummy load control circuit, a first transistor and a first resistor; the first end of the maximum voltage limiting circuit is used to connect an external input signal, the second end of the maximum voltage limiting circuit is connected to the emitter of the first transistor, the third end of the maximum voltage limiting circuit is respectively connected to the base of the first transistor and the first end of the first resistor, the fourth end of the maximum voltage limiting circuit is respectively connected to the second end of the first resistor and the second end of the minimum voltage limiting circuit, the collector of the first transistor is connected to the first end of the minimum voltage limiting circuit, the third end of the minimum voltage limiting circuit is connected to the first end of the dummy load control circuit, the fourth end of the minimum voltage limiting circuit is connected to the second end of the dummy load control circuit, and the third end of the dummy load control circuit is used to output a logic signal; the maximum voltage limiting circuit is used to limit the maximum operating voltage of the dummy load control circuit, the minimum voltage limiting circuit is used to limit the minimum operating voltage of the dummy load control circuit, and the dummy load control circuit is used to output a logic signal with a dummy load. In this way, the present invention uses a relatively cheap and simple circuit to conveniently adjust the voltage range required to carry a dummy load, and ultimately achieve a balance between the required standby power consumption and the functions of limiting the maximum output voltage of the LED.

[0028] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0029] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A limiting dummy load circuit, characterized in that: The amplitude limiting dummy load circuit comprises a maximum voltage limiting circuit, a minimum voltage limiting circuit, a dummy load control circuit, a first transistor and a first resistor; The first end of the maximum voltage limiting circuit is used to connect an external input signal, the second end of the maximum voltage limiting circuit is connected to the emitter of the first transistor, the third end of the maximum voltage limiting circuit is respectively connected to the base of the first transistor and the first end of the first resistor, the fourth end of the maximum voltage limiting circuit is respectively connected to the second end of the first resistor and the second end of the minimum voltage limiting circuit, the collector of the first transistor is connected to the first end of the minimum voltage limiting circuit, the third end of the minimum voltage limiting circuit is connected to the first end of the dummy load control circuit, the fourth end of the minimum voltage limiting circuit is connected to the second end of the dummy load control circuit, and the third end of the dummy load control circuit is used to output a logic signal; The maximum voltage limiting circuit is used to limit the maximum operating voltage of the dummy load control circuit, the minimum voltage limiting circuit is used to limit the minimum operating voltage of the dummy load control circuit, and the dummy load control circuit is used to output a logic signal with a dummy load.

2. The limiting dummy load circuit according to claim 1, characterized in that: The maximum voltage limiting circuit includes a first voltage-limiting diode, a second resistor, a third resistor and a second transistor, wherein the first end of the second resistor serves as the first end of the maximum voltage limiting circuit, the second end of the second resistor is respectively connected to the cathode of the first voltage-limiting diode and the first end of the third resistor, the anode of the voltage-limiting diode serves as the fourth end of the maximum voltage limiting circuit, the second end of the third resistor is connected to the base of the second transistor, the emitter of the second transistor is connected to the first end of the second resistor, the emitter of the second transistor serves as the second end of the maximum voltage limiting circuit, and the collector of the second transistor serves as the third end of the maximum voltage limiting circuit.

3. The limiting dummy load circuit according to claim 1, characterized in that: The minimum voltage limiting circuit includes a fourth resistor, a second voltage zener diode and a third transistor, the first end of the fourth resistor is connected to the emitter of the third transistor, the first end of the fourth resistor serves as the first end of the minimum voltage limiting circuit, the second end of the fourth resistor is respectively connected to the base of the third transistor and the cathode of the second voltage zener diode, the collector of the third transistor serves as the third end of the minimum voltage limiting circuit, and the anode of the second voltage zener diode serves as the second end of the minimum voltage limiting circuit and the fourth end of the minimum voltage limiting circuit.

4. The limiting dummy load circuit according to claim 1, characterized in that: The dummy load control circuit includes a fifth resistor, a sixth resistor, a seventh resistor and a first MOS tube, the first end of the fifth resistor serves as the first end of the dummy load control circuit, the second end of the fifth resistor is respectively connected to the first end of the sixth resistor and the gate of the first MOS tube, the second end of the sixth resistor is connected to the source of the first MOS tube, the second end of the sixth resistor serves as the second end of the dummy load control circuit, the first end of the seventh resistor serves as the third end of the dummy load control circuit, and the second end of the seventh resistor is connected to the drain of the first MOS tube.

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