Motor controller worst case analysis method, terminal and medium

Abstract

The invention discloses a worst case analysis method of a motor controller, a terminal and a medium. The analysis method comprises the following steps: obtaining at least two analysis indexes and obtaining a circuit simulation model corresponding to the motor controller; wherein the at least two analysis indexes are determined by at least two of a fault tree analysis method, a potential failure mode influence and consequence analysis method, a hazard analysis and risk assessment analysis method, an expert experience assessment method and fault library information; based on the at least two analysis indexes, carrying out circuit worst case analysis on the circuit simulation model to obtain an analysis result corresponding to each analysis index; and verifying a design circuit of the motor controller according to the at least two analysis results. According to the scheme, the analysis indexes are determined by using different analysis methods, and the comprehensiveness of the worst case analysis of the motor controller is improved.

Description

Technical Field

[0001] The present application relates to the technical field of motor controllers, and in particular to a worst-case analysis method, terminal and medium for motor controllers. Background Art

[0002] As the control unit of the motor, the motor controller plays an important role in ensuring the safe and stable operation of the motor. The motor controller contains different circuits, and these controller circuits need to maintain normal operation under different working environments. In order to determine the design result of the controller circuit, that is, whether the designed circuit meets the requirements, it is necessary to perform corresponding tests on the designed circuit.

[0003] As an important part of circuit testing, worst-case analysis (WCCA) analyzes the designed circuit accordingly. On the one hand, it determines the main factors that affect the stress of components in the designed circuit, and on the other hand, it provides specific data of each parameter of the designed circuit under the worst case. On the other hand, it can also point out the improvement direction of the designed circuit and improve the reliability of the designed circuit. The related technology mainly adopts a single analysis method, which is not comprehensive enough. Summary of the invention

[0004] The present application provides a worst-case analysis method for a motor controller, a terminal device, and a computer storage medium.

[0005] A technical solution adopted by the present application is to provide a worst-case analysis method for a motor controller, the method comprising:

[0006] Obtain at least two analysis indicators and obtain a circuit simulation model corresponding to the motor controller; wherein the at least two analysis indicators are determined by at least two of a fault tree analysis method, a potential failure mode impact and consequence analysis method, a hazard analysis and risk assessment analysis method, an expert experience assessment method, and fault library information;

[0007] Based on at least two analysis indicators, a circuit worst-case analysis is performed on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator;

[0008] The designed circuit of the motor controller is verified based on at least two analysis results.

[0009] Optionally, at least two analysis indicators are obtained, including:

[0010] Obtain performance analysis conditions for the motor controller;

[0011] Based on the performance analysis conditions, at least two analysis indicators are determined.

[0012] Optionally, based on the performance analysis conditions, at least two analysis indicators are determined, including:

[0013] Obtain at least two sets of candidate analysis results corresponding to the fault tree analysis method, the potential failure mode impact and consequence analysis method, the hazard analysis and risk assessment analysis method, the expert experience assessment method, and the fault library information in the performance analysis conditions; the candidate analysis results include candidate analysis indicators and candidate indicator scores corresponding to the candidate analysis indicators;

[0014] A weighted sum of the scores of at least two groups of candidate indicators is calculated to obtain an analysis indicator score, and the analysis indicator score is used to determine at least two analysis indicators from the at least two groups of candidate analysis indicators.

[0015] Optionally, based on at least two analysis indicators, a circuit worst-case analysis is performed on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator, including:

[0016] Divide the circuit simulation model into components to obtain component models corresponding to several components;

[0017] Based on at least two analysis indicators, the circuit simulation model is subjected to a circuit worst-case analysis to obtain analysis results corresponding to each analysis indicator, including:

[0018] Based on at least two analysis indicators, a worst-case circuit analysis is performed on each component model to obtain a local analysis result corresponding to each component under each analysis indicator;

[0019] The analysis result is obtained by utilizing all local analysis results under the same analysis index.

[0020] Optionally, the circuit simulation model is divided into components to obtain component models corresponding to a number of components, including:

[0021] In response to the simulation model library not containing a component model corresponding to the target component, a candidate component model corresponding to a similar component similar to the target component is obtained from the simulation model library, the specification parameters of the candidate component model are modified, and the modified candidate component model is used as the target component model corresponding to the target component.

[0022] Optionally, verifying a design circuit of the motor controller according to at least two analysis results includes:

[0023] Selecting at least some of the analysis indicators, and performing a circuit worst-case test on the motor controller based on at least some of the analysis indicators to obtain actual test results;

[0024] In response to the analysis result being within a preset range, a design circuit of the motor controller is verified based on at least two analysis results; the preset range is determined based on actual test results.

[0025] Optionally, after the step of selecting at least some of the analysis indicators and performing a circuit worst-case test on the motor controller based on at least some of the analysis indicators to obtain actual test results, the method further includes:

[0026] In response to the analysis result being outside a preset range, optimizing or redesigning the circuit simulation model;

[0027] Based on at least two analysis indicators, a circuit worst-case analysis is performed on the redesigned or optimized circuit simulation model to obtain an optimization analysis result corresponding to each analysis indicator;

[0028] The designed circuit of the motor controller is verified based on at least two optimization analysis results.

[0029] Optionally, the circuit worst-case analysis includes at least one of sensitivity analysis, component thermal and electrical stress analysis, Monte Carlo analysis, and extreme value stress analysis.

[0030] Another technical solution adopted by the present application is to provide a terminal device, the terminal device comprising a memory and a processor connected to the memory;

[0031] The memory is used to store program data, and the processor is used to execute the program data to implement the worst-case analysis method for the motor controller as described above.

[0032] Another technical solution adopted by the present application is to provide a computer storage medium, wherein the computer storage medium is used to store program data, and when the program data is executed by a computer, it is used to implement the worst-case analysis method of the motor controller as described above.

[0033] The beneficial effects of the present application are: using at least two analysis methods, determining at least two analysis indicators, improving the comprehensiveness of the worst-case analysis of the circuit, further, based on at least two analysis indicators, performing the worst-case analysis of the circuit on the circuit simulation model, obtaining the analysis results corresponding to each analysis indicator, and further, using at least two analysis results to verify the design circuit of the motor controller. The worst-case analysis method for the motor controller provided by the present application determines the analysis indicators through different analysis methods, improving the comprehensiveness of the worst-case analysis of the motor controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0035] Figure 1 It is a flow chart of an embodiment of a worst-case analysis method for a motor controller provided by the present application;

[0036] Figure 2 is a flow chart of another embodiment of the worst-case analysis method for a motor controller provided by the present application;

[0037] Figure 3 is a schematic diagram of an embodiment of a circuit simulation model provided by the present application;

[0038] Figure 4 is a schematic diagram of an embodiment of component stress analysis results provided by the present application;

[0039] Figure 5 is a schematic diagram of an embodiment of the current-sensitivity analysis result provided by the present application;

[0040] Figure 6 is a schematic diagram of an embodiment of a worst-case analysis result provided by the present application;

[0041] Figure 7 is a schematic diagram of another embodiment of the worst-case analysis result provided by the present application;

[0042] Figure 8 is a schematic diagram of an embodiment of the Monte Carlo analysis result provided by the present application;

[0043] Fig. 9 It is a structural diagram of an embodiment of a terminal device provided by the present application;

[0044] Fig.10 It is a structural diagram of an embodiment of a computer storage medium provided by the present application. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0046] The worst case of the motor controller refers to the situation when the most undesirable conditions are applied to the motor controller circuit while considering the circuit working environment, circuit input, and component parameter value drift of the motor controller. The worst case circuit analysis (WCCA) of the motor controller is to evaluate whether the working performance of the motor controller under this worst case condition still meets the design requirements.

[0047] The worst-case circuit analysis method (WCCA) provided by related technologies usually performs simple calculations (such as resistance and capacitance) in the early stages of research and development. In a specific circuit, there are many devices involved, many random combination categories, and a huge workload for theoretical calculations, which obviously cannot meet specific requirements (tolerance, parameter drift, etc.). In addition to simple theoretical calculations and formula derivations, it can also be carried out on certain simulation software. However, for complex devices in the circuit, it is necessary to obtain simulation models with specified properties, which largely depends on the support of the chip manufacturer, and the circuit construction is relatively complex, making it difficult to complete specific analysis.

[0048] Please refer to Figure 1 , Figure 1 It is a flow chart of an embodiment of a worst-case analysis method for a motor controller provided in the present application.

[0049] like Figure 1 As shown, the worst-case analysis method for the motor controller in the embodiment of the present application may specifically include the following steps:

[0050] S1, obtaining at least two analysis indicators and obtaining a circuit simulation model corresponding to the motor controller.

[0051] Among them, at least two analysis indicators are determined by at least two of the fault tree analysis method, the potential failure mode impact and consequence analysis method, the hazard analysis and risk assessment analysis method, the expert experience assessment method, and the fault library information.

[0052] The worst-case analysis method for the motor controller provided in the present application is mainly performed by a controller analysis device. In some embodiments, the controller analysis device can be a device for monitoring images, a user equipment (UE), a mobile device, a user terminal, a terminal, a cellular phone, a cordless phone, a personal digital assistant (PDA), a handheld device, a computing device, a vehicle-mounted device, a wearable device, and an autonomous vehicle, a robot, a security system, and any one or more products of glasses and helmets for augmented reality or virtual reality. In some possible implementations, the worst-case analysis method for the motor controller can be implemented by a processor calling computer-readable instructions stored in a memory.

[0053] In some possible embodiments, the analysis index may be a parameter of a design circuit of the motor controller under different working conditions.

[0054] Exemplarily, the analysis indicators may be component stress, worst load capacity, minimum input operating voltage, transient delay, loop stability, etc., which are not limited here.

[0055] In some possible embodiments, the controller analysis device obtains the component composition of the design circuit of the motor controller, and obtains a circuit simulation model based on the parameters of the components and the connection relationship between the components.

[0056] Among them, the analysis indicators are derived from some analysis methods and experience summaries. In some embodiments, the analysis indicators include fault tree analysis (FTA) from system level to component level failure. In some embodiments, the analysis indicators include potential failure mode effects and consequences analysis (FMEA) from device level to system. In some embodiments, the analysis indicators include hazard analysis and risk assessment (HARA) of the whole machine. In some embodiments, the analysis indicators also include the evaluation results of expert experience. In some possible embodiments, the analysis indicators also include existing fault library information.

[0057] In the related art, the analysis indicators are mainly derived from one of the above-mentioned analysis methods. Considering that a single analysis method may miss some analysis indicators, based on this, at least two of the above-mentioned analysis methods are adopted to improve the comprehensiveness and rationality of obtaining the analysis indicators.

[0058] S2, based on at least two analysis indicators, performing a circuit worst-case analysis on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator.

[0059] Specifically, the controller analysis device performs a circuit worst-case analysis on the circuit simulation model based on at least two analysis indicators to obtain an analysis result corresponding to each analysis indicator.

[0060] S3, verifying a design circuit of the motor controller according to at least two analysis results.

[0061] In some embodiments, the controller analysis device compares the design requirements and analysis results of the design circuit, and if the analysis results are outside the design requirements, the controller analysis device redesigns or optimizes the design circuit, for example, by replacing at least some components in the design circuit and then re-analyzing the circuit's worst-case scenario.

[0062] In some embodiments, if the analysis result is within the design requirements, the controller analysis device archives the analysis result.

[0063] The above scheme uses at least two analysis methods to determine at least two analysis indicators, thereby improving the comprehensiveness of the worst-case analysis of the circuit. Furthermore, based on the at least two analysis indicators, the circuit simulation model is subjected to the worst-case analysis of the circuit to obtain the analysis result corresponding to each analysis indicator. Furthermore, the design circuit of the motor controller is verified using the at least two analysis results. The worst-case analysis method for the motor controller provided in the present application determines the analysis indicators through different analysis methods, thereby improving the comprehensiveness of the worst-case analysis of the motor controller.

[0064] Another embodiment of the worst-case analysis method for a motor controller provided by the present application may specifically include the following steps:

[0065] S11, obtaining performance analysis conditions of the motor controller.

[0066] Optionally, the performance analysis condition may be a design requirement of the motor controller, or may be certain functions corresponding to components in the design circuit in a specification sheet.

[0067] Exemplarily, the performance analysis condition is any one of the supply voltage and the ambient temperature.

[0068] S12, determining at least two analysis indicators based on the performance analysis conditions.

[0069] In some possible embodiments, the controller analysis device performs at least two methods of a fault tree analysis method, a potential failure mode impact and consequence analysis method, a hazard analysis and risk assessment analysis method, an expert experience assessment method, and fault library information on the performance analysis conditions to obtain at least two candidate analysis indicator lists. Further, the controller analysis device determines at least two analysis indicators based on the two candidate analysis indicator lists.

[0070] S13, obtaining a circuit simulation model corresponding to the motor controller.

[0071] S14, based on at least two analysis indicators, performing a circuit worst-case analysis on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator.

[0072] S15, verifying the design circuit of the motor controller according to at least two analysis results.

[0073] The above scheme uses at least two analysis methods to determine at least two analysis indicators, thereby improving the comprehensiveness of the worst-case analysis of the circuit. Furthermore, based on the at least two analysis indicators, the circuit simulation model is subjected to the worst-case analysis of the circuit to obtain the analysis result corresponding to each analysis indicator. Furthermore, the design circuit of the motor controller is verified using the at least two analysis results. The worst-case analysis method for the motor controller provided in the present application determines the analysis indicators through different analysis methods, thereby improving the comprehensiveness of the worst-case analysis of the motor controller.

[0074] Another embodiment of the worst-case analysis method for a motor controller provided by the present application may specifically include the following steps:

[0075] S21, obtaining performance analysis conditions of the motor controller.

[0076] S22, obtaining at least two groups of candidate analysis results corresponding to the performance analysis conditions in the fault tree analysis method, the potential failure mode impact and consequence analysis method, the hazard analysis and risk assessment analysis method, the expert experience assessment method, and the fault library information.

[0077] The candidate analysis results include candidate analysis indicators and candidate indicator scores corresponding to the candidate analysis indicators. The candidate indicator scores are used to characterize the importance of the candidate analysis indicators. In some embodiments, the higher the candidate indicator score, the higher the importance of the corresponding candidate analysis indicator.

[0078] S23, calculating a weighted sum of the scores of at least two groups of candidate indicators to obtain an analysis indicator score, and using the analysis indicator score to determine at least two analysis indicators from the at least two groups of candidate analysis indicators.

[0079] Specifically, the controller analysis device calculates a weighted sum of at least two groups of candidate index scores to obtain an analysis index score.

[0080] In some embodiments, the weight can be determined by the importance of the analysis method, and the higher the importance, the higher the weight. Optionally, the weight can be determined by an expert knowledge base, a neural network, or a machine learning method, which is not limited here.

[0081] Exemplarily, the controller analysis device obtains the first candidate analysis result corresponding to the performance analysis condition under the fault tree analysis method, and the second candidate analysis result corresponding to the performance analysis condition under the potential failure mode effect and consequence analysis method. The first candidate analysis result includes the first candidate analysis indicator, and the first candidate indicator score corresponding to the first candidate analysis indicator. Similarly, the second candidate analysis result includes the second candidate analysis indicator, and the second candidate indicator score corresponding to the second candidate analysis indicator.

[0082] Furthermore, the controller analysis device obtains a first weight corresponding to the fault tree analysis method and a second weight corresponding to the potential failure mode impact and consequence analysis method, calculates the weighted sum of the first candidate indicator score and the second candidate indicator score, and obtains the analysis indicator score. Furthermore, the controller analysis device selects several candidate analysis indicators with the highest analysis indicator scores to obtain at least two analysis indicators.

[0083] In the related art, a step-by-step approach is mainly adopted, where the analysis results are screened using the first analysis method to obtain the first candidate analysis indicator, and then the first candidate analysis indicator is further analyzed using the second analysis method to determine the analysis indicator. Considering that the first candidate analysis indicator obtained may omit useful candidate indicator content, based on this, the present application adopts different analysis methods to determine multiple groups of candidate analysis indicators, and then performs weighted summation to improve the comprehensiveness of the analysis indicators.

[0084] S24, obtaining a circuit simulation model corresponding to the motor controller.

[0085] S25, based on at least two analysis indicators, performing a circuit worst-case analysis on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator.

[0086] S26, verifying the design circuit of the motor controller according to at least two analysis results.

[0087] The above scheme uses at least two analysis methods to determine at least two analysis indicators, thereby improving the comprehensiveness of the worst-case analysis of the circuit. Furthermore, based on the at least two analysis indicators, the circuit simulation model is subjected to the worst-case analysis of the circuit to obtain the analysis result corresponding to each analysis indicator. Furthermore, the design circuit of the motor controller is verified using the at least two analysis results. The worst-case analysis method for the motor controller provided in the present application determines the analysis indicators through different analysis methods, thereby improving the comprehensiveness of the worst-case analysis of the motor controller.

[0088] Furthermore, considering that different analysis methods have their own advantages and disadvantages, the present application simultaneously adopts at least two analysis methods to determine candidate analysis indicators, and then determines the analysis indicators from the candidate analysis indicators by weighted summation to avoid omission of important analysis indicators.

[0089] Another embodiment of the worst-case analysis method for a motor controller provided by the present application may specifically include the following steps:

[0090] S31, dividing the circuit simulation model into components to obtain component models corresponding to a number of components.

[0091] In some embodiments, the controller analysis device divides the components of the circuit simulation model according to the types and specific categories of the components to perform a worst-case analysis on each component to meet the need for worst-case analysis of the design circuit of the motor controller.

[0092] This application takes into account the large number of components involved in the design of the circuit, and the large number of categories that can be randomly combined. If the circuit simulation model is not divided into components, it will take a lot of time to build the circuit simulation model, and it will be difficult to meet the requirements under certain analysis indicators (such as tolerance, parameter drift, etc.). Based on this, by dividing the components of the circuit simulation, the efficiency of building the circuit simulation model can be reduced, and the efficiency and comprehensiveness of the worst-case analysis can be further improved.

[0093] The circuit modules in the motor controller hardware are divided into the smallest units as much as possible, and the smaller the module decomposition, the more conducive to analysis. In some embodiments, the controller analysis device determines the major category to which the designed circuit belongs, and the major category to which the circuit belongs may include analog circuits, digital circuits, and mixed analog and digital circuits. Further, the controller analysis device obtains the subcategory to which the circuit module belongs in the designed circuit, and specifically divides it into the smallest circuit unit. For example, the analog circuit includes any one or more of the bus voltage sampling unit, the phase current sampling unit, the temperature sampling unit, and the rotary transformer unit. The digital circuit has any one or more of the level conversion unit, the drive unit, the communication unit, the collision unit, and the interlocking unit; the mixed analog and digital circuit has any one or more of the minimum system unit and the power management unit.

[0094] Each component model corresponds to a component in the design circuit, and each component model is used to simulate the operation of the corresponding component.

[0095] In some embodiments, the controller analysis device obtains the component model corresponding to the target component from an existing component model library.

[0096] In some possible embodiments, in response to the simulation model library not containing a component model corresponding to the target component, the controller analysis device obtains a candidate component model corresponding to a similar component similar to the target component, modifies the specification parameters of the candidate component model, and uses the modified candidate component model as the target component model corresponding to the target component. Considering that the original manufacturer may not be able to provide detailed component models for some components in the design circuit, based on this, the present application searches for the component most similar to the target component in the existing component model library, and modifies the parameters of the component model corresponding to the component to obtain the target component model.

[0097] In the related art, for designing more complex components in the circuit, it is necessary to obtain the component simulation model provided by the original manufacturer. Without the component simulation model, it is difficult to conduct the worst-case analysis of the circuit for the component model.

[0098] Through the above method, the extensiveness of worst-case analysis of components can be further improved.

[0099] S32, based on at least two analysis indicators, performing a circuit worst-case analysis on each component model to obtain a local analysis result corresponding to each component under each analysis indicator.

[0100] Among them, at least two analysis indicators are determined by at least two of the fault tree analysis method, the potential failure mode impact and consequence analysis method, the hazard analysis and risk assessment analysis method, the expert experience assessment method, and the fault library information.

[0101] Specifically, the controller analysis device performs a worst-case circuit analysis on each component model based on different analysis indicators, and obtains a local analysis result corresponding to each component under each analysis indicator.

[0102] In some possible embodiments, in response to the simulation model library not containing a component model corresponding to a target component and the simulation model library not containing a candidate component model, a worst-case circuit test is performed on the target component based on at least two analysis indicators to obtain a local analysis result corresponding to the target component under each analysis indicator.

[0103] It should be noted that for some target components that do not have their own simulation models, it is necessary to conduct comprehensive real boundary tests on the target components, that is, to conduct actual worst-case analysis tests on the target components according to the analysis indicators, and use the test results under each analysis indicator as the local analysis results. Through the above method, the performance input and output indicators of the target components are determined, thereby further improving the comprehensiveness of the worst-case analysis method provided in this application.

[0104] S33, using all local analysis results under the same analysis index to obtain an analysis result.

[0105] Specifically, the controller analysis device aggregates the local analysis results of different components under the same analysis index to obtain the analysis result under the same analysis index. Further, the analysis result corresponding to each analysis index is obtained.

[0106] S34, verifying the design circuit of the motor controller according to at least two analysis results.

[0107] The above scheme uses at least two analysis methods to determine at least two analysis indicators, thereby improving the comprehensiveness of the worst-case analysis of the circuit. Furthermore, based on the at least two analysis indicators, the circuit simulation model is subjected to the worst-case analysis of the circuit to obtain the analysis result corresponding to each analysis indicator. Furthermore, the design circuit of the motor controller is verified using the at least two analysis results. The worst-case analysis method for the motor controller provided in the present application determines the analysis indicators through different analysis methods, thereby improving the comprehensiveness of the worst-case analysis of the motor controller.

[0108] Furthermore, the circuit simulation model is split, and a divide-and-conquer approach is adopted to perform corresponding analysis on each component, taking into account the authenticity of the details. In addition, the worst-case analysis of the circuit can be completed without complex theoretical calculations.

[0109] Another embodiment of the worst-case analysis method for a motor controller provided by the present application may specifically include the following steps:

[0110] S41, obtaining at least two analysis indicators and obtaining a circuit simulation model corresponding to the motor controller.

[0111] Among them, at least two analysis indicators are determined by at least two of the fault tree analysis method, the potential failure mode impact and consequence analysis method, the hazard analysis and risk assessment analysis method, the expert experience assessment method, and the fault library information.

[0112] S42, based on at least two analysis indicators, performing a circuit worst-case analysis on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator.

[0113] In some embodiments, the circuit worst-case analysis method provided in the present application is performed using PSpice simulation software.

[0114] In some embodiments, the circuit worst-case analysis includes at least one of sensitivity analysis, component thermal and electrical stress analysis, Monte Carlo analysis, and extreme value stress analysis.

[0115] For sensitivity analysis, after the controller analysis device sets the basic parameters of the components, it calls the relevant functions (such as maximum value, average value, rise time, etc.) to record and scan the circuit to obtain the most sensitive parameters that affect the input and output of the circuit, and record its relative sensitivity value to understand the impact of the specific tolerance in the circuit on the circuit output, providing a basic reference for subsequent optimization design.

[0116] For thermoelectric stress analysis, the controller analysis device can refer to the circuit reliability and derating design or the "GJB / Z35 Component Derating Guidelines", and combine the specifications in the circuit to compile a file library of rated voltage / rated current / peak power / maximum temperature, etc. while leaving a margin. Furthermore, in the thermoelectric stress analysis link, the controller analysis device sets the boundary (maximum voltage, maximum load, maximum ambient temperature) conditions and calls the file library, and records the stress proportion of each device in the circuit. It is possible to predict the power consumption of components, junction temperature, secondary breakdown limit, breakdown voltage of the maximum current limiting device, etc., and obtain the risk situation of the circuit.

[0117] For example, before performing the thermal and electrical stress analysis, the controller analysis device may also perform a basic design selection check on the components, and the check items may be as shown in the following table:

[0118]

[0119] For Monte Carlo analysis, under certain working conditions of the designed circuit, the controller analysis device is set to simulate no less than 400 times. After the analysis is completed, the statistical indicators of the parameters are obtained and recorded to obtain the circuit characteristic values ​​obtained from each simulation and the statistical analysis of large quantities of circuit characteristic raw data.

[0120] For extreme stress analysis, the controller analysis device determines the change direction of each component (increase / decrease) according to the requirements that cause the circuit characteristics to deteriorate, and then simulates these components in the corresponding worst direction according to their possible maximum range (that is, the set tolerance range), and finally outputs the parameters of the circuit parameter extreme value situation.

[0121] S43, selecting at least part of the analysis indicators, and performing a circuit worst-case test on the motor controller based on at least part of the analysis indicators to obtain actual test results.

[0122] Specifically, considering that the analysis results obtained based on the simulation model may be different from the actual results, the controller analysis device randomly selects some analysis indicators, performs actual boundary tests and fault input tests based on some analysis indicators, and obtains actual test results.

[0123] S45, in response to the analysis result being within a preset range, verifying a design circuit of the motor controller according to at least two analysis results.

[0124] The preset range is determined based on actual test results.

[0125] It can be understood that the analysis result is within the preset range, and it is determined that the actual verification result is consistent with the simulation result, and the controller analysis step executes the step of verifying the designed circuit.

[0126] The above scheme uses at least two analysis methods to determine at least two analysis indicators, thereby improving the comprehensiveness of the worst-case analysis of the circuit. Furthermore, based on the at least two analysis indicators, the circuit simulation model is subjected to the worst-case analysis of the circuit to obtain the analysis result corresponding to each analysis indicator. Furthermore, the design circuit of the motor controller is verified using the at least two analysis results. The worst-case analysis method for the motor controller provided in the present application determines the analysis indicators through different analysis methods, thereby improving the comprehensiveness of the worst-case analysis of the motor controller.

[0127] Furthermore, the analysis results obtained from the simulation are used to carry out actual tests, and the test results are used to verify the analysis results to improve the confidence of the analysis.

[0128] Another embodiment of the worst-case analysis method for a motor controller provided by the present application may specifically include the following steps:

[0129] S51, obtaining at least two analysis indicators and obtaining a circuit simulation model corresponding to the motor controller.

[0130] Among them, at least two analysis indicators are determined by at least two of the fault tree analysis method, the potential failure mode impact and consequence analysis method, the hazard analysis and risk assessment analysis method, the expert experience assessment method, and the fault library information.

[0131] S52, based on at least two analysis indicators, performing a circuit worst-case analysis on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator.

[0132] S53, selecting at least part of the analysis indicators, and performing a circuit worst-case test on the motor controller based on at least part of the analysis indicators to obtain actual test results.

[0133] S54, selecting at least part of the analysis indicators, and performing a circuit worst-case test on the motor controller based on at least part of the analysis indicators to obtain actual test results.

[0134] S55, in response to the analysis result being outside a preset range, optimizing or redesigning the circuit simulation model.

[0135] It is understandable that if the analysis result is outside the preset range, it means that there may be a design problem in the circuit simulation model, so the controller analysis device optimizes the design of the component model or the connection relationship between the component models in the circuit simulation model. Alternatively, the controller analysis device redesigns the circuit simulation model.

[0136] S56, based on at least two analysis indicators, performing a circuit worst-case analysis on the redesigned or optimized circuit simulation model to obtain an optimization analysis result corresponding to each analysis indicator.

[0137] Similarly, the circuit analysis device performs a circuit worst-case analysis on the optimized or redesigned circuit simulation model based on at least two analysis indicators to obtain an optimized analysis result corresponding to each analysis indicator.

[0138] S57, verifying the design circuit of the motor controller according to at least two optimization analysis results.

[0139] The above scheme uses at least two analysis methods to determine at least two analysis indicators, thereby improving the comprehensiveness of the worst-case analysis of the circuit. Furthermore, based on the at least two analysis indicators, the circuit simulation model is subjected to the worst-case analysis of the circuit to obtain the analysis result corresponding to each analysis indicator. Furthermore, the design circuit of the motor controller is verified using the at least two analysis results. The worst-case analysis method for the motor controller provided in the present application determines the analysis indicators through different analysis methods, thereby improving the comprehensiveness of the worst-case analysis of the motor controller.

[0140] Furthermore, the analysis results obtained from the simulation are used to carry out actual tests, and the test results are used to verify the analysis results to improve the confidence of the analysis.

[0141] See also Figure 2 , Figure 2 It is a flowchart of another embodiment of the worst-case analysis method for a motor controller provided in the present application.

[0142] like Figure 2 As shown, another embodiment of the worst-case analysis method for a motor controller provided by the present application may specifically include the following steps:

[0143] S101, obtaining performance analysis conditions.

[0144] S102, obtaining analysis indicators.

[0145] S103, dividing the circuit module.

[0146] S104, establishing a simulation circuit model and confirming whether analysis can be performed.

[0147] If the judgment result is yes, jump to S105. If the judgment result is no, jump to S110.

[0148] S105, selecting key circuit parameters.

[0149] S106, simulation analysis.

[0150] S107, output simulation results, and perform sampling test and verification.

[0151] S108: Are the two results consistent?

[0152] If the judgment result is yes, jump to S109. If the judgment result is no, jump to S111.

[0153] S109, whether the indicators are qualified.

[0154] If the judgment result is yes, jump to S112. If the judgment result is no, jump to S111.

[0155] S110, perform a comprehensive boundary test and jump to S109.

[0156] S111, optimize design or redesign. Jump to S101.

[0157] S112, end.

[0158] First, the conditions for worst-case performance analysis are clarified. This method is derived from the overall design requirements of the project or from certain functions defined in the electronic component specification.

[0159] Based on these analysis conditions, with the help of the worst-case analysis indicators to be obtained, the circuit modules are disassembled and segmented (such as analog circuits, digital circuits, digital-analog circuits, etc.). After the smallest unit of the circuit is extracted, the simulation circuit can be built with reference to the existing circuit modules, the key parameters to be tested can be selected, and the simulation can be run.

[0160] Finally, the simulation results of the circuit are verified with the results of the randomly selected boundary test and fault input test. If the difference is large, the circuit design is redesigned or optimized; if the results of the random selection verification are basically consistent with the simulation results, the experimental data is output and archived. If a specific simulation model in the circuit cannot be provided by the original manufacturer, it is obtained by finding the most similar device in the existing model library and modifying the parameters. For very few devices that do not have simulation models, comprehensive circuit parameter boundary tests, fault injection tests, etc. are carried out to confirm the input and output indicators of the performance, so as to obtain relevant data.

[0161] Refer to the worst-case performance analysis conditions of the project input requirements, and obtain the worst-case analysis conditions (i.e. the performance analysis conditions mentioned above) and analysis indicators through FMEA, HARA, FTA, expert evaluation, fault library information, etc., as shown in the following table:

[0162]

[0163] The worst-case analysis method for the motor controller provided in this embodiment takes the switch controller LM3478_TRANS as an example, builds a circuit simulation model, and performs time domain simulation of the circuit simulation model. The built circuit simulation model is as follows: Figure 3 shown.

[0164] Among them, +5.8V_VPRE is output by +12V_MCU through the SBC chip, and is set to lag 400us behind +12V_MCU. C16 and C24 are electrolytic capacitors. In addition to considering the withstand voltage and accuracy, the specific parameters of ESR and ESL need to be configured. RLoad is a simulated pure resistive load, which is set to 15Ω (0.9A) under rated conditions and 10Ω (1.4A) under peak conditions. SS is the soft start setting. When it is 1, it is a steady-state analysis, and when it is set to 0, it is a transient analysis. For the remaining resistors and capacitors, refer to the component specifications to set the accuracy, power, temperature range, temperature rise coefficient, surge current, etc.

[0165] In the component stress analysis phase, this embodiment uses PSpice AA simulation software, the circuit resistor and capacitor are set to three-level derating factors, and the op amp / comparator is set to two-level derating factors, and the output is as follows: Figure 4 The table shown. Figure 4 It can be seen that under high temperature conditions, the resistor R441 is subjected to the greatest temperature stress, with a maximum temperature rise of 5°C, approaching 89% of the derating.

[0166] In the L2 current-sensitivity analysis of the inductor, we get Figure 5 As shown in the table, C21, L2B, L2A, and R7 have a greater impact on the relative sensitivity of the steady-state L2B peak current, which are -370mA / 1%, -198mA / 1%, -183mA / 1%, and -109mA / 1%, respectively. The tolerance parameters of other components can be ignored.

[0167] In the loop stability-worst-case analysis phase, C28 is scanned at 0.022nF / 0.22nF / 2.2nF / 22nF in turn, and a worst-case analysis is performed. Combined with the four scans of C28, when it is set to 2.2nF, the phase margin requirement can be met; the maximum change in the tolerance range of C28 is positively changed and analyzed, such as Figure 6 As shown in the 2nd row and 6th column of the table, the phase margin is 58.1°. The maximum change in the tolerance range is reversed at C28 and analyzed, that is, Figure 7 As shown in the 2nd row and 6th column of the table, the phase margin is 58.9°. The average phase margin of the two is 58.5°.

[0168] in, Figure 6The square in the figure represents the simulated output value of the gain signal at -40℃ (Low), the diamond represents the simulated output value of the gain signal at -40℃ (Nom), the inverted triangle represents the simulated output value of the gain signal at 25℃ (Low), the equilateral triangle represents the simulated output value of the gain signal at 25℃ (Nom), the plus sign represents the simulated output value of the gain signal at 105℃ (Low), and the × sign represents the simulated output value of the gain signal at 105℃ (Nom). It should be noted that Figure 6 The simulation results in the figure are obtained by performing 400 simulations at different temperatures. Among them, Low represents the situation when the resistance and capacitance parameter indicators shift downward, and Nom represents the situation when the resistance and capacitance parameter indicators remain unchanged.

[0169] in, Figure 7 The square in the figure represents the simulated output value of the gain signal at -40℃ (Nom), the diamond represents the simulated output value of the gain signal at -40℃ (Hi), the inverted triangle represents the simulated output value of the gain signal at 25℃ (Nom), the equilateral triangle represents the simulated output value of the gain signal at 25℃ (Hi), the plus sign represents the simulated output value of the gain signal at 105℃ (Nom), and the × sign represents the simulated output value of the gain signal at 105℃ (Hi). It should be noted that Figure 7 The simulation results in the figure are obtained by performing 400 simulations at different temperatures. Hi represents the case when the resistance and capacitance parameter indexes shift upward, and Nom represents the case when the resistance and capacitance parameter indexes remain unchanged.

[0170] In summary, when C28 is 2.2nF and other parameters remain unchanged, the phase margin is between 58.1° and 58.9°.

[0171] In the Monte Carlo analysis of the minimum input operating voltage, 400 samples were randomly selected for simulation analysis. Figure 8 As shown, the minimum input voltage is 4.7~4.85V, and the minimum value of the minimum input voltage is 4.7V.

[0172] Please refer to the table below, where Gm is the gain margin, which is the gain corresponding to the frequency when the gain curve reaches -180 degrees, and the crossover frequency is the frequency point where the gain curve crosses the 0dB line. Pm is the phase margin, which is the phase difference between the phase value of the gain curve at the crossover frequency and -180 degrees. Generally speaking, the phase margin Pm is required to be between 45° and 70°, and the gain margin is greater than 10dB.

[0173]

[0174]

[0175] From the table above, we can see that when the measured parameters C27 is around 2.2nF ~ 0.22uF, R6 is around 300k ~ 510k, and C28 is around 680p ~ 990pF, the circuit relative stability margin is appropriate. The C27 parameter affects the low-frequency gain and phase, R6 affects the high-frequency gain and phase, and C28 affects the mid- and high-frequency gain and phase. It is basically consistent with the worst-case analysis of loop stability, verifying the rationality of this design.

[0176] The above scheme uses at least two analysis methods to determine at least two analysis indicators, thereby improving the comprehensiveness of the worst-case analysis of the circuit. Furthermore, based on the at least two analysis indicators, the circuit simulation model is subjected to the worst-case analysis of the circuit to obtain the analysis result corresponding to each analysis indicator. Furthermore, the design circuit of the motor controller is verified using the at least two analysis results. The worst-case analysis method for the motor controller provided in the present application determines the analysis indicators through different analysis methods, thereby improving the comprehensiveness of the worst-case analysis of the motor controller.

[0177] Furthermore, the analysis results obtained from the simulation are used to carry out actual tests, and the test results are used to verify the analysis results to improve the confidence of the analysis.

[0178] Please continue to see Fig. 9 , Fig. 9 The terminal device 500 of the embodiment of the present application includes a processor 51 and a memory 52 .

[0179] The processor 51 and the memory 52 are connected to the bus. The memory 52 stores program data. The processor 51 is used to execute the program data to implement the worst-case analysis method for the motor controller described in the above embodiment.

[0180] In the embodiment of the present application, the processor 51 may also be referred to as a CPU (Central Processing Unit). The processor 51 may be an integrated circuit chip having the ability to process signals. The processor 51 may also be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gates or transistor logic devices, or discrete hardware components. A general-purpose processor may be a microprocessor or the processor 51 may also be any conventional processor, etc.

[0181] This application also provides a computer storage medium, please continue to refer to Fig.10 , Fig.10 It is a structural diagram of an embodiment of a computer storage medium provided in the present application. The computer storage medium 600 stores program data 61. When the program data 61 is executed by the processor, it is used to implement the worst-case analysis method of the motor controller of the above embodiment.

[0182] When the embodiments of the present application are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk.

[0183] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Equivalent structures or equivalent process changes made by utilizing the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A worst-case analysis method for a motor controller, characterized in that: The method comprises: Obtain at least two analysis indicators and obtain a circuit simulation model corresponding to the motor controller; wherein the at least two analysis indicators are determined by at least two of a fault tree analysis method, a potential failure mode impact and consequence analysis method, a hazard analysis and risk assessment analysis method, an expert experience assessment method, and fault library information; Based on the at least two analysis indicators, performing a circuit worst-case analysis on the circuit simulation model to obtain an analysis result corresponding to each analysis indicator; The design circuit of the motor controller is verified according to at least two of the analysis results.

2. The method according to claim 1, characterized in that The obtaining of at least two analysis indicators includes: Obtaining performance analysis conditions of the motor controller; Based on the performance analysis conditions, the at least two analysis indicators are determined.

3. The method according to claim 2, characterized in that The determining of the at least two analysis indicators based on the performance analysis condition includes: Obtain at least two groups of candidate analysis results corresponding to the fault tree analysis method, potential failure mode impact and consequence analysis method, hazard analysis and risk assessment analysis method, expert experience assessment method, and fault library information in the performance analysis conditions; the candidate analysis results include candidate analysis indicators and candidate indicator scores corresponding to the candidate analysis indicators; A weighted sum of the scores of the at least two groups of candidate indicators is calculated to obtain an analysis indicator score, and the at least two analysis indicators are determined from the at least two groups of candidate analysis indicators using the analysis indicator score.

4. The method according to claim 1, characterized in that The performing of a circuit worst-case analysis on the circuit simulation model based on the at least two analysis indicators to obtain an analysis result corresponding to each analysis indicator includes: Dividing the circuit simulation model into components to obtain component models corresponding to a number of components; The performing of a circuit worst-case analysis on the circuit simulation model based on the at least two analysis indicators to obtain an analysis result corresponding to each analysis indicator includes: Based on the at least two analysis indicators, a circuit worst-case analysis is performed on each of the component models to obtain a local analysis result corresponding to each component under each analysis indicator; The analysis result is obtained by utilizing all the local analysis results under the same analysis index.

5. The method according to claim 4, characterized in that After the step of dividing the circuit simulation model into components to obtain component models corresponding to a number of components, the method further comprises: In response to the simulation model library not containing a component model corresponding to a target component, a candidate component model corresponding to a similar component similar to the target component is obtained from the simulation model library, the specification parameters of the candidate component model are modified, and the modified candidate component model is used as the target component model corresponding to the target component.

6. The method according to claim 1, characterized in that The step of verifying the design circuit of the motor controller according to at least two of the analysis results comprises: Selecting at least some of the analysis indicators, and performing a circuit worst-case test on the motor controller based on the at least some of the analysis indicators to obtain an actual test result; In response to the analysis result being within a preset range, the design circuit of the motor controller is verified according to at least two of the analysis results; the preset range is determined based on the actual test result.

7. The method according to claim 1, characterized in that After the step of selecting at least part of the analysis indicators, and performing a circuit worst-case test on the motor controller based on at least part of the analysis indicators to obtain actual test results, the method further comprises: In response to the analysis result being outside the preset range, optimizing or redesigning the circuit simulation model; Based on the at least two analysis indicators, a circuit worst-case analysis is performed on the redesigned or optimized circuit simulation model to obtain an optimization analysis result corresponding to each analysis indicator; The design circuit of the motor controller is verified according to at least two of the optimization analysis results.

8. The method according to claim 1, characterized in that The circuit worst-case analysis includes at least one of sensitivity analysis, component thermal and electrical stress analysis, Monte Carlo analysis, and extreme value stress analysis.

9. A terminal device, characterized in that: The terminal device includes a processor and a memory connected to the processor, wherein: The memory stores program instructions; The processor is configured to execute program instructions stored in the memory to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: The storage medium stores program instructions, and when the program instructions are executed, the method according to any one of claims 1 to 8 is implemented.

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