Three-phase motor phase current sampling processing method, three-phase motor control method and three-phase motor

Abstract

The invention provides a three-phase motor phase current sampling processing method, a three-phase motor control method and a three-phase motor, and the three-phase motor phase current sampling processing method comprises the steps: obtaining the on-off moments of at least a part of semiconductor switch tubes in a three-phase full-bridge inverter circuit in a first carrier period and a second carrier period, wherein the first carrier wave period and the second carrier wave period are two adjacent PWM carrier wave periods; determining a sampling moment according to the on-off moments of at least part of the semiconductor switch tubes in the first carrier period and the second carrier period and the time length Tsamp required by sampling; starting sampling on conduction voltage drop values of at least part of lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit at a sampling moment; and calculating the current value of each phase of the three-phase motor according to the conduction voltage drop values of at least part of the lower bridge arm semiconductor switch tubes. According to the three-phase motor phase current sampling processing method provided by the embodiment of the invention, the technical problem that the three-phase motor phase current sampling is inconvenient and inaccurate in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the field of motor control technology, and in particular to a three-phase motor phase current sampling and processing method, a three-phase motor control method and a three-phase motor. Background Art

[0002] FOC is a motor control strategy that controls the motor's magnetic field and torque by decomposing the stator current into flux and torque components. The purpose of FOC is to achieve precise control of the motor's speed and torque while maintaining accurate tracking of the motor's rotor angle.

[0003] FOC control can achieve stable operation of the motor, reduce the harmonic components of the current waveform, make the motor run more smoothly, and reduce mechanical vibration and electromagnetic noise. Therefore, this method is widely used in three-phase permanent magnet synchronous motor control. FOC control requires real-time detection of the three-phase current of the motor.

[0004] In the related art, when the three-phase current of the motor is detected, it is achieved by using a Hall current sensor or an external resistor sampling method. The circuit and operation process are relatively complicated, which will lead to a series of problems such as high hardware cost and high power loss.

[0005] It can be seen that the related art has the technical problem of inconvenient sampling of the phase current of the three-phase motor. Currently, no effective solution has been proposed for the above problem.

[0006] The above information disclosed in the background technology section is only used to enhance the understanding of the background technology of the technology described in this article. Therefore, the background technology may contain some information that does not form the known prior art for those skilled in the art. Summary of the invention

[0007] The main purpose of the present invention is to provide a three-phase motor phase current sampling and processing method, a three-phase motor control method and a three-phase motor, so as to solve the technical problems of inconvenient and inaccurate phase current sampling of three-phase motors in related technologies.

[0008] In order to achieve the above-mentioned purpose, according to one aspect of the present invention, a three-phase motor phase current sampling and processing method is provided, comprising: obtaining the on-off time of at least part of the semiconductor switch tubes of the three-phase full-bridge inverter circuit in the first carrier cycle and the second carrier cycle, wherein the first carrier cycle and the second carrier cycle are two adjacent PWM carrier cycles; determining the sampling time according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time required Tsamp, so that the sampling time falls within the continuous conduction period of at least part of the lower bridge arm semiconductor switch tubes; at the sampling time, starting the sampling of the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit; and calculating the phase current values ​​of the three-phase motor according to the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes.

[0009] Furthermore, the on-off timing includes: the cut-off timing of at least part of the upper bridge arm semiconductor switch tube in the first carrier cycle, and the cut-off timing of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle, wherein the second carrier cycle is after the first carrier cycle.

[0010] Further, the sampling time is determined according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp required, which includes: when (Tmin_next-Tmax-Td-Tn)≥Tsamp and (Tmin_next-Tp)≥Tsamp, the sampling time Tp is determined; when (Tmin_next-Tmax-Td-Tn)≥Tsamp and (Tmin_next-Tp)<Tsamp, the sampling time Tmin_next-Tsamp is determined; wherein Tmax is the maximum value of the truncation time of at least part of the upper bridge arm semiconductor switch tubes in the first carrier cycle, Tmin_next is the minimum value of the truncation time of at least part of the lower bridge arm semiconductor switch tubes in the second carrier cycle, Td is the preset dead time, Tn is the preset fluctuation time after the semiconductor switch tube is turned on, and Tp is the start time of the second carrier cycle.

[0011] Further, the sampling time is determined according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp required, which includes: when Texc<Tsamp, and (Tmid_next-Tmax-Td-Tn)≥Tsamp, the determined sampling time is Tmax+Td+Tn; at the sampling time, the sampling of the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit is started, which includes: sampling the conduction voltage drop values ​​of the other two lower bridge arm semiconductor switch tubes except the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle; according to at least part of the lower bridge arm semiconductor switch tubes The on-state voltage drop value of the switch is used to calculate the phase current values ​​of the three-phase motor, which includes: calculating the phase current values ​​corresponding to the other two lower bridge arm semiconductor switch tubes except the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle; wherein Texc is the minimum value of the continuous conduction time of at least part of the lower bridge arm semiconductor switch tube in the first carrier cycle and the second carrier cycle, Tmid_next is the middle value of the cut-off time of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle, Tmax is the maximum value of the cut-off time of at least part of the upper bridge arm semiconductor switch tube in the first carrier cycle, Td is the preset dead time, and Tn is the preset fluctuation time after the semiconductor switch tube is turned on.

[0012] Furthermore, the phase currents of the three-phase motor are calculated based on the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tube, which also includes: according to the formula Iu+Iv+Iw=0, the phase current value corresponding to the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle is calculated; wherein Iu is the phase current of the u phase of the three-phase motor, Iv is the phase current of the v phase of the three-phase motor, and Iw is the phase current of the w phase of the three-phase motor.

[0013] Further, the sampling time is determined according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp required, which includes: when Texc<Tsamp, and (Tmid_next-Tmax-Td-Tn)<Tsamp, the determined sampling time is Tmid_next+Δt-Tsamp; wherein Texc is the minimum value of the continuous conduction time of at least part of the lower bridge arm semiconductor switch tubes in the first carrier cycle and the second carrier cycle, Tmid_next is the middle value of the truncation time of at least part of the lower bridge arm semiconductor switch tubes in the second carrier cycle, Tmax is the maximum value of the truncation time of at least part of the upper bridge arm semiconductor switch tubes in the first carrier cycle, Td is the preset dead time, Tn is the preset fluctuation time after the semiconductor switch tube is turned on, and Δt=Tsamp-(Tmid_next-Tmax-Td-Tn).

[0014] Further, when Texc is less than Tsamp and (Tmid_next-Tmax-Td-Tn) is less than Tsamp, at the sampling time, sampling of the conduction voltage drop values ​​of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit is started, which includes: controlling the lower bridge arm switch tube to be compensated to increase Δt at the turn-on time and the cut-off time of the second carrier cycle, and controlling the upper bridge arm switch tube to be compensated to reduce Δt at the turn-on time and the cut-off time of the second carrier cycle, wherein the lower bridge arm switch tube to be compensated is the lower bridge arm semiconductor switch tube to be sampled, and the upper bridge arm switch tube to be compensated is the upper bridge arm semiconductor switch tube corresponding to the lower bridge arm switch tube to be compensated; at the time Tmid_next+Δt-Tsamp, sampling of the conduction voltage drop values ​​of each lower bridge arm semiconductor switch tube of the three-phase full-bridge inverter circuit to be sampled is started.

[0015] Furthermore, the three-phase full-bridge inverter circuit adopts a five-segment SVPWM modulation method. In the first carrier cycle and the second carrier cycle, a lower bridge arm in the three-phase full-bridge inverter circuit continuously remains in an on state, and the upper bridge arm corresponding to the lower bridge arm continuously remains in a cut-off state.

[0016] Furthermore, each phase current value of the three-phase motor is calculated based on the on-state voltage drop value of at least part of the lower bridge arm semiconductor switch tubes, which includes: obtaining the current temperature value of each of the lower bridge arm semiconductor switch tubes; determining the current on-state internal resistance of each of the lower bridge arm semiconductor switch tubes based on a preset correspondence between the temperature value of the lower bridge arm semiconductor switch tube and the on-state internal resistance; and obtaining the corresponding phase current value of the three-phase motor by dividing the on-state voltage drop value of each lower bridge arm semiconductor switch tube by its current on-state internal resistance.

[0017] According to another aspect of the present invention, a three-phase motor control method is provided, the control method comprising: using the above-mentioned three-phase motor phase current acquisition and processing method to obtain each phase current value of the three-phase motor; calculating control parameters based on the FOC control algorithm according to each phase current value and the real-time rotation angle of the three-phase motor; and using the control parameters to control the three-phase motor.

[0018] According to another aspect of the present invention, a computer program product is provided, comprising computer instructions, which implement the above-mentioned three-phase motor phase current sampling and processing method when executed by a processor, or implement the above-mentioned three-phase motor control method when executed by a processor.

[0019] According to another aspect of the present invention, a non-volatile storage medium is provided, the non-volatile storage medium including a stored program, wherein when the program is running, the device where the non-volatile storage medium is located is controlled to execute the above-mentioned three-phase motor phase current sampling and processing method, or, when the program is running, the device where the non-volatile storage medium is located is controlled to execute the above-mentioned three-phase motor control method.

[0020] According to another aspect of the present invention, a motor controller is provided, comprising a processor, wherein the processor is used to run a program, and the three-phase motor control method is executed when the program is run.

[0021] According to another aspect of the present invention, a three-phase motor is provided. The three-phase motor includes a motor body and a motor controller electrically connected thereto. The motor controller controls the operation of the motor body. The motor controller is the above-mentioned motor controller.

[0022] The three-phase motor phase current sampling and processing method using the technical solution of the present invention obtains the on-off moments of at least some semiconductor switch tubes in the three-phase full-bridge inverter circuit in the adjacent first carrier cycle and the second carrier cycle when sampling the three-phase motor phase current, and determines the sampling moment based on the sampling time length Tsamp required, so that the sampling moment falls within the continuous conduction period of at least some lower bridge arm semiconductor switch tubes. The sampling period is the time period for the sampling operation, which can also be called a sampling window. At the sampling moment, the sampling of the conduction voltage drop value of at least some lower bridge arm semiconductor switch tubes is started. After the conduction voltage drop value of each semiconductor switch tube is obtained, the current value of each phase of the three-phase motor can be further calculated according to its conduction voltage drop value. Compared with the method of using a Hall current sensor or an external resistor to detect current in the related art, the implementation method is simpler, can effectively simplify circuit design, reduce hardware costs, and reduce power loss. By combining the on-off moments of each semiconductor switch tube in the first carrier cycle and the second carrier cycle and the sampling time Tsamp, the current sampling moment can be more accurately controlled so that the sampling time segment falls within the continuous conduction period of at least part of the lower bridge arm semiconductor switch tube, thereby minimizing the current fluctuation caused by the action of the switch tube during the sampling process, so that the harmonic components contained in the sampled current are lower, which is conducive to ensuring the final current sampling accuracy. The three-phase motor phase current sampling processing method of the embodiment of the present invention can effectively solve the technical problems of inconvenient and inaccurate sampling of the three-phase motor phase current in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings constituting a part of the present application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0024] Figure 1 It is a flow chart of an embodiment of a method for sampling and processing phase current of a three-phase motor according to the present invention;

[0025] Figure 2 A schematic diagram of the structure of a product to which the three-phase motor current sampling and processing method and the control method according to an embodiment of the present invention are applied;

[0026] Figure 3 This is the driving diagram of each semiconductor switch tube of the five-stage SVPWM modulation three-phase full-bridge inverter circuit under ideal conditions;

[0027] Figure 4 It is the driving diagram of each semiconductor switch tube of the five-stage SVPWM modulation three-phase full-bridge inverter circuit under actual conditions;

[0028] Figure 5A schematic diagram of determining the sampling time of the three-phase motor current sampling and processing method in the first case according to an embodiment of the present invention;

[0029] Figure 6 A schematic diagram of determining the sampling time of the three-phase motor current sampling and processing method in the second case according to an embodiment of the present invention;

[0030] Figure 7 A schematic diagram of determining the sampling time of the three-phase motor current sampling and processing method in the third case according to an embodiment of the present invention;

[0031] Figure 8 It is a schematic diagram of a fourth situation encountered during sampling by the three-phase motor current sampling and processing method according to an embodiment of the present invention;

[0032] Fig. 9 A schematic diagram of determining the sampling time of the three-phase motor current sampling and processing method in the fourth case according to an embodiment of the present invention;

[0033] Fig.10 A schematic diagram of carrier timing used in a three-phase motor current sampling and processing method according to an embodiment of the present invention;

[0034] Fig.11 The figure is a schematic diagram of the corresponding relationship between the working states of each semiconductor switch tube and each time point according to an embodiment of the present invention.

[0035] The above drawings include the following reference numerals:

[0036] 1. Three-phase full-bridge inverter circuit; 11. First semiconductor switch tube; 12. Second semiconductor switch tube; 13. Third semiconductor switch tube; 14. Fourth semiconductor switch tube; 15. Fifth semiconductor switch tube; 16. Sixth semiconductor switch tube; 2. Three-phase motor; 3. Voltage detection device; 31. First voltage detection module; 32. Second voltage detection module; 33. Third voltage detection module. DETAILED DESCRIPTION

[0037] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0038] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0039] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0040] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

[0041] Figure 1 FIG. 1 is a flow chart of an embodiment of a three-phase motor phase current sampling and processing method according to an embodiment of the present invention. Figure 1 As shown, the method comprises the following steps:

[0042] Step S102, obtaining the on-off timing of at least part of the semiconductor switches in the three-phase full-bridge inverter circuit in the first carrier cycle and the second carrier cycle, wherein the first carrier cycle and the second carrier cycle are two adjacent PWM carrier cycles;

[0043] Step S104, determining a sampling time according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp, so that the sampling time falls within the continuous conduction period of at least part of the lower bridge arm semiconductor switch tubes;

[0044] Step S106, at the sampling time, starting sampling of the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit;

[0045] Step S108, calculating the current values ​​of each phase of the three-phase motor according to the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tube.

[0046] The three-phase motor phase current sampling and processing method using the above scheme obtains the on-off moments of at least some semiconductor switch tubes in the three-phase full-bridge inverter circuit in the adjacent first carrier cycle and the second carrier cycle, and determines the sampling moment based on the sampling time Tsamp required, so that the sampling moment falls within the continuous conduction period of at least some lower bridge arm semiconductor switch tubes. The sampling period is the time period for the sampling operation, which can also be called a sampling window. At the sampling moment, the sampling of the conduction voltage drop value of at least some lower bridge arm semiconductor switch tubes is started. After the conduction voltage drop value of each semiconductor switch tube is obtained, the current value of each phase of the three-phase motor can be further calculated according to its conduction voltage drop value. Compared with the method of using a Hall current sensor or an external resistor to detect current in the related art, the implementation method is simpler, can effectively simplify circuit design, reduce hardware costs, and reduce power loss. By combining the on-off moments of each semiconductor switch tube in the first carrier cycle and the second carrier cycle and the sampling time Tsamp, the current sampling moment can be more accurately controlled so that the sampling time segment falls within the continuous conduction period of at least part of the lower bridge arm semiconductor switch tube, thereby minimizing the current fluctuation caused by the action of the switch tube during the sampling process, so that the harmonic components contained in the sampled current are lower, which is conducive to ensuring the final current sampling accuracy. The three-phase motor phase current sampling processing method of the embodiment of the present invention can effectively solve the technical problems of inconvenient and inaccurate sampling of the three-phase motor phase current in the related art.

[0047] Among them, the on-off moment of at least part of the semiconductor switch tubes in the three-phase full-bridge inverter circuit in the adjacent first carrier cycle and the second carrier cycle is obtained. The on-off moment mentioned here should be understood as the conduction moment or the cut-off moment, rather than the need to obtain both at the same time. It is not necessary to obtain the on-off moment of all semiconductor switch tubes in the first carrier cycle and the second carrier cycle. In actual implementation, only the on-off moment of some semiconductor switch tubes can be obtained, and the current sampling operation can also be realized. Correspondingly, at the sampling moment, the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tube is sampled. It is not necessary to sample the conduction voltage drop value of all the lower bridge arm semiconductor switch tubes. Only the conduction voltage drop value of some of the lower bridge arm semiconductor switch tubes can be collected, which will be described in detail in the following embodiments. The acquisition mentioned here can refer to obtaining directly from existing data, or it can be calculated based on existing data to obtain the required data. The above-mentioned sampling moment is the starting moment of sampling, and the sampling process needs to last for a certain period of time (i.e., the sampling time required Tsamp).

[0048] In actual implementation, it is preferred to perform sampling when the three-phase lower bridge arms of the full-bridge inverter circuit are turned on at the same time. At this time, there is no interference from the switching action, the sampled current contains low harmonic components, and the sampling accuracy is the highest. When actually performing voltage sampling, different situations may be encountered, and different situations correspond to different sampling processing strategies. Specifically, Figures 3 to 11 As shown, in these embodiments, the three-phase full-bridge inverter circuit adopts a five-segment SVPWM modulation method, and in the first carrier cycle and the second carrier cycle, a lower bridge arm of the three-phase full-bridge inverter circuit is continuously kept in a conducting state. Figures 3 to 9 As shown, the two triangle waves in the upper part of the figure show two carrier cycles, or Fig.10 As shown in , the triangle wave on the left can be regarded as the first carrier cycle, and the triangle wave on the right can be regarded as the second carrier cycle. T1 and T2 represent the truncation moments of VT1 and VT2 in the first carrier cycle, T1_next represents the truncation moment of VT4 in the second carrier cycle, T2_next represents the truncation moment of VT5 in the second carrier cycle, and T3_next indicates that VT6 is continuously in the on state during the first carrier cycle and the second carrier cycle. Figures 3 to 10 In the figure, the duration of half a carrier cycle is Ts, the center point of the two carrier cycles is p, and point p is the event update point. At time Tp, the control parameters of the motor for the next carrier cycle will be updated based on the FOC calculation results, that is, the on-off time (that is, the on and / or off time) of each semiconductor switch tube in the full-bridge inverter circuit in the next carrier cycle will be updated. In this embodiment, in order to clearly express the sequence of various time points and time periods, each moment can be placed on the same time axis for understanding. The larger the moment value, the later its corresponding position on the time axis, which makes it easier to distinguish the sequence of various moments below, and to calculate the length of each time period. Of course, in actual implementation, corresponding calculations can also be performed according to the period of the carrier, such as Fig.10 As shown, in an optional embodiment, timing is performed by counting by a single-chip microcomputer. In a carrier cycle, the counter counts from 0 in sequence, and the maximum value of the count is Period value, which is half a carrier cycle at this time. Then, it counts down from the maximum value Period value to 0 in sequence. The whole process is a carrier cycle, and then the next carrier cycle count starts from 0. The center point of the two carrier cycles is the event update point. At this time point, the control parameters of the motor for the next carrier cycle will be updated based on the FOC calculation result. The event update point is the above-mentioned Tp. When counting in this way that the counter increases and then decreases in sequence, the calculation formula needs to be transformed and adjusted accordingly when calculating the length of each time period and the moment value, so as to ensure that the calculated time period length and moment value are accurate, but it is consistent with the above-mentioned basic logic of placing each moment value on the same time axis for calculation.

[0049] Figures 3 to 9 The waveform in the middle and lower part represents the gate input waveform of VT1 to VT6, where when the input is high level, the corresponding semiconductor switch tube is turned on, and when the input is low level, the corresponding semiconductor switch tube is cut off. In actual operation, VT1 and VT4 form the U-phase bridge arm, and only one of them can be turned on at the same time, VT2 and VT5 form the V-phase bridge arm, and only one of them can be turned on at the same time, and VT3 and VT6 form the W-phase bridge arm, and only one of them can be turned on at the same time. Figure 4 As shown, in actual situations, Td is the preset dead time, the purpose is to prevent direct conduction between the upper and lower bridge arms, so a preset conduction time difference is set, and Tn is the fluctuation time after the preset semiconductor switch tube is turned on. Since the voltage and current fluctuations of the semiconductor switch tube are large when it is just turned on, in order to improve the accuracy of sampling, the preset time period is set. Among them, in the specific implementation, multiple carrier cycles can be counted separately from 0, or accumulated. For example, when multiple carrier cycles are counted separately, the time is updated at point p, and the conduction time of each semiconductor switch tube in the three-phase full-bridge inverter circuit is updated.

[0050] As described above, when actually performing voltage sampling, only when the three lower bridge arm semiconductor switch tubes are in a closed state at the same time, the current and voltage conditions are the most stable, the noise is the smallest, and the sampled data has the highest accuracy and reliability. By introducing the on and off moments of at least some of the above-mentioned semiconductor switch tubes in the first carrier cycle and the second carrier cycle, as well as the sampling time Tsamp required, it is helpful to clearly know the on and off state of at least some of the lower bridge arm semiconductor switch tubes, so as to more accurately control the sampling moment, and ultimately improve the accuracy of the three-phase motor phase current sampling and processing. It should be noted that in the three-phase full-bridge inverter circuit, only one of the upper bridge arm semiconductor switch tube and the lower bridge arm semiconductor switch tube is in the on state at the same time. Therefore, even if the on and off moments of the upper bridge arm semiconductor switch tube are obtained, the on and off moments of the lower bridge arm semiconductor switch tube can be derived according to the actual parameter settings. Figure 2 and Figure 4As shown, taking the semiconductor switch tube VT1 and the semiconductor switch tube VT4 as an example, the two are in the same bridge arm, VT1 is the upper bridge arm semiconductor switch tube, and VT4 is the lower bridge arm semiconductor switch tube. The conduction states of the two are almost opposite at the same time. The reason why they are not completely opposite is that the dead time Td parameter is set in this embodiment. At T1, VT1 is cut off, and it takes Td time to wait before VT4 is turned on again. Similarly, at T1_next, VT4 is cut off, and it takes Td time to wait before VT1 is turned on again. By introducing the dead time Td, there is a waiting time between the conduction time periods of the upper and lower bridge arms, avoiding the situation where the upper and lower bridge arms are turned on at the same time, thereby preventing the direct conduction.

[0051] like Figure 2 As shown, Figure 2 The structure diagram of the product to which the three-phase motor current sampling and processing method and the three-phase motor control method according to the embodiment of the present invention are applied is shown in FIG. Figure 2 The invention comprises a three-phase full-bridge inverter circuit 1, a three-phase motor 2 and a voltage detection device 3. Specifically, the three-phase full-bridge inverter circuit 1 comprises six semiconductor switch tubes, namely Figure 2 The first semiconductor switch tube 11 (VT1 in the figure), the second semiconductor switch tube 12 (VT2 in the figure), the third semiconductor switch tube 13 (VT3 in the figure), the fourth semiconductor switch tube 14 (VT4 in the figure), the fifth semiconductor switch tube 15 (VT5 in the figure) and the sixth semiconductor switch tube 16 (VT6 in the figure), and the voltage detection device 3 includes a first voltage detection module 31, a second voltage detection module 32 and a third voltage detection module 33, wherein the first voltage detection module 31 is connected between the source and the drain of the fourth semiconductor switch tube 14 to measure its on-voltage, the second voltage detection module 32 is connected between the source and the drain of the fifth semiconductor switch tube 15 to measure its on-voltage, and the third voltage detection module 33 is connected between the source and the drain of the sixth semiconductor switch tube 16 to measure its on-voltage. The on-state voltages of the three lower bridge arm semiconductor switch tubes can be measured by the first voltage detection module 31, the second voltage detection module 32 and the third voltage detection module 33. By querying the relationship curve between the on-state internal resistance and temperature of the semiconductor switch tube, the on-state internal resistance of each semiconductor switch tube at the current temperature can be queried, and then the currents of each phase of the three-phase motor 2 can be conveniently calculated based on the relationship between voltage resistance and current.

[0052] In an optional embodiment, the obtained on-off moments include: the cut-off moments of at least some upper bridge arm semiconductor switches in a first carrier cycle, and the cut-off moments of at least some lower bridge arm semiconductor switches in a second carrier cycle, wherein the second carrier cycle is after the first carrier cycle.

[0053] In this embodiment, the truncation time of at least part of the upper bridge arm semiconductor switch tubes in the first carrier cycle and the truncation time of this part of the lower bridge arm semiconductor switch tubes in the second carrier cycle are obtained, so as to more accurately grasp the conduction time interval of each lower bridge arm semiconductor switch tube, thereby facilitating the selection of a more stable time interval for current sampling and improving the sampling time accuracy. Of course, this is only an optional embodiment. In other optional embodiments, the on-off time of other semiconductor switch tubes in the first carrier cycle and / or the second carrier cycle can also be collected, thereby providing data reference for the selection of sampling time, so that the switch on-off action is avoided or minimized during the sampling process, thereby improving the current sampling accuracy.

[0054] like Figure 5 and Figure 6 As shown, in an optional embodiment, according to the on-off moments of at least some semiconductor switches in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp required, the step of determining the sampling time includes: when (Tmin_next-Tmax-Td-Tn)≥Tsamp, and (Tmin_next-Tp)≥Tsamp, the determined sampling time is Tp; when (Tmin_next-Tmax-Td-Tn)≥Tsamp, and (Tmin_next-Tp)<Tsamp, the determined sampling time is Tmin_next-Tsamp; wherein Tmax is the maximum value of the truncation moments of at least some of the upper bridge arm semiconductor switches in the first carrier cycle, Tmin_next is the minimum value of the truncation moments of at least some of the lower bridge arm semiconductor switches in the second carrier cycle, Td is the preset dead time, Tn is the preset fluctuation time after the semiconductor switch is turned on, and Tp is the start time of the second carrier cycle.

[0055] like Figure 5 As shown, in an optional implementation, when (Tmin_next-Tmax-Td-Tn)≥Tsamp, and (Tmin_next-Tp)≥Tsamp, the optional sampling time interval (Tmin_next-Tmax-Td-Tn) shown in the figure is larger, and its length is greater than the sampling time interval shown in the figure (that is, the above-mentioned sampling time required Tsamp), and the minimum value Tmin_next (that is, the minimum value Tmin_next) from the time point p to the truncation time of the lower bridge arm semiconductor switch tube in the second carrier cycle Figure 5The time length between T1_next in the sampling time interval is greater than or equal to Tsamp. At this time, the sampling time determined is the start time Tp of the second carrier cycle, which can make no semiconductor switch tube open or close in the sampling time interval, and the current and voltage state is the most stable, which is conducive to ensuring a high sampling accuracy. Moreover, the sampling time is as close to point p as possible, which can reserve more sufficient time for subsequent FOC calculation processing after the sampling is completed, which is convenient for the subsequent control of the three-phase motor, and avoids the situation where the motor control parameters of the next carrier cycle are overwritten when the FOC calculation is not completed due to insufficient calculation time, which is conducive to ensuring the accuracy of motor control.

[0056] like Figure 6 As shown, in another optional implementation, when (Tmin_next-Tmax-Td-Tn)≥Tsamp and (Tmin_next-Tp)<Tsamp, the determined sampling moment is Tmin_next-Tsamp. At this time, the optional sampling time interval (Tmin_next-Tmax-Td-Tn) shown in the figure is also large, and its length is greater than the sampling time interval shown in the figure (that is, the above-mentioned sampling required time Tsamp), but the time from the point p moment to the minimum value of the truncation moment of the lower bridge arm semiconductor switch tube in the second carrier cycle is less than the time length required for sampling. Therefore, the sampling moment determined at this time is Tmin_next-Tsamp, so that no semiconductor switch tube is turned on or off within the sampling time interval, and the current and voltage states are most stable, which is conducive to ensuring a higher sampling accuracy.

[0057] like Figure 7As shown, in another optional embodiment, according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp, the step of determining the sampling time includes: when Texc<Tsamp, and (Tmid_next-Tmax-Td-Tn)≥Tsamp, the determined sampling time is Tmax+Td+Tn; at the sampling time, the step of starting the sampling of the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit includes: except for the lower bridge arm with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle. The conduction voltage drop values ​​of the other two lower bridge arm semiconductor switch tubes other than the semiconductor switch tube are sampled; the step of calculating the phase current values ​​of the three-phase motor according to the conduction voltage drop values ​​of at least some of the lower bridge arm semiconductor switch tubes includes: calculating the phase current values ​​corresponding to the other two lower bridge arm semiconductor switch tubes except the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle; wherein Texc is the minimum value of the continuous conduction time of at least some of the lower bridge arm semiconductor switch tubes in the first carrier cycle and the second carrier cycle, which can be calculated by Tmin_next-Tmax-Td-Tn, (for example Figure 7 In the embodiment, the value is equal to T1_next-T1-Td-Tn), Tmid_next is the middle value of the cut-off time of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle, that is, the value between the maximum value and the minimum value at the cut-off time. Since the sampling is for a three-phase motor, Tmid_next is the second smallest value of the cut-off time of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle (for example Figure 7 T2_next in the embodiment), Tmin_next is the minimum value of the truncation time of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle (for example Figure 7 T1_next in the embodiment, Tmax is the maximum value of the cut-off time of at least part of the upper bridge arm semiconductor switch tubes in the first carrier cycle (for example Figure 7 In the embodiment T1), Td is the preset dead time, and Tn is the fluctuation time after the preset semiconductor switch tube is turned on.

[0058] like Figure 7 As shown, in this embodiment, the continuous conduction time of VT4 in the first carrier cycle and the second carrier cycle is the shortest, and is less than the sampling time interval shown in the figure (the sampling time Tsamp), so it is impossible to calculate the U-phase current by voltage sampling. In order to avoid unreasonable sampling, in this embodiment, the sampling time is determined to be Tmax+Td+Tn, and the conduction voltage drop value of the lower bridge arm semiconductor switch tube of the other two phases is sampled.

[0059] In this embodiment, the three-phase motor phase current sampling and processing method also includes: according to the formula Iu+Iv+Iw=0, calculating the phase current value corresponding to the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle; wherein Iu is the phase current of the u phase of the three-phase motor, Iv is the phase current of the v phase of the three-phase motor, and Iw is the phase current of the w phase of the three-phase motor.

[0060] In the above scheme, VT4 is not sampled. In order to obtain the phase current of the U phase, this embodiment adopts the formula Iu+Iv+Iw=0. After the phase currents of the Iv and Iw phases are calculated, the phase current of the U phase can be calculated.

[0061] Therefore, as mentioned above, in the actual sampling process, it is not necessary to obtain the on-off moments of all semiconductor switching tubes in the first carrier cycle and the second carrier cycle, nor is it necessary to sample the on-state voltage drop values ​​of all lower bridge arm semiconductor switching tubes. In some cases, the lower bridge arm semiconductor switching tube of a certain phase cannot meet the sampling requirements. At this time, only the on-state voltage drop values ​​of the remaining lower bridge arm semiconductor switching tubes can be collected, so as to first calculate the two-phase current of the three-phase motor, and then calculate the current of the remaining phase according to Iu+Iv+Iw=0.

[0062] like Figure 8 and Fig. 9 As shown, in an optional implementation, according to the on-off moments of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time required Tsamp, the step of determining the sampling time includes: when Texc<Tsamp, and (Tmid_next-Tmax-Td-Tn)<Tsamp, the determined sampling time is Tmid_next+Δt-Tsamp; wherein Texc is the minimum value of the continuous conduction time of at least part of the lower bridge arm semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the corresponding time length in the figure is T1_next-T1-Td, Tmid_next is the middle value of the truncation moment of at least part of the lower bridge arm semiconductor switch tubes in the second carrier cycle (T2_next in the figure), Tmax is the maximum value of the truncation moment of at least part of the upper bridge arm semiconductor switch tubes in the first carrier cycle (T1 in the figure), Td is the preset dead time, Tn is the preset fluctuation time after the semiconductor switch tube is turned on, and Δt=Tsamp-(Tmid_next-Tmax-Td-Tn).

[0063] When Texc<Tsamp, and (Tmid_next-Tmax-Td-Tn)<Tsamp, at the sampling moment, the step of starting sampling of the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit includes: controlling the turn-on moment and the cut-off moment of the lower bridge arm switch tube to be compensated to increase Δt at the second carrier cycle, and controlling the turn-on moment and the cut-off moment of the upper bridge arm switch tube to be compensated to decrease Δt at the second carrier cycle, wherein the switch tube to be compensated is the lower bridge arm semiconductor switch tube to be sampled, and the upper bridge arm switch tube to be compensated is the upper bridge arm semiconductor switch tube corresponding to the lower bridge arm switch tube to be compensated.

[0064] In this embodiment, the duration of continuous conduction of VT4 and VT5 in the first carrier cycle and the second carrier cycle is relatively short. Under normal circumstances, VT5 is difficult to meet the sampling requirements. In order to smoothly implement voltage and current sampling, in this embodiment, Fig. 9 As shown, each semiconductor switch to be compensated will be compensated in the second carrier cycle, even if each lower bridge arm semiconductor switch to be sampled and its corresponding upper bridge arm semiconductor switch are increased by Δt at the on-off time of the second carrier cycle, and the on-voltage drop value of the lower bridge arm semiconductor switch to be sampled in the three-phase full-bridge inverter circuit is sampled. Accordingly, the sampling time is determined to be Tmid_next+Δt-Tsamp, so as to ensure that the two-phase current ( Figure 8 and Fig. 9 Smooth sampling of VT5 and VT6) in the embodiments.

[0065] In the above embodiment, the three-phase full-bridge inverter circuit adopts a five-segment SVPWM modulation method. In the first carrier cycle and the second carrier cycle, one lower bridge arm in the three-phase full-bridge inverter circuit is continuously kept in the on state, and the upper bridge arm corresponding to the lower bridge arm is continuously kept in the off state. As described above, by adopting the five-segment SVPWM modulation method, there will be a period of time in the circuit where an upper bridge arm is continuously in the off state and the lower bridge arm is continuously in the on state (such as Figures 3 to 9 In this way, we only need to pay attention to the on-off status of the semiconductor switches corresponding to the bridge arms of the other two phases, so as to select the time period when all semiconductor switches are not in action or have the least action for voltage sampling. Of course, the three-phase full-bridge inverter circuit can also use the seven-segment wave generation method, but its sampling control process will be more complicated and need to pay attention to the action of more semiconductor switches.

[0066] In a specific implementation, the steps of calculating each phase current value of the three-phase motor according to the on-state voltage drop value of at least part of the lower bridge arm semiconductor switch tube include: determining the current on-state internal resistance of each lower bridge arm semiconductor switch tube; using the on-state voltage drop value of each lower bridge arm semiconductor switch tube divided by its current on-state internal resistance to obtain the corresponding phase current value of the three-phase motor.

[0067] In this embodiment, the circuit for sampling the on-state voltage drop value of each lower bridge arm semiconductor switch tube includes an amplifier circuit. According to the on-state voltage drop value of each lower bridge arm semiconductor switch tube, the calculation of each phase current value of the three-phase motor includes: the size of the phase current of each lower bridge arm semiconductor switch tube is calculated according to the sampled on-state voltage drop value Uamp, the on-state internal resistance value Rds and the voltage amplification factor Aop of the amplifier circuit according to the formula I*Rds*Aop=Uamp.

[0068] Specifically, the step of determining the current on-state internal resistance of each lower bridge arm semiconductor switch tube includes: obtaining the current temperature value of each lower bridge arm semiconductor switch tube; and determining the current on-state internal resistance of each lower bridge arm semiconductor switch tube according to a preset correspondence between the temperature value of the lower bridge arm semiconductor switch tube and the on-state internal resistance.

[0069] The lower bridge arm semiconductor switch tube is a MOS tube or an IGBT tube. The IGBT tube is an insulated gate bipolar transistor, and its full name is Insulate-Gate Bipolar Transistor. The MOS tube is a metal-oxide-semiconductor field-effect transistor, and its full name is Metal-Oxide-Semiconductor Field-Effect Transistor.

[0070] In addition, an embodiment of the present invention provides a three-phase motor control method, the control method comprising: using the above-mentioned three-phase motor phase current acquisition and processing method to obtain each phase current value of the three-phase motor; calculating control parameters based on the FOC control algorithm according to each phase current value and the real-time rotation angle of the three-phase motor; and using the control parameters to control the three-phase motor.

[0071] Specifically, according to the current values ​​of each phase and the real-time rotation angle of the three-phase motor, the control parameters are calculated based on the FOC control algorithm. FOC, or Field-Oriented Control, is a motor control strategy that controls the magnetic field and torque of the motor by decomposing the stator current into flux components and torque components. The purpose of FOC is to achieve precise control of the motor speed and torque while accurately tracking the motor rotor angle. The control parameters calculated using the FOC control algorithm include the on and off times of the upper and lower bridge arm semiconductor switches in the next carrier cycle.

[0072] In addition, an embodiment of the present invention provides a computer program product, including computer instructions, which implement the above-mentioned three-phase motor phase current sampling and processing method when the computer instructions are executed by a processor, or implement the above-mentioned three-phase motor control method when the computer instructions are executed by a processor.

[0073] In addition, an embodiment of the present invention provides a non-volatile storage medium, which includes a stored program, wherein when the program is running, the device where the non-volatile storage medium is located is controlled to execute the above-mentioned three-phase motor phase current sampling and processing method, or, when the program is running, the device where the non-volatile storage medium is located is controlled to execute the above-mentioned three-phase motor control method.

[0074] In addition, an embodiment of the present invention provides a processor, which is used to run a program, wherein the above-mentioned three-phase motor phase current sampling and processing method is executed when the program is running, or the above-mentioned three-phase motor control method is executed when the program is running.

[0075] In addition, an embodiment of the present invention provides a motor controller, including a processor, wherein the processor is used to run a program, and the above-mentioned three-phase motor control method is executed when the program is run.

[0076] Again, an embodiment of the present invention provides a three-phase motor, which includes a motor body and a motor controller electrically connected thereto, and the motor controller controls the operation of the motor body, wherein the motor controller is the above-mentioned motor controller.

[0077] From the above description, it can be seen that the above embodiments of the present invention achieve the following technical effects:

[0078] The three-phase motor phase current sampling and processing method of the embodiment of the present invention obtains the on-off moments of at least some semiconductor switch tubes in the three-phase full-bridge inverter circuit in the adjacent first carrier cycle and the second carrier cycle when sampling the three-phase motor phase current, and determines the sampling moment based on the sampling time length Tsamp required, so that the sampling moment falls within the continuous conduction period of at least some lower bridge arm semiconductor switch tubes. The sampling period is the time period for the sampling operation, which can also be called the sampling window. At the sampling moment, the sampling of the conduction voltage drop value of at least some lower bridge arm semiconductor switch tubes is started. After the conduction voltage drop value of each semiconductor switch tube is obtained, the current value of each phase of the three-phase motor can be further calculated according to its conduction voltage drop value. Compared with the method of using a Hall current sensor or an external resistor to detect current in the related art, the implementation method is simpler, can effectively simplify circuit design, reduce hardware costs, and reduce power loss. By combining the on-off moments of each semiconductor switch tube in the first carrier cycle and the second carrier cycle and the sampling time Tsamp, the current sampling moment can be more accurately controlled so that the sampling time segment falls within the continuous conduction period of at least part of the lower bridge arm semiconductor switch tube, thereby minimizing the current fluctuation caused by the action of the switch tube during the sampling process, so that the harmonic components contained in the sampled current are lower, which is conducive to ensuring the final current sampling accuracy. The three-phase motor phase current sampling processing method of the embodiment of the present invention can effectively solve the technical problems of inconvenient and inaccurate sampling of the three-phase motor phase current in the related art.

[0079] The serial numbers of the above embodiments of the present invention are for description only and do not represent the advantages or disadvantages of the embodiments. Moreover, the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be performed in a different order than here.

[0080] In the above embodiments of the present invention, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0081] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the units can be a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0082] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0083] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0084] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk and other media that can store program codes.

[0085] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A three-phase motor phase current sampling and processing method, characterized in that: include: Obtaining on-off moments of at least some semiconductor switches in a three-phase full-bridge inverter circuit in a first carrier cycle and a second carrier cycle, wherein the first carrier cycle and the second carrier cycle are two adjacent PWM carrier cycles; Determine the sampling time according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp required, so that the sampling time falls within the continuous conduction period of at least part of the lower bridge arm semiconductor switch tubes; At the sampling time, starting sampling of the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit; According to the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tube, the current value of each phase of the three-phase motor is calculated.

2. The three-phase motor phase current sampling and processing method according to claim 1, characterized in that: The on-off moments include: The cut-off time of at least part of the upper bridge arm semiconductor switch tubes in the first carrier cycle, and the cut-off time of at least part of the lower bridge arm semiconductor switch tubes in the second carrier cycle, wherein the second carrier cycle is after the first carrier cycle.

3. The three-phase motor phase current sampling and processing method according to claim 1, characterized in that: Determining the sampling time according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the time length Tsamp required for sampling, which includes: In the case where (Tmin_next-Tmax-Td-Tn)≥Tsamp and (Tmin_next-Tp)≥Tsamp, the sampling time is determined to be Tp; In the case where (Tmin_next-Tmax-Td-Tn)≥Tsamp and (Tmin_next-Tp)<Tsamp, the sampling time is determined to be Tmin_next-Tsamp; Among them, Tmax is the maximum value of the truncation time of at least part of the upper bridge arm semiconductor switch tube in the first carrier cycle, Tmin_next is the minimum value of the truncation time of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle, Td is the preset dead time, Tn is the fluctuation time after the preset semiconductor switch tube is turned on, and Tp is the start time of the second carrier cycle.

4. The three-phase motor phase current sampling and processing method according to claim 1, characterized in that: Determining a sampling time according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the sampling time Tsamp, which includes: in the case of Texc<Tsamp, and (Tmid_next-Tmax-Td-Tn)≥Tsamp, determining the sampling time as Tmax+Td+Tn; At the sampling time, starting sampling of the conduction voltage drop values ​​of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit, which includes: sampling the conduction voltage drop values ​​of the other two lower bridge arm semiconductor switch tubes except the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle; Calculating the phase current values ​​of the three-phase motor according to the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes, which includes: calculating the phase current values ​​corresponding to the other two lower bridge arm semiconductor switch tubes except the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier cycle and the second carrier cycle; Among them, Texc is the minimum value of the continuous conduction time of at least part of the lower bridge arm semiconductor switch tube in the first carrier cycle and the second carrier cycle, Tmid_next is the middle value of the cut-off time of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle, Tmax is the maximum value of the cut-off time of at least part of the upper bridge arm semiconductor switch tube in the first carrier cycle, Td is the preset dead time, and Tn is the fluctuation time after the preset semiconductor switch tube is turned on.

5. The three-phase motor phase current sampling and processing method according to claim 4 is characterized in that: Calculating the current values ​​of each phase of the three-phase motor according to the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tube, which also includes: According to the formula Iu+Iv+Iw=0, calculate the phase current value corresponding to the lower bridge arm semiconductor switch tube with the shortest continuous conduction time in the first carrier period and the second carrier period; wherein Iu is the phase current of the u phase of the three-phase motor, Iv is the phase current of the v phase of the three-phase motor, and Iw is the phase current of the w phase of the three-phase motor.

6. The three-phase motor phase current sampling and processing method according to claim 1, characterized in that: Determining the sampling time according to the on-off time of at least part of the semiconductor switch tubes in the first carrier cycle and the second carrier cycle, and the time length Tsamp required for sampling, which includes: When Texc<Tsamp, and (Tmid_next-Tmax-Td-Tn)<Tsamp, the sampling time is determined to be Tmid_next+Δt-Tsamp; Among them, Texc is the minimum value of the continuous conduction time of at least part of the lower bridge arm semiconductor switch tube in the first carrier cycle and the second carrier cycle, Tmid_next is the middle value of the cut-off time of at least part of the lower bridge arm semiconductor switch tube in the second carrier cycle, Tmax is the maximum value of the cut-off time of at least part of the upper bridge arm semiconductor switch tube in the first carrier cycle, Td is the preset dead time, Tn is the fluctuation time after the preset semiconductor switch tube is turned on, Δt=Tsamp-(Tmid_next-Tmax-Td-Tn).

7. The three-phase motor phase current sampling and processing method according to claim 6, characterized in that: In the case where Texc<Tsamp and (Tmid_next-Tmax-Td-Tn)<Tsamp, at the sampling time, sampling of the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes of the three-phase full-bridge inverter circuit is started, which includes: Controlling the lower bridge arm switch tube to be compensated to increase Δt at both the turn-on time and the cut-off time of the second carrier cycle, and controlling the upper bridge arm switch tube to be compensated to decrease Δt at both the turn-on time and the cut-off time of the second carrier cycle, wherein the lower bridge arm switch tube to be compensated is the lower bridge arm semiconductor switch tube to be sampled, and the upper bridge arm switch tube to be compensated is the upper bridge arm semiconductor switch tube corresponding to the lower bridge arm switch tube to be compensated; At the time Tmid_next+Δt-Tsamp, the sampling of the conduction voltage drop value of the lower bridge arm semiconductor switch tube to be sampled is started.

8. The three-phase motor phase current sampling and processing method according to any one of claims 1 to 7, characterized in that: The three-phase full-bridge inverter circuit adopts a five-segment SVPWM modulation method. In the first carrier cycle and the second carrier cycle, a lower bridge arm in the three-phase full-bridge inverter circuit continuously remains in a conducting state, and the upper bridge arm corresponding to the lower bridge arm continuously remains in a truncated state.

9. The three-phase motor phase current sampling and processing method according to any one of claims 1 to 7, characterized in that: Calculating the current values ​​of each phase of the three-phase motor according to the conduction voltage drop value of at least part of the lower bridge arm semiconductor switch tubes, which includes: Obtaining the current temperature value of each of the lower bridge arm semiconductor switch tubes; Determining the current on-state internal resistance of each of the lower bridge arm semiconductor switch tubes according to a preset corresponding relationship between the temperature value and the on-state internal resistance of the lower bridge arm semiconductor switch tube; The corresponding phase current value of the three-phase motor is obtained by dividing the conduction voltage drop value of each lower bridge arm semiconductor switch tube by its current conduction internal resistance.

10. A three-phase motor control method, characterized in that: The control method comprises: Use the three-phase motor phase current acquisition and processing method described in any one of claims 1 to 9 to obtain each phase current value of the three-phase motor; Calculate the control parameters based on the FOC control algorithm according to the phase current values ​​and the real-time rotation angle of the three-phase motor; The three-phase motor is controlled using the control parameters.

11. A computer program product, characterized in that It includes computer instructions, which, when executed by a processor, implement the three-phase motor phase current sampling and processing method described in any one of claims 1 to 9, or, when executed by a processor, implement the three-phase motor control method described in claim 10.

12. A non-volatile storage medium, characterized in that: The non-volatile storage medium includes a stored program, wherein when the program is running, the device where the non-volatile storage medium is located is controlled to execute the three-phase motor phase current sampling and processing method described in any one of claims 1 to 9, or, when the program is running, the device where the non-volatile storage medium is located is controlled to execute the three-phase motor control method described in claim 10.

13. A motor controller, characterized in that: The device comprises a processor, wherein the processor is used to run a program, and the three-phase motor control method according to claim 10 is executed when the program is run.

14. A three-phase motor, characterized in that: The three-phase motor includes a motor body and a motor controller electrically connected thereto, wherein the motor controller controls the operation of the motor body, wherein the motor controller is the motor controller according to claim 13.

Images