Signal stream processing method and device, equipment and readable storage medium

Abstract

The invention discloses a signal flow processing method and device, equipment and a readable storage medium, relates to the technical field of communication, and aims to improve the processing efficiency. The method comprises the steps that signal streams are acquired, and the signal streams comprise data streams and control streams; obtaining a first signal and a second signal according to the control flow, the first signal being used for indicating whether to switch a configuration for processing the data flow, and the second signal being a control signaling for other PEs; and processing the data stream according to the first signal. The embodiment of the invention can improve the processing efficiency.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a signal stream processing method, device, equipment and readable storage medium. Background Art

[0002] Coarse-grained Reconfigurable Architecture (CGRA) is a computing architecture that combines the flexibility of a general-purpose processor (GPP) with the high speed of an application-specific integrated circuit (ASIC). Its characteristic is that after the hardware is manufactured, it still has both software and hardware programmability.

[0003] In the control flow expression paradigm of the existing CGRA architecture, the control flow is expressed in an implicit way by coupling with the instruction flow or data flow. However, embedding the control flow in the instruction or coupling with the data flow may lead to low processing efficiency. Summary of the invention

[0004] The embodiments of the present application provide a signal stream processing method, apparatus, device and readable storage medium to improve processing efficiency.

[0005] In a first aspect, an embodiment of the present application provides a signal stream processing method, which is applied to a PE (Processing Element, processing unit), and is characterized by comprising:

[0006] Acquire a signal flow, wherein the signal flow includes: a data flow and a control flow;

[0007] Obtaining a first signal and a second signal according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling for other PEs;

[0008] The data stream is processed according to the first signal.

[0009] Optionally, the PE includes a data flow processing unit and a control flow processing unit, and the control flow processing unit includes: an arbitrator, a trigger, and a generator;

[0010] The obtaining of the first signal and the second signal according to the control flow comprises:

[0011] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0012] The trigger generates the first signal according to the judgment result;

[0013] The generator generates the second signal according to the control flow.

[0014] Optionally, the processing the data stream according to the first signal includes:

[0015] If the first signal is used to indicate that a configuration for processing the data stream needs to be switched, the data stream processing unit performs ALU (Arithmetic and Logic Unit) reconstruction according to the first signal, and processes the data stream based on a result of the ALU reconstruction;

[0016] If the first signal is used to indicate that there is no need to switch the configuration for processing the data stream, the data stream processing unit processes the data stream according to the current configuration.

[0017] In a second aspect, an embodiment of the present application provides a signal stream processing method, which is applied to a first CE (Control Element) in a PEA (Processing Element Array), wherein the PEA includes: one or more CEs, one or more PEs; the first CE is any one of the one or more CEs; the method includes:

[0018] Acquire a signal flow, wherein the signal flow includes: a data flow and a control flow;

[0019] Obtaining a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow;

[0020] The third signal and the control flow are sent to the second CE.

[0021] Optionally, the first CE includes a data flow processing unit and a control flow processing unit, and the control flow processing unit includes: an arbitrator, a trigger, and a generator;

[0022] The obtaining a third signal according to the control flow comprises:

[0023] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0024] The trigger generates a fourth signal according to the determination result, wherein the fourth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream;

[0025] The generator generates the third signal according to the processing result of the data stream processing unit.

[0026] In a third aspect, an embodiment of the present application provides a signal stream processing method, which is applied to a second CE in a PEA, wherein the PEA includes one or more CEs and one or more PEs, and the second CE is any one of the one or more CEs; the method includes:

[0027] Acquire a third signal and a control stream from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data stream;

[0028] Generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to the target PE in the PEA how to process the data flow;

[0029] The fifth signal is sent to the target PE.

[0030] Optionally, the second CE includes a data flow processing unit and a control flow processing unit, and the control flow processing unit includes: an arbitrator, a trigger, and a generator;

[0031] The generating a fifth signal according to the third signal and the control flow comprises:

[0032] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0033] The trigger generates a sixth signal according to the determination result, wherein the sixth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream;

[0034] The generator generates the fifth signal according to the control flow.

[0035] In a fourth aspect, an embodiment of the present application provides a signal flow processing device, which is applied to PE, including:

[0036] A first acquisition unit, configured to acquire a signal stream, wherein the signal stream includes: a data stream and a control stream;

[0037] A second acquisition unit, configured to obtain a first signal and a second signal according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling for other PEs;

[0038] The first processing unit is configured to process the data stream according to the first signal.

[0039] Optionally, the second acquisition unit includes: an arbitrator, a trigger and a generator;

[0040] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0041] The trigger generates the first signal according to the judgment result;

[0042] The generator generates the second signal according to the control flow.

[0043] Optionally, the first processing unit is also used to, if the first signal is used to indicate that the configuration for processing the data stream needs to be switched, the data stream processing unit performs ALU reconstruction according to the first signal, and processes the data stream based on the result of the ALU reconstruction; if the first signal is used to indicate that the configuration for processing the data stream does not need to be switched, the data stream processing unit processes the data stream according to the current configuration.

[0044] In a fifth aspect, an embodiment of the present application provides a signal flow processing device, which is applied to a first control unit CE in a PEA, wherein the PEA includes: one or more CEs, one or more PEs; the first CE is any one of the one or more CEs; the device includes:

[0045] A first acquisition unit, configured to acquire a signal stream, wherein the signal stream includes: a data stream and a control stream;

[0046] A second acquisition unit, configured to obtain a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow;

[0047] The first sending unit is configured to send the third signal and the control flow to the second CE.

[0048] Optionally, the first acquisition unit includes: an arbitrator, a trigger and a generator;

[0049] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0050] The trigger generates a fourth signal according to the determination result, wherein the fourth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream;

[0051] The generator generates the third signal according to the processing result of the data stream processing unit.

[0052] In a sixth aspect, an embodiment of the present application provides a signal flow processing device, which is applied to a second CE in a PEA, wherein the PEA includes one or more CEs and one or more PEs, and the second CE is any one of the one or more CEs; the device includes:

[0053] A first acquisition unit, configured to acquire a third signal and a control stream from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data stream;

[0054] a first generating unit, configured to generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to a target PE in the PEA a processing method for a data flow;

[0055] The first sending unit is used to send the fifth signal to the target PE.

[0056] Optionally, the first generating unit includes: an arbitrator, a trigger and a generator;

[0057] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0058] The trigger generates a sixth signal according to the determination result, wherein the sixth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream;

[0059] The generator generates the fifth signal according to the control flow.

[0060] In a seventh aspect, an embodiment of the present application provides a signal flow processing device, applied to a PE, comprising: a processor and a transceiver;

[0061] Wherein, the processor is used to obtain a signal flow, wherein the signal flow includes: a data flow and a control flow; a first signal and a second signal are obtained according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling to other PEs; and the data flow is processed according to the first signal.

[0062] Optionally, the processor is further used to judge the control flow, obtain a judgment result, and send the judgment result to the trigger; generate the first signal according to the judgment result; and generate the second signal according to the control flow.

[0063] Optionally, the processor is also used to, if the first signal is used to indicate that the configuration for processing the data stream needs to be switched, the data stream processing unit performs ALU reconstruction according to the first signal, and processes the data stream based on the result of the ALU reconstruction; if the first signal is used to indicate that the configuration for processing the data stream does not need to be switched, the data stream processing unit processes the data stream according to the current configuration.

[0064] In an eighth aspect, an embodiment of the present application provides a signal flow processing device, which is applied to a first control unit CE in a PEA, wherein the PEA includes: one or more CEs, and one or more PEs; the first CE is any one of the one or more CEs; the device includes: a processor and a transceiver;

[0065] The processor is used to obtain a signal stream, wherein the signal stream includes: a data stream and a control stream; obtain a third signal according to the control stream, wherein the third signal is used to instruct the second CE in the PEA to process the data stream;

[0066] The transceiver is used to send the third signal and the control flow to the second CE.

[0067] Optionally, the processor is also used to judge the control flow, obtain a judgment result, and send the judgment result to the trigger; generate a fourth signal based on the judgment result, wherein the fourth signal is used to indicate whether the data flow processing unit switches the configuration for processing the data flow; and generate the third signal based on the processing result of the data flow processing unit.

[0068] In a ninth aspect, an embodiment of the present application provides a signal flow processing device, which is applied to a second CE in a PEA, wherein the PEA includes one or more CEs and one or more PEs, and the second CE is any one of the one or more CEs; the device includes: a processor and a transceiver;

[0069] The processor is used to obtain a third signal and a control flow from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data flow; generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to the target PE in the PEA how to process the data flow;

[0070] The transceiver is used to send the fifth signal to the target PE.

[0071] Optionally, the processor is also used to judge the control flow, obtain a judgment result, and send the judgment result to the trigger; generate a sixth signal based on the judgment result, wherein the sixth signal is used to indicate whether the data flow processing unit switches the configuration for processing the data flow; and generate the fifth signal based on the processing result of the data flow processing unit.

[0072] In a tenth aspect, an embodiment of the present application provides a PE, comprising: a data flow processing unit and a control flow processing unit, wherein the control flow processing unit comprises: an arbitrator, a trigger, and a generator;

[0073] The arbiter is used to judge the acquired control flow, obtain a judgment result, and send the judgment result to the trigger; the trigger generates a first signal according to the judgment result; the generator generates a second signal according to the control flow; wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling to other PEs;

[0074] The data stream processing unit is used to process the data stream according to the first signal.

[0075] In an eleventh aspect, an embodiment of the present application further provides a PEA, including: one or more CEs, one or more PEs;

[0076] A first CE is used to obtain a signal flow, wherein the signal flow includes: a data flow and a control flow; obtain a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow; and send the third signal and the control flow to the second CE;

[0077] The second CE is used to generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to a target PE in the PEA how to process the data flow, and send the fifth signal to the target PE;

[0078] The target PE is used to process the data stream according to the fifth signal;

[0079] The first CE and the second CE are any CEs among the one or more CEs.

[0080] In a twelfth aspect, an embodiment of the present application further provides a communication device, comprising: a memory, a processor, and a program stored in the memory and executable on the processor, wherein the processor implements the steps in the signal flow processing method as described above when executing the program.

[0081] In a thirteenth aspect, an embodiment of the present application further provides a readable storage medium, on which a program is stored, and when the program is executed by a processor, the steps in the signal flow processing method as described above are implemented.

[0082] In an embodiment of the present application, the data flow and the control flow are separated within the PE, and a first signal is obtained by processing the control flow, so that the reconstruction operation of the data flow processing path can be performed in advance through the first signal, thereby avoiding the problem of low pipeline efficiency caused by branches and improving processing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0083] Figure 1 is a schematic diagram of CGRA;

[0084] Figure 2 is a schematic diagram of a PE provided in an embodiment of the present application;

[0085] Figure 3 It is a schematic diagram of the internal structure of a PE provided in an embodiment of the present application;

[0086] Figure 4 It is one of the flowcharts of the signal flow processing method of the embodiment of the present application;

[0087] Figure 5 is a schematic diagram of array-level transmission of explicit expression of control flow provided in an embodiment of the present application;

[0088] Figure 6 is a schematic diagram of a PEA provided in an embodiment of the present application;

[0089] Figure 7 This is the second flowchart of the signal flow processing method of the embodiment of the present application;

[0090] Figure 8 This is the third flowchart of the signal flow processing method of the embodiment of the present application;

[0091] Fig. 9 It is one of the structural diagrams of the signal stream processing device provided in the embodiment of the present application;

[0092] Fig.10 This is the second structural diagram of the signal stream processing device provided in the embodiment of the present application;

[0093] Fig.11 This is the third structural diagram of the signal stream processing device provided in the embodiment of the present application;

[0094] Fig.12 This is the fourth structural diagram of the signal stream processing device provided in the embodiment of the present application;

[0095] Fig.13This is the fifth structural diagram of the signal stream processing device provided in the embodiment of the present application;

[0096] Fig.14 This is the sixth structural diagram of the signal stream processing device provided in the embodiment of the present application. DETAILED DESCRIPTION

[0097] In the embodiments of the present application, the term "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0098] In the embodiments of the present application, the term "plurality" refers to two or more than two, and other quantifiers are similar.

[0099] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0100] like Figure 1 As shown in the figure, CGRA mainly adopts an execution model composed of a control flow graph (CFG) and a data flow graph (DFG), based on which control and calculation related operations are realized. The essence of CFG is a finite state machine, which determines the execution order of each part of the program and reflects the dynamic characteristics of the algorithm. A CFG is a directed graph composed of basic nodes and edges. Each node corresponds to the pure data calculation or branch operation of DFG, and the edge corresponds to the control flow information that may exist between two nodes. Applications with complex control flows contain dense branch operations and frequent control flow interactions, which makes the entire execution model very complicated, resulting in lower execution efficiency and higher overhead.

[0101] The control flow in the existing CGRA architecture is expressed in an implicit way by coupling with the instruction flow or data flow. The CGRA design adopts an instruction-triggered mode, that is, the instruction flow is distributed and statically determined during the compilation phase, and configured before the data flow arrives. Its overall execution model follows the principle of "configure first, then execute". In this mode, the PE array needs to execute the data flow graph through distributed instruction streams and interactive data flows. However, since the control flow is expressed implicitly and no explicit design space is provided for the control flow, the control flow information can only be coupled with the data flow or instruction flow to be transmitted on the chip, resulting in one or more of the following problems:

[0102] 1. Since the control flow is not explicitly expressed, CGRA can only transmit control information on the array by coupling the control flow with the data flow or hiding it in the instructions. The above two methods correspond to the two PE configuration trigger models of data flow triggering and instruction flow triggering. However, embedding the control flow in the instruction or coupling it with the data flow may result in a large overhead. When faced with dense branches, the control flow triggering method cannot merge branches, resulting in extremely low PE utilization. At the same time, although the dynamic data flow triggering is flexible enough, it cannot construct pipelines between control-dependent loops with complex control flow applications, so it cannot hide the configuration time, resulting in a huge execution time overhead.

[0103] 2. The existing interconnection network of the PE array is designed for data flow, which couples the transmission of control flow information in the data flow. However, the information transmission of data flow and control flow has different requirements for the transmission network, and the use of a set of transmission networks involves the trade-off between flexibility and area overhead. Therefore, even if the existing CGRA network has a high area overhead and can achieve fast data flow transmission, its flexibility is not enough to support complex control flow, resulting in increased transmission delay in applications with complex control flow.

[0104] From the above problems, it can be seen that the expression of control flow is an important factor affecting the performance of existing CGRA. In order to meet the requirements of execution time and transmission delay during CGRA execution, it is necessary to design a new CGRA architecture based on the explicit control flow expression method and optimize the CGRA model from the perspective of PE configuration and array transmission.

[0105] In the PE design where the control flow is explicitly expressed, the control flow and the data flow are separated in the configuration, which makes the control part and the data part of the PE internal structure independent of each other in hardware design. By analyzing the characteristics of CFG and DFG, we can draw the following conclusion: the control flow determines which instruction the PE configures, while the data flow determines when the PE executes the instruction. Therefore, in the design of the internal structure of the PE, a mechanism triggered by the control flow can be applied to activate the PE to complete the next step of data operation.

[0106] For this purpose, see Figure 2 , Figure 2 PE may include: a data flow processing unit 21 and a control flow processing unit 22. Figure 3 As shown, the control flow processing unit includes: an arbitrator 221, a trigger 222 and a generator 223.

[0107] exist Figure 3 In the CFG diagram, the decoupled control flow and data flow will be distributed to different hardware parts inside the PE. According to the input control flow, it is decided whether to switch the configuration to adapt to the data operation that will be performed next. The arbiter analyzes or judges the input control flow and passes it to the trigger. The trigger determines whether the data path needs to switch the configuration, and the generator is used to generate the control signal that will be sent to the next PE. The transmission of control flow signals fundamentally depends on the CFG diagram. By separating the control flow and data flow and differentiating the internal structure of the PE, the execution process of the CGRA is reflected in a more fine-grained manner, which improves the execution efficiency.

[0108] Specifically, the arbiter 221 is used to judge the acquired control flow, obtain a judgment result, and send the judgment result to the trigger; the trigger 222 generates a first signal according to the judgment result; the generator 223 generates a second signal according to the control flow; wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling to other PEs; the data flow processing unit 21 is used to process the data flow according to the first signal.

[0109] The judgment of the control flow by the arbitrator 221 may include, for example, the judgment of the validity of the control flow. If the judgment result indicates that the control flow is valid, the trigger may perform corresponding processing. The trigger judges according to the control flow to determine whether it is necessary to switch the configuration for processing the data flow. For example, the trigger may compare the currently received control flow with the previous control flow. If the two values ​​are consistent, it is determined that there is no need to switch the configuration; otherwise, it is determined that the configuration needs to be switched. If the configuration needs to be switched, the trigger generates a first signal. Afterwards, the data flow processing unit may reconstruct the ALU according to the first signal, perform corresponding processing on the data flow, or perform corresponding processing on the data flow using the current configuration.

[0110] In the existing CGRA, a single PE can only perform control or data operations statically, and when encountering branch situations, the control operation is often inefficient. Figure 2 and Figure 3 In the structure shown, the control flow has an independent hardware execution part. In order to adapt to the change of execution mode, the internal structure of PE also changes accordingly. The original data path is retained, and the hardware part for dedicated control information processing is added ( Figure 3 As shown). The control flow part and the data flow part interact with each other inside the PE. Therefore, in the embodiment of the present application, through the control and data separation and the control and data interaction inside the PE, the operation of reconstructing the data path can be performed in advance, thereby avoiding the problem of low pipeline efficiency caused by branches.

[0111] See also Figure 4 , Figure 4 is a flowchart of a signal flow processing method provided in an embodiment of the present application, which is applied to PE, such as Figure 4 As shown, the following steps are included:

[0112] Step 401: Acquire a signal flow, wherein the signal flow includes: a data flow and a control flow.

[0113] Step 402: Obtain a first signal and a second signal according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling for other PEs.

[0114] The structure of the PE can be referred to Figure 2 and Figure 3 shown.

[0115] Specifically, in this step, the arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger; the trigger generates the first signal according to the judgment result; and the generator generates the second signal according to the control flow.

[0116] Step 403: Process the data stream according to the first signal.

[0117] If the first signal is used to indicate that the configuration for processing the data stream needs to be switched, the data stream processing unit performs ALU reconstruction according to the first signal, and processes the data stream based on the result of the ALU reconstruction; if the first signal is used to indicate that the configuration for processing the data stream does not need to be switched, the data stream processing unit processes the data stream according to the current configuration. The current configuration refers to the configuration of the data stream processing unit when executing the embodiment of the present application.

[0118] In an embodiment of the present application, the data flow and the control flow are separated within the PE, and a first signal is obtained by processing the control flow, so that the reconstruction operation of the data flow processing path can be performed in advance through the first signal, thereby avoiding the problem of low pipeline efficiency caused by branches and improving processing efficiency.

[0119] In the existing PEA design, control flow and data flow share a set of transmission networks by designing a separate control flow information transmission network. The transmission of data flow has the characteristics of high bit width and low flexibility, while the transmission of control flow should be low bit width and high flexibility. Such mutually exclusive transmission characteristics lead to low efficiency and low flexibility in the execution process of a single set of transmission networks.

[0120] To this end, combined Figure 5 As shown, Figure 5 This is a schematic diagram of array-level transmission design for explicit expression of control flow in an embodiment of the present application. The control flow information has an independent transmission mechanism on the chip, so that it can be separated from the data flow transmission at a deep level. Based on the low bit width of the control flow, a highly flexible transmission network is designed for it, so that it can more efficiently handle application problems with complex control flows and ensure the performance requirements of on-chip information interaction.

[0121] like Figure 6 As shown, the PEA of the embodiment of the present application includes: one or more CE61, one or more PE62;

[0122] A first CE is used to obtain a signal flow, wherein the signal flow includes: a data flow and a control flow; obtain a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow; and send the third signal and the control flow to the second CE;

[0123] The second CE is used to generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to a target PE in the PEA how to process the data flow, and send the fifth signal to the target PE;

[0124] The target PE is used to process the data stream according to the fifth signal;

[0125] The first CE and the second CE are any CE in the one or more CEs. For example, the first CE is the CE in the first row and the first column in the PEA, and the second CE is the CE in the second row and the first column in the PEA. The target PE is the PE in DFG1 corresponding to the second CE.

[0126] exist Figure 6 In the heterogeneous design, the entire array adopts a heterogeneous design. After realizing the independent transmission of control flow on the chip, the entire PE array can be optimized to better meet the problem of solving complex control flow applications. Because each PE unit has separate control and data hardware parts, some PEs can be designed as control-dominant (CE), and the remaining basic units are still used as data operation units. That is, in this heterogeneous design scheme, the PE array is divided into control unit CE and basic unit PE.

[0127] like Figure 6 As shown, Figure 6 The structure of CE in the same as PE. The structure of each PE can refer to Figure 2 or Figure 3 As shown in the figure. CE is mainly used to change the control flow information, corresponding to the CFG node in the execution mode. Benefiting from the independent transmission mechanism, flexible transmission on the chip can be achieved. The remaining PEs mainly perform some basic data operations such as addition, multiplication, multiplication and accumulation operations, etc. They correspond to the DFG operation blocks in the execution mode and can uniformly receive signals from CE. This is also corresponding to the execution mode, because CFG nodes usually contain DFG.

[0128] The information transmission between control units is characterized by full interconnection and low bit width, completing the bit-level control information interaction, realizing control flows such as loop operations, comparison and judgment, and forming an execution process determined by the control logic. What is transmitted between basic PEs is high-bit-width data information. Each PE can receive control information from the corresponding control unit and independently communicate with it related to the control information.

[0129] Because the control information is separated from the data information, there are no more operations related to the control flow in the PE, and only simple pure data operations are performed, which improves the efficiency of the pipeline. When facing typical communication algorithms such as the LDPC (Low Density Parity Check Code) algorithm, this structure can decompose complex branch operations, execute control flow and data flow separately, and alleviate the inefficiency and low PE utilization caused by control-intensive operations such as loop nesting or conditional branches. Therefore, the performance of CGRA in processing mobile communication algorithms can be improved during execution.

[0130] See also Figure 7 , Figure 7 is a flowchart of a signal flow processing method provided in an embodiment of the present application, which is applied to the first CE in the PEA, such as Figure 7 As shown, the following steps are included:

[0131] Step 701: Acquire a signal flow, wherein the signal flow includes: a data flow and a control flow.

[0132] The data stream may be preset in the first CE.

[0133] Step 702: Obtain a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow.

[0134] The structure of the first CE can be referred to Figure 2 or Figure 3 Specifically, in this step, the arbiter judges the control flow, obtains a judgment result, and sends the judgment result to the trigger; the trigger generates a fourth signal according to the judgment result, wherein the fourth signal is used to indicate whether the data flow processing unit switches the configuration for processing the data flow; the generator generates the third signal according to the processing result of the data flow processing unit.

[0135] That is, the first CE determines which branch (CFG) in the PEA is to process the data flow by judging the control flow.

[0136] Specifically, in this step, the arbiter judges the control flow, such as whether the control flow is valid, obtains a judgment result, and sends the judgment result to the trigger. The trigger generates the fourth signal according to the judgment result. The data processing unit can reconstruct the ALU according to the fourth signal and process the data flow, or process the data flow based on the current configuration. The processing result of the data processing unit can be an identifier, such as 0 or 1. By judging the identifier, the generator can generate a third signal, that is, determine which branch processes the data flow.

[0137] Step 703: Send the third signal and the control flow to the second CE.

[0138] See also Figure 8 , Figure 8 Flowchart of the signal flow processing method provided in the embodiment of the present application, which is applied to the second CE in the PEA, such as Figure 8 As shown, the following steps are included:

[0139] Step 801: Obtain a third signal and a control stream from a first CE in the PEA, wherein the third signal is used to instruct the second CE to process a data stream.

[0140] The transmission of the control stream between the first CE and the second CE may be low-bit-width transmission.

[0141] Step 802: Generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to the target PE in the PEA how to process the data flow.

[0142] The structure of the second CE can refer to Figure 2 and Figure 3 After the arbitrator determines that the data flow needs to be processed according to the third signal, the arbitrator judges the control flow, such as whether the control flow is valid, obtains a judgment result, and sends the judgment result to the trigger; the trigger generates a sixth signal according to the judgment result, wherein the sixth signal is used to indicate whether the data flow processing unit switches the configuration for processing the data flow; the generator generates the fifth signal according to the control flow.

[0143] Step 803: Send the fifth signal to the target PE.

[0144] The target PE refers to a PE in the CFG used to process the data stream. The fifth signal is transmitted between one or more PEs to perform corresponding processing on the data stream.

[0145] It can be seen from the above description that in the embodiment of the present application, through the optimized design of the PE unit and the structural change of the array level, the overall performance of the CGRA when facing complex control flows is greatly improved, the time and area overhead caused by the coupling of the control flow and the data flow is reduced, the trigger delay during configuration and the transmission delay during execution are reduced, the processing efficiency is improved, and higher performance requirements can be met.

[0146] See also Fig. 9 , Fig. 9 is a structural diagram of a signal flow processing device provided in an embodiment of the present application, which is applied to PE. Fig. 9 As shown, the signal flow processing device includes:

[0147] The first acquisition unit 901 is used to acquire a signal flow, wherein the signal flow includes: a data flow and a control flow; the second acquisition unit 902 is used to obtain a first signal and a second signal according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling to other PEs; the first processing unit 903 is used to process the data flow according to the first signal.

[0148] Optionally, the second acquisition unit includes: an arbitrator, a trigger and a generator;

[0149] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0150] The trigger generates the first signal according to the judgment result;

[0151] The generator generates the second signal according to the control flow.

[0152] Optionally, the first processing unit is also used to, if the first signal is used to indicate that the configuration for processing the data stream needs to be switched, the data stream processing unit performs ALU reconstruction according to the first signal, and processes the data stream based on the result of the ALU reconstruction; if the first signal is used to indicate that the configuration for processing the data stream does not need to be switched, the data stream processing unit processes the data stream according to the current configuration.

[0153] The device provided in the embodiment of the present application can execute the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.

[0154] See also Fig.10 , Fig.10 1 is a structural diagram of a signal flow processing device provided in an embodiment of the present application, which is applied to the first CE in a PEA, wherein the PEA includes: one or more CEs and one or more PEs; the first CE is any one of the one or more CEs. Fig.10 As shown, the signal flow processing device includes:

[0155] The first acquisition unit 1001 is used to acquire a signal stream, wherein the signal stream includes: a data stream and a control stream; the second acquisition unit 1002 is used to obtain a third signal according to the control stream, wherein the third signal is used to instruct the second CE in the PEA to process the data stream; the first sending unit 1003 is used to send the third signal and the control stream to the second CE.

[0156] Optionally, the first acquisition unit includes: an arbitrator, a trigger and a generator;

[0157] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0158] The trigger generates a fourth signal according to the determination result, wherein the fourth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream;

[0159] The generator generates the third signal according to the processing result of the data stream processing unit.

[0160] The device provided in the embodiment of the present application can execute the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.

[0161] See also Fig.11 , Fig.11 is a structural diagram of a signal flow processing device provided in an embodiment of the present application, which is applied to the second CE in a PEA, wherein the PEA includes: one or more CEs, one or more PEs; the first CE is any one of the one or more CEs. Fig.11 As shown, the signal flow processing device includes:

[0162] The first acquisition unit 1101 is used to acquire a third signal and a control flow from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data flow; the first generation unit 1102 is used to generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to instruct the target PE in the PEA on how to process the data flow; the first sending unit 1103 is used to send the fifth signal to the target PE.

[0163] Optionally, the first generating unit includes: an arbitrator, a trigger and a generator;

[0164] The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger;

[0165] The trigger generates a sixth signal according to the determination result, wherein the sixth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream;

[0166] The generator generates the fifth signal according to the control flow.

[0167] The device provided in the embodiment of the present application can execute the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.

[0168] See also Fig.12 , Fig.12 The embodiment of the present application provides a signal flow processing device, which is applied to PE, including: a processor 1201 and a transceiver 1202;

[0169] The processor 1201 is used to obtain a signal flow, wherein the signal flow includes: a data flow and a control flow; a first signal and a second signal are obtained according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling to other PEs; and the data flow is processed according to the first signal.

[0170] Optionally, the processor 1201 is further used to judge the control flow, obtain a judgment result, and send the judgment result to the trigger; generate the first signal according to the judgment result; and generate the second signal according to the control flow.

[0171] Optionally, the processor 1201 is also used to, if the first signal is used to indicate that the configuration for processing the data stream needs to be switched, the data stream processing unit performs ALU reconstruction according to the first signal, and processes the data stream based on the result of the ALU reconstruction; if the first signal is used to indicate that the configuration for processing the data stream does not need to be switched, the data stream processing unit processes the data stream according to the current configuration.

[0172] The device provided in the embodiment of the present application can execute the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.

[0173] See also Fig.13 , Fig.13 The embodiment of the present application provides a signal flow processing device, which is applied to the first CE in the PEA, and the PEA includes: one or more CEs, one or more PEs; the first CE is any one of the one or more CEs; including: a processor 1301 and a transceiver 1302;

[0174] The processor 1301 is used to obtain a signal stream, wherein the signal stream includes: a data stream and a control stream; obtain a third signal according to the control stream, wherein the third signal is used to instruct the second CE in the PEA to process the data stream;

[0175] The transceiver 1302 is used to send the third signal and the control flow to the second CE.

[0176] Optionally, the processor 1301 is also used to judge the control flow, obtain a judgment result, and send the judgment result to the trigger; generate a fourth signal based on the judgment result, wherein the fourth signal is used to indicate whether the data flow processing unit switches the configuration for processing the data flow; and generate the third signal based on the processing result of the data flow processing unit.

[0177] The device provided in the embodiment of the present application can execute the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.

[0178] See also Fig.14 , Fig.14 The embodiment of the present application provides a signal flow processing device, which is applied to the second CE in the PEA, and the PEA includes: one or more CEs, one or more PEs; the first CE is any one of the one or more CEs; including: a processor 1401 and a transceiver 1402;

[0179] The processor 1401 is configured to obtain a third signal and a control flow from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data flow; generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to instruct the target PE in the PEA on a processing method for the data flow;

[0180] The transceiver 1402 is used to send the fifth signal to the target PE.

[0181] Optionally, the processor 1401 is also used to judge the control flow, obtain a judgment result, and send the judgment result to the trigger; generate a sixth signal based on the judgment result, wherein the sixth signal is used to indicate whether the data flow processing unit switches the configuration for processing the data flow; and generate the fifth signal based on the processing result of the data flow processing unit.

[0182] The device provided in the embodiment of the present application can execute the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.

[0183] It should be noted that the division of units in the embodiments of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional unit in each embodiment of the present application may be integrated into a processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0184] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a processor-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program codes.

[0185] An embodiment of the present application provides a communication device, including: a memory, a processor, and a program stored in the memory and executable on the processor; the processor is used to read the program in the memory to implement the steps in the signal stream processing method as described above.

[0186] The embodiment of the present application also provides a readable storage medium, on which a program is stored, and when the program is executed by the processor, each process of the above-mentioned signal flow processing method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it is not repeated here. Among them, the readable storage medium can be any available medium or data storage device that can be accessed by the processor, including but not limited to magnetic storage (such as floppy disk, hard disk, magnetic tape, magneto-optical disk (MO), etc.), optical storage (such as CD, DVD, BD, HVD, etc.), and semiconductor storage (such as ROM, EPROM, EEPROM, non-volatile memory (NAND FLASH), solid-state drive (SSD)), etc.

[0187] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0188] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD), and includes a number of instructions for a terminal (which can be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0189] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A signal flow processing method, applied to a processing unit PE, characterized in that: include: Acquire a signal flow, wherein the signal flow includes: a data flow and a control flow; Obtaining a first signal and a second signal according to the control flow, wherein the first signal is used to indicate whether to switch a configuration for processing the data flow, and the second signal is a control signaling for other PEs; The data stream is processed according to the first signal.

2. The method according to claim 1, characterized in that The PE includes: a data flow processing unit and a control flow processing unit, and the control flow processing unit includes: an arbitrator, a trigger and a generator; The obtaining of the first signal and the second signal according to the control flow comprises: The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger; The trigger generates the first signal according to the judgment result; The generator generates the second signal according to the control flow.

3. The method according to claim 2, characterized in that The processing of the data stream according to the first signal includes: If the first signal is used to indicate that a configuration for processing the data stream needs to be switched, the data stream processing unit reconstructs an arithmetic logic unit ALU according to the first signal, and processes the data stream based on a result of the ALU reconstruction; If the first signal is used to indicate that there is no need to switch the configuration for processing the data stream, the data stream processing unit processes the data stream according to the current configuration.

4. A signal flow processing method, applied to a first control unit CE in a processing unit array PEA, characterized in that: The PEA includes: one or more CEs and one or more PEs; the first CE is any one of the one or more CEs; the method includes: Acquire a signal flow, wherein the signal flow includes: a data flow and a control flow; Obtaining a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow; The third signal and the control flow are sent to the second CE.

5. The method according to claim 4, characterized in that The first CE includes: a data flow processing unit and a control flow processing unit, and the control flow processing unit includes: an arbitrator, a trigger and a generator; The obtaining a third signal according to the control flow comprises: The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger; The trigger generates a fourth signal according to the determination result, wherein the fourth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream; The generator generates the third signal according to the processing result of the data stream processing unit.

6. A signal stream processing method, applied to the second CE in PEA, characterized in that: The PEA includes one or more CEs and one or more PEs, and the second CE is any one of the one or more CEs; the method includes: Acquire a third signal and a control stream from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data stream; Generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to the target PE in the PEA how to process the data flow; The fifth signal is sent to the target PE.

7. The method according to claim 6, characterized in that The second CE includes: a data flow processing unit and a control flow processing unit, and the control flow processing unit includes: an arbitrator, a trigger and a generator; The generating a fifth signal according to the third signal and the control flow comprises: The arbitrator judges the control flow, obtains a judgment result, and sends the judgment result to the trigger; The trigger generates a sixth signal according to the determination result, wherein the sixth signal is used to indicate whether the data stream processing unit switches the configuration for processing the data stream; The generator generates the fifth signal according to the control flow.

8. A signal flow processing device, applied to PE, characterized in that: include: A first acquisition unit, configured to acquire a signal stream, wherein the signal stream includes: a data stream and a control stream; A second acquisition unit, configured to obtain a first signal and a second signal according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling for other PEs; The first processing unit is configured to process the data stream according to the first signal.

9. A signal stream processing device, applied to the first control unit CE in PEA, characterized in that: The PEA includes: one or more CEs, one or more PEs; the first CE is any one of the one or more CEs; the device includes: A first acquisition unit, configured to acquire a signal stream, wherein the signal stream includes: a data stream and a control stream; A second acquisition unit, configured to obtain a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow; The first sending unit is configured to send the third signal and the control flow to the second CE.

10. A signal stream processing device, applied to the second CE in PEA, characterized in that: The PEA includes one or more CEs and one or more PEs, and the second CE is any one of the one or more CEs; the device includes: A first acquisition unit, configured to acquire a third signal and a control stream from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data stream; a first generating unit, configured to generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to a target PE in the PEA a processing method for a data flow; The first sending unit is used to send the fifth signal to the target PE.

11. A signal flow processing device, applied to PE, characterized in that: include: processors and transceivers; Wherein, the processor is used to obtain a signal flow, wherein the signal flow includes: a data flow and a control flow; a first signal and a second signal are obtained according to the control flow, wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling to other PEs; and the data flow is processed according to the first signal.

12. A signal stream processing device, applied to a first control unit CE in a PEA, characterized in that: The PEA includes: one or more CEs, one or more PEs; the first CE is any one of the one or more CEs; the device includes: a processor and a transceiver; The processor is used to obtain a signal stream, wherein the signal stream includes: a data stream and a control stream; obtain a third signal according to the control stream, wherein the third signal is used to instruct the second CE in the PEA to process the data stream; The transceiver is used to send the third signal and the control flow to the second CE.

13. A signal stream processing device, applied to the second CE in PEA, characterized in that: The PEA includes one or more CEs and one or more PEs, and the second CE is any one of the one or more CEs; the device includes: a processor and a transceiver; The processor is used to obtain a third signal and a control flow from the first CE in the PEA, wherein the third signal is used to instruct the second CE to process the data flow; generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to the target PE in the PEA how to process the data flow; The transceiver is used to send the fifth signal to the target PE.

14. A PE, characterized in that: include: A data flow processing unit and a control flow processing unit, wherein the control flow processing unit comprises: an arbitrator, a trigger and a generator; The arbiter is used to judge the acquired control flow, obtain a judgment result, and send the judgment result to the trigger; the trigger generates a first signal according to the judgment result; the generator generates a second signal according to the control flow; wherein the first signal is used to indicate whether to switch the configuration for processing the data flow, and the second signal is a control signaling to other PEs; The data stream processing unit is used to process the data stream according to the first signal.

15. A PEA, characterized in that include: One or more CEs, one or more PEs; A first CE is used to obtain a signal flow, wherein the signal flow includes: a data flow and a control flow; obtain a third signal according to the control flow, wherein the third signal is used to instruct the second CE in the PEA to process the data flow; and send the third signal and the control flow to the second CE; The second CE is used to generate a fifth signal according to the third signal and the control flow, wherein the fifth signal is used to indicate to a target PE in the PEA how to process the data flow, and send the fifth signal to the target PE; The target PE is used to process the data stream according to the fifth signal; The first CE and the second CE are any CEs among the one or more CEs.

16. A communication device comprising: A memory, a processor, and a program stored in the memory and executable on the processor; wherein the processor is used to read the program in the memory to implement the steps in the signal stream processing method as described in any one of claims 1 to 8.

17. A readable storage medium for storing a program, characterized in that: When the program is executed by a processor, the steps in the signal stream processing method according to any one of claims 1 to 8 are implemented.

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