High-reliability cold backup satellite-borne broadband waveform generation assembly

Abstract

The invention discloses a high-reliability cold backup satellite-borne broadband waveform generation assembly, which comprises a main waveform generation module, a backup waveform generation module, an anti-radiation power supply chip and an up-conversion module, and is characterized in that the two waveform generation modules have the same structure and are used for generating broadband waveform signals; the up-conversion module performs up-conversion on broadband waveform signals output by the two waveform generation modules and outputs the broadband waveform signals, and the anti-radiation power supply chip performs mutual exclusion power supply on the two waveform generation modules. The waveform generation module comprises an anti-radiation FPGA chip, an anti-radiation high-speed DAC chip, an anti-radiation FLASH chip, an anti-radiation read-back refreshing chip, an anti-radiation differential transceiver chip and an anti-radiation level conversion chip, the anti-radiation read-back refreshing chip periodically reads a configuration program stored in the anti-radiation FLASH chip, the anti-radiation FPGA chip carries out configuration program refreshing, and the anti-radiation level conversion chip carries out level conversion. Therefore, the bit error upset in the anti-radiation FPGA chip can be corrected. According to the invention, the problems in the prior art can be solved, and the anti-radiation capability and reliability of the assembly are greatly improved.

Description

Technical Field

[0001] The invention belongs to the field of communications, and in particular relates to a high-reliability cold backup satellite-borne broadband waveform generating component. Background Art

[0002] Currently, broadband waveform generation components used in spaceborne technology are limited by single-particle upsets and other effects in the spaceborne environment. They generally use analog methods to generate broadband waveform signals, and their bandwidth generally does not exceed 500MHz. Once the existing spaceborne broadband waveform generation components are disturbed by single-particle upsets and other effects, they do not have the ability to correct errors and recover. More and more error-upset bits (bits) accumulate inside digital devices such as FPGAs, which will eventually lead to component functional failures. Summary of the invention

[0003] An object of the present invention is to provide a high-reliability cold backup satellite-borne broadband waveform generating component, which can solve the problems existing in the prior art and greatly improve the radiation resistance and reliability of the component.

[0004] In order to achieve the above object, one aspect of the present invention provides a high-reliability cold backup satellite-borne broadband waveform generation component, including a main waveform generation module, a backup waveform generation module, a radiation-resistant power supply chip and an up-conversion module.

[0005] The main waveform generating module and the standby waveform generating module have the same structure, and are used to generate and output broadband waveform signals. The broadband waveform output end of the main waveform generating module is connected to the first input end of the up-conversion module, and the broadband waveform output end of the standby waveform generating module is connected to the second input end of the up-conversion module. The third input end of the up-conversion module is connected to an external local oscillator. The up-conversion module is used to up-convert the broadband waveform signals output by the main waveform generating module and the standby waveform generating module and output them to the outside. The radiation-resistant power supply chip is used to power the up-conversion module, and to provide mutually exclusive power supply to the main waveform generating module and the standby waveform generating module.

[0006] The waveform generation module includes a radiation-resistant FPGA chip, a radiation-resistant high-speed DAC chip, a radiation-resistant FLASH chip, a radiation-resistant readback refresh chip, a radiation-resistant differential transceiver chip, and a radiation-resistant level conversion chip, wherein:

[0007] The radiation-resistant FPGA chip is used to generate a broadband waveform signal according to an external control signal and send it to the radiation-resistant high-speed DAC chip;

[0008] The radiation-resistant high-speed DAC chip is used to receive the broadband waveform signal sent by the radiation-resistant FPGA chip, perform digital-to-analog conversion on the broadband waveform signal and output it to the up-conversion module;

[0009] The radiation-resistant FLASH chip is used to store the configuration program of the radiation-resistant FPGA chip;

[0010] The radiation-resistant readback refresh chip is used to periodically read the configuration program stored in the radiation-resistant FLASH chip and write it into the radiation-resistant FPGA chip, thereby refreshing the configuration program of the radiation-resistant FPGA chip to correct the bit error flipping existing in the radiation-resistant FPGA chip;

[0011] The radiation-resistant differential transceiver chip is used to complete the transmission and reception of communication signals with the outside;

[0012] The radiation-resistant level conversion chip is used to complete the level conversion matching of the communication signal between the radiation-resistant differential transceiver chip and the radiation-resistant FPGA chip.

[0013] Preferably, the radiation-resistant FPGA chip includes a broadband signal real-time generating unit, a broadband signal storage unit and a digital up-conversion unit, wherein:

[0014] The broadband signal real-time generating unit is used to generate a broadband waveform baseband signal in real time according to an external control signal, the broadband signal storage unit is used to store the broadband waveform baseband signal generated in real time according to the external control signal, and the digital up-conversion unit is used to perform digital frequency modulation on the broadband waveform baseband signal generated and stored in real time.

[0015] Preferably, the radiation-resistant differential transceiver chip is used to perform differential single-ended conversion on external control signals and component monitoring signals, and connect the signals after differential single-ended conversion to the radiation-resistant level conversion chip;

[0016] The radiation-resistant level conversion chip is used to perform level conversion of external control signals and component monitoring signals, and connect the level-converted signals to the radiation-resistant FPGA chip.

[0017] Preferably, the radiation-resistant power supply chip provides mutual exclusive power supply to the main waveform generating module and the backup waveform generating module according to an external remote control signal. When the external remote control signal is at a high level, the main waveform generating module is powered; when the external remote control signal is at a low level, the backup waveform generating module is powered.

[0018] Preferably, the period is 5s, 3min, 10min or 30min.

[0019] A high-reliability cold-backup satellite-borne broadband waveform generating component according to the above aspects of the present invention can solve the problems existing in the prior art and greatly improve the radiation resistance and reliability of the component. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings used in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work:

[0021] Figure 1 It is a schematic structural diagram of a high-reliability cold backup satellite-borne broadband waveform assembly according to an embodiment of the present invention;

[0022] Figure 2 A schematic diagram of a cold standby switching process of a main standby waveform generating module according to an embodiment of the present invention;

[0023] Figure 3 The figure is a schematic diagram of a configuration program refresh process of a radiation-resistant FPGA chip according to an embodiment of the present invention. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] One embodiment of the present invention provides a high-reliability cold backup satellite-borne broadband waveform generation component, such as Figure 1 As shown, the high-reliability cold backup satellite-borne broadband waveform generating component of an embodiment of the present invention includes an up-conversion module, an anti-radiation power supply chip and two waveform generating modules with the same structure. The two waveform generating modules complete the generation and output of broadband waveform signals, one of which is described as a main waveform generating module and the other is described as a backup waveform generating module.

[0026] The up-conversion module is used to up-convert the broadband waveform signals output by the two waveform generation modules, and output the C-band broadband waveform signals from the output end to the outside. The radiation-resistant power supply chip is used to generate the various voltage sources required by the component, with an independent enable end, which is controlled by the outside to power the up-conversion module, the main waveform generation module and the standby waveform generation module. In a specific embodiment, after the component is powered on, the radiation-resistant power supply chip supplies power to the main waveform generation module and the standby waveform generation module mutually exclusively according to the external remote control signal, and only supplies power to one of the two waveform generation modules at the same time.

[0027] In a specific embodiment, the cold standby switching operation process of the active / standby waveform generating module is as follows: Figure 2As shown. After power-on, according to the state of the remote control signal, the anti-radiation power supply chip mutually exclusively completes the power-on of the main waveform generating module (host) or the standby waveform generating module (standby). When the remote control signal is at a high level, the main waveform generating module is powered on, and the working status of the main waveform generating module is continuously monitored. When all states are normal, the monitoring is maintained. When the monitored working status is abnormal, the abnormal status is reported to the external master control, and the external master control manages the remote control signal. When the remote control signal is at a low level, the standby waveform generating module is powered on, and the working status of the standby waveform generating module is continuously monitored. When all states are normal, the monitoring is maintained. When the monitored working status is abnormal, the abnormal status is reported to the external master control, and the external master control manages the remote control signal. The anti-radiation power supply chip again mutually exclusively powers on the main waveform generating module and the standby waveform generating module according to the state of the remote control signal.

[0028] The broadband waveform output end of the main waveform generation module is connected to the first input end of the up-conversion module. The broadband waveform output end of the backup waveform generation module is connected to the second input end of the up-conversion module. The third input end of the up-conversion module is connected to an external frequency conversion local oscillator. In a specific embodiment, the third input end of the up-conversion module is connected to the external local oscillator, and the broadband waveform signal that has completed the frequency conversion is transmitted and outputted to the outside from the output end.

[0029] The waveform generation module includes radiation-resistant FPGA chips, radiation-resistant high-speed DAC chips, radiation-resistant FLASH chips, radiation-resistant readback refresh chips, radiation-resistant differential transceiver chips, and radiation-resistant level conversion chips. The components of the waveform generation module are all selected with radiation-resistant models and specifications, and the components themselves have a certain ability to resist total dose effects and single-particle upsets.

[0030] Among them, the radiation-resistant FPGA chip, as the main working chip of the digital end function of the waveform generation module, completes the analysis of external control commands, monitoring of component status and feedback of monitoring signals, and generates broadband waveform signals and sends them to the radiation-resistant high-speed DAC chip.

[0031] The radiation-resistant high-speed DAC chip receives the broadband waveform digital signal sent by the radiation-resistant FPGA chip, completes digital-to-analog conversion, and outputs a broadband waveform analog signal. The radiation-resistant high-speed DAC chip can output the first Nyquist zone spectrum in the baseband mode and the second Nyquist zone spectrum in the MIX mode. Preferably, the radiation-resistant high-speed DAC chip is configured in the MIX mode.

[0032] In a specific embodiment, the radiation-resistant FPGA chip completes program operation by parsing external control signals, connects the data interface with the data interface of the radiation-resistant high-speed DAC chip, and completes the transmission of broadband waveform digital signals from the radiation-resistant FPGA chip to the radiation-resistant high-speed DAC chip.

[0033] In a specific embodiment, the radiation-resistant high-speed DAC chip completes the digital-to-analog conversion of the broadband waveform signal, and outputs the broadband waveform signal from the analog output interface to the input interface of the up-conversion module, wherein the analog output interface of the radiation-resistant high-speed DAC chip of the main waveform generation module is connected to the first input end of the up-conversion module, and the analog output interface of the radiation-resistant high-speed DAC chip of the backup waveform generation module is connected to the second input end of the up-conversion module.

[0034] In a specific embodiment, the radiation-resistant FPGA chip includes a broadband signal real-time generation unit, a broadband signal storage unit and a digital up-conversion unit. The broadband signal real-time generation unit can generate a broadband waveform baseband signal in real time according to an external control signal. The broadband signal storage unit can store the broadband waveform baseband signal generated in real time according to the external control signal. The digital up-conversion unit can perform digital frequency modulation on the broadband waveform baseband signal generated and stored in real time.

[0035] The radiation-resistant FLASH chip is used to store the configuration program of the radiation-resistant FPGA chip. The radiation-resistant readback refresh chip periodically (according to the refresh period T) reads the configuration program stored in the radiation-resistant FLASH chip and writes it into the radiation-resistant FPGA chip, thereby refreshing the configuration program of the radiation-resistant FPGA chip to correct the bit error flip that may exist in the radiation-resistant FPGA chip. The refresh period T is optional and can be 5s, 3min, 10min or 30min. Preferably, the refresh period T is selected to be 5s.

[0036] In a specific embodiment, the configuration program refresh process of the radiation-resistant readback refresh chip to the radiation-resistant FPGA chip is as follows: Figure 3 As shown. After power-on, the radiation-resistant readback refresh chip is reset, and then operates according to the chip configuration register function. The radiation-resistant readback refresh chip loads the configuration program for the radiation-resistant FPGA chip, completes the functional configuration of the radiation-resistant FPGA chip, and then checks the configuration result. If the loading is unsuccessful, return to the reset process and operate according to the process again. If the loading is successful, enter the wait for refresh cycle T. If the refresh cycle T timing is not completed, continue to wait. After the refresh cycle T timing is completed, perform the refresh operation. The radiation-resistant readback refresh chip refreshes the configuration program of the radiation-resistant FPGA chip. After the refresh is completed, enter the wait for refresh cycle T again.

[0037] In a specific embodiment, the data interface of the radiation-resistant readback refresh chip is connected to the data interface of the radiation-resistant FLASH chip, the configuration interface of the radiation-resistant readback refresh chip is connected to the configuration interface of the radiation-resistant FPGA chip, and the radiation-resistant readback refresh chip reads the configuration program required for the radiation-resistant FPGA chip from the radiation-resistant FLASH chip and completes the configuration.

[0038] The radiation-resistant differential transceiver chip is used to complete the transmission and reception of communication signals with other external functional modules. In a specific embodiment, the radiation-resistant differential transceiver chip completes the differential single-ended conversion of external control signals and monitoring signals, and connects the converted signals to the radiation-resistant level conversion chip.

[0039] The radiation-resistant level conversion chip is used to complete the level conversion matching of the communication signal between the radiation-resistant differential transceiver chip and the radiation-resistant FPGA chip. In a specific embodiment, the radiation-resistant level conversion chip connects the external control signal and the monitoring signal that complete the level conversion to the data interface of the radiation-resistant FPGA chip.

[0040] The high reliability of the high reliability cold backup satellite-borne broadband waveform generation component according to the embodiment of the present invention is ensured by three aspects: first, the selected components have anti-radiation design, second, the readback refresh design, and third, the dual-system cold backup design. These three points greatly improve the system's anti-radiation capability and system reliability. The output signal bandwidth of the high reliability cold backup satellite-borne broadband waveform generation component of the embodiment of the present invention is not less than 840MHz, the C-band waveform in-band flatness is less than 0.5dB, the in-band phase linearity is less than ±5°, the in-band spurious is not less than 40dBc, and the out-of-band spurious is not less than 50dBc.

[0041] The above description is only by way of illustration of certain exemplary embodiments of the present invention. It is undoubted that those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A high-reliability cold backup satellite-borne broadband waveform generation component, characterized in that: It includes main waveform generation module, backup waveform generation module, radiation-resistant power supply chip and up-conversion module. The main waveform generating module and the standby waveform generating module have the same structure, and are used to generate and output broadband waveform signals. The broadband waveform output end of the main waveform generating module is connected to the first input end of the up-conversion module, and the broadband waveform output end of the standby waveform generating module is connected to the second input end of the up-conversion module. The third input end of the up-conversion module is connected to an external local oscillator. The up-conversion module is used to up-convert the broadband waveform signals output by the main waveform generating module and the standby waveform generating module and output them to the outside. The radiation-resistant power supply chip is used to power the up-conversion module, and to provide mutually exclusive power supply to the main waveform generating module and the standby waveform generating module. The waveform generation module includes a radiation-resistant FPGA chip, a radiation-resistant high-speed DAC chip, a radiation-resistant FLASH chip, a radiation-resistant readback refresh chip, a radiation-resistant differential transceiver chip, and a radiation-resistant level conversion chip, wherein: The radiation-resistant FPGA chip is used to generate a broadband waveform signal according to an external control signal and send it to the radiation-resistant high-speed DAC chip; The radiation-resistant high-speed DAC chip is used to receive the broadband waveform signal sent by the radiation-resistant FPGA chip, perform digital-to-analog conversion on the broadband waveform signal and output it to the up-conversion module; The radiation-resistant FLASH chip is used to store the configuration program of the radiation-resistant FPGA chip; The radiation-resistant readback refresh chip is used to periodically read the configuration program stored in the radiation-resistant FLASH chip and write it into the radiation-resistant FPGA chip, thereby refreshing the configuration program of the radiation-resistant FPGA chip to correct the bit error flipping existing in the radiation-resistant FPGA chip; The radiation-resistant differential transceiver chip is used to complete the transmission and reception of communication signals with the outside; The radiation-resistant level conversion chip is used to complete the level conversion matching of the communication signal between the radiation-resistant differential transceiver chip and the radiation-resistant FPGA chip.

2. The high-reliability cold backup satellite-borne broadband waveform generation component according to claim 1, characterized in that: The radiation-resistant FPGA chip includes a broadband signal real-time generation unit, a broadband signal storage unit and a digital up-conversion unit, wherein: The broadband signal real-time generating unit is used to generate a broadband waveform baseband signal in real time according to an external control signal, the broadband signal storage unit is used to store the broadband waveform baseband signal generated in real time according to the external control signal, and the digital up-conversion unit is used to perform digital frequency modulation on the broadband waveform baseband signal generated and stored in real time.

3. The high-reliability cold backup satellite-borne broadband waveform generating component according to claim 1 or 2, characterized in that: The radiation-resistant differential transceiver chip is used to perform differential single-ended conversion on external control signals and component monitoring signals, and connect the signals after differential single-ended conversion to the radiation-resistant level conversion chip; The radiation-resistant level conversion chip is used to perform level conversion of external control signals and component monitoring signals, and connect the level-converted signals to the radiation-resistant FPGA chip.

4. The high-reliability cold backup satellite-borne broadband waveform generating component according to claim 1 or 2, characterized in that: The radiation-resistant power supply chip supplies power to the main waveform generating module and the backup waveform generating module mutually exclusively according to an external remote control signal. When the external remote control signal is at a high level, the main waveform generating module is powered; and when the external remote control signal is at a low level, the backup waveform generating module is powered.

5. The high-reliability cold backup satellite-borne broadband waveform generating component according to claim 1 or 2, characterized in that: The period is 5s, 3min, 10min or 30min.

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