Manufacturing method of HDI board and HDI board

Abstract

The invention provides a method for manufacturing an HDI (High Density Interconnection) board, which comprises the following steps of: manufacturing an original sub-board of which the upper surface and the lower surface are copper foil layers, and carrying out multiple times of layer-adding lamination on the original sub-board to obtain the HDI board; respectively manufacturing reference layers on the copper foil layers on the upper surface and the lower surface of the daughter board before each time of layer-adding lamination; each time of layer-adding lamination comprises the following steps: laminating prepregs and copper foil layers on the outer sides of the upper and lower surfaces of the daughter board; manufacturing a circuit layer on the copper foil layer; laminating a prepreg and a copper foil layer on the outer side of the circuit layer; wherein the manufacturing of the circuit layer comprises the following steps of: manufacturing an impedance measuring laser hole which is deep into the reference layer on an impedance Coupon grounding PAD of the copper foil layer; and copper is plated in the hole in an electroplating mode, so that the copper foil layer and the reference layer form a channel. According to the method, the laser holes are additionally formed in the impedance coupon grounding PAD of each circuit layer, so that the impedance of the current circuit layer is tested when the circuit is etched, the abnormal impedance is adjusted in time, and the quality of the circuit impedance of the HDI board is ensured.

Description

Technical Field

[0001] The invention relates to a method for manufacturing an HDI board and the HDI board, belonging to the technical field of circuit board manufacturing. Background Art

[0002] With the development of science and technology, the communication industry has higher and higher requirements on the performance and size of electronic products, and the design of PCB is developing towards a more integrated direction. The number of layers and laser orders of HDI boards are getting higher and higher, and the impedance and signal requirements for the sub-outer layer lines are also more stringent.

[0003] Traditional HDI printed circuit boards lack a way to monitor the impedance of the sub-outer layer. At the same time, there are more factors affecting the impedance of the sub-outer layer. The impedance can only be measured after the outer layer is connected to the PAD of the sub-outer layer by drilling a through hole. This method of measuring impedance has a strong hysteresis. Even if the abnormal impedance of the sub-outer layer is intercepted, the opportunity for adjustment has been lost, and the PCB board can only be scrapped, which has a great impact on the overall impedance yield. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a method for manufacturing an HDI board. By adding a laser hole on the impedance coupon grounding PAD of each circuit layer, the impedance anomaly can be tested in time when etching the circuit, and the impedance can be adjusted by adjusting the etching line width, thereby ensuring the quality of the HDI board circuit impedance.

[0005] To achieve the above object, the present invention is implemented by adopting the following technical solutions:

[0006] In a first aspect, the present invention provides a method for manufacturing an HDI board, comprising:

[0007] Making an original daughter board, wherein the upper surface and the lower surface of the original daughter board are both copper foil layers;

[0008] The original daughter board is passed through The second layer is laminated to obtain the HDI board;

[0009] in, is the default value; The second layer addition and lamination is completed Layer lines and Layer circuit production, obtain Sub-board; ;

[0010] The said Before the second layer lamination, including:

[0011] The first circuit manufacturing step is performed on the copper foil layer on the upper surface and the lower surface of the current sub-board respectively; Layer lines and The corresponding layer line Layer reference layer and Layer Reference Layer;

[0012] The said Secondary build-up lamination, including:

[0013] In the said Layer reference layer and A prepreg layer and a copper foil layer are sequentially pressed on the outer side of each reference layer;

[0014] A second circuit manufacturing step is performed on the copper foil layer to form a Layer 1 Line Layer and Layer circuit layer;

[0015] In the said Layer 1 Line Layer and A prepreg layer and a copper foil layer are sequentially pressed on the outer sides of each circuit layer;

[0016] Wherein, the copper foil layer includes: a grounding PAD containing an impedance coupon;

[0017] The second circuit making step comprises:

[0018] Making an impedance measuring laser hole on the impedance coupon grounding PAD of the copper foil layer; the impedance measuring laser hole depth and the corresponding reference layer;

[0019] Copper is plated in the impedance measuring laser hole by electroplating, so that a passage is formed between the copper foil layer and the corresponding reference layer.

[0020] Furthermore, the first circuit making step and the second circuit making step include:

[0021] Making laser holes on the copper foil layers on the upper and lower surfaces of the current daughter board;

[0022] Chemical copper deposition is performed on the current sub-board on which the laser holes have been made;

[0023] Plating copper in the laser hole by electroplating;

[0024] Etch lines on the upper and lower surfaces of the current daughter board after electroplating.

[0025] Furthermore, the second circuit making step further includes:

[0026] When etching the circuit, the impedance of the single line and parallel lines of the current circuit layer is measured and monitored, and in response to the measured impedance not meeting the preset requirements, timely adjustment is made by changing the etching line width;

[0027] After etching the circuit, the impedance of the impedance coupon position in the current circuit layer is measured and monitored to achieve impedance anomaly interception.

[0028] Furthermore, the device for measuring impedance is a flat-head probe.

[0029] Furthermore, the cross-section of the impedance measuring laser hole is trapezoidal.

[0030] Furthermore, the electroplating method is hole-filling electroplating.

[0031] Furthermore, an image transfer method is used to etch the circuit.

[0032] Furthermore, the original daughter board is a core board or a multi-layer board.

[0033] Furthermore, the HDI board manufacturing method further comprises: The daughter board obtained after the secondary build-up layer lamination is drilled with through holes and through-hole metallization is performed.

[0034] In a second aspect, the present invention provides an HDI board, which is manufactured according to the HDI board manufacturing method described in the first aspect.

[0035] Compared with the prior art, the present invention has the following beneficial effects:

[0036] The HDI board manufacturing method provided by the present invention realizes the impedance measurement of the current etching circuit by adding a laser hole on the impedance coupon grounding PAD of each circuit layer. If the measured impedance is abnormal, adjustment measures can be taken in time to ensure the quality of the impedance of the mass-produced HDI board circuit, and avoid the irreparable scrapping of the HDI board after the outer layer is operated. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 This is a schematic diagram of an original daughter board in Embodiment 1 of the present invention;

[0038] Figure 2 This is a schematic diagram of the impedance measurement laser hole in Example 1 of the present invention;

[0039] Figure 3 This is a schematic diagram of an original sub-board after electroplating in Example 1 of the present invention;

[0040] Figure 4 This is a schematic diagram of an original sub-board after the etching circuit is completed in Example 1 of the present invention;

[0041] Figure 5 Schematic diagram of the structure of the first-level sub-board obtained after the first layer build-up and lamination in Example 1 of the present invention;

[0042] Among them, 1 is a prepreg, 2 is a copper foil layer, 3 is an impedance measurement laser hole, 4 is an electroplated copper, and 5 is a circuit layer. DETAILED DESCRIPTION

[0043] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices. The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0044] Example 1

[0045] According to a first aspect of the present invention, the present invention provides a method for manufacturing an HDI board, comprising the following steps:

[0046] Step 1: Make an original daughter board with copper foil layers on the upper and lower surfaces.

[0047] Specifically, a core board or a multilayer board is used to make the original daughter board.

[0048] like Figure 1 As shown, in this embodiment, the original daughter board adopts a core board including two copper foil layers and one prepreg layer.

[0049] Step 2: Make reference circuits for the first layer reference circuit and the second layer circuit on the upper and lower surfaces of the original daughter board respectively to form the first layer reference layer and the second layer reference layer.

[0050] Specifically, laser holes are first made on the copper foil layers on the upper and lower surfaces of the current sub-board; then, chemical copper deposition is performed on the current sub-board with the laser holes made thereon; then, copper is plated in the laser holes by electroplating; finally, a first-layer reference circuit is etched on the upper surface of the sub-board that has been electroplated, and a second-layer reference circuit is etched on the lower surface of the sub-board that has been electroplated.

[0051] Step 3: A prepreg layer and a copper foil layer are laminated on the outside of the first reference layer and the second reference layer in sequence.

[0052] Specifically, a prepreg layer and a copper foil layer are added to the upper and lower surfaces of the original daughter board in sequence, and the upper and lower surfaces are pressed together at the same time to form a Figure 2 The daughterboard shown contains 4 layers of copper foil and 3 layers of prepreg.

[0053] Step 4: Make the first layer circuit and the second layer circuit on the copper foil layer on the upper and lower surfaces of the current daughter board to form the first layer circuit layer and the second layer circuit layer;

[0054] Specifically, laser holes are first made on the copper foil layers on the upper and lower surfaces of the current sub-board; Figure 2 As shown, the impedance measurement laser hole is made on the impedance coupon grounding PAD of the copper foil layer. Then, the current sub-board with the laser hole is subjected to chemical copper deposition; then, copper is plated in all the laser holes by electroplating; as shown in FIG. Figure 3 As shown, the copper foil layer that has been electroplated forms a path with the corresponding reference layer. Finally, the first layer of circuits is etched on the upper surface of the sub-board that has been electroplated, and the second layer of circuits is etched on the lower surface of the sub-board that has been electroplated, to obtain the following Figure 4 The daughterboard shown contains 2 layers of circuits.

[0055] It should be noted that when etching the circuit, the impedance of the single line and parallel lines of the current circuit layer is measured and monitored. In response to the measured impedance not meeting the preset requirements, timely adjustments need to be made by changing the etching line width.

[0056] After etching the circuit, the impedance of the impedance coupon position in the first and second circuit layers is measured and monitored to intercept impedance anomalies.

[0057] Step 5: A layer of prepreg and a layer of copper foil are laminated on the outside of the first layer circuit and the second layer circuit in sequence.

[0058] Specifically, Figure 5 As shown, a prepreg layer and a copper foil layer are added successively on the upper and lower surfaces of the sub-board containing two layers of circuits, and the upper and lower surfaces are pressed together at the same time to achieve insulation protection for the circuit layer.

[0059] Step 6: Drill through holes and perform through-hole metallization on the daughter board obtained after one layer build-up lamination to obtain an HDI board containing two circuit layers.

[0060] It should be noted that the number of times the build-up lamination is performed is related to the number of circuit layers of the obtained HDI board. The original daughter board obtains a level 1 daughter board containing the first circuit layer and the second circuit layer through the first build-up lamination. The level 1 daughter board is an HDI board containing two circuit layers. If an HDI board with more circuit layers is required, the build-up lamination is repeated on the level 1 daughter board.

[0061] Example 2

[0062] This embodiment provides a method for making a The method of HDI board with multiple circuit layers.

[0063] The method for manufacturing the HDI board provided in this embodiment includes:

[0064] S1: Make an original daughter board with copper foil layers on the upper and lower surfaces.

[0065] Specifically, the original daughter board needs to meet the requirement of spacing between the copper foil layer and the insulating layer, and both the upper surface and the lower surface of the original daughter board are copper foil layers.

[0066] S2: The original sub-board is preset The HDI board is obtained by laminating the layers. The second layer addition and lamination is completed Layer lines and Layer circuit production, obtain Sub-board.

[0067] Specifically, the number of times the HDI board is laminated can be determined according to design requirements. In this embodiment, the HDI board adopts a design of a circuit layer and a reference layer interlayer layout.

[0068] S20: No. Before the second build-up layer is pressed, the first circuit manufacturing step is performed on the copper foil layer on the upper surface and the lower surface of the current sub-board respectively; Layer lines and The corresponding layer line Layer reference layer and Layer Reference Layer.

[0069] Specifically, the first circuit production step includes: making laser holes on the copper foil layer used as a reference layer on the upper and lower surfaces of the current sub-board; chemically plating copper on the current sub-board with the laser holes; using hole-filling electroplating to plate copper in the laser holes; and performing image transfer and etching circuit patterns on the upper and lower surfaces of the current sub-board that has completed electroplating.

[0070] S21: In the Layer reference layer and A layer of prepreg and a layer of copper foil are laminated on the outer sides of each reference layer.

[0071] S22: Perform a second circuit manufacturing step on the copper foil layer to form a second circuit Layer 1 Line Layer and Layer line layer.

[0072] Specifically, the second line production steps include:

[0073] S221: Making laser holes on the copper foil layers as circuit layers on the upper and lower surfaces of the current sub-board, the laser hole making of the circuit layer includes making impedance measuring laser holes on the impedance coupon grounding PAD of the copper foil layer. The impedance measuring laser hole depth and the corresponding reference layer.

[0074] Preferably, the cross-section of the impedance measuring laser hole is trapezoidal.

[0075] S222: chemical copper deposition is performed on the current sub-board on which the laser holes have been made.

[0076] S223: copper is plated in all laser holes by electroplating; the impedance measuring laser holes that are electroplated are used to form a path between the circuit layer and the corresponding reference layer.

[0077] Preferably, the electroplating method is hole filling electroplating.

[0078] S224: Etching circuits on the upper and lower surfaces of the current sub-board that has completed electroplating.

[0079] Preferably, an image transfer method is used to etch the circuit.

[0080] It should be noted that when etching the circuit, an impedance meter is used to measure and monitor the impedance of the single line and parallel lines of the current circuit layer. In response to the measured impedance not meeting the preset requirements, timely adjustments are made by changing the etching line width. After etching the circuit, the impedance meter is used to measure and monitor the impedance of the impedance coupon position in the current circuit layer to achieve impedance anomaly interception.

[0081] Preferably, the device for measuring impedance uses a flat-head probe.

[0082] S23: In the Layer 1 Line Layer and A layer of prepreg and a layer of copper foil are laminated on the outside of each circuit layer in sequence.

[0083] S3: The daughter board obtained after the secondary build-up layer lamination is drilled with through holes and through-hole metallization is performed.

[0084] Example 3

[0085] According to a second aspect of the present invention, there is further provided an HDI board, wherein the HDI board is manufactured according to the HDI board manufacturing method described in Implementation 2.

[0086] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for manufacturing an HDI board, characterized in that: include: Making an original daughter board, wherein the upper surface and the lower surface of the original daughter board are both copper foil layers; The original daughter board is passed through The second layer is laminated to obtain the HDI board; in, is the default value; The second layer addition and lamination is completed Layer lines and Layer circuit production, obtain Sub-board; ; The said Before the second layer lamination, including: The first circuit manufacturing step is performed on the copper foil layer on the upper surface and the lower surface of the current sub-board respectively; Layer lines and The corresponding layer line Layer reference layer and Layer Reference Layer; The said Secondary build-up lamination, including: In the said Layer reference layer and A prepreg layer and a copper foil layer are sequentially pressed on the outer side of each reference layer; Perform a second circuit manufacturing step on the copper foil layer to form a Layer 1 Line Layer and Layer circuit layer; In the said Layer 1 Line Layer and A prepreg layer and a copper foil layer are laminated on the outside of each circuit layer in sequence; Wherein, the copper foil layer includes: a grounding PAD containing an impedance coupon; The second circuit making step comprises: Making an impedance measuring laser hole on the impedance coupon grounding PAD of the copper foil layer; the impedance measuring laser hole depth and the corresponding reference layer; Copper is plated in the impedance measuring laser hole by electroplating, so that a passage is formed between the copper foil layer and the corresponding reference layer.

2. The method according to claim 1, characterized in that: The first circuit making step and the second circuit making step include: Making laser holes on the copper foil layers on the upper and lower surfaces of the current daughter board; Chemical copper deposition is performed on the current sub-board on which the laser holes have been made; Plating copper in the laser hole by electroplating; Etching lines is performed on the upper and lower surfaces of the current daughter board after electroplating.

3. The method according to claim 2, characterized in that: The second circuit making step further includes: When etching the circuit, the impedance of the single line and parallel lines of the current circuit layer is measured and monitored, and in response to the measured impedance not meeting the preset requirements, timely adjustment is made by changing the etching line width; After etching the circuit, the impedance of the impedance coupon position in the current circuit layer is measured and monitored to achieve impedance anomaly interception.

4. The method according to claim 2, characterized in that: The device for measuring impedance is a flat-tip probe.

5. The method according to claim 1, characterized in that The cross section of the impedance measuring laser hole is trapezoidal.

6. The method according to claim 1, characterized in that The electroplating method is hole filling electroplating.

7. The method according to claim 1, characterized in that The circuits are etched using an image transfer method.

8. The method according to claim 1, characterized in that The original daughter board is a core board or a multilayer board.

9. The method according to claim 1, characterized in that: The HDI board manufacturing method further comprises: The daughter board obtained after the secondary build-up layer lamination is drilled with through holes and through-hole metallization is performed.

10. An HDI board, characterized in that: The HDI board is manufactured according to the HDI board manufacturing method according to any one of claims 1 to 7.

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