Pixel circuit, pixel circuit driving method, display panel and display device

Abstract

The invention relates to the technical field of display, in particular to a pixel circuit, a pixel circuit driving method, a display panel and a display device, and aims to solve the problems that pixel circuits need to be arranged for display areas of left and right eyes in the prior art to achieve three-dimensional display, the occupied space is large, layout difficulty is prone to occurring, and the resolution ratio is low. In order to achieve the purpose, the pixel circuit can provide driving current for a first light-emitting control sub-circuit and a second light-emitting control sub-circuit through a common sub-circuit; the first light-emitting control sub-circuit responds to the first light-emitting control signal to be switched on and provides the driving current for the first light-emitting device; the first light-emitting control sub-circuit is used for responding to the first light-emitting control signal, the second light-emitting control sub-circuit is used for responding to the second light-emitting control signal, the driving current is provided for the second light-emitting device, the first light-emitting device and the second light-emitting device correspond to different pixels, different pixels can be driven based on the shared sub-circuit, space is saved, layout is simplified, and the resolution ratio is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and specifically provides a pixel circuit, a pixel circuit driving method, a display panel and a display device. Background Art

[0002] With the development of display technology, naked-eye 3D display has become a focus of attention. When realizing naked-eye 3D display, it is usually necessary to control the display panel to provide display images for the left and right eyes of the user respectively. Accordingly, the display panel needs to include left-eye pixels for providing display images to the left eye and right-eye pixels for providing display images to the right eye, and is provided with pixel circuits for driving left-eye pixels and pixel circuits for driving right-eye pixels.

[0003] However, separately providing pixel circuits for left-eye pixels and right-eye pixels takes up a large space, and is prone to layout difficulties and low resolution, thereby affecting the three-dimensional display effect. Summary of the invention

[0004] The present application aims to solve the above technical problem, that is, to solve the problem that the existing three-dimensional display requires setting pixel circuits for the display areas of the left and right eyes respectively, which occupies a large space and is prone to layout difficulties and low resolution.

[0005] In a first aspect, the present application provides a pixel circuit, comprising a common subcircuit, a first light-emitting control subcircuit, a second light-emitting control subcircuit, a first light-emitting device, and a second light-emitting device, wherein a first end of the first light-emitting control subcircuit and a first end of the second light-emitting control subcircuit are both connected to the common subcircuit through a common connection end;

[0006] The shared subcircuit is used to provide a driving current to the first light-emitting control subcircuit and the second light-emitting control subcircuit through the common connection terminal;

[0007] The second end of the first light emitting control subcircuit is used to be connected to the first light emitting device, and is used to be turned on in response to the first light emitting control signal to provide the driving current to the first light emitting device;

[0008] The second end of the second light emitting control subcircuit is used to be connected to the second light emitting device, and is used to be turned on in response to the second light emitting control signal to provide the driving current to the second light emitting device;

[0009] The first light emitting device and the second light emitting device correspond to different pixels.

[0010] In some embodiments, the effective potentials of the first light emitting control signal and the second light emitting control signal do not overlap in time, and the first light emitting control subcircuit and the second light emitting control subcircuit are used to alternately conduct in response to the effective potentials of their respective light emitting control signals.

[0011] In some embodiments, the first light emitting control subcircuit includes a first transistor, a first end of the first transistor is connected to the common connection end, a second end of the first transistor is connected to the first light emitting device, and a control end of the first transistor is used to receive the first light emitting control signal.

[0012] In some embodiments, the second light emitting control subcircuit includes a second transistor, a first end of the second transistor is connected to the common connection end, a second end of the second transistor is connected to the second light emitting device, and a control end of the second transistor is used to receive the second light emitting control signal.

[0013] In some embodiments, the shared subcircuit includes a reset unit, an energy storage unit, a data writing unit, a driving unit, a compensation unit, and a light emitting control unit;

[0014] The first end of the reset unit is used to receive an initial signal, and the second end of the reset unit is connected to the first node, and is used to transmit the initial signal to the first node during the reset phase of each pixel driving cycle;

[0015] The first end of the energy storage unit is used to receive a first power signal, and the second end of the energy storage unit is connected to the first node;

[0016] The first end of the compensation unit is connected to the common connection end, and the second end of the compensation unit is connected to the first node;

[0017] The first end of the data writing unit is used to receive a data signal, and the second end of the data writing unit is connected to the second node, and is used to provide the data signal and the threshold voltage to the first node through the compensation unit during the writing phase of each pixel driving cycle;

[0018] The first end of the driving unit is connected to the second node, the second end of the driving unit is connected to the common connection end, and the control end of the driving unit is connected to the first node;

[0019] The first end of the light-emitting control unit is used to receive the first power supply signal, and the second end of the light-emitting control unit is connected to the second node, and is used to be turned on during the light-emitting phase of each pixel driving cycle to provide the first power supply signal to the second node; the driving unit is used to provide a driving current to the common connection end based on the signals provided by the first node and the second node.

[0020] In some embodiments,

[0021] The reset unit comprises a third transistor, a first end of the third transistor is used to receive the initial signal, a second end of the third transistor is connected to the first node, and a control end of the third transistor is used to receive a first gate drive signal;

[0022] The energy storage unit comprises a storage capacitor, a first end of the storage capacitor is used to receive the first power signal, and a second end of the storage capacitor is connected to the first node;

[0023] The compensation unit comprises a fourth transistor, a first terminal of the fourth transistor is connected to the common connection terminal, and a second terminal of the fourth transistor is connected to the first node;

[0024] The data writing unit comprises a fifth transistor, a first end of the fifth transistor is used to receive the data signal, a second end of the fifth transistor is connected to the second node, and control ends of the fifth transistor and the fourth transistor are both used to receive a second gate driving signal;

[0025] The driving unit comprises a sixth transistor, a first terminal of the sixth transistor is connected to the second node, a second terminal of the sixth transistor is connected to the common connection terminal, and a control terminal of the driving unit is connected to the first node;

[0026] The light emitting control unit comprises a seventh transistor, a first end of the seventh transistor is used to receive the first power supply signal, a second end of the seventh transistor is connected to the second node, and a control end of the seventh transistor is used to receive the third light emitting control signal.

[0027] In some embodiments, the pixel circuit further comprises:

[0028] The first reset subcircuit is used to reset the second end of the first light emitting control subcircuit during the reset phase of the pixel driving cycle.

[0029] In some embodiments, the first reset subcircuit includes an eighth transistor, a first end of the eighth transistor is used to receive an initial signal, a second end of the eighth transistor is connected to a second end of the first light emitting control subcircuit, and a control end of the eighth transistor is used to receive a first gate drive signal.

[0030] In some embodiments, the pixel circuit further comprises:

[0031] The second reset subcircuit is used to reset the second end of the second light emitting control subcircuit during the reset phase of the pixel driving cycle.

[0032] In some embodiments, the second reset subcircuit includes a ninth transistor, a first end of the ninth transistor is used to receive an initial signal, a second end of the ninth transistor is connected to a second end of the second light emitting control subcircuit, and a control end of the ninth transistor is used to receive a first gate drive signal.

[0033] In a second aspect, the present application provides a display panel comprising a plurality of gate lines, a plurality of data lines and a plurality of pixel unit groups arranged in an array, wherein the plurality of pixel unit groups located in the same row direction are connected to the same gate line, and the plurality of pixel unit groups located in the same column direction are connected to the same data line, wherein each pixel unit group comprises a left-eye pixel and a right-eye pixel, and the left-eye pixel and the right-eye pixel in the same pixel unit group are driven by the pixel circuit described in any one of the above items.

[0034] In some embodiments, the left-eye pixels and the right-eye pixels in each of the pixel unit groups are arranged alternately in the column direction; or, the left-eye pixels and the right-eye pixels in each of the pixel unit groups are arranged alternately in the row direction.

[0035] In some embodiments, the plurality of gate lines include a first gate drive signal line and a second gate drive signal line;

[0036] The display panel further includes an initial signal line, a first light emitting control signal line, a second light emitting control signal line and a third light emitting control signal line;

[0037] Wherein, the initial signal line, the first gate drive signal line, the second gate drive signal line, the third light emitting control signal line, the first light emitting control signal line and the second light emitting control signal line are sequentially arranged in parallel in a column direction;

[0038] The common subcircuit of the pixel circuit is arranged in an area between the initial signal line and the first light-emitting control signal line and between two adjacent data lines, and partially overlaps with the corresponding connected data line; the first light-emitting control subcircuit and the second light-emitting control subcircuit of the pixel circuit are arranged between the two adjacent data lines and are arranged alternately in the row direction, the first light-emitting control subcircuit partially overlaps with the first light-emitting control signal line, and the second light-emitting control subcircuit partially overlaps with the second light-emitting control signal line;

[0039] A common connection terminal is arranged between the third light-emitting control signal line and the first light-emitting control signal line, the first light-emitting control sub-circuit and the second light-emitting control sub-circuit are connected to the common connection terminal, and are connected to the common sub-circuit through a connecting wire whose one end is connected to the common connection terminal and extends parallel to the column direction.

[0040] In a third aspect, the present application provides a display device, comprising any one of the display panels described above.

[0041] In some embodiments, the display device further includes a prism array, and the prism array is located on the light emitting side of the display panel.

[0042] In some embodiments, the prism array is a liquid crystal prism array, and the display device further includes a liquid crystal driving circuit, which is used to provide voltage to the liquid crystal prism array to achieve switching between two-dimensional display and three-dimensional display.

[0043] In a fourth aspect, the present application provides a pixel circuit driving method, which includes:

[0044] In the light emitting phase of the pixel driving cycle, the common subcircuit provides a driving current to the first light emitting control subcircuit and the second light emitting control subcircuit through the common connection terminal;

[0045] The first light emitting control subcircuit is turned on or off in response to a first light emitting control signal, and when the first light emitting control subcircuit is turned on, the driving current is provided to the first light emitting device;

[0046] The second light emitting control subcircuit is turned on or off in response to a second light emitting control signal, and when the first light emitting control subcircuit is turned on, the driving current is provided to the second light emitting device;

[0047] The first light emitting device and the second light emitting device correspond to different pixels.

[0048] In some embodiments, the effective operating potentials of the first light emitting control signal and the second light emitting control signal do not overlap in time, and the first light emitting control subcircuit and the second light emitting control subcircuit are alternately turned on in response to the effective potentials of their respective light emitting control signals.

[0049] In the case of adopting the above technical solution, the present application can provide a pixel circuit, which includes a common subcircuit, a first light-emitting control subcircuit, a second light-emitting control subcircuit, a first light-emitting device and a second light-emitting device, wherein the first end of the first light-emitting control subcircuit and the first end of the second light-emitting control subcircuit are both connected to the common subcircuit through a common connection end; the common subcircuit is used to provide a driving current to the first light-emitting control subcircuit and the second light-emitting control subcircuit through the common connection end; the second end of the first light-emitting control subcircuit is used to connect to the first light-emitting device, and is used to respond to the first light-emitting control signal to turn on and provide the driving current to the first light-emitting device; the second end of the second light-emitting control subcircuit is used to connect to the second light-emitting device, and is used to respond to the second light-emitting control signal to turn on and provide the driving current to the second light-emitting device; wherein the first light-emitting device and the second light-emitting device correspond to different pixels. This solution can drive different pixels based on the common subcircuit, which is conducive to saving space, simplifying layout, and improving resolution. When applied to a three-dimensional display mode, it can effectively improve the three-dimensional display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The preferred embodiments of the present application are described below in conjunction with the accompanying drawings, in which:

[0051] Figure 1 It is a schematic diagram of the structure of a display panel of the related technology provided by this application;

[0052] Figure 2 is a schematic diagram of a pixel circuit structure provided by an embodiment of the present application;

[0053] Figure 3 is a schematic diagram of a pixel circuit structure provided by another embodiment of the present application;

[0054] Figure 4 is a schematic diagram of a pixel circuit structure provided by another embodiment of the present application;

[0055] Figure 5 is a schematic diagram of a pixel circuit provided by an embodiment of the present application;

[0056] Figure 6 is a schematic flow chart of a pixel circuit driving method provided in an embodiment of the present application;

[0057] Figure 7 is a timing diagram of various signals in the pixel circuit driving process provided by an embodiment of the present application;

[0058] Figure 8 is a schematic diagram of a display panel provided in an embodiment of the present application;

[0059] Fig. 9 is a schematic diagram of a display panel provided by another embodiment of the present application;

[0060] Fig.10 is a schematic diagram of a partial layout structure of a display panel provided in an embodiment of the present application;

[0061] Fig.11 is a schematic cross-sectional structure diagram of a display device provided in an embodiment of the present application;

[0062] Fig.12 It is a schematic cross-sectional structure diagram of a display device provided in another embodiment of the present application. DETAILED DESCRIPTION

[0063] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0064] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. "First", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprising" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0065] Based on the description of the background technology section, it can be seen that in the related art, when realizing naked eye three-dimensional display, it is usually necessary to control the display panel to provide display images for the left and right eyes of the user respectively. Figure 1 As shown, Figure 1It is a schematic diagram of the structure of a display panel of the related art provided by the present application. The display panel needs to include a left-eye pixel L for providing a display screen to the left eye and a right-eye pixel R for providing a display screen to the right eye, and is provided with a pixel circuit for driving the left-eye pixel L and a pixel circuit for driving the right-eye pixel R. A plurality of left-eye pixels L and a plurality of right-eye pixels R are arranged alternately in the column direction, each pixel is connected to a pixel circuit (a white rectangle shown in the figure), the pixel circuits in the same row are connected to the same gate line G_M (M is an integer greater than or equal to 1), and the gate drive circuit GOA (Gate On Array, GOA) arranged on both sides of the corresponding row provides a gate drive signal to the pixel circuit through the gate line G_M; the pixel circuits in the same column are connected to the same data line D_N (N is an integer greater than or equal to 1), and the data line D_N provides a data signal to the pixel circuit of the corresponding column. The pixel circuits for the left-eye pixels L and the right-eye pixels R are respectively set to occupy a large space, which is prone to layout difficulties and low resolution problems, thereby affecting the three-dimensional display effect.

[0066] In view of this, the present application provides a pixel circuit that can drive different pixels based on a common sub-circuit, which is conducive to saving space, simplifying layout, and improving resolution. When applied to a three-dimensional display mode, it can effectively improve the three-dimensional display effect.

[0067] It should be noted that the transistors used in the embodiments of the present application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used are symmetrical, there is no difference between the source and drain. In the embodiments of the present application, in order to distinguish the source and drain of the transistor, one of the electrodes is called the first end, the other electrode is called the second end, and the gate is called the control end. In addition, according to the characteristics of the transistor, the transistor can be divided into N-type and P-type. The following embodiments are explained with P-type transistors. When a P-type transistor is used, the first end is the source of the P-type transistor, and the second end is the drain of the P-type transistor. When the gate inputs a low level, the source and drain are turned on, and the low level is the effective level. When the gate inputs a high level, the source and drain are cut off, and the high level is the invalid level; the N-type transistor is the opposite. It can be thought that the use of N-type transistors is something that a person skilled in the art can easily think of without creative labor, so it is also within the scope of protection of the embodiments of the present application.

[0068] See also Figure 2 As shown, Figure 2: is a schematic diagram of a pixel circuit structure provided in an embodiment of the present application, which may include a common subcircuit 21, a first light-emitting control subcircuit 22, a second light-emitting control subcircuit 23, a first light-emitting device 24 and a second light-emitting device 25, and a first end of the first light-emitting control subcircuit 22 and a first end of the second light-emitting control subcircuit 23 are both connected to the common subcircuit 21 through a common connection terminal N;

[0069] The shared subcircuit 21 is used to provide a driving current to the first light-emitting control subcircuit 22 and the second light-emitting control subcircuit 23 through the common connection terminal N;

[0070] The second end of the first light emitting control subcircuit 22 is used to connect to the first light emitting device 24, and is used to provide a driving current to the first light emitting device 24 in response to being turned on by the first light emitting control signal EM1;

[0071] The second end of the second light emitting control subcircuit 23 is used to connect to the second light emitting device 25, and is used to provide a driving current to the second light emitting device 25 in response to being turned on by the second light emitting control signal EM2;

[0072] The first light emitting device 24 and the second light emitting device 25 correspond to different pixels.

[0073] In some embodiments, the first light emitting device 24 and the second light emitting device 25 correspond to different pixels, and may be different pixels corresponding to the same luminous color. The different pixels may be turned on simultaneously or separately.

[0074] In some embodiments, when applied to two-dimensional display, based on the pixel circuit provided in the present application, by controlling the effective potentials of the first light-emitting control signal EM and the second light-emitting control signal EM2 to overlap in time, the first light-emitting control sub-circuit 22 and the second light-emitting control sub-circuit 23 can be controlled to be turned on at the same time, so that different pixels corresponding to the current pixel circuit are displayed at the same time.

[0075] In other embodiments, the effective potentials of the first light-emitting control signal EM1 and the second light-emitting control signal EM2 do not overlap in time, and the first light-emitting control subcircuit 22 and the second light-emitting control subcircuit 23 are used to alternately turn on in response to the effective potentials of their respective light-emitting control signals. When applied to three-dimensional display, the pixels corresponding to the first light-emitting control subcircuit 22 and the pixels corresponding to the second light-emitting control subcircuit 23 are displayed in time periods. In some embodiments, the pixels corresponding to the first light-emitting control subcircuit 22 may be left-eye pixels L, and the pixels corresponding to the second light-emitting control subcircuit 23 may be right-eye pixels R. By respectively setting corresponding control subcircuits and light-emitting control signals for different pixels, the alternating display of left-eye pixels L and right-eye pixels R can be achieved on the basis of the shared partial circuit, i.e., the shared subcircuit 21.

[0076] In some embodiments, see Figure 3 As shown, Figure 3 : is a schematic diagram of the pixel circuit structure provided by another embodiment of the present application, wherein the first light-emitting control subcircuit 22 includes a first transistor T1, a first end of the first transistor T1 is connected to the common connection terminal N, a second end of the first transistor T1 is connected to the first light-emitting device 24, and a control end of the first transistor T1 is used to receive a first light-emitting control signal EM1. The second light-emitting control subcircuit 23 includes a second transistor T2, a first end of the second transistor T2 is connected to the common connection terminal N, a second end of the second transistor T2 is connected to the second light-emitting device 25, and a control end of the second transistor T2 is used to receive a second light-emitting control signal EM2.

[0077] In some embodiments, the first light-emitting device 24 and the second light-emitting device 25 can be electronic devices with light-emitting properties, such as organic light-emitting diodes (OLED), active matrix quantum dot light-emitting diodes (QLED) or light-emitting diodes (LED).

[0078] The second end of the first transistor T1 can be connected to the anode of the first light-emitting device 24, and the cathode of the first light-emitting device 24 can be connected to the second power signal terminal (VSS terminal); the second end of the second transistor T2 can be connected to the anode of the second light-emitting device 25, and the cathode of the second light-emitting device 25 can be connected to the second power signal terminal (VSS terminal).

[0079] In some embodiments, the shared sub-circuit 21 can be implemented based on conventional pixel circuits in the art such as 6TIC (6 transistors and 1 capacitor), 7TIC (7 transistors and 1 capacitor), and 9T1C (9 transistors and 1 capacitor) circuits. Taking the 7TIC circuit as an example, the rest of the branch except the light-emitting device and the transistor directly connected to the light-emitting device can be used as the shared sub-circuit 21.

[0080] In some embodiments, see Figure 4 and Figure 5 , Figure 4 is a schematic diagram of a pixel circuit structure provided by another embodiment of the present application. Figure 5 is a schematic diagram of a pixel circuit provided in an embodiment of the present application. It should be noted that this embodiment can be based on the above Figure 2 or Figure 3 Implementation, based on Figure 3 The implementation is described as an example.

[0081] In this embodiment, the common sub-circuit 21 includes a reset unit, an energy storage unit, a data writing unit, a driving unit, a compensation unit and a light emitting control unit.

[0082] The first end of the reset unit is used to receive the initial signal Vinit, and the second end of the reset unit is connected to the first node N1, and is used to transmit the initial signal Vinit to the first node N1 during the reset phase of each pixel driving cycle.

[0083] In some embodiments, Figure 5 As shown, the reset unit may include a third transistor T3, a first end of the third transistor T3 is used to receive an initial signal, a second end of the third transistor T3 is connected to the first node N1, and a control end of the third transistor T3 is used to receive a first gate driving signal GateM1.

[0084] A first end of the energy storage unit is used to receive a first power signal VDD, and a second end of the energy storage unit is connected to a first node N1.

[0085] In some embodiments, Figure 5 As shown, the energy storage unit includes a storage capacitor C, a first end of the storage capacitor C is used to receive a first power signal VDD, and a second end of the storage capacitor C is connected to a first node N1.

[0086] A first terminal of the compensation unit is connected to the common connection terminal N, and a second terminal of the compensation unit is connected to the first node N1.

[0087] In some embodiments, Figure 5 As shown, the compensation unit includes a fourth transistor T4, a first end of the fourth transistor T4 is connected to the common connection terminal N, and a second end of the fourth transistor T4 is connected to the first node N1.

[0088] The first end of the data writing unit is used to receive the data signal Data, and the second end of the data writing unit is connected to the second node N2, and is used to provide the data signal Data and the threshold voltage to the first node N1 through the compensation unit during the writing phase of each pixel driving cycle.

[0089] In some embodiments, Figure 5 As shown, the data writing unit includes a fifth transistor T5, a first end of the fifth transistor T5 is used to receive a data signal Data, a second end of the fifth transistor T5 is connected to the second node N2, and control ends of the fifth transistor T5 and the fourth transistor T4 are both used to receive a second gate drive signal GateM2.

[0090] The first end of the driving unit is connected to the second node N2, the second end of the driving unit is connected to the common connection terminal N, and the control end of the driving unit is connected to the first node N1.

[0091] In some embodiments, Figure 5 As shown, the driving unit includes a sixth transistor T6, a first end of the sixth transistor T6 is connected to the second node N2, a second end of the sixth transistor T6 is connected to the common connection terminal N, and a control end of the driving unit is connected to the first node N1.

[0092] The first end of the light-emitting control unit is used to receive the first power supply signal VDD, and the second end of the light-emitting control unit is connected to the second node N2, and is used to be turned on during the light-emitting phase of each pixel driving cycle to provide the first power supply signal VDD to the second node N2; the driving unit is used to provide a driving current to the common connection terminal N based on the signals provided by the first node N1 and the second node N2.

[0093] In some embodiments, Figure 5 As shown, the light emitting control unit includes a seventh transistor T7, a first end of the seventh transistor T7 is used to receive the first power signal VDD, a second end of the seventh transistor T7 is connected to the second node N2, and a control end of the seventh transistor T7 is used to receive the third light emitting control signal EM3.

[0094] When the initial signal Vinit is transmitted to the first node N1 , the potentials of the control end of the driving unit and the second end of the energy storage unit may be reset.

[0095] The threshold voltage may be a threshold voltage of a transistor in the driving unit. Providing the threshold voltage to the first node N1 is beneficial for compensating the driving current in the light emitting stage, thereby ensuring the consistency of brightness between different pixels.

[0096] In the present application, the timing signal used to control the conduction or cutoff of the light-emitting control unit is the third light-emitting control signal EM3. When applied to the three-dimensional display mode, the third light-emitting control signal EM3 can be different from the first light-emitting control signal EM1 and the second light-emitting control signal EM2. The periods of the first light-emitting control signal EM1 and the second light-emitting control signal EM2 are both twice the period of the third light-emitting control signal EM3.

[0097] It should be noted that the above description is only exemplary, and the shared sub-circuit 21 of the present application is not limited to Figure 5 The specific circuit shown.

[0098] In some embodiments, Figure 4 As shown, the pixel circuit provided by the present application may also include a first reset subcircuit, which is used to reset the second end of the first light-emitting control subcircuit 22 during the reset phase of the pixel driving cycle. That is, the anode potential of the first light-emitting device 24 can be reset, which is beneficial to ensure that the brightness difference after each charging is small and improve the display quality.

[0099] It should be noted that this embodiment can be based on the above Figures 2 to 5 The implementation example corresponding to any one of the above is implemented based on Figure 5 The implementation is described as an example. Figure 5 As shown, the first reset subcircuit includes an eighth transistor T8, a first end of the eighth transistor T8 is used to receive the initial signal Vinit, a second end of the eighth transistor T8 is connected to the second end of the first light-emitting control subcircuit 22, and a control end of the eighth transistor T8 is used to receive the first gate drive signal GateM1.

[0100] In some embodiments, Figure 4 As shown, the pixel circuit provided by the present application may also include a second reset subcircuit, which is used to reset the second end of the second light-emitting control subcircuit 23 during the reset phase of the pixel driving cycle. That is, the anode potential of the second light-emitting device 25 can be reset, which is beneficial to ensure that the brightness difference after each charging is small and improve the display quality.

[0101] It should be noted that this embodiment can be based on the above Figures 2 to 5 The implementation example corresponding to any one of the above is implemented based on Figure 5 The implementation is described as an example. Figure 5 As shown, the second reset subcircuit includes a ninth transistor T9, a first end of the ninth transistor T9 is used to receive the initial signal Vinit, a second end of the ninth transistor T9 is connected to the second end of the second light emitting control subcircuit 23, and a control end of the ninth transistor T9 is used to receive the first gate drive signal GateM1.

[0102] The above is the pixel circuit provided in the present application, which may include a common sub-circuit 21, a first light-emitting control sub-circuit 22 and a first light-emitting device 24 respectively arranged corresponding to different pixels, and a second light-emitting control sub-circuit 23 and a second light-emitting device 25. The pixel circuit can drive different pixels, which is beneficial to saving space, simplifying layout, and improving resolution. When applied to a three-dimensional display mode, it can effectively improve the three-dimensional display effect.

[0103] In another aspect of the present application, a pixel circuit driving method is also provided based on the pixel circuit provided in the embodiment of the present application, see Figure 6 As shown, Figure 6 : is a schematic flow chart of a pixel circuit driving method provided by an embodiment of the present application, which may include:

[0104] Step S61: In the light-emitting phase of the pixel driving cycle, the common sub-circuit 21 provides a driving current to the first light-emitting control sub-circuit 22 and the second light-emitting control sub-circuit 23 through the common connection terminal N;

[0105] Step S62: the first light emitting control subcircuit 22 is turned on or off in response to the first light emitting control signal EM1. When the first light emitting control subcircuit 22 is turned on, the driving current is provided to the first light emitting device 24.

[0106] Step S63 : the second light emitting control sub-circuit 23 is turned on or off in response to the second light emitting control signal EM2 , and provides a driving current to the second light emitting device 25 when the first light emitting control sub-circuit 22 is turned on.

[0107] The first light emitting device 24 and the second light emitting device 25 correspond to different pixels.

[0108] In some embodiments, when applied to two-dimensional display, the effective potentials of the first light-emitting control signal EM1 and the second light-emitting control signal EM2 overlap in time, and the first light-emitting control subcircuit 22 and the second light-emitting control subcircuit 23 can be controlled to be turned on at the same time, and different pixels corresponding to the current pixel circuit are displayed at the same time.

[0109] In other embodiments, the effective potentials of the first light-emitting control signal EM1 and the second light-emitting control signal EM2 do not overlap in time, and the first light-emitting control subcircuit 22 and the second light-emitting control subcircuit 23 are used to alternately turn on in response to the effective potentials of their respective light-emitting control signals. When applied to three-dimensional display, the pixels corresponding to the first light-emitting control subcircuit 22 and the pixels corresponding to the second light-emitting control subcircuit 23 are displayed in time periods. In some embodiments, the pixels corresponding to the first light-emitting control subcircuit 22 may be left-eye pixels L, and the pixels corresponding to the second light-emitting control subcircuit 23 may be right-eye pixels R. By respectively setting corresponding control subcircuits and light-emitting control signals for different pixels, the alternating display of left-eye pixels L and right-eye pixels R can be achieved on the basis of the shared partial circuit, i.e., the shared subcircuit 21.

[0110] In some embodiments, the periods of the first light-emitting control signal EM1 and the second light-emitting control signal EM2 are both twice that of the third light-emitting control signal EM3. One period of the third light-emitting control signal EM3 can be used as a pixel driving period. Two adjacent pixel driving periods respectively control the conduction of the first light-emitting control subcircuit 22 and the second light-emitting control subcircuit 23, thereby realizing the alternating display of the left-eye pixel L and the right-eye pixel R.

[0111] In some embodiments, Figure 5 The pixel circuit shown is applied to a three-dimensional display mode as an example for description. Figure 7 As shown, Figure 7 It is a timing diagram of various signals in the pixel circuit driving process provided in an embodiment of the present application.

[0112] The driving process of the pixel circuit may include a driving process corresponding to the left eye pixel L and a driving process corresponding to the right eye pixel R, and the driving processes for the left eye pixel L and the right eye pixel R are performed alternately. Each driving process may be used as a pixel driving cycle, and the pixel driving cycle may include a reset phase, a write phase, and a light emitting phase. In which, the description is made with the Nth level pixel circuit, the first gate driving signal GateM1 may be provided by the previous level gate driving signal Gate_N-1, and the second gate driving signal GateM2 may be provided by the current level gate driving signal Gate_N.

[0113] Driving process for right eye pixel R:

[0114] In the reset phase tR1, Gate_N-1 is at a low level, and EM1, EM2, EM3 and Gate_N are all at a high level.

[0115] T3 is turned on, the initial signal Vinit is written to the first node N1, and the T6 transistor is turned on. T9 is turned on, the initial signal Vinit is written to the second end of T2, and the potential of the anode of the second light-emitting device 25 is reset. T1, T2, T4, T5 and T7 are all turned off. In addition, T8 is also turned on, the initial signal Vinit is written to the second end of T1, and the potential of the anode of the first light-emitting device 24 is reset.

[0116] In the writing phase tR2, Gate_N is at a low level, and EM1, EM2, EM3 and Gate_N-1 are all at a high level.

[0117] T5 and T4 are turned on, and the data signal Data is written into the first node N1 through T5, T6 and T4 until the write voltage of the first node N1 is the sum of the data signal Data voltage and the threshold voltage, so as to charge the energy storage unit and supplement the driving current in the light-emitting stage. T1, T2, T3, T7, T8 and T9 are all turned off.

[0118] In the light-emitting stage tR3, EM2 and EM3 are both at low levels, and EM1, Gate_N and Gate_N-1 are all at high levels.

[0119] T7 is turned on, and the first power signal VDD is provided to the first end of T6 through the second node N2. T6 is turned on based on the signals of the first node N1 and the second node N2 and provides a driving current. T2 is turned on, and the driving current drives the second light emitting device 25 to emit light through T2, and the right eye pixel R is displayed. T1, T3, T4, T5, T8 and T9 are all turned off.

[0120] The reset phase tL1 and the write phase tL2 of the driving process for the left eye pixel L are the same as the corresponding phases of the driving process for the right eye pixel R. The following mainly describes the light emitting phase tL3 of the driving process for the left eye pixel L:

[0121] EM1 and EM3 are both low level, and EM2, Gate_N and Gate_N-1 are all high level.

[0122] T7 is turned on, and the first power signal VDD is provided to the first end of T6 through the second node N2. T6 is turned on and provides a driving current based on the signals of the first node N1 and the second node N2. T1 is turned on, and the driving current drives the first light emitting device 24 to emit light through T1, and the left eye pixel L is displayed. T2, T3, T4, T5, T8 and T9 are all turned off.

[0123] In another aspect of the present application, a display panel is provided. Figure 8 As shown, Figure 8 is a schematic diagram of a display panel provided in an embodiment of the present application, which may include:

[0124] A plurality of gate lines G_M, a plurality of data lines D_N and a plurality of pixel unit groups arranged in an array, a plurality of pixel unit groups located in the same row direction are connected to the same gate line G_M, a plurality of pixel unit groups located in the same column direction are connected to the same data line D_N, wherein each pixel unit group includes a left-eye pixel L and a right-eye pixel R, the left-eye pixel L and the right-eye pixel R in the same pixel unit group have the same luminous color and are driven by the pixel circuit of any of the above-mentioned embodiments, wherein the white rectangle represents the pixel circuit.

[0125] By adopting the pixel circuit provided in the embodiment of the present application, the display panel can effectively improve the resolution, simplify the layout, and improve the display effect.

[0126] In some embodiments, Figure 8 As shown, the left-eye pixels L and the right-eye pixels R in each pixel unit group are arranged at intervals in the column direction. The left-eye pixels L and the right-eye pixels R can each include different luminous colors, such as the left-eye pixels L can include red left-eye pixels L, green left-eye pixels L and blue left-eye pixels L. The red left-eye pixels L and the red right-eye pixels R are arranged at intervals in the column direction and connected to the same pixel circuit, the green left-eye pixels L and the green right-eye pixels R are arranged at intervals in the column direction and connected to the same pixel circuit, the blue left-eye pixels L and the blue right-eye pixels R are arranged at intervals in the column direction and connected to the same pixel circuit, and in each row, three pixel unit groups arranged in sequence with luminous colors of red, green and blue are repeated as the minimum arrangement repeating unit in the row direction.

[0127] In other embodiments, see Fig. 9 As shown, Fig. 9It is a schematic diagram of a display panel provided by another embodiment of the present application, in which the left eye pixels L and the right eye pixels R in each pixel unit group are arranged alternately in the row direction. The left eye pixels L and the right eye pixels R may include different luminous colors, such as the left eye pixel L may include a red left eye pixel L, a green left eye pixel L and a blue left eye pixel L, and the right eye pixel R may include a red right eye pixel R, a green right eye pixel R and a blue right eye pixel R. In each row, the red left eye pixel L, the green left eye pixel L, the blue left eye pixel L, the red right eye pixel R, the green right eye pixel R and the blue right eye pixel R are arranged in sequence in the row direction, and are repeatedly arranged in the row direction as the minimum arrangement repeating unit. Among them, the red left eye pixel L, the green left eye pixel L, and the blue left eye pixel L are respectively connected to their respective pixel circuits, the red right eye pixel R and the red left eye pixel L are connected to the same pixel circuit, the green right eye pixel R and the green left eye pixel L are connected to the same pixel circuit, and the blue right eye pixel R and the blue left eye pixel L are connected to the same pixel circuit.

[0128] It should be noted that pixels of different luminous colors and the arrangement of pixels can be flexibly set according to actual needs and display effect requirements. Here, the arrangement of left-eye pixels L and right-eye pixels R of different luminous colors is only described as an example.

[0129] In some embodiments, see Fig.10 As shown, Fig.10 It is a schematic diagram of the local layout structure of the display panel provided in an embodiment of the present application.

[0130] The plurality of gate lines include a first gate drive signal line and a second gate drive signal line; the first gate drive signal line may be provided by a previous level gate drive signal Gate_N-1 line, and the second gate drive signal line may be provided by a current level gate drive signal Gate_N line;

[0131] The display panel further includes an initial signal Vinit line, a first light emitting control signal EM1 line, a second light emitting control signal EM2 line, and a third light emitting control signal EM3 line;

[0132] The initial signal Vinit line, the first gate drive signal line, the second gate drive signal line, the third light emitting control signal EM3 line, the first light emitting control signal EM1 line and the second light emitting control signal EM2 line are sequentially arranged in parallel in the column direction;

[0133] The shared subcircuit 21 of the pixel circuit is arranged in the area between the initial signal Vinit line and the first light-emitting control signal EM1 line and between two adjacent data lines, and partially overlaps with the corresponding connected data lines; the first light-emitting control subcircuit 22 and the second light-emitting control subcircuit 23 of the pixel circuit are arranged between two adjacent data lines and arranged at intervals in the row direction, the first light-emitting control subcircuit 22 partially overlaps with the first light-emitting control signal EM1 line, and the second light-emitting control subcircuit 23 partially overlaps with the second light-emitting control signal EM2 line;

[0134] The common connection terminal N is arranged between the third light-emitting control signal EM3 line and the first light-emitting control signal EM1 line, the first light-emitting control sub-circuit 22 and the second light-emitting control sub-circuit 23 are connected to the common connection terminal N, and are connected to the common sub-circuit 21 through a connecting wire whose one end is connected to the common connection terminal N and extends parallel to the column direction.

[0135] By arranging the first light-emitting control subcircuit 22 and the second light-emitting control subcircuit 23 to be connected to the same common subcircuit 21 , layout space can be effectively saved and the layout can be simplified.

[0136] See also Fig.10 As shown, it shows a pixel circuit layout structure diagram corresponding to the pixel unit groups whose luminous colors are red, green and blue, respectively. The corresponding multiple data lines include a first data line Data_R for providing a data signal to the pixel unit group whose luminous color is red, a second data line Data_G for providing a data signal Data to the pixel unit group whose luminous color is green, and a third data line Data_B for providing a data signal Data to the pixel unit group whose luminous color is blue.

[0137] In the following, the first gate driving signal line is Gate_N-1, the second gate driving signal line is Gate_N, the light emitting color is red and the Figure 5 The layout structure of the corresponding pixel circuit is described as an example.

[0138] The first light-emitting control subcircuit 22 includes a first transistor T1, the projections of the first transistor T1 and the first light-emitting control signal EM1 line on the display panel overlap, and the control end of the first transistor T1 is connected to the first light-emitting control signal EM1 line, the first end of the first transistor T1 is connected to the common connection end N, and the second end of the first transistor T1 is connected to the second end of the eighth transistor T8. The eighth transistor T8 and the first transistor T1 are arranged alternately in the column direction, the projections of the eighth transistor T8 and the Gate_N-1 line on the display panel overlap, and the control end of the eighth transistor T8 is connected to the Gate_N-1 line, and the first end of the eighth transistor T8 is connected to the initial signal Vinit line (not shown in the figure).

[0139] The second light-emitting control subcircuit 23 includes a second transistor T2. In the row direction, the second transistor T2 is arranged between the first data line Data_R and the first transistor T1. The second transistor T2 and the second light-emitting control signal EM2 line overlap in projection on the display panel, and the control end of the second transistor T2 is connected to the second light-emitting control signal EM2 line. The first end of the second transistor T2 is connected to the common connection end N through a bent connecting wire, and the second end of the second transistor T2 is connected to the second end of the ninth transistor T9. The ninth transistor T9 and the second transistor T2 are arranged alternately in the column direction, the ninth transistor T9 overlaps in projection on the display panel with the Gate_N-1 line, and the control end of the ninth transistor T9 is connected to the Gate_N-1 line, and the first end of the ninth transistor T9 is connected to the initial signal Vinit line (not shown in the figure).

[0140] The shared sub-circuit 21 includes a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7 and a storage capacitor C (not shown in the figure).

[0141] The third transistor T3 overlaps with the projection of the Gate_N-1 line on the display panel, and the control end of the third transistor T3 is connected to the Gate_N-1 line, the first end of the third transistor T3 is connected to the initial signal Vinit line, and the second end of the third transistor T3 is connected to the first node N1. The fourth transistor T4 overlaps with the projection of the Gate_N line on the display panel, and the control end of the fourth transistor T4 is connected to the Gate_N line, the first end of the fourth transistor T4 is connected to the common connection end N through a connecting wire extending parallel to the column direction, and the second end of the fourth transistor T4 is connected to the first node N1 through a bent connecting wire. The projection of the fifth transistor T5 on the display panel overlaps with the overlapping position of the projection of the first data line Date_R and the Gate_N line on the display panel, and the control end of the five transistors is connected to the Gate_N line, the first end of the fifth transistor T5 is connected to the first data line Date_R, and the second end of the fifth transistor T5 is connected to the first end of the sixth transistor T6 through the second node N2 and to the second end of the seventh transistor T7. The sixth transistor T6 is aligned with the third transistor T3 in the column direction and is arranged at intervals. The sixth transistor T6 is arranged between the Gate_N line and the third light-emitting control signal EM3 line. The second end of the sixth transistor T6 is connected to the first end of the fourth transistor T4 through a bent connecting wire. The projection of the seventh transistor T7 on the display panel overlaps with the overlapping position of the projection of the first data line Date_R and the third light-emitting control signal EM3 line on the display panel, and the control end of the seventh transistor T7 is connected to the third light-emitting control signal EM3, and the first end of the seventh transistor T7 is connected to the first power supply signal VDD line (not shown in the figure).

[0142] In another aspect of the present application, a display device is provided, which may include the above-mentioned display panel.

[0143] In some embodiments, the display device may include any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc., and the embodiments of the present disclosure are not limited to this.

[0144] In some embodiments, the display device may further include a prism array, which is located on the light-emitting side of the display panel. By driving the left-eye pixel L and the right-eye pixel R respectively, and using the prism array to refract the image of the left-eye pixel L into the left eye of the user, and refract the image of the right-eye pixel R into the right eye of the user. In this way, the user's eyes can receive two images with parallax information, and synthesize a stereoscopic image in the brain, realizing a three-dimensional display mode, and providing a three-dimensional display screen for the user.

[0145] In some embodiments, see Fig.11 As shown, Fig.11 : is a schematic diagram of a cross-sectional structure of a display device provided by an embodiment of the present application, wherein the display panel may include a plurality of pixel unit groups, each of which may include a left-eye pixel L and a right-eye pixel R. The prism array may include a plurality of prisms, and the projection of each prism on the display panel may overlap with a pixel unit group.

[0146] In some embodiments, the position or angle of the prism can be adjusted to adjust the refraction angle of the prism on the light emitted by each pixel, thereby adjusting the display effect.

[0147] In some embodiments, the prism array may be a liquid crystal prism array, and the display device may further include a liquid crystal driving circuit, the liquid crystal driving circuit being used to provide voltage to the liquid crystal prism array to achieve switching between two-dimensional display and three-dimensional display. Fig.12 As shown, Fig.12 It is a schematic cross-sectional structure diagram of a display device provided in another embodiment of the present application.

[0148] When a preset voltage is applied, the liquid crystal molecules in the liquid crystal prism will rearrange, changing the refraction path of light, thereby achieving a 3D display effect. The specific display effect depends on the amplitude and waveform of the preset voltage and the characteristics and design of the liquid crystal prism.

[0149] When the pressure is stopped or a lower voltage is applied, the liquid crystal molecules will return to their natural state when no electric field is applied. At this time, the liquid crystal prism no longer refracts the light or changes its propagation direction. At this time, it is a 2D display effect or a state where no picture is displayed.

[0150] In some embodiments, the liquid crystal prism may be specifically a liquid crystal resin prism.

[0151] So far, the technical solutions of the present application have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present application is obviously not limited to these specific embodiments. Without departing from the principles of the present application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present application.

Claims

1. A pixel circuit, characterized in that: It includes a common subcircuit, a first light-emitting control subcircuit, a second light-emitting control subcircuit, a first light-emitting device and a second light-emitting device, wherein a first end of the first light-emitting control subcircuit and a first end of the second light-emitting control subcircuit are both connected to the common subcircuit through a common connection end; The shared subcircuit is used to provide a driving current to the first light-emitting control subcircuit and the second light-emitting control subcircuit through the common connection terminal; The second end of the first light emitting control subcircuit is used to be connected to the first light emitting device, and is used to be turned on in response to the first light emitting control signal to provide the driving current to the first light emitting device; The second end of the second light emitting control subcircuit is used to be connected to the second light emitting device, and is used to be turned on in response to the second light emitting control signal to provide the driving current to the second light emitting device; The first light emitting device and the second light emitting device correspond to different pixels.

2. The pixel circuit according to claim 1, characterized in that: The effective potentials of the first light-emitting control signal and the second light-emitting control signal do not overlap in time, and the first light-emitting control subcircuit and the second light-emitting control subcircuit are used to be alternately turned on in response to the effective potentials of their respective light-emitting control signals.

3. The pixel circuit according to claim 1, characterized in that: The first light-emitting control subcircuit includes a first transistor, a first end of the first transistor is connected to the common connection end, a second end of the first transistor is connected to the first light-emitting device, and a control end of the first transistor is used to receive the first light-emitting control signal.

4. The pixel circuit according to claim 1, characterized in that: The second light-emitting control subcircuit includes a second transistor, a first end of the second transistor is connected to the common connection end, a second end of the second transistor is connected to the second light-emitting device, and a control end of the second transistor is used to receive the second light-emitting control signal.

5. The pixel circuit according to any one of claims 1 to 4, characterized in that: The shared subcircuit includes a reset unit, an energy storage unit, a data writing unit, a driving unit, a compensation unit and a light emitting control unit; The first end of the reset unit is used to receive an initial signal, and the second end of the reset unit is connected to the first node, and is used to transmit the initial signal to the first node during the reset phase of each pixel driving cycle; The first end of the energy storage unit is used to receive a first power signal, and the second end of the energy storage unit is connected to the first node; The first end of the compensation unit is connected to the common connection end, and the second end of the compensation unit is connected to the first node; The first end of the data writing unit is used to receive a data signal, and the second end of the data writing unit is connected to the second node, and is used to provide the data signal and the threshold voltage to the first node through the compensation unit during the writing phase of each pixel driving cycle; The first end of the driving unit is connected to the second node, the second end of the driving unit is connected to the common connection end, and the control end of the driving unit is connected to the first node; The first end of the light-emitting control unit is used to receive the first power supply signal, and the second end of the light-emitting control unit is connected to the second node, and is used to be turned on during the light-emitting phase of each pixel driving cycle to provide the first power supply signal to the second node; the driving unit is used to provide a driving current to the common connection end based on the signals provided by the first node and the second node.

6. The pixel circuit according to claim 5, characterized in that: The reset unit comprises a third transistor, a first end of the third transistor is used to receive the initial signal, a second end of the third transistor is connected to the first node, and a control end of the third transistor is used to receive a first gate drive signal; The energy storage unit comprises a storage capacitor, a first end of the storage capacitor is used to receive the first power signal, and a second end of the storage capacitor is connected to the first node; The compensation unit comprises a fourth transistor, a first terminal of the fourth transistor is connected to the common connection terminal, and a second terminal of the fourth transistor is connected to the first node; The data writing unit comprises a fifth transistor, a first end of the fifth transistor is used to receive the data signal, a second end of the fifth transistor is connected to the second node, and control ends of the fifth transistor and the fourth transistor are both used to receive a second gate driving signal; The driving unit comprises a sixth transistor, a first terminal of the sixth transistor is connected to the second node, a second terminal of the sixth transistor is connected to the common connection terminal, and a control terminal of the driving unit is connected to the first node; The light emitting control unit comprises a seventh transistor, a first end of the seventh transistor is used to receive the first power supply signal, a second end of the seventh transistor is connected to the second node, and a control end of the seventh transistor is used to receive the third light emitting control signal.

7. The pixel circuit according to any one of claims 1 to 4, characterized in that: The pixel circuit further includes: The first reset subcircuit is used to reset the second end of the first light emitting control subcircuit during the reset phase of the pixel driving cycle.

8. The pixel circuit according to claim 7, characterized in that: The first reset subcircuit includes an eighth transistor, a first end of the eighth transistor is used to receive an initial signal, a second end of the eighth transistor is connected to the second end of the first light emitting control subcircuit, and a control end of the eighth transistor is used to receive a first gate drive signal.

9. The pixel circuit according to any one of claims 1 to 4, characterized in that: The pixel circuit further includes: The second reset subcircuit is used to reset the second end of the second light emitting control subcircuit during the reset phase of the pixel driving cycle.

10. The pixel circuit according to claim 9, characterized in that: The second reset subcircuit includes a ninth transistor, a first end of the ninth transistor is used to receive an initial signal, a second end of the ninth transistor is connected to a second end of the second light emitting control subcircuit, and a control end of the ninth transistor is used to receive a first gate drive signal.

11. A display panel, characterized in that: A plurality of pixel unit groups including a plurality of gate lines, a plurality of data lines and an array arrangement, wherein the plurality of pixel unit groups located in the same row direction are connected to the same gate line, and the plurality of pixel unit groups located in the same column direction are connected to the same data line, wherein each pixel unit group includes a left-eye pixel and a right-eye pixel, and the left-eye pixel and the right-eye pixel in the same pixel unit group are driven by the pixel circuit described in any one of claims 1 to 10.

12. The display panel according to claim 11, characterized in that: The left-eye pixels and the right-eye pixels in each of the pixel unit groups are arranged alternately in the column direction; or, the left-eye pixels and the right-eye pixels in each of the pixel unit groups are arranged alternately in the row direction.

13. The display panel according to claim 11, characterized in that: The plurality of gate lines include a first gate drive signal line and a second gate drive signal line; The display panel further includes an initial signal line, a first light emitting control signal line, a second light emitting control signal line and a third light emitting control signal line; Wherein, the initial signal line, the first gate drive signal line, the second gate drive signal line, the third light emitting control signal line, the first light emitting control signal line and the second light emitting control signal line are sequentially arranged in parallel in a column direction; The common subcircuit of the pixel circuit is arranged in an area between the initial signal line and the first light-emitting control signal line and between two adjacent data lines, and partially overlaps with the corresponding connected data line; the first light-emitting control subcircuit and the second light-emitting control subcircuit of the pixel circuit are arranged between the two adjacent data lines and are arranged alternately in the row direction, the first light-emitting control subcircuit partially overlaps with the first light-emitting control signal line, and the second light-emitting control subcircuit partially overlaps with the second light-emitting control signal line; A common connection terminal is arranged between the third light-emitting control signal line and the first light-emitting control signal line, the first light-emitting control sub-circuit and the second light-emitting control sub-circuit are connected to the common connection terminal, and are connected to the common sub-circuit through a connecting wire whose one end is connected to the common connection terminal and extends parallel to the column direction.

14. A display device, characterized in that: A display panel comprising any one of claims 11 to 13.

15. The display device according to claim 14, characterized in that: The display device further includes a prism array, and the prism array is located on the light-emitting side of the display panel.

16. The display device according to claim 15, characterized in that: The prism array is a liquid crystal prism array, and the display device further includes a liquid crystal driving circuit, which is used to provide voltage to the liquid crystal prism array to achieve switching between two-dimensional display and three-dimensional display.

17. A pixel circuit driving method, characterized in that: include: In the light emitting phase of the pixel driving cycle, the common subcircuit provides a driving current to the first light emitting control subcircuit and the second light emitting control subcircuit through the common connection terminal; The first light emitting control subcircuit is turned on or off in response to a first light emitting control signal, and when the first light emitting control subcircuit is turned on, the driving current is provided to the first light emitting device; The second light emitting control subcircuit is turned on or off in response to a second light emitting control signal, and when the first light emitting control subcircuit is turned on, the driving current is provided to the second light emitting device; The first light emitting device and the second light emitting device correspond to different pixels.

18. The method according to claim 17, characterized in that The effective operating potentials of the first light-emitting control signal and the second light-emitting control signal do not overlap in time, and the first light-emitting control subcircuit and the second light-emitting control subcircuit are alternately turned on in response to the effective potentials of their respective light-emitting control signals.

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