MEMS device and preparation method thereof

Abstract

The invention discloses an MEMS device and a preparation method thereof, and the preparation method comprises the steps: providing a first wafer, forming a cavity in the upper part of the first wafer, and forming a porous silicon layer at the bottom of the cavity; providing a second wafer with an etching stop layer on the surface, and bonding the upper side of the first wafer and the etching stop layer; a boss and a first bonding metal layer located on the boss are formed on the side, away from the first wafer, of the second wafer; forming a groove penetrating through the second wafer in the second wafer, and removing the etching stop layer between the cavity and the second wafer to form a suspended comb tooth structure; and providing a third wafer with a patterned second bonding metal layer on the surface, and bonding the second bonding metal layer and the first bonding metal layer to form a vacuum chamber. According to the technical scheme, the quality factor of the MEMS device can be remarkably improved.

Description

Technical Field

[0001] The present application relates to the technical field of micro-electromechanical systems, and in particular to a MEMS device and a method for manufacturing the same. Background Art

[0002] For MEMS devices such as gyro MEMS (Micro-Electro-Mechanical System) sensors, a vacuum chamber is usually formed inside through a bonding process. After bonding, some gas is often released from the inside of the vacuum chamber, resulting in a decrease in the vacuum degree in the device's vacuum chamber, affecting the quality factor of the MEMS device.

[0003] At present, a getter is usually set in the vacuum chamber to absorb the released gas. The commonly used getter is TI nanotubes, which need high temperature activation to have a gettering effect. On the one hand, high temperature activation may cause secondary bonding and destroy the bonding strength of MEMS devices; on the other hand, the process time of high temperature activation is usually long, which affects the production cycle of MEMS devices.

[0004] Therefore, improvements are needed to at least partially solve the above problems. Summary of the invention

[0005] A series of simplified concepts are introduced in the Summary of the Invention, which will be further described in detail in the Detailed Description of the Invention. The Summary of the Invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0006] In order to at least partially solve the above problem, according to a first aspect of the present invention, a method for preparing a MEMS device is provided, which comprises:

[0007] Providing a first wafer, forming a cavity on an upper portion of the first wafer, and forming a porous silicon layer at a bottom of the cavity;

[0008] Providing a second wafer having an etch stop layer on its surface, and bonding the upper side of the first wafer to the etch stop layer;

[0009] forming a boss and a first bonding metal layer on the boss on a side of the second wafer away from the first wafer;

[0010] forming a groove penetrating the second wafer in the second wafer, and removing the etch stop layer between the cavity and the second wafer to form a suspended comb structure;

[0011] A third wafer having a second bonding metal layer on its surface is provided, and the second bonding metal layer and the first bonding metal layer are bonded to form a vacuum chamber, wherein the cavity is a part of the vacuum chamber, and the comb-tooth structure is located in the vacuum chamber.

[0012] Exemplarily, forming a cavity on the upper portion of the first wafer and forming a porous silicon layer at the bottom of the cavity includes:

[0013] forming a sidewall protection zone on an upper portion of the first wafer;

[0014] The cavity is formed between the sidewall protection zones, and a porous silicon layer is formed at the bottom of the cavity.

[0015] Exemplarily, forming a cavity between the sidewall protection zones and forming a porous silicon layer at the bottom of the cavity comprises:

[0016] forming a patterned protective layer on the upper surface of the first wafer;

[0017] Using the protection layer as a mask, etching the first wafer between the sidewall protection areas to form the cavity;

[0018] cleaning the cavity;

[0019] forming the porous silicon layer at the bottom of the cavity by an electrochemical etching process;

[0020] The protective layer is removed.

[0021] Exemplarily, forming a sidewall protection zone on an upper portion of the first wafer includes:

[0022] forming a patterned first mask layer on the upper surface of the first wafer;

[0023] Performing N-type ion implantation on the first wafer using the first mask layer as a mask;

[0024] The first mask layer is removed and the ion implantation area is annealed to form an N-type well region in the upper region of the first wafer, wherein the N-type well region is the sidewall protection area.

[0025] Exemplarily, the protective layer includes a silicon dioxide layer located on the upper surface of the first wafer and a silicon nitride layer located on a side of the silicon dioxide layer away from the first wafer; or,

[0026] The protection layer includes a silicon dioxide layer located on the upper surface of the first wafer and a polysilicon layer located on a side of the silicon dioxide layer away from the first wafer.

[0027] Exemplarily, the thickness of the porous silicon layer is 0.1 μm-30 μm.

[0028] Exemplarily, the etch stop layer is a silicon dioxide layer; the thickness of the etch stop layer is 0.1 μm-2 μm.

[0029] Exemplarily, forming a groove in the second wafer that penetrates the second wafer and removing the etch stop layer between the cavity and the second wafer includes:

[0030] forming a patterned second mask layer on a side of the second wafer away from the first wafer and a side of the first bonding metal layer away from the boss;

[0031] Etching the second wafer using the second mask layer as a mask to form the groove penetrating the second wafer;

[0032] The etch stop layer between the cavity and the second wafer is removed.

[0033] Exemplarily, before bonding the second bonding metal layer and the first bonding metal layer, the preparation method further includes:

[0034] The first wafer is baked to exhaust gas in the porous silicon layer.

[0035] According to a second aspect of the present invention, a MEMS device is provided. The MEMS device is manufactured by the manufacturing method described above.

[0036] According to the preparation method of the MEMS device of the present invention, a porous silicon layer is formed at the bottom of the first chamber, and when a vacuum chamber is subsequently formed, the first chamber is used as a part of the vacuum chamber. The gas adsorption effect of the porous silicon can be utilized to effectively absorb the gas released in the vacuum chamber, thereby avoiding the reduction of the vacuum degree in the vacuum chamber and improving the quality factor of the MEMS device. In addition, the porous silicon does not need high-temperature activation, which can effectively avoid the negative effects of high-temperature activation. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The following drawings of the present application are hereby used as part of the present application for understanding the present application. The drawings show the embodiments of the present application and their descriptions, and are used to explain the device and principle of the present application. In the drawings,

[0038] Figure 1 The figure is a flow chart of the steps of a method for preparing a MEMS device according to an embodiment of the present application.

[0039] Figure 2-Figure 16 It is a schematic cross-sectional structure diagram corresponding to each step of a method for preparing a MEMS device according to an embodiment of the present application.

[0040] Description of reference numerals:

[0041] 100-first wafer, 110-sidewall protection area, 120-cavity, 130-porous silicon layer, 210-first mask layer, 220-protective layer, 221-silicon dioxide layer, 222-silicon nitride layer, 230-photoresist layer, 300-second wafer, 310-boss, 320-groove, 330-comb tooth structure, 400-etching stop layer, 500-first bonding metal layer, 600-third wafer, 700-second bonding metal layer, 800-vacuum chamber. DETAILED DESCRIPTION

[0042] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present application. However, it is obvious to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features well known in the art are not described.

[0043] It should be understood that the present application can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present application to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0044] It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0045] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used herein for convenience of description to describe the relationship of one element or feature to other elements or features shown in the figures. It should be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation shown in the figures.

[0046] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0047] Embodiments of the invention are described herein with reference to cross-sectional views as schematic diagrams of ideal embodiments (and intermediate structures) of the present application. Thus, variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the present application should not be limited to the specific shapes shown herein, but include shape deviations due to, for example, manufacturing. Therefore, what is shown in the figures is schematic in nature, and their shapes are not intended to display the actual shape of the device and are not intended to limit the scope of the present application.

[0048] Refer to the attached Figure 1 The preparation method of a MEMS device according to an embodiment of the present application is exemplarily described. The preparation method comprises the following steps:

[0049] S100: providing a first wafer, forming a cavity on an upper portion of the first wafer, and forming a porous silicon layer at a bottom of the cavity.

[0050] S200: providing a second wafer having an etch stop layer on its surface, and bonding the upper side of the first wafer to the etch stop layer.

[0051] S300: forming a boss and a first bonding metal layer on the boss on a side of the second wafer away from the first wafer.

[0052] S400: forming a groove penetrating the second wafer in the second wafer, and removing the etching stop layer between the cavity and the second wafer to form a suspended comb-tooth structure. Exemplarily, the comb-tooth structure may be a comb-tooth electrode.

[0053] S500: providing a third wafer having a second bonding metal layer on its surface, and bonding the second bonding metal layer and the first bonding metal layer to form a vacuum chamber, wherein the cavity is a part of the vacuum chamber, and the comb-tooth structure is located in the vacuum chamber.

[0054] According to the preparation method of the MEMS device of the present invention, a porous silicon layer is formed at the bottom of the first chamber, and when a vacuum chamber is subsequently formed, the first chamber is used as a part of the vacuum chamber. The gas adsorption effect of the porous silicon can be utilized to effectively absorb the gas released in the vacuum chamber, thereby avoiding the reduction of the vacuum degree in the vacuum chamber and improving the quality factor of the MEMS device. In addition, the porous silicon does not need high-temperature activation, which can effectively avoid the negative effects of high-temperature activation.

[0055] Please refer to the attached Figure 2 -Attached Fig.16 A method for preparing a MEMS device according to an embodiment of the present application is described in detail. The MEMS device is prepared through the above steps S100 - S500 .

[0056] In step S100, first, see the attached Figure 2 , providing a first wafer 100. The first wafer 100 is a silicon wafer. Exemplarily, the first wafer 100 is a P-crystalline phase <100> The first wafer 100 may also be other wafers on which porous silicon can be formed by an electrochemical etching process (or other porous silicon forming processes known to those skilled in the art).

[0057] Then, a sidewall protection layer 110 is formed on an upper portion of the first wafer 100 .

[0058] Specifically, see Appendix Figure 3 , a patterned first mask layer 210 is formed on the upper surface of the first wafer 100, and the first mask layer 210 is used as a mask to perform N-type ion implantation on the first wafer 100. Specifically, the first mask layer 210 can be a photoresist layer, and the first mask layer 210 can be patterned through photolithography process steps such as pre-baking, exposure, post-baking, development, and hardening. The patterned first mask layer 210 exposes a portion of the upper surface of the first wafer 100. Thereafter, the patterned first mask layer 210 can be used as a mask to perform N-type ion implantation on the first wafer 100 through an ion implantation process. Exemplarily, the N-type ions can be phosphorus ions, arsenic ions, etc. Then, refer to the attached Figure 4 , remove the first mask layer 210 and anneal the ion implantation area to form an N-type well area in the upper area of ​​the first wafer 100. Specifically, the first mask layer 210 can be removed by chemical solution or ion bombardment, and the ion implantation area can be annealed to activate the implanted ions, deepen the implantation depth, and repair the damaged lattice. The formed N-type well area is the sidewall protection area 110. The sidewall protection area 110 is used to not participate in the reaction in the subsequent electrochemical etching process, so as to avoid the formation of porous silicon on the sidewall of the cavity 120 in the electrochemical etching process, and ensure the structural strength of the subsequently formed MEMS device.

[0059] In some other embodiments, in step S100, a patterned first mask layer 210 may be first formed on the upper surface of the first wafer 100, and then the first wafer 100 may be etched using the first mask layer 210 as a mask to form a groove, and then the first mask layer 210 may be removed to form a sidewall protection layer 110 in the groove. The sidewall protection layer 110 may be formed by a deposition process, and the material of the sidewall protection layer 110 may be a substance that is not easily reactive in an electrochemical etching process.

[0060] Thereafter, a cavity 120 is formed between the sidewall protection areas 110 , and a porous silicon layer 130 is formed at the bottom of the cavity 120 .

[0061] Specifically, first, a patterned protection layer 220 is formed on the upper surface of the first wafer 100. Figure 5 , a protective layer 220 may be formed on the upper surface of the first wafer 100 by a CVD (chemical vapor deposition) process or other suitable deposition process, and a photoresist layer 230 may be formed on the protective layer 220 (i.e., the side of the protective layer 220 away from the first wafer 100) by a spin coating process and the photoresist layer 230 may be patterned. In this embodiment, the protective layer 220 includes a silicon dioxide layer 221 located on the upper surface of the first wafer 100 and a silicon nitride layer 222 located on the side of the silicon dioxide layer 221 away from the first wafer 100. In some other embodiments, the protective layer 220 may include a silicon dioxide layer 221 located on the upper surface of the first wafer 100 and a polysilicon layer located on the side of the silicon dioxide layer 221 away from the first wafer 100. The protective layer 220 is a composite layer of a silicon dioxide layer 221 and a silicon nitride layer 222 (or polysilicon) because the electrolyte solution in the subsequent electrochemical etching process contains HF (hydrofluoric acid). The rate at which HF corrodes silicon dioxide is relatively fast, and the silicon nitride layer 222 (or polysilicon layer) formed on the silicon dioxide layer 221 can resist HF corrosion. And because of the presence of the silicon dioxide layer 221, the protective layer 220 is also easy to remove, for example, by a wet etching process and / or a CMP (chemical mechanical polishing) process. Exemplarily, the thickness of the protective layer 220 can be 0.5μm-2μm. Afterwards, see the attached Figure 6 The protective layer 220 is etched using the patterned photoresist layer 230 as a mask to form a patterned protective layer 220 , and the photoresist layer 230 is removed after the protective layer 220 is patterned. The patterned protective layer 220 exposes the upper surface of the first wafer 100 between the sidewall protection areas 110 .

[0062] Then, see Appendix Figure 7, the first wafer 100 between the sidewall protection areas 110 is etched using the patterned protective layer 220 as a mask to form a cavity 120. It should be noted that the first wafer 100 between the sidewall protection areas 110 mentioned here may refer to the first wafer 100 in the area enclosed by the sidewall protection areas 110. Afterwards, the cavity 120 is cleaned to remove the reaction byproducts remaining after etching on the surface of the cavity 120. These reaction byproducts may affect the formation of porous silicon and need to be removed cleanly. They can be removed by both dry cleaning and wet cleaning.

[0063] Then, see Appendix Figure 8 , a porous silicon layer 130 is formed at the bottom of the cavity 120 by an electrochemical etching process. Specifically, the first wafer 100 with a protective layer 220 formed on the surface can be placed in an HF / ethanol electrolyte solution for double-tank electrochemical etching to form a porous silicon layer 130 with uniform pore size at the bottom of the cavity 120. Exemplarily, the thickness of the porous silicon layer 130 can be 0.1μm-30μm. Since the main participants in the reaction in the electrochemical etching process are holes, the electron concentration in the sidewall protection area 110 (i.e., the N-type well area) is much greater than the hole concentration, and the main carrier is electrons, which is difficult to undergo electrochemical reactions. Therefore, it will not be corroded and damaged in the electrochemical etching process. In some other embodiments, the porous silicon layer 130 can also be formed at the bottom of the cavity 120 by single-tank electrochemical etching or other electrochemical etching processes known to those skilled in the art. The porous silicon layer 130 has a large specific surface area, good gas adsorption, and does not require high-temperature activation.

[0064] Then, see Appendix Fig. 9 , remove the protective layer 220. Specifically, a chemical solution such as HF can be used to remove the protective layer 220 on the upper surface of the first wafer 100 to achieve the purpose of cleaning the upper surface of the first wafer 100 for bonding on the upper surface of the first wafer 100 in subsequent steps.

[0065] In step S200, first, see the attached Fig.10 , providing a second wafer 300 having an etch stop layer 400 on its surface. In the present embodiment, the second wafer 300 is a silicon wafer, the etch stop layer 400 is a silicon dioxide layer, and the etch stop layer 400 is formed on two opposite sides of the second wafer 300 by a thermal oxidation process. The etch stop layer 400 formed on both sides of the second wafer 300 helps balance stress and facilitates the subsequent bonding of the etch stop layer 400 to the first wafer 100. Exemplarily, the thickness of the etch stop layer 400 can be 0.1 μm-2 μm.

[0066] Then, see Appendix Fig.11, bonding the upper side of the first wafer 100 (i.e., the upper surface of the first wafer 100, i.e., the surface on the side where the cavity 120 is located) and the etch stop layer 400 (the etch stop layer 400 on the side of the second wafer 300). Exemplarily, the bonded etch stop layer 400 can seal the cavity 120. The etch stop layer 400 is used to protect the porous silicon at the bottom of the cavity 120 in the subsequent etching process to prevent it from being damaged. In some embodiments, before bonding the upper side of the first wafer 100 and the etch stop layer 400, the etch stop layer 400 on the side of the second wafer 300 can be patterned first, and then the upper side of the first wafer 100 and the patterned etch stop layer 400 are bonded. It should be noted that the patterned etch stop layer 400 may not seal the cavity 120.

[0067] In step S300, see the attached Fig.12 , the etching stop layer 400 on the side of the second wafer 300 away from the first wafer 100 (the etching stop layer 400 not involved in bonding) can be removed first, and then the side of the second wafer 300 away from the first wafer 100 can be thinned, and then a bonding metal layer can be formed on the side of the second wafer 300 away from the first wafer 100 by a deposition process such as a sputtering process, and a patterned mask layer can be formed on the side of the bonding metal layer away from the second wafer 300, and then the first bonding metal layer and the second wafer 300 are etched using the mask layer as a mask to form a boss 310 on the side of the second wafer 300 away from the first wafer 100 and a first bonding metal layer 500 located on the boss 310. Then, the mask layer is removed.

[0068] In step S400, first, a patterned second mask layer (not shown in the figure) is formed on a side of the second wafer 300 away from the first wafer 100 and a side of the first bonding metal layer 500 away from the boss 310, and the patterned second mask layer exposes a portion of the surface of the second wafer 300 on a side of the etch stop layer 400 away from the cavity 120. Exemplarily, the second mask layer may be a photoresist layer.

[0069] Then, see Appendix Fig.13, the second wafer 300 is etched using the second mask layer as a mask to form a groove 320 that penetrates the second wafer 300. The bottom of the groove 320 exposes the etch stop layer 400, that is, the groove 320 is formed on the etch stop layer 400. Exemplarily, the second wafer 300 can be etched by a dry etching process. The presence of the etch stop layer 400 can effectively protect the porous silicon layer 130 at the bottom of the cavity 120 to prevent it from being damaged during the etching process, and can effectively prevent impurities from entering the cavity 120. The groove 320 is used to form a comb tooth structure 330 in the second wafer 300, and the comb tooth structure 330 includes comb tooth-shaped protrusions spaced by the groove 320. Exemplarily, the comb tooth structure 330 can be a comb tooth electrode.

[0070] Then, see Appendix Fig.14 , remove the etch stop layer 400 between the cavity 120 and the second wafer 300. Exemplarily, the etch stop layer 400 between the cavity 120 and the second wafer 300, that is, the etch stop layer 400 below the comb structure 330 and the groove 320 (toward the side of the cavity 120), can be removed by HF gas to form a suspended comb structure 330, that is, to make the comb structure 330 a movable structure. At this time, the groove 320 is connected to the cavity 120, and the comb structure 330 is located above the cavity 120.

[0071] In step S500, first, see the attached Fig.15 , providing a third wafer 600 having a patterned second bonding metal layer 700 on the surface. The second bonding metal layer 700 can be formed on the surface of the third wafer 600 by a deposition process such as a sputtering process. The patterned second bonding metal layer 700 corresponds to the position of the first bonding metal layer 500. Exemplarily, the third wafer 600 also has an interconnection layer inside, and the second bonding metal layer 700 is connected to the interconnection layer. Exemplarily, the material of the first bonding metal layer 500 and the second bonding metal layer 700 can be one of aluminum and germanium respectively.

[0072] Then, see Appendix Fig.16, bonding the second bonding metal layer 700 and the first bonding metal layer 500 to form a vacuum chamber 800. Specifically, the second bonding metal layer 700 and the first bonding metal layer 500 can be aligned first, and then the second bonding metal layer 700 and the first bonding metal layer 500 can be bonded by a method such as hot pressing to form a vacuum chamber 800 between the first wafer 100, the second wafer 300 (including the etching stop layer 400 and the first bonding metal layer 500) and the third wafer 600 (including the second bonding metal layer 700). The cavity 120 is a part of the vacuum chamber 800, and the suspended comb structure 330 is located in the vacuum chamber 800. The porous silicon layer 130 at the bottom of the cavity 120 can effectively absorb the gas released in the vacuum chamber 800 after bonding, and avoid the vacuum degree of the vacuum chamber 800 from decreasing, thereby effectively avoiding the influence of the vacuum degree decrease on the movement of the comb structure 330, and improving the quality factor of the MEMS device. Furthermore, the porous silicon layer 130 does not need to be activated at high temperature, which can effectively avoid the damage to the bonding strength caused by high temperature activation and can effectively reduce the production cycle of the MEMS device.

[0073] Exemplarily, before bonding the second bonding metal layer 700 and the first bonding metal layer 500, the first wafer 100 can be baked to discharge the gas in the porous silicon layer 130, so that the porous silicon layer 130 can more effectively absorb the gas released in the vacuum chamber 800 after bonding. Specifically, after aligning the second bonding metal layer 700 and the first bonding metal layer 500, the first wafer 100, the second wafer 300 (including the etching stop layer 400 and the first bonding metal layer 500) and the third wafer 600 (including the second bonding metal layer 700) can be baked as a whole, and the baking temperature can be around 100°C, and vacuum is drawn while baking to discharge the gas in the porous silicon layer 130 and the gas in the bonding area, so that the bonding area forms a vacuum environment. Afterwards, the second bonding metal layer 700 and the first bonding metal layer 500 are bonded by a method such as hot pressing to form a vacuum chamber 800.

[0074] So far, the introduction of the relevant steps of the method for preparing the MEMS device of the embodiment of the present application has been completed. After the above steps, other conventional steps for making the MEMS device may also be included, which will not be repeated here. In addition, in addition to the above steps, the preparation method of this embodiment may also include other steps in the above steps or between different steps, and these steps can be implemented by various processes in the prior art, which will not be repeated here.

[0075] The present application also provides a MEMS device, which is prepared by the preparation method described above. Exemplarily, the MEMS device can be a gyroscope MEMS sensor. In some embodiments, the MEMS device can also be a MEMS angular velocity meter, a MEMS accelerometer, a MEMS flow meter, etc., which has a vacuum chamber and a movable comb structure in the vacuum chamber.

[0076] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present application to this. Those of ordinary skill in the art may make various changes and modifications therein without departing from the scope and spirit of the present application. All these changes and modifications are intended to be included within the scope of the present application as required by the appended claims.

[0077] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0078] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0079] Similarly, it should be understood that in order to streamline the present application and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present application should not be interpreted as reflecting the following intention: the claimed application requires more features than the features clearly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with features less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby explicitly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present application.

[0080] It will be understood by those skilled in the art that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0081] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0082] It should be noted that the above-mentioned embodiments illustrate rather than limit the invention and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims.

Claims

1. A method for preparing a MEMS device, characterized in that: include: Providing a first wafer, forming a cavity on an upper portion of the first wafer, and forming a porous silicon layer at a bottom of the cavity; Providing a second wafer having an etch stop layer on its surface, and bonding the upper side of the first wafer to the etch stop layer; forming a boss and a first bonding metal layer on the boss on a side of the second wafer away from the first wafer; forming a groove penetrating the second wafer in the second wafer, and removing the etch stop layer between the cavity and the second wafer to form a suspended comb structure; A third wafer having a second bonding metal layer on its surface is provided, and the second bonding metal layer and the first bonding metal layer are bonded to form a vacuum chamber, wherein the cavity is a part of the vacuum chamber, and the comb-tooth structure is located in the vacuum chamber.

2. The preparation method according to claim 1, characterized in that: The step of forming a cavity on the upper portion of the first wafer and forming a porous silicon layer on the bottom of the cavity comprises: forming a sidewall protection zone on an upper portion of the first wafer; The cavity is formed between the sidewall protection zones, and a porous silicon layer is formed at the bottom of the cavity.

3. The preparation method according to claim 2, characterized in that: A cavity is formed between the sidewall protection zones, and a porous silicon layer is formed at the bottom of the cavity, comprising: forming a patterned protective layer on the upper surface of the first wafer; Using the protection layer as a mask, etching the first wafer between the sidewall protection areas to form the cavity; cleaning the cavity; forming the porous silicon layer at the bottom of the cavity by an electrochemical etching process; The protective layer is removed.

4. The preparation method according to claim 3, characterized in that: The forming of a sidewall protection zone on the upper portion of the first wafer comprises: forming a patterned first mask layer on the upper surface of the first wafer; Performing N-type ion implantation on the first wafer using the first mask layer as a mask; The first mask layer is removed and the ion implantation area is annealed to form an N-type well region in the upper region of the first wafer, wherein the N-type well region is the sidewall protection area.

5. The preparation method according to claim 3 or 4, characterized in that: The protective layer includes a silicon dioxide layer located on the upper surface of the first wafer and a silicon nitride layer located on a side of the silicon dioxide layer away from the first wafer; or, The protection layer includes a silicon dioxide layer located on the upper surface of the first wafer and a polysilicon layer located on a side of the silicon dioxide layer away from the first wafer.

6. The preparation method according to claim 1, characterized in that: The thickness of the porous silicon layer is 0.1 μm-30 μm.

7. The preparation method according to claim 1, characterized in that: The etching stop layer is a silicon dioxide layer; The thickness of the etching stop layer is 0.1 μm-2 μm.

8. The preparation method according to claim 1, characterized in that: The forming a groove penetrating the second wafer in the second wafer and removing the etching stop layer between the cavity and the second wafer comprises: forming a patterned second mask layer on a side of the second wafer away from the first wafer and a side of the first bonding metal layer away from the boss; Etching the second wafer using the second mask layer as a mask to form the groove penetrating the second wafer; The etch stop layer between the cavity and the second wafer is removed.

9. The preparation method according to claim 1, characterized in that: Before bonding the second bonding metal layer to the first bonding metal layer, the preparation method further includes: The first wafer is baked to exhaust gas in the porous silicon layer.

10. A MEMS device, characterized in that: The MEMS device is prepared by the preparation method according to any one of claims 1 to 9.

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