Preparation method of low-roughness polycrystalline silicon carbide substrate and composite substrate
By opposing the polycrystalline silicon carbide substrate in a medium-high temperature and high pressure environment in graphite crucible, combined with mechanical polishing and rolling technology, the problem of high surface roughness of 3C silicon carbide substrate is solved, and a low-roughness polycrystalline silicon carbide liner is realized The preparation of the bottom meets the preparation requirements of the composite silicon carbide substrate and improves the quality of the bonding interface.
Patent Information
- Application Number
- CN202411294133.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-14
- Publication Date
- 2025-01-14
AI Technical Summary
The prior art is difficult to reduce the surface roughness of a 3C silicon carbide substrate to below 1 nm at low cost, meeting the preparation requirements of composite silicon carbide substrates, especially in polycrystalline SiC substrates grown by graphite substrates, due to different crystals. High roughness problems caused by inconsistent polishing rates in the particle direction.
Using a high temperature and high pressure environment in a graphite crucible, two polycrystalline silicon carbide substrates are parallel to each other at a distance of 1-2mm. The surface roughness is reduced in an approximately isothermal space through sublimation and condensation processes, combining mechanical polishing and The edge region is removed by rolling and a low-roughness polycrystalline silicon carbide substrate preparation with a surface roughness less than 1 nm.
The surface roughness of the polycrystalline silicon carbide substrate was successfully reduced to below 1 nm, and the preparation of a low-roughness polycrystalline silicon carbide substrate was achieved with good bonding quality, and bonding with a single crystal silicon carbide substrate as a supporting substrate. Interface quality is optimized and the cost is low.
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Abstract
Description
Technical Field
[0001] The present application relates to the technical field of semiconductor material processing, and in particular to a method for preparing a low-roughness polycrystalline silicon carbide substrate and a composite substrate. Background Art
[0002] Silicon carbide materials have the advantages of high temperature resistance, high pressure resistance, radiation resistance, chemical corrosion resistance, high hardness, and high thermal conductivity. Substrates made of 3C silicon carbide materials can be used to make heating plates, focusing rings, guard rings and other parts in semiconductor processes.
[0003] Since 3C silicon carbide substrates have lower production costs than 4H silicon carbide substrates, recently, thicker 3C silicon carbide substrates have been used as support layers and composited with thinner 4H silicon carbide substrates to form composite silicon carbide substrates with lower costs than substrates containing only 4H silicon carbide. The composite silicon carbide substrate is made into devices such as MOSFET after undergoing steps such as epitaxy, etching, ion implantation, and packaging. Compared with silicon carbide substrates for other purposes, this type of 3C-SiC substrate requires lower surface roughness to meet the preparation requirements of composite silicon carbide substrates.
[0004] Chemical vapor deposition (CVD) is a common method for manufacturing 3C silicon carbide substrates. The main process is that the gaseous substances containing Si and C undergo chemical reactions on the surface of the substrate to form solid 3C silicon carbide, which grows on the surface of the substrate. As time goes on, a 3C silicon carbide substrate of a certain thickness is formed on the substrate. The substrate is peeled off by grinding or chemical reaction to form a single material 3C silicon carbide substrate.
[0005] 3C silicon carbide formed by CVD method generally presents a polycrystalline structure. The reason is that the substrate used to grow 3C-SiC polycrystals is a graphite plate, and the surface of the graphite plate presents various crystal directions, resulting in various grain orientations of SiC polycrystals grown on the graphite plate. During the chemical mechanical polishing process, the 3C-SiC substrate with a polycrystalline structure has a roughness of more than 10nm due to the inconsistent polishing rates of grains in different directions. The 3C-SiC polycrystalline substrate used in the composite silicon carbide substrate requires a roughness of less than 1nm, making it difficult to apply the 3C-SiC polycrystalline substrate grown on a graphite substrate to the composite silicon carbide substrate. Summary of the invention
[0006] The purpose of the present invention is to provide a method for preparing a low-roughness polycrystalline silicon carbide substrate so that the surface roughness of the polycrystalline silicon carbide substrate reaches less than 1 nm, and the surface roughness of the polycrystalline silicon carbide substrate with this roughness can meet the bonding requirements. The polycrystalline silicon carbide substrate is used as a supporting substrate to bond with a single-crystal silicon carbide substrate, and the bonding quality is good and the cost is low.
[0007] To achieve this object, the present invention adopts the following technical solutions:
[0008] A method for preparing a low-roughness polycrystalline silicon carbide substrate comprises: preparing a polycrystalline silicon carbide substrate;
[0009] The polycrystalline silicon carbide substrate has a surface to be bonded and a back surface;
[0010] The surface to be bonded includes a useful area and an edge area;
[0011] Placing the two polycrystalline silicon carbide substrates in parallel in a closed chamber so that the surfaces to be bonded of the two polycrystalline silicon carbide substrates face each other and maintain a first distance;
[0012] Filling the sealed chamber with an inert gas to form gas pressure in the sealed chamber;
[0013] Raising the temperature of the sealed chamber to a first temperature, and maintaining the temperature at the first temperature until the surface roughness of the useful areas of the two polycrystalline silicon carbide substrates is less than 1 nm;
[0014] The edge region is removed to obtain two low-roughness polycrystalline silicon carbide substrates.
[0015] Preferably, the shape of the polycrystalline silicon carbide substrate is circular or square, and its crystal form can be 4H crystal form or 3C crystal form. Along the thickness direction of the silicon carbide substrate, the grain orientation can include various directions, such as 3C silicon carbide can include <111> , <100> , <110> etc. directions.
[0016] Preferably, the initial roughness of the surface to be bonded of the polycrystalline silicon carbide substrate is less than 30 nm. The initial roughness can be achieved by mechanical grinding. Reducing the initial roughness to less than 30 nm can reduce the insulation time in the technical solution of the present application, improve efficiency, and reduce energy consumption.
[0017] Preferably, the edge region is a region formed by extending the outer edge of the polycrystalline silicon carbide substrate inward by less than 5 mm.
[0018] Preferably, the edge area is removed by rolling.
[0019] Preferably, the two polycrystalline silicon carbide substrates are supported by graphite columns to maintain a first distance;
[0020] Preferably, the diameter of the graphite column is between 1-2 mm. If the diameter of the graphite column is too large, it will affect the surface roughness of the useful area adjacent to it, making the surface roughness of this area greater than that of other areas.
[0021] Preferably, the number of the graphite columns is 3, and the 3 graphite columns have the same height.
[0022] Preferably, the graphite pillars are supported on edge regions of two sheets of the polycrystalline silicon carbide substrates.
[0023] Preferably, the first distance is 1-2 mm. If the distance is too large, Si and C components in the approximately isothermal space formed by the two substrates will escape, forming Si and C concentration gradients in the radial direction, reducing the uniformity of the surface roughness distribution in the useful area.
[0024] Preferably, the sealed chamber is an inner cavity of a graphite crucible.
[0025] Preferably, the graphite crucible has an upper temperature measuring point and a lower temperature measuring point for measuring the temperature difference in the graphite crucible.
[0026] Preferably, the graphite crucible is wrapped with graphite felt to keep the graphite crucible warm.
[0027] Preferably, a heating device is provided outside the graphite crucible, and the heating device may be a resistance heater or an induction heater. The graphite crucible has good sealing performance, which can reduce the gas flow in the graphite crucible, thereby reducing the gas of carbon and silicon components escaping out of the approximately isothermal space formed by the two polycrystalline silicon carbide substrates.
[0028] Preferably, the first temperature is 1600-1800°C;
[0029] The temperature difference in the closed chamber during the insulation process is less than 1°C.
[0030] When the temperature difference in the closed chamber is less than 1°C, the temperature difference between the two polycrystalline silicon carbide substrates located in the closed chamber at a distance of 1-2 mm is much less than 1°C, and an approximately isothermal space is formed between the two polycrystalline silicon carbide substrates. If the temperature difference between the two polycrystalline silicon carbide substrates is too large, the sublimation rate of the surface of the polycrystalline silicon carbide substrate will be greater than the desublimation rate, the surface will be thinned, and some crystal planes will have a large thinning rate, resulting in an increase in the surface roughness of the polycrystalline silicon carbide substrate.
[0031] Preferably, the gas pressure is 1-10 mbar. Under this pressure and temperature condition, the sublimation and desublimation rates of polycrystalline silicon carbide in the approximately isothermal space are uniform, and the escape of Si and C is not significant.
[0032] Preferably, the insulation time is 1-10 hours.
[0033] An approximately isothermal space is formed between the two polycrystalline silicon carbide substrates. Under a certain temperature and pressure, sublimation and desublimation occur on the surfaces of the two opposite polycrystalline silicon carbide substrates. Since the two polycrystalline silicon carbide substrates are spaced relatively small, only a small amount of gaseous matter escapes from the side of the approximately isothermal space formed by the two polycrystalline silicon carbide substrates, and the polycrystalline silicon carbide substrate will not be significantly thinned. Compared with a flat surface with low roughness, the uneven surface of the polycrystalline silicon carbide substrate has more surface area. Under the driving force of reducing the surface energy, the polycrystalline silicon carbide tends to reduce the surface area during the repeated process of sublimation and desublimation, so that the Gibbs free energy of the system decreases, which promotes the reduction of the interface surface roughness. As a result, after a period of heat preservation, the surface roughness of the bonding surface of the polycrystalline silicon carbide substrate can be reduced to below 1nm.
[0034] Preferably, in the same sealed chamber, not only two polycrystalline silicon carbide substrates are placed, but the two polycrystalline silicon carbide substrates are taken as a unit, and multiple units can be placed in the same sealed chamber for simultaneous processing.
[0035] A composite substrate, comprising a support substrate and a material layer located on the support substrate;
[0036] The supporting substrate is a low-roughness polycrystalline silicon carbide substrate prepared by the above-mentioned preparation method.
[0037] Preferably, the material layer includes single crystal silicon carbide, lithium niobate, or lithium tantalate.
[0038] The method for preparing the composite substrate comprises: preparing a donor substrate;
[0039] pre-embedding a weakened layer in the donor substrate;
[0040] The weakened layer separates the donor substrate into a material layer and a residual substrate;
[0041] Bonding the material layer of the donor substrate to the support substrate to form a bonded body;
[0042] Stress is applied to the bonding body to cause the bonding body to break along the weakened layer, thereby obtaining a composite substrate and a residual substrate.
[0043] Beneficial effects of the present invention:
[0044] The present invention proposes a method for preparing a low-roughness polycrystalline silicon carbide substrate, wherein two polycrystalline silicon carbide substrates are placed in parallel in a graphite crucible at a spacing of 1-2 mm, and a heat preservation and pressure preservation environment is formed in the graphite crucible. During the heat preservation process, the temperature difference between the two polycrystalline silicon carbide substrates is less than 1°C, forming an approximately isothermal space. Under the driving force of reducing the surface energy, the surface areas of the two polycrystalline silicon carbide substrates to be bonded are reduced during the sublimation and desublimation process, and the surface roughness can be reduced to less than 1 nm after a certain period of heat preservation, thereby realizing the preparation of a low-roughness polycrystalline silicon carbide substrate. The prepared low-roughness polycrystalline silicon carbide substrate is used as a composite substrate prepared as a supporting substrate, and the bonding interface quality is good. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] Figure 1 It is a schematic diagram of the organizational structure of the polycrystalline silicon carbide substrate of the present invention;
[0046] Figure 2 It is a schematic diagram of the placement of the polycrystalline silicon carbide substrate of the present invention;
[0047] Figure 3 It is a schematic diagram of the polishing principle of a polycrystalline silicon carbide substrate of the present invention;
[0048] Figure 4 It is a schematic diagram of a polycrystalline silicon carbide substrate polishing device of the present invention;
[0049] Figure 5 This is a flow chart of preparing a composite substrate from a polycrystalline silicon carbide substrate of the present invention;
[0050] In the figure: 1. polycrystalline silicon carbide substrate; 2. graphite column; 3. lower temperature measuring point; 4. upper temperature measuring point; 5. graphite felt; 6. graphite crucible; 7. donor substrate; 71. weakened layer; 72. material layer; 73. residual substrate. DETAILED DESCRIPTION
[0051] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention.
[0052] See also Figure 1 Figure 3 The present invention provides a method for preparing a low-roughness polycrystalline silicon carbide substrate, which can reduce the surface roughness of the polycrystalline silicon carbide substrate to less than 1 nm. The polycrystalline silicon carbide substrate is round or square in shape, and its crystal form can be 4H crystal form or 3C crystal form. Along the thickness direction of the silicon carbide substrate, the grain orientation can include various directions, such as 3C silicon carbide can include <111> , <100> , <110> etc. directions.
[0053] See also Figure 4The method for preparing a low-roughness polycrystalline silicon carbide substrate in the embodiment of the present application is performed using a graphite crucible 6. The graphite crucible 6 includes an upper temperature measuring point 4 and a lower temperature measuring point 3, and the upper and lower temperature measuring points are used to measure the temperature difference in the graphite crucible 6. The graphite crucible 6 is wrapped with a graphite felt 5 for heat preservation of the graphite crucible 6.
[0054] Example 1
[0055] Two 3C polycrystalline silicon carbide substrates with a diameter of 150 mm and a thickness of 0.35 mm were prepared. The substrates had a bonding surface and a back surface, and the bonding surfaces of the two substrates were processed by mechanical polishing to a surface roughness of 25 nm.
[0056] See also Figure 2 , the surfaces of the two substrates to be bonded are placed opposite each other and placed in a graphite crucible 6 at a distance of 1 mm. The two substrates are supported by three graphite columns 2 with a diameter of 2 mm. Argon gas is introduced into the graphite crucible 6 to make the pressure in the graphite crucible reach 1 mbar. The graphite crucible is heated to 1800°C by induction heating. The temperature of the graphite crucible is monitored in real time by the upper temperature measuring point 4 and the lower temperature measuring point 3. By adjusting the position of the induction coil, the temperature difference between the upper temperature measuring point 4 and the lower temperature measuring point 3 is maintained at 0.8°C. Keep warm in this state for 3 hours. The substrate is cooled by cooling, and the edge area of the substrate is removed to obtain two low-roughness polycrystalline silicon carbide substrates. The surface roughness of the low-roughness polycrystalline silicon carbide substrate is 0.8nm as detected by atomic force microscopy.
[0057] Example 2
[0058] Two 3C polycrystalline silicon carbide substrates with a diameter of 150 mm and a thickness of 0.35 mm are prepared. The substrate has a bonding surface and a back surface, and the bonding surfaces of the two substrates are machined to a surface roughness of 25 nm by mechanical polishing. The bonding surfaces of the two substrates are opposite to each other and placed in a graphite crucible 6 at a spacing of 2 mm. The two substrates are supported by three graphite columns 2 with a diameter of 2 mm. Argon gas is introduced into the graphite crucible 6 to make the pressure in the graphite crucible reach 10 mbar. The graphite crucible is heated to 1600°C by induction heating. The temperature of the graphite crucible is monitored in real time by the upper temperature measuring point 4 and the lower temperature measuring point 3. By adjusting the position of the induction coil, the temperature difference between the upper temperature measuring point 4 and the lower temperature measuring point 3 is maintained at 0.8°C. Keep warm in this state for 10 hours. The substrate is cooled by cooling, and the edge area of the substrate is removed to obtain two low-roughness polycrystalline silicon carbide substrates. Detected by atomic force microscopy, the surface roughness of the low-roughness polycrystalline silicon carbide substrate is 0.6nm.
[0059] Comparative Example 1
[0060] Compared with Example 1, the difference is that the interval between the two polycrystalline silicon carbide substrates is 5 mm, and the other conditions remain unchanged. Since the interval between the two polycrystalline silicon carbide substrates is too large, the Si and C components escape, forming a concentration gradient in the radial direction of the approximately isothermal space, and the surface roughness is not effectively reduced. According to atomic force microscopy, the surface roughness of the polycrystalline silicon carbide substrate within the area 10 mm inward from the edge of the useful area is 20 nm.
[0061] Comparative Example 2
[0062] Compared with Example 1, the difference is that the gas pressure in the graphite crucible is 15 mbr, and the other conditions remain unchanged. The increase in gas pressure inhibits the sublimation and desublimation speed of the polycrystalline silicon carbide substrate. Under the same holding time, the polycrystalline silicon carbide substrate does not achieve the expected surface roughness. The surface roughness is 3 nm as measured by atomic force microscopy.
[0063] Comparative Example 3
[0064] Compared with Example 1, the difference is that the temperature of the graphite crucible is 2000°C, and the other conditions remain unchanged. The increase in temperature leads to an increase in the sublimation and desublimation rates, and the concentration of Si and C component gases in the approximately isothermal space is too high, resulting in the overflow of Si and C component gases, the thinning of the polycrystalline silicon carbide substrate, and a high surface roughness. The surface roughness is 18nm as measured by atomic force microscopy.
[0065] Composite substrate preparation example
[0066] The low-roughness polycrystalline silicon carbide substrate prepared in Example 1 was used as a supporting substrate, and a single-crystal silicon carbide substrate of the same size and thickness was used as a donor substrate.
[0067] See also Figure 5 , ion implantation is performed in the donor substrate 7, with an implantation depth of 1 μm, and a weakened layer 71 is formed in the donor substrate 7. The weakened layer 71 separates the donor substrate 7 into a material layer 72 and a residual substrate 73. The material layer 72 of the donor substrate 7 is bonded to the supporting substrate 1 to form a bonding body. The bonding body is heat-treated at 1000°C for 1.5 hours to break the bonding body along the weakened layer 71 to form a composite substrate and a residual substrate 73. The composite substrate is surface-treated and used as a product. The residual substrate can be reused after surface treatment. The obtained composite substrate is observed under a microscope, and the bonding interface between the material layer 72 and the supporting substrate 1 is flat, the number of bonding voids larger than 1 μm is 0, and the bonding quality is good.
[0068] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, various obvious changes, readjustments and substitutions can be made without departing from the protection scope of the present invention. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.
Claims
1. A method for preparing a low-roughness polycrystalline silicon carbide substrate, characterized in that: preparing a polycrystalline silicon carbide substrate; The polycrystalline silicon carbide substrate has a surface to be bonded and a back surface; The surface to be bonded includes a useful area and an edge area; Placing the two polycrystalline silicon carbide substrates in parallel in a closed chamber so that the surfaces to be bonded of the two polycrystalline silicon carbide substrates face each other and maintain a first distance; Filling the sealed chamber with an inert gas to form gas pressure in the sealed chamber; Raising the temperature of the sealed chamber to a first temperature, and maintaining the temperature at the first temperature until the surface roughness of the useful areas of the two polycrystalline silicon carbide substrates is less than 1 nm; The edge region is removed to obtain two low-roughness polycrystalline silicon carbide substrates.
2. The preparation method according to claim 1, characterized in that: The two polycrystalline silicon carbide substrates are supported by graphite columns to maintain a first distance; The graphite pillars are supported on edge regions of the two polycrystalline silicon carbide substrates.
3. The preparation method according to claim 1 or 2, characterized in that: The first distance is 1-2 mm.
4. The preparation method according to claim 1, characterized in that: The sealed chamber is the inner cavity of the graphite crucible.
5. The preparation method according to claim 1, characterized in that: The first temperature is 1600-1800° C.; The temperature difference in the closed chamber during the insulation process is less than 1°C.
6. The preparation method according to claim 1, characterized in that: The gas pressure is 1-10 mbar.
7. The preparation method according to claim 1, characterized in that: The insulation time is 1-10 hours.
8. A composite substrate, characterized in that: comprising a support substrate and a material layer located on the support substrate; The supporting substrate is a low-roughness polycrystalline silicon carbide substrate prepared by the preparation method described in any one of claims 1 to 7.
9. The composite substrate according to claim 8, characterized in that: The material layer includes single crystal silicon carbide, lithium niobate, and lithium tantalate.
10. The method for preparing a composite substrate according to claim 8 or 9, characterized in that: preparing a donor substrate; pre-embedding a weakened layer in the donor substrate; The weakened layer separates the donor substrate into a material layer and a residual substrate; Bonding the material layer of the donor substrate to the support substrate to form a bonded body; Stress is applied to the bonding body to cause the bonding body to break along the weakened layer, thereby obtaining a composite substrate and a residual substrate.