Low-cost terahertz high-order QAM signal direct modulation transmitter and method thereof

Abstract

The invention discloses a low-cost terahertz high-order QAM (Quadrature Amplitude Modulation) signal direct modulation transmitter and a method thereof. A frequency tripler is adopted at the last stage of a transmitter to migrate the frequency spectrums of two paths of QPSK modulation signals to a terahertz frequency band, then vector synthesis is carried out on the two paths of QPSK signals, and 16-QAM modulation signals are achieved. On one hand, due to the use of the frequency tripler, the power amplifier does not need to work in a terahertz frequency band, so that the requirement on the cut-off frequency of the transistor is reduced, and the processing cost is further reduced; the power amplifier works at a lower frequency band, so that the power amplifier has higher efficiency; and on the other hand, the high-order QAM modulation link is directly carried out in the radio frequency domain, so that the power consumption burden of the DAC part can be greatly reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of radio frequency integrated circuits, and relates to a terahertz transmitter architecture, and in particular to a low-cost terahertz high-order QAM signal direct modulation transmitter and a method thereof. Background Art

[0002] With the large-scale deployment of the fifth generation of mobile communications (5G), the world has gradually started research and exploration of the next generation of mobile communications (6G). Thanks to the massive spectrum resources in the terahertz frequency band, terahertz communication technology has become one of the key technologies of 6G. Terahertz communication technology can support data transmission rates of hundreds of Gbps; and the wavelength of the terahertz frequency band is shorter, which makes it easier to integrate the RF front-end circuit and the antenna, and realize an ultra-small on-chip integrated system (SoC). Therefore, terahertz communication technology has great application potential in short-distance, high-speed wireless communication scenarios such as wireless interconnection in data centers, wireless local area networks / wireless personal area networks, and inter-chip / on-chip communications. At the same time, the operating frequency of the terahertz frequency band has approached or even exceeded the characteristic frequency (f t ). In this frequency band, the gain and efficiency of transistors decrease sharply, and the energy efficiency of RF transmitters also deteriorates, which puts higher design requirements on the RF transmitter architecture.

[0003] Traditional transmitter architectures (such as zero intermediate frequency structure, superheterodyne architecture, etc.) often face the following challenges when applied to the terahertz frequency band: 1) The power amplifier needs to work directly in the terahertz frequency band, and the cutoff frequency of the transistor needs to be much greater than the operating frequency of the power amplifier. Therefore, it needs to be achieved with the help of expensive advanced process nodes or even compound process design; 2) The low efficiency of terahertz frequency band power amplifiers directly affects the overall power consumption and heat dissipation of the system; 3) The data rate of terahertz communication systems often reaches tens or even hundreds of Gbps. Such a high data rate places extremely high demands on the sampling rate and resolution of the digital-to-analog converter chip (DAC), and the high-speed and high-precision DAC consumes huge amounts of energy. Currently, there are DACs that have been reported to support a sampling rate of 100+ Gs / s, and their power consumption has exceeded 2.5W. Such high power consumption will bring about difficult energy efficiency control and heat dissipation design issues.

[0004] In view of the above applications and technical background, the present invention provides a low-cost terahertz high-order QAM (quadrature amplitude modulation) direct modulation transmitter architecture. The present invention uses a frequency tripler at the final stage of the transmitter to migrate the spectrum of two QPSK modulated signals to the terahertz frequency band, and then vector synthesizes the two QPSK (quadrature phase shift keying) signals to achieve 16-QAM modulated signals. On the one hand, due to the use of the frequency tripler, the power amplifier does not need to work in the terahertz frequency band, thereby reducing the requirements for the transistor cutoff frequency, thereby reducing the processing cost; and because the power amplifier works in a lower frequency band, it has higher efficiency; on the other hand, the high-order QAM modulation link is directly performed in the RF domain, which can greatly reduce the power consumption burden of the DAC part. Summary of the invention

[0005] The purpose of the present invention is to provide a low-cost terahertz high-order QAM direct modulation transmitter and method thereof in view of the deficiencies in the prior art. The architecture proposed in the present invention adopts a frequency tripler at the final stage, so the power amplifier only needs to work in a lower frequency band and only needs to amplify the envelope-balanced QPSK signal, thereby greatly improving the efficiency of the power amplifier part; and the transmitter architecture proposed in the present invention significantly reduces the performance requirements of the digital-to-analog conversion chip by directly performing high-order QAM modulation in the radio frequency domain, thereby reducing system energy consumption.

[0006] The technical solution of the present invention is as follows: In a first aspect, the present invention provides a low-cost terahertz high-order QAM direct modulation transmitter, comprising a first branch, a second branch, and a linear power synthesizer arranged in parallel; The first branch includes a phase control circuit, a first orthogonal modulator, a first power amplifier PA1 with adjustable gain, and a first frequency tripler which are connected in series in sequence; The second branch includes a second orthogonal modulator, a second power amplifier PA2, and a second tripler which are connected in series in sequence.

[0007] in: The phase control circuit is used to adjust the phase of the output signal of the first branch; The first orthogonal modulator is used to modulate the data bit D 0_I , D 0_Q , generating a QPSK signal, which is used as an input signal of the first power amplifier PA1; The second orthogonal modulator is used to modulate the data bit D 1_I , D 1_Q , generating another QPSK signal, which is used as an input signal of the second power amplifier PA2; The input end of the first power amplifier PA1 is connected to the first orthogonal modulator, and the output end is connected to the first triple frequency multiplier; the input end of the second power amplifier PA2 is connected to the second orthogonal modulator, and the output end is connected to the second triple frequency multiplier; The first and second triple frequency multipliers are used to migrate the spectrum of the QPSK signal to the terahertz frequency band; Preferably, the linear power synthesizer performs vector synthesis on the output signal of the first triple frequency multiplier and the output signal of the second triple frequency multiplier, and finally realizes a QAM high-order modulation signal.

[0008] Preferably, the output signal of the first triple frequency multiplier is recorded as Output 1, and the output signal of the second triple frequency multiplier is recorded as Output 2, both of which are QPSK signals with center frequencies in the terahertz frequency band; the amplitudes and phases of Output 1 and Output 2 are recorded as A1, A2 and Φ1, Φ2, respectively, and the conditions A1 = A2 / 2 and Φ1 = Φ2 are satisfied between them; Preferably, the first and second triple frequency multipliers are used to generate QPSK signals in the terahertz frequency band; Preferably, the phase control circuit is used to adjust the phase of the output signal Output 1 so that it satisfies Φ1= Φ2; the first power amplifier PA1 is used to adjust the amplitude of the output signal Output 2 so that it satisfies A1= A2 / 2.

[0009] In a second aspect, the present invention further provides a terahertz high-order QAM direct modulation method, comprising the following steps: The first branch consisting of the phase control circuit, the first orthogonal modulator, the first power amplifier PA1 with adjustable gain, and the first tripler connected in series in sequence is used to generate a terahertz QPSK signal with a symbol spacing of 2d, which is recorded as QPSK. 1_T ; The second branch consisting of the second orthogonal modulator, the second power amplifier PA2, and the second tripler connected in series generates a terahertz QPSK signal with a symbol spacing of 4d, which is recorded as QPSK. 2_T ; QPSK 2_T The signal is used to map the origin (0, 0) to four new origins located at (-2d, -2d), (-2d, +2d), (2d, -2d) and (2d, 2d), while QPSK 1_T It is responsible for generating four new random symbols around each new origin; The linear power synthesizer is used to convert QPSK 1_T With QPSK 2_TPerform vector synthesis to construct a 16-QAM modulated signal.

[0010] Preferably, the first triple frequency multiplier and the second triple frequency multiplier in the first branch and the second branch are specifically implemented as follows: Assume that the input signal at time t is V1(t), which is expressed as follows: (1) Where V I (t) and V Q (t) are the corresponding components of the real axis and imaginary axis of the input signal on the complex plane at time t, respectively, f c is the frequency of the input signal, Re represents the real part, and j represents V I (t) and V Q (t) has a phase difference of 90 degrees (i.e., orthogonal); The output signal is denoted as V2(t), which is expressed as follows: (2) (3) Where n is the frequency doubling number; For QPSK modulated signals, |V I (t)| = |V Q (t)|, so combining formula (2) and formula (3) we can get: (4) The following relationship can be obtained from formula (4): the QPSK signal constellation after odd-number frequency multiplication can be regarded as a multiple of 90° rotated counterclockwise around the origin, and the relative position of each symbol remains unchanged compared to before frequency multiplication; at the same time, the third harmonic is the highest-energy high-order harmonic under the differential circuit architecture.

[0011] The present invention has the following advantages and beneficial effects: (1) Due to the presence of the frequency tripler, the power amplifier under the architecture of the present invention only needs to work in a lower frequency band and does not need to work directly in the terahertz frequency band. Therefore, the transmitter architecture proposed in the present invention has lower requirements for the process cutoff frequency and can be processed using low-cost silicon-based processes, thereby reducing the manufacturing cost of the system; (2) The transmitter architecture proposed in the present invention implements high-order QAM modulation in the RF front-end, thereby significantly reducing the performance requirements of the digital-to-analog conversion chip and reducing the overall energy consumption of the terahertz communication system; (3) The input signal of the power amplifier under the architecture of the present invention is a QPSK signal with a balanced envelope, so the power amplifier can always operate in a saturated state to obtain the highest efficiency, thereby significantly reducing the power consumption of the RF front end; BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a schematic diagram of the structure of the present invention; Figure 2 The modulation principle of 16-QAM signal is realized based on two-way QPSK signal; Figure 3 (a) is the simulation result of the constellation diagram of the QPSK signal before passing through the tripler; Figure 3 (b) is the simulation result of the constellation diagram of the QPSK signal after the tripler; Figure 4 (a) is the simulation result of the output signal constellation diagram of the first branch of the architecture of the present invention; Figure 4 (b) is the simulation result of the output signal constellation diagram of the second branch of the architecture of the present invention; Figure 4 (c) is the simulation result of the output signal constellation diagram after linear power synthesis of the architecture of the present invention; Figure 5 (a) is a schematic diagram of a traditional transmitter architecture; Figure 5 (b) is a schematic diagram of a traditional transmitter architecture with a frequency tripler as the final stage; Figure 6 (a) is Figure 5 (a) 16-QAM signal constellation simulation results of the architecture; Figure 6 (b) is Figure 5 (b) Simulation results of the 16-QAM signal constellation diagram before and after the tripler. Markings in the figure: 1. Phase control circuit; 2. First orthogonal modulator; 3. Second orthogonal modulator; 4. First power amplifier; 5. Second power amplifier; 6. First tripler; 7. Second tripler; 8. Linear power synthesizer. DETAILED DESCRIPTION

[0013] The present invention will be further described below in conjunction with the accompanying drawings.

[0014] like Figure 1 As shown, the present invention provides a terahertz direct modulation transmitter architecture, including: a phase control circuit 1, a first orthogonal modulator 2 located in a first branch, a second orthogonal modulator 3 located in a second branch, a first power amplifier 4 with variable gain located in the first branch, a second power amplifier 5 located in the second branch, a first triple frequency multiplier 6 located in the first branch, a second triple frequency multiplier 7 located in the second branch, and a linear power synthesizer 8. The phase control circuit 1 is used to adjust the phase of the QPSK signal output by the first branch.

[0015] The connection relationship of each part of the system is as follows: the phase control circuit 1 is connected to the first orthogonal modulator 2; the output signal of the first orthogonal modulator 2 is used as the input signal of the first power amplifier 4 with variable gain; the output signal of the first power amplifier 4 with variable gain is used as the input signal of the first triple frequency multiplier 6; the phase control circuit 1, the first orthogonal modulator 2, the first power amplifier 4 with variable gain and the first triple frequency multiplier 6 together constitute the first branch, and the output signal of the first branch is represented as Output 1. The output signal of the second orthogonal modulator 3 is used as the input signal of the second power amplifier 5; the output signal of the second power amplifier 5 is used as the input signal of the second triple frequency multiplier 7; the second orthogonal modulator 3, the second power amplifier 5 with variable gain and the second triple frequency multiplier 7 together constitute the second branch, and the output signal of the second branch is represented as Output 2. Output 1 and Output 2 are vector-added by a linear power synthesizer 8 to finally obtain the output signal Output 3 of the transmitter.

[0016] Figure 2 The transmitter architecture of the present invention implements the principle of 16-QAM modulation in the RF domain. The 16-QAM constellation diagram can be regarded as four QPSK sub-constellations (symbol spacing is 2d) in the four quadrants of the IQ complex plane, and the origins of these sub-constellations constitute another QPSK constellation diagram with a symbol spacing of 4d. Therefore, the present invention constructs two QPSK signals (i.e., Output 1 and Output 2) with symbol spacings of 2d and 4d respectively in the RF domain, and then performs vector synthesis to construct a 16-QAM constellation. Among them, Output 2 is responsible for mapping the origin (0, 0) to four new origins located at (-2d, -2d), (-2d, +2d), (2d, -2d) and (2d, 2d), while Output 1 is responsible for generating four new random symbols around each new origin.

[0017] Figure 3 Middle (a) to Figure 3 (b) is a comparison of the QPSK signal constellation diagrams before and after the frequency tripler. Since the present invention generates two terahertz frequency band QPSK signals through a frequency tripler, it is necessary to verify the changes in the constellation diagram before and after the frequency tripler. The simulation results show that the constellation diagrams of the QPSK signal before and after the frequency tripler are basically the same, the only difference is that the error vector magnitude (EVM) of the constellation diagram after the frequency tripler is slightly deteriorated. The input signal of the frequency multiplier at time t is V1(t) (as shown in formula (1)), where V I (t) and V Q (t) are the corresponding components of the real axis and imaginary axis of the input signal on the complex plane at time t, respectively, f c is the frequency of the input signal:

[0018] (1) Where Re represents the real part, j represents V I (t) and V Q (t) has a phase difference of 90 degrees (i.e., orthogonal); The output signal of the frequency multiplier is V2(t), then the output signal can be expressed as (2), where n is the frequency multiplication number: (2) in: (3) For QPSK modulated signals, |V I (t)| = |V Q (t)|, so combining formula (2) and formula (3) we can get: (4) The following relationship can be obtained from formula (4): the QPSK signal constellation after odd-number frequency multiplication can be regarded as a multiple of 90° rotated counterclockwise from the origin, and the relative position of each symbol remains unchanged compared to before frequency multiplication; at the same time, the third harmonic is the highest-order harmonic with the strongest energy under the differential circuit architecture, so the tripler is preferably used to generate QPSK signals in the terahertz frequency band.

[0019] Figure 4 Middle (a) to Figure 4 (c) shows Figure 1 The constellation diagram simulation results of each signal node, namely Output 1, Output 2 and Output 3. The amplitude and phase of the signal at Output 1 and Output 2 are denoted as A1, A2 and Φ1, Φ2 respectively. The simulation results show that when the conditions A1 = A2 / 2 and Φ1 = Φ2 are satisfied between them, 16-QAM modulated signal can be directly realized in the RF domain through vector synthesis.

[0020] Figure 5 Middle (a) to Figure 5 (b) is a schematic diagram of a traditional transmitter and a traditional transmitter architecture with a tripler as the final stage. In the traditional architecture, signal modulation is generated in the baseband part, that is, the digital signal processor (DSP) processes the physical layer data into two digital signals, I and Q, respectively. in,I and D in,Q, the two digital signals are respectively used to generate two orthogonal signals through the DAC chip; then the modulated signal is generated through the orthogonal modulator and the linear power synthesizer, and the power amplifier is used to amplify and the carrier spectrum migration is realized by the tripler. When this traditional transmitter architecture is applied to the terahertz frequency band, it has the following disadvantages compared with the direct modulation terahertz transmitter architecture proposed in the present invention: 1) The signal modulation function is generated in the baseband part. When performing high-order QAM modulation, the high data rate puts forward extremely high requirements on the sampling rate and resolution of the DAC chip, and the high-speed and high-precision DAC consumes huge energy. At present, the power consumption of the DAC that supports a sampling rate of 100+ Gs / s has exceeded 2.5W, and the other digital circuits will bring about thorny energy efficiency and heat dissipation problems. 2) If a high-order QAM modulation scheme is adopted, the power amplifier under the traditional architecture will work in a power-backed state most of the time due to the limitation of the high peak-to-average power ratio of the QAM signal; at this time, the efficiency of the power amplifier will be greatly reduced compared to saturation, thereby causing the energy efficiency of the RF front-end circuit to be reduced. However, the present invention fundamentally solves the above problems from the perspective of the transmitter circuit architecture: 1) Due to the presence of the frequency tripler, the power amplifier under the architecture of the present invention only needs to work in a lower frequency band and does not need to work directly in the terahertz frequency band. Therefore, the transmitter architecture proposed by the present invention has low requirements for the process cutoff frequency and can be processed using low-cost silicon-based processes, thereby reducing the manufacturing cost of the system; 2) The transmitter architecture proposed by the present invention implements high-order QAM modulation in the RF front-end part, thereby significantly reducing the performance requirements for the digital-to-analog conversion chip and reducing the overall energy consumption of the terahertz communication system; 3) The input signal of the power amplifier under the architecture of the present invention is a QPSK signal with a balanced envelope, so the power amplifier can always work in a saturated state to obtain the highest efficiency, thereby significantly reducing the power consumption of the RF front-end;

[0021] Figure 6 Middle (a) to Figure 6 (b) describes Figure 5 Middle (a) to Figure 5 The transmitter architecture in (b) shows the 16-QAM signal constellation diagram before and after the frequency tripler. The simulation results show that the 16-QAM signal has severe signal distortion after the frequency tripler. Therefore, when using a high-order QAM modulation scheme, the power amplifier part in the traditional transmitter architecture must directly amplify the high-order QAM signal in the terahertz frequency band and cannot use the frequency doubling scheme, thereby increasing the requirements for the transistor cutoff frequency, which in turn greatly increases the cost. However, the input signal of the frequency tripler of the present invention is a QPSK signal, and then a 16-QAM modulated signal is realized through vector synthesis; therefore, the 16-QAM signal under the architecture of the present invention will not have distortion problems. Therefore, the transmitter architecture proposed by the present invention that uses a frequency tripler as the final circuit can reduce the requirements for the semiconductor process cutoff frequency, thereby reducing the manufacturing cost of the system.

[0022] The above is a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A low-cost terahertz high-order QAM direct modulation transmitter, characterized in that It includes a first branch, a second branch, and a linear power synthesizer which are arranged in parallel; The first branch includes a phase control circuit, a first orthogonal modulator, a first power amplifier with adjustable gain, and a first frequency tripler which are connected in series in sequence; The second branch includes a second orthogonal modulator, a second power amplifier, and a second tripler connected in series in sequence; in: The phase control circuit is used to adjust the phase of the output signal of the first branch; The first orthogonal modulator is used to modulate the data bit D 0_I , D 0_Q , generating a QPSK signal, which is used as an input signal of the first power amplifier; The second orthogonal modulator is used to modulate the data bit D 1_I , D 1_Q , generating another QPSK signal, which is used as an input signal of the second power amplifier; The first and second triple frequency multipliers are used to migrate the spectrum of the QPSK signals received by each to the terahertz frequency band; The linear power synthesizer performs vector synthesis on the output signal of the first triple frequency multiplier and the output signal of the second triple frequency multiplier, and finally realizes a QAM high-order modulation signal.

2. A low-cost terahertz high-order QAM direct modulation transmitter according to claim 1, characterized in that: The output signal of the first triple frequency multiplier is recorded as Output 1, and the output signal of the second triple frequency multiplier is recorded as Output 2. Both Output 1 and Output 2 are QPSK signals with center frequencies in the terahertz frequency band. The amplitudes and phases of Output 1 and Output 2 are recorded as A1, A2 and Φ1, Φ2, respectively, and the conditions A1 = A2 / 2 and Φ1 = Φ2 are satisfied between them.

3. A low-cost terahertz high-order QAM direct modulation transmitter according to claim 2, characterized in that: The phase control circuit is used to adjust the phase of the output signal Output 1 so that it satisfies Φ1 = Φ2; the first power amplifier PA1 is used to adjust the amplitude of the output signal Output 2 so that it satisfies A1 = A2 / 2.

4. A terahertz high-order QAM direct modulation method for a transmitter according to any one of claims 1 to 3, characterized in that: The following steps are involved: The first branch is used to generate a terahertz QPSK signal with a symbol spacing of 2d, denoted as QPSK 1_T ; The second branch is used to generate a terahertz QPSK signal with a symbol spacing of 4d, denoted as QPSK 2_T ; QPSK 2_T The signal is used to map the origin (0, 0) to four new origins, and QPSK 1_T It is responsible for generating four new random symbols around each new origin; the four new origins are located at (-2d, -2d), (-2d, +2d), (2d, -2d) and (2d, 2d); The linear power synthesizer is used to convert QPSK 1_T With QPSK 2_T Perform vector synthesis to construct a 16-QAM modulated signal.

5. The method according to claim 4, characterized in that: The specific implementation process of the first triple frequency multiplier and the second triple frequency multiplier in the first branch and the second branch is as follows: Assume that the input signal at time t is V1(t), which is expressed as follows: （1） Where V I (t) and V Q (t) are the corresponding components of the real axis and imaginary axis of the input signal on the complex plane at time t, respectively, f c is the frequency of the input signal, Re represents the real part, and j represents V I (t) and V Q (t) has a phase difference of 90 degrees; The output signal is denoted as V2(t), which is expressed as follows: （2） （3） Where n is the frequency doubling number; For QPSK modulated signals, |V I (t)| = |V Q (t)|, so combining formula (2) and formula (3) we can get: （4） The following relationship can be obtained from formula (4): the QPSK signal constellation after odd-number frequency multiplication can be regarded as a multiple of 90° rotated counterclockwise around the origin, and the relative position of each symbol remains unchanged compared to before frequency multiplication; at the same time, the third harmonic is the highest-energy high-order harmonic under the differential circuit architecture.

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