Insulated gate bipolar transistor (IGBT) preparation method and insulated gate bipolar transistor (IGBT)

By forming a multi-layer doped type implantation region and deposition of polysilicon on the IGBT substrate, the problem of large reverse recovery current and voltage difference in IGBT devices is solved, and a more uniform current and higher voltage withstand voltage are achieved.

CN119325245APending Publication Date: 2025-01-17WILL SEMICON (SHANGHAI) CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202310854410.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-07-12
Publication Date
2025-01-17

AI Technical Summary

Technical Problem

The existing IGBT devices have a large reverse recovery current and a long recovery time during reverse recovery, and have poor withstand voltage, mainly due to the offset of the injection area at the bottom of the contact hole and the threshold voltage at the bottom of the groove. and the problem of large current uniformity.

Method used

A multi-layer doped type implantation region is formed on the substrate, and polysilicon is deposited on the inner wall of the trench to form a large area of ​​third implantation region, and the bottom of the contact hole is filled with metal to ensure the accuracy and stability of the contact holes.

Benefits of technology

It improves the voltage withstandability of the IGBT, improves the uniformity of the threshold voltage and high current, and reduces the reverse recovery current and time.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119325245A_ABST
    Figure CN119325245A_ABST
Patent Text Reader

Abstract

According to the preparation method of the insulated gate bipolar transistor IGBT and the insulated gate bipolar transistor IGBT provided by the embodiment of the invention, polycrystalline silicon is only deposited on the inner wall of a groove, so that a third injection region with a second doping type can be formed in a substrate at a preset distance from the bottom of the groove, and the withstand voltage of the IGBT is further improved; meanwhile, the third injection region is formed in the second injection region with the first doping type, that is, the area of the third injection region is relatively large, and the third injection region is injected before the contact hole is opened, so that the situation that the contact hole has different sizes on two sides due to the fact that the opened region of the contact hole is relatively small and the third injection region is easy to shift in the photoetching process is avoided; and the uniformity of the threshold voltage and the large current is influenced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The embodiments of the present application belong to the field of semiconductor technology, and specifically relate to a method for preparing an insulated gate bipolar transistor (IGBT) and an insulated gate bipolar transistor (IGBT). Background Art

[0002] Insulated gate bipolar transistor (IGBT) is a device composed of MOS transistor and bipolar transistor, in which MOS transistor is the input pole and PNP transistor is the output pole. The gate-emitter voltage controls the on and off of the IGBT. When the gate-emitter voltage is greater than the threshold voltage Vth of the MOS, the current channel formed by the MOS provides the base current for the PNP transistor, making the IGBT device conductive. When the gate-emitter voltage is less than the threshold voltage Vth of the MOS, the internal channel of the MOS is turned off, the base current of the PNP transistor is cut off, and the IGBT device is turned off. When the IGBT device is turned off, the collector-emitter voltage is less than 0V, the parasitic body diode in the IGBT is in a forward bias state, and the reverse current flows from the emitter to the collector through the body diode. Due to the phenomenon of minority carrier injection in the current of the body diode, when the IGBT is turned on again and reversely recovers, a large reverse recovery current will be generated, and the reverse recovery time is long.

[0003] The injection area at the bottom of the contact hole of the existing IGBT is injected after the contact hole is opened. Since the contact hole opening area is relatively small, it is easy to shift during the photolithography process, which will make the two sides of the contact hole different in size, thus affecting the uniformity of the threshold voltage and large current. At the same time, there is no injection area at the bottom of the trench away from the existing IGBT, so the voltage resistance of the existing IGBT is poor. Summary of the invention

[0004] The purpose of the embodiments of the present application is to solve or alleviate the technical problems existing in the above-mentioned prior art. The present invention provides a method for preparing an insulated gate bipolar transistor IGBT and an insulated gate bipolar transistor IGBT.

[0005] The present invention provides a method for manufacturing an insulated gate bipolar transistor (IGBT), comprising:

[0006] forming a first implantation region having a first doping type on a substrate having a first doping type, and then forming a second implantation region in the first implantation region, wherein the doping concentration of the first implantation region is different from the doping concentration of the second implantation region;

[0007] Etching a plurality of grooves arranged at intervals on the substrate, wherein the grooves penetrate the second injection region and the first injection region from top to bottom until the bottoms of the grooves are arranged in the substrate;

[0008] sequentially growing a sacrificial oxide layer on the inner wall of the trench, removing the sacrificial oxide layer, and growing a gate oxide layer;

[0009] depositing polysilicon on inner walls of the trench;

[0010] forming a third implant region having a second doping type in the second implant region having the first doping type and in the substrate at a predetermined distance from the bottom of the trench;

[0011] forming a fourth implant region having a first doping type in the third implant region of the second implant region, wherein the doping concentrations of the third implant region and the fourth implant region are greater than the doping concentrations of the first implant region and the second implant region;

[0012] Depositing a dielectric layer on the substrate surface and in the trench;

[0013] etching a contact hole between the trenches until the bottom of the contact hole is disposed in a third implant region in the second implant region;

[0014] Fill the contact holes with metal.

[0015] As a preferred embodiment of the present application, the first doping type is N-type, and the second doping type is P-type.

[0016] As a preferred embodiment of the present application, the injection energy of the first injection zone is 60Kev~2MeV, the injection dose range is 5E12~5E13, the advancement temperature is 1100℃~1200℃, and the advancement time is 150~250 minutes; the injection energy of the second injection zone is 60Kev~100KeV, and the injection dose range is 8E14~5E15.

[0017] As a preferred embodiment of the present application, the width of the groove is 0.8um to 1.2um, and the depth is 4um to 6um.

[0018] As a preferred embodiment of the present application, the implantation energy of the third implantation zone is 60 KeV to 100 KeV, the implantation dose range is 1E13 to 1E14, the implantation temperature is 850° C. to 950° C., and the implantation time is 5 to 15 minutes.

[0019] As a preferred embodiment of the present application, the third implantation region having the second doping type is arranged at a distance of 0.5 um to 1 um from the bottom of the trench.

[0020] As a preferred embodiment of the present application, the injection energy of the fourth injection region is 80 KeV to 120 KeV, and the injection dose range is 5E14 to 5E15.

[0021] Compared with the prior art, the embodiment of the present application deposits polysilicon only on the inner wall of the trench, so that a third injection region with a second doping type is formed in the substrate at a preset distance from the bottom of the trench, thereby improving the withstand voltage of the IGBT; at the same time, a third injection region is formed in the second injection region with a first doping type, that is, the third injection region has a larger area, and the third injection region is injected before the contact hole is opened, so the contact hole will not be easily offset during the photolithography process due to the relatively small opening area of ​​the contact hole, which will cause the two sides of the contact hole to be different in size, affecting the uniformity of the threshold voltage and large current.

[0022] In a second aspect, an embodiment of the present application provides an insulated gate bipolar transistor IGBT, which is prepared by the preparation method described in the first aspect.

[0023] Compared with the prior art, the embodiment of the present application further provides an insulated gate bipolar transistor IGBT, and the beneficial effects are the same as the beneficial effects of the method for preparing the insulated gate bipolar transistor IGBT provided in the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of a process for preparing an insulated gate bipolar transistor IGBT provided in an embodiment of the present application;

[0025] Figure 2-Figure 9 A schematic diagram of the structure obtained by each step of a method for preparing an insulated gate bipolar transistor IGBT provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the technical solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0027] The present application provides a method for manufacturing an insulated gate bipolar transistor (IGBT), comprising:

[0028] Step S01, forming a first implantation region 02 having a first doping type on a substrate 03 having a first doping type, and then forming a second implantation region 01 in the first implantation region 02, wherein the doping concentration of the first implantation region 02 is different from the doping concentration of the second implantation region 01;

[0029] It should be noted that if Figure 1 and Figure 2As shown, a first implantation region 02 of a first doping type is first implanted on a single crystal silicon substrate 03, the implantation energy is 60Kev~2MeV, the implantation dose range is 5E12~5E13, the advancement temperature is 1100℃~1200℃, and the advancement time is 150~250 minutes, wherein the doping type of the first implantation region 02 is N-type, the doping type of the substrate 03 is also N-type, and the doping concentration of the substrate 03 is different from that of the first implantation region 02, mainly to form a concentration gradient. Then, a second implantation region 01 is formed in the first implantation region 02, the implantation energy of the second implantation region 01 is 60Kev~100KeV, and the implantation dose range is 8E14~5E15.

[0030] Step S02, etching a plurality of grooves arranged at intervals on the substrate 03;

[0031] It should be noted that if Figure 1 and Figure 3 After the first injection region 02 and the second injection region 01 are completed, grooves with a width of 0.8um to 1.2um and a depth of 4um to 6um are etched on the substrate 03, and the grooves penetrate the second injection region 01 and the first injection region 02 from top to bottom until the bottom of the grooves extends into the substrate 03; the depths of the multiple grooves are the same.

[0032] Step S03, sequentially growing a sacrificial oxide layer on the inner wall of the trench, removing the sacrificial oxide layer, and growing a gate oxide layer 05;

[0033] It should be noted that if Figure 1 and Figure 4 In order to make the inside of the trench more planar, a sacrificial oxide layer is grown inside the trench, then the sacrificial oxide layer is removed, and finally a gate oxide layer 05 is grown inside the trench.

[0034] Step S04, depositing polysilicon 06 on the inner wall of the trench;

[0035] It should be noted that if Figure 1 and Figure 5 As shown, polysilicon 06 is deposited inside the trench, and the deposition thickness of the polysilicon 06 is determined according to the trench width. The step of depositing the polysilicon 06 also includes etching back the polysilicon 06. In the embodiment of the present application, the polysilicon 06 is only deposited on the inner wall of the trench, that is, the trench is not fully deposited with polysilicon 06, so that it is convenient to form a third implantation region 07 having a second doping type in the substrate 03 at a preset distance from the bottom of the trench in the subsequent steps;

[0036] Step S05, forming a third implantation region 07 having a second doping type in the second implantation region 01 having a first doping type and in the substrate 03 at a preset distance from the bottom of the trench;

[0037] It should be noted that if Figure 1 and Figure 6 As shown, in order to solve the voltage resistance problem of the existing IGBT, it is necessary to form a third injection region 07 with a second doping type in the substrate 03 at a preset distance from the bottom of the groove; the doping concentration of the third injection region 07 is greater than the doping concentration of the second injection region 01 and the substrate 03, and the second doping type is P type, and the preset distance is 0.5um~1um.

[0038] Step S06, forming a fourth implantation region 08 having the first doping type in the third implantation region 07 in the second implantation region 01, wherein the doping concentrations of the third implantation region 07 and the fourth implantation region 08 are greater than the doping concentrations of the first implantation region 02 and the second implantation region 01;

[0039] It should be noted that if Figure 1 and Figure 7 As shown, the high-concentration fourth injection region 08 is formed mainly to facilitate the production of ohmic contacts. The high-concentration third injection region 07 is used to form the source region of the MOS tube. The fourth injection region 08 can reduce resistance and affect the single-pulse avalanche energy EAS.

[0040] Step S07, forming a dielectric layer 09 on the upper surface of the substrate 03;

[0041] Step S08, etching the surface of the substrate 03 to form a contact hole, until the bottom of the contact hole extends to the third injection region 07 in the second injection region 01;

[0042] It should be noted that if Figure 1 and Figure 8 As shown, a dielectric layer 09 is formed on the upper surface of the substrate 03. The dielectric layer 09 mainly plays an insulating role. The contact hole extends to the third injection region 07 in the second injection region 01. Because the third injection region 07 is of the second doping type, in the embodiment of the present application, the second doping type is P type, and the doping concentration is relatively large.

[0043] Step S09, as Figure 1 and Fig. 9 As shown, metal 11 is filled in the contact hole.

[0044] It should be noted that after the metal 11 is filled in the contact hole, the filled metal 11 may be copper metal, and at this time, the metal 11 may form an ohmic contact when in contact with the semiconductor, and the third injection region 07 has a relatively large cross-sectional area, and the high concentration P is relatively uniform, which improves the uniformity of the threshold voltage and the high current. A high-current IGBT that can improve the withstand voltage and improve the uniformity of the threshold voltage VTH is realized.

[0045] The embodiment of the present application deposits polysilicon only on the inner wall of the trench, so that a third injection region with the second doping type is formed in the substrate at a preset distance from the bottom of the trench, thereby improving the withstand voltage of the IGBT; at the same time, the third injection region is formed in the second injection region 01 with the first doping type, that is, the third injection region has a larger area, and the third injection region is injected before the contact hole is opened, so because the contact hole opening area is relatively small, it is not easy to shift during the photolithography process, which will make the two sides of the contact hole different in size, affecting the threshold voltage and the uniformity of the large current.

[0046] In a second aspect, an embodiment of the present application further provides a fast recovery diode, which is prepared by any preparation method described in the first aspect.

[0047] Compared with the prior art, the embodiment of the present application further provides a fast recovery diode having the same beneficial effects as the method for preparing the fast recovery diode described in the first aspect, which will not be described in detail here.

[0048] Although the present application has been described in detail herein with general descriptions and specific embodiments, it is obvious to those skilled in the art that some modifications or improvements may be made to the present application. Therefore, these modifications or improvements made without departing from the spirit of the present application are within the scope of protection claimed by the present application.

Claims

1. A method for preparing an insulated gate bipolar transistor IGBT, characterized in that: include: forming a first implantation region having a first doping type on a substrate having a first doping type, and then forming a second implantation region in the first implantation region, wherein the doping concentration of the first implantation region is different from the doping concentration of the second implantation region; Etching a plurality of grooves arranged at intervals on the substrate, wherein the grooves penetrate the second injection region and the first injection region from top to bottom until the bottoms of the grooves are arranged in the substrate; sequentially growing a sacrificial oxide layer on the inner wall of the trench, removing the sacrificial oxide layer, and growing a gate oxide layer; depositing polysilicon on inner walls of the trench; forming a third implant region having a second doping type in the second implant region having the first doping type and in the substrate at a predetermined distance from the bottom of the trench; forming a fourth implant region having a first doping type in the third implant region having the second implant region, wherein the doping concentrations of the third implant region and the fourth implant region are greater than the doping concentrations of the first implant region and the second implant region; Depositing a dielectric layer on the substrate surface and in the trench; etching a contact hole between the trenches until the bottom of the contact hole is disposed in a third implant region in the second implant region; Fill the contact holes with metal.

2. The method for preparing an insulated gate bipolar transistor (IGBT) according to claim 1, characterized in that: The first doping type is N-type, and the second doping type is P-type.

3. The method for preparing an insulated gate bipolar transistor (IGBT) according to claim 1, characterized in that: The injection energy of the first injection zone is 60Kev~2MeV, the injection dose range is 5E12~5E13, the advancement temperature is 1100℃~1200℃, and the advancement time is 150~250 minutes; the injection energy of the second injection zone is 60Kev~100KeV, and the injection dose range is 8E14~5E15.

4. The method for preparing an insulated gate bipolar transistor (IGBT) according to claim 1, characterized in that: The width of the groove is 0.8um~1.2um, and the depth is 4um~6um.

5. The method for preparing an insulated gate bipolar transistor (IGBT) according to claim 1, characterized in that: The implantation energy of the third implantation zone is 60 KeV to 100 KeV, the implantation dose range is 1E13 to 1E14, the implantation temperature is 850° C. to 950° C., and the implantation time is 5 to 15 minutes.

6. The method for preparing an insulated gate bipolar transistor (IGBT) according to claim 1, characterized in that: The third implantation region having the second doping type is arranged at a distance of 0.5 um to 1 um from the bottom of the trench.

7. The method for preparing an insulated gate bipolar transistor (IGBT) according to claim 1, characterized in that: The injection energy of the fourth injection zone is 80 KeV to 120 KeV, and the injection dose range is 5E14 to 5E15.

8. An insulated gate bipolar transistor IGBT, characterized in that: Prepared by the preparation method according to any one of claims 1 to 7.