One-time programmable memory cell and memory array

By setting the target area of ​​the conductive structure below the storage structure to open the circuit, data writing and reading of the OTP memory is realized, solving the problems of unstable state and low storage density of the OTP memory in the prior art, and improving the storage density and state stability sex.

CN119400226AActive Publication Date: 2025-02-07青岛海存微电子有限公司
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Patent Information

Application Number
CN202510000707.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-02
Publication Date
2025-02-07
Estimated Expiration
2045-01-02

AI Technical Summary

Technical Problem

Existing MRAM-based OTP memory is unstable after writing and requires additional reference bits to limit the memory density.

Method used

A programmable storage unit is designed to implement data writing and reading by setting a conductive structure below the storage structure, using the target area of ​​the conductive structure to open the circuit, without requiring additional reference units.

Benefits of technology

The storage density of the memory chip is improved and the storage state is fixed, and it is not affected by the environment or current after writing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a one-time programmable memory cell and a memory array, and relates to the technical field of integrated circuit design. Comprising a storage structure and a conductive structure arranged below the storage structure; the conductive structure is provided with a first end and a second end which are oppositely arranged, and a target area of the conductive structure is disconnected by applying a write-in voltage to a write-in path between any end of the conductive structure and the top of the storage structure, so that data write-in of the one-time programmable storage unit is realized; after the target area is disconnected, reading voltage is applied to the one-time programmable storage unit, and the current value of the first end and the current value of the second end are compared, so that read-in data are read. According to the one-time programmable storage unit, data reading can be carried out by comparing the current values of the first end and the second end of the conductive structure, the data reading can be realized without arranging an additional reference unit, and the storage density and the write-in stability of a storage chip where the one-time programmable storage unit is located can be improved.
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Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit design, and in particular to a one-time programmable storage unit and a storage array. Background Art

[0002] With the development of integrated circuit technology, One-Time Programmable (OTP) memory has become a key device for non-volatile storage. The basic principle of OTP memory is to achieve unchangeable permanent storage by writing data once. OTP memory mainly includes traditional eFuse (electronic fuse) OTP memory and MRAM (Magnetoresistive Random Access Memory)-based OTP memory.

[0003] The principle of traditional eFuse OTP memory is that during the write phase, a set of selection circuits (usually a decoder) is used to program a specific bit, and a high current flows through the metal wire at that location, permanently fusing it. After the fuse is blown, the resistance of the location becomes infinite, so that its logic state is fixed to an irreversible "off" state. eFuse OTP memory has the advantages of mature technology and easy implementation, but its reliability in high temperature environments is poor, it cannot be reprogrammed, the write current is large, and the manufacturing cost at advanced process nodes is also high, which further limits its application in next-generation technologies. MRAM is a non-volatile memory based on magnetic storage that can be used to implement OTP functions.

[0004] At present, after the magnetic tunnel junction of MRAM-based OTP devices, such as the OTP unit formed by STT-MRAM based on the STT (Spin-Transfer Torque) effect, is broken down, the unit is at risk of short circuit as the write current increases, so that the state of the OTP unit after writing is greatly affected by the external environment or the magnitude of the write current and cannot exist stably; and the OTP device requires a column of normal magnetic tunnel junction units as a reference bit to determine the write state of the OTP unit, which limits the storage density of the memory chip where the OTP unit is located. Summary of the invention

[0005] The present application provides a one-time programmable storage unit and a storage array, which are used to provide a technical solution that can both improve the storage density of a storage chip where the one-time programmable storage unit is located and improve the writing stability.

[0006] In a first aspect, the present application provides a one-time programmable memory cell, comprising a memory structure, and a conductive structure disposed below the memory structure;

[0007] The conductive structure has a first end and a second end that are arranged opposite to each other, and a write voltage is applied to a write path between any end of the conductive structure and the top of the storage structure so that a target area of ​​the conductive structure is disconnected to implement data writing of the one-time programmable storage cell;

[0008] After the target area is disconnected, a read voltage is applied to the one-time programmable memory cell and the current values ​​at the first end and the second end are compared to read the written data.

[0009] In an optional implementation, during the process of applying a write voltage to the write path, a write current is formed by the write voltage, and the target area is an area in the conductive structure through which the write current flows.

[0010] In an optional embodiment, a read voltage is simultaneously applied to a first read path between a top of the storage structure and a first end of the conductive structure, and to a second read path between a top of the storage structure and a second end of the conductive structure, so that a first current value is measured at the first end and a second current value is measured at the second end;

[0011] Wherein, when the first current value is greater than the second current value, the one-time programmable memory cell reads the first write data;

[0012] When the first current value is less than the second current value, the one-time programmable memory cell reads the second write data;

[0013] The first write data is different from the second write data.

[0014] In an optional embodiment, the storage structure includes a metal pillar or a short-circuited magnetic tunnel junction;

[0015] The short-circuited magnetic tunnel junction is a structure formed by applying a specific voltage to the magnetic tunnel junction to break down the barrier layer in the magnetic tunnel junction, thereby causing the magnetic tunnel junction to be short-circuited.

[0016] In an optional implementation, the storage structure is a magnetic tunnel junction after short-circuiting, and the conductive structure is a spin-orbit moment structure;

[0017] The thickness of the barrier layer in the magnetic tunnel junction meets a preset thickness so that the specific voltage is less than the off-circuit voltage of the target area.

[0018] In an optional implementation, the storage structure is a magnetic tunnel junction after short-circuit processing, and the conductive structure has a first region and a second region, the first region is a target region, and the second region is a region other than the target region;

[0019] The cross-sectional area of ​​the first region is smaller than the cross-sectional area of ​​the second region, so as to reduce the open-circuit voltage of the target region.

[0020] In an optional implementation, the one-time programmable memory cell further includes a first switch, an output end of the first switch being connected to an end of the conductive structure where the target region is located;

[0021] When writing data, the first switch is turned on, and a write voltage is applied to the write path through the first switch to disconnect the target area, so as to realize data writing of the one-time programmable memory cell;

[0022] After the target area is disconnected, the first switch is turned off, a read voltage is applied to the one-time programmable memory cell, and the current values ​​at the first end and the second end are compared to read the written data.

[0023] In an optional implementation, the one-time programmable memory cell further includes a second switch, and an output end of the second switch is connected to the top of the memory structure;

[0024] When writing data, the first switch is turned on, the second switch is turned on, and a write voltage is applied to the write path through the first switch and the second switch to disconnect the target area, so as to realize data writing of the one-time programmable memory cell;

[0025] After the target area is disconnected, the first switch is turned off and the second switch is turned on. A read voltage is applied to the one-time programmable memory cell through the second switch, and the current values ​​at the first end and the second end are compared to read the written data.

[0026] In a second aspect, an embodiment of the present application further provides a storage array, the storage array includes a one-time programmable storage cell area, the one-time programmable storage cell area includes a plurality of one-time programmable storage cells arranged in an array as in the first aspect;

[0027] By applying a write voltage to a write path between any end of the conductive structure corresponding to the one-time programmable memory cell and the top of the memory structure, a target area of ​​the conductive structure is disconnected to implement data writing of the corresponding one-time programmable memory cell;

[0028] After the target area is disconnected, a read voltage is applied to the corresponding one-time programmable memory cell, and the current values ​​at the first end and the second end are compared to read the data written in the corresponding one-time programmable memory cell.

[0029] In an optional implementation, the storage array is entirely composed of one-time programmable storage cells arranged in an array.

[0030] In the case of adopting the above technical solution, the one-time programmable storage cell provided by the present application includes a storage cell and a conductive structure arranged below the storage cell. When writing data, a write current is applied to the write path between any one of the first end and the second end of the conductive structure and the top of the storage structure, so that the target area of ​​the conductive structure is disconnected to achieve data writing of the one-time programmable storage cell. After that, a read voltage is applied to the storage cell, and data is read by comparing the current values ​​of the first end and the second end of the conductive structure. Based on this, the one-time programmable storage cell provided by the present application can read data by comparing the current values ​​of the first end and the second end of the conductive structure, and there is no need to set an additional reference unit in the storage chip to achieve data reading, so the storage density of the storage chip where the one-time programmable storage cell is located can be improved;

[0031] Furthermore, the one-time programmable storage unit in the present application realizes data writing based on disconnecting the target area of ​​the conductive structure, and the data writing is based on the change of its own structure, so the storage state of the one-time programmable storage unit is fixed, and the state is stable after the data is written, and is not affected by the environment, current, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0033] Figure 1 A schematic diagram of the structure of a one-time programmable storage unit provided in an embodiment of the present application;

[0034] Figure 2 A schematic diagram of the structure of another one-time programmable storage unit provided in an embodiment of the present application;

[0035] Figure 3 A schematic diagram of a data reading structure of a one-time programmable storage unit provided in an embodiment of the present application;

[0036] Figure 4 A schematic diagram of a data reading structure of another one-time programmable storage unit provided in an embodiment of the present application;

[0037] Figure 5 A schematic diagram of a data reading path of a one-time programmable memory cell provided in an embodiment of the present application;

[0038] Figure 6 A schematic diagram of a data reading path of another one-time programmable memory cell provided in an embodiment of the present application;

[0039] Figure 7A resistance curve diagram of a target area disconnected by applying a write voltage to a one-time programmable memory cell provided by an embodiment of the present application;

[0040] Figure 8 A resistance curve diagram of a barrier layer breakdown caused by applying a specific voltage to a one-time programmable memory cell provided in an embodiment of the present application;

[0041] Fig. 9 A schematic diagram comparing the thickness of a barrier layer in a one-time programmable memory cell provided in an embodiment of the present application;

[0042] Fig.10 The thickness and breakdown voltage V of a barrier layer provided in the embodiment of the present application BD and the target area’s open circuit voltage V Open Schematic diagram of the corresponding relationship between them;

[0043] Fig.11 A schematic diagram of a conductive structure in a one-time programmable memory cell provided in an embodiment of the present application;

[0044] Fig.12 A schematic diagram of a conductive structure in another one-time programmable memory cell provided in an embodiment of the present application;

[0045] Fig.13 A schematic diagram of a circuit connection structure of a one-time programmable storage unit provided in an embodiment of the present application;

[0046] Fig.14 A schematic diagram of a circuit connection structure of another one-time programmable storage unit provided in an embodiment of the present application;

[0047] Fig.15 A schematic diagram of the structure of a storage array having a short-circuited magnetic tunnel junction as a storage structure provided in an embodiment of the present application;

[0048] Fig.16 Another storage structure provided in an embodiment of the present application is a schematic diagram of a storage array having a magnetic tunnel junction after short circuit treatment;

[0049] Fig.17 A schematic diagram of the structure of a storage array whose storage structure is a metal column provided in an embodiment of the present application.

[0050] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0051] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0052] First, the terms involved in this application are explained:

[0053] One-Time Programmable (OTP) memory: uses non-volatile storage technology to store data stably for a long time and is not affected by power interruption or restart.

[0054] Magnetic random access memory (MRAM): uses the magnetism and magnetoresistance effect of magnetic materials to store data. In the storage unit, the direction of the magnetism represents different storage bits, namely "0" and "1". This storage method allows MRAM to keep data from being lost even when the power is off, making it non-volatile.

[0055] Magnetic Tunnel Junction (MTJ) is a nanostructure based on spin electronics, which is widely used in magnetic random access memory (MRAM) and sensors. The basic structure of MTJ consists of two ferromagnetic layers and a thin barrier layer sandwiched between them.

[0056] The one-time programmable storage unit and storage array in the technical solution provided in this application can be applied to storage chips.

[0057] One-Time Programmable (OTP) memory has become a key component for secure and low-cost non-volatile storage. The basic principle of OTP memory is to achieve unchangeable permanent storage by writing data once.

[0058] Different OTP technologies have different implementation methods, currently mainly including traditional eFuse OTP and MRAM-based OTP. Traditional OTP technology mainly uses eFuse (electronic fuse). Its principle is that during the data writing stage, a set of selection circuits (usually decoders) are used to program specific parts, and high current flows through the metal wire at that location to permanently fuse it. After the fuse is blown, the resistance of the location becomes infinite, so that its logical state is fixed to an irreversible "off" state. eFuseOTP has the advantages of mature technology and easy implementation, but its reliability in high temperature environments is poor, it cannot be reprogrammed, and the write current is large. In addition, the manufacturing cost of the eFuse structure is also high at advanced process nodes.

[0059] MRAM can be used to implement OTP function. MRAM cell is usually composed of a magnetic tunnel junction (MTJ). MTJ is composed of two layers of magnetic material sandwiching a barrier layer, one of which has a fixed magnetic pole direction, while the other can be switched by current control. The working principle of OTP based on MRAM is that when a voltage greater than the breakdown voltage of the barrier layer such as magnesium oxide is applied to both ends of the MTJ, the MTJ resistance state is in a short-circuit state, which can achieve irreversible one-time programming.

[0060] The current OTP cells based on MRAM devices have the following problems: 1. After the MTJ breaks down, there is a risk of short circuit as the write current increases, making the state of the OTP write unable to exist stably and affected by the external environment or the size of the write current; 2. The OTP cell of the MRAM device requires a column of normal MTJs as a reference bit to determine the write state of the OTP cell, which limits the storage density of the memory chip where the OTP cell is located.

[0061] Based on this, the invention concept of this application is to provide a one-time programmable storage unit that can realize self-reference, and can realize data reading without setting up an additional reference unit, so as to improve the storage density of the storage chip. In addition, the one-time programmable storage unit in this application realizes data writing based on the disconnection of the target area of ​​the conductive structure, and its data writing is based on the change of its own structure, so the storage state of the one-time programmable storage unit is fixed, and the state is stable after the data is written, and it is not affected by the environment, current, etc.

[0062] The structure and principle of the technical solution provided by this application are described in detail below with reference to the accompanying drawings.

[0063] Reference Figure 1 and Figure 2 In one embodiment, a one-time programmable memory cell is provided, including: a memory structure 20 , and a conductive structure 10 disposed below the memory structure 20 .

[0064] The conductive structure 10 has a first end 101 and a second end 102 opposite to each other.

[0065] When writing data, a write voltage is applied to the write path between any end (first end 101 or second end 102) of the conductive structure 10 and the top of the storage structure 20 to disconnect the target area of ​​the conductive structure to achieve data writing of the one-time programmable storage cell.

[0066] Based on this, the one-time programmable storage unit in this embodiment realizes data writing based on the disconnection of the target area of ​​the conductive structure 10, and its data writing is based on the change of its own structure, so the storage state of the one-time programmable storage unit is fixed, and the state is stable after the data is written, and is not affected by the environment, current, etc.

[0067] After the target area is disconnected, a read voltage is applied to the one-time programmable memory cell and the current values ​​at the first end and the second end are compared to read the written data.

[0068] In one example, referring to Figure 3 and Figure 4 When the target area is disconnected, a read voltage is applied to the one-time programmable memory cell, the first terminal 101 and the second terminal 102 are connected to a sense amplifier, and the sense amplifier is used to compare the current values ​​of the first terminal 101 and the second terminal 102 to read the written data.

[0069] It should be understood that in this embodiment, the current values ​​at the first end and the second end may be compared by other suitable devices, structures or circuits, and this embodiment does not impose any special limitation on this.

[0070] The one-time programmable memory cell provided in this embodiment can read data by comparing the current values ​​at the first end and the second end of the conductive structure. There is no need to set up additional reference units in the memory chip to realize data reading. Therefore, the storage density of the memory chip where the one-time programmable memory cell is located can be improved.

[0071] In addition, the one-time programmable storage unit in this embodiment realizes data writing based on disconnecting the target area of ​​the conductive structure, and the data writing is based on the change of its own structure, so the storage state of the one-time programmable storage unit is fixed, and the state is stable after the data is written and is not affected by the environment, current, etc.

[0072] Here is an explanation of the location of the above target area:

[0073] During the process of applying a write voltage to the write path, a write current is formed by the write voltage, and the target area is the area in the conductive structure through which the write current flows.

[0074] It can also be understood that the target area is related to any end of the conductive structure 10 forming the writing path.

[0075] For example, refer to Figure 1 When the write path is formed between the first end 101 of the conductive structure 10 and the top of the storage structure 20, the write current formed by the write voltage flows through the area from the first end 101 of the conductive structure 10 to the top of the storage structure 20. At this time, the target area is located near the first end 101 of the conductive structure 10.

[0076] For example, refer to Figure 2 When the write path is formed between the second end 102 of the conductive structure 10 and the top of the storage structure 20, the write current formed by the write voltage flows through the second end 102 of the conductive structure 10 to the area at the top of the storage structure 20, and the target area is located near the second end 102 of the conductive structure 10.

[0077] It is worth mentioning that Figure 1 and Figure 2 This is only a schematic diagram to explain the above target area, and does not mean that the target area is only the area shown in the figure; the target area can be any area in the conductive structure through which the write current flows, and the area is disconnected under the write voltage.

[0078] The data reading process of the one-time programmable storage unit in this embodiment is described below:

[0079] Optional, see Figure 5 and Figure 6 By simultaneously applying a read voltage to a first read path between the top of the storage structure and the first end of the conductive structure, and to a second read path between the top of the storage structure and the second end of the conductive structure, a first current value is measured at the first end 101 and a second current value is measured at the second end 102.

[0080] The detection of the first current value and the second current value may be achieved by a sensing amplifier, which is used to detect and amplify the first current signal and the second current signal so as to read data.

[0081] When the first current value is greater than the second current value, the one-time programmable storage unit reads the first write data. When the first current value is less than the second current value, the one-time programmable storage unit reads the second write data; the first write data is different from the second write data.

[0082] It should be understood that, corresponding to different positions of the target region in the conductive structure 10 , the read write data is also different.

[0083] In one example, referring to Figure 5, the target area is located in the first read path, and the corresponding resistance in the first read path is infinite, so the first current value detected is almost 0, and since the read voltage is applied in the second read path, the current value will be detected from the second end 102. At this time, the second current value is greater than the first current value, and the one-time programmable memory cell reads the first write data, which can be "0" or "1".

[0084] In this example, the first end can be used as a reference end and the second end can be used as a data end, or the first end can be used as a data end and the second end can be used as a reference end. It should be understood that the reference end and the data end in this embodiment are relative concepts, which are used to read the written data after comparison, so there is no need to limit which end to a fixed data end or reference end.

[0085] Based on this, based on the self-reference function of the one-time programmable memory cell, data can be written and read in the one-time programmable memory cell.

[0086] In another example, referring to Figure 6 , the target area is located in the second read path, and the corresponding resistance in the second read path is infinite, so the second current value detected is almost 0, and since the read voltage is applied in the first read path, the current value will be detected from the first end 101. At this time, the first current value is greater than the second current value, and the one-time programmable memory cell reads the second write data, which can be "1" or "0".

[0087] Similarly, in this example, the first end can be used as a reference end and the second end can be used as a data end, or the first end can be used as a data end and the second end can be used as a reference end. It should be understood that the reference end and the data end in this embodiment are relative concepts, which are used to read the written data after comparison, so there is no need to limit which end to a fixed data end or reference end.

[0088] Based on this, based on the self-reference function of the one-time programmable memory cell, data can be written and read in the one-time programmable memory cell.

[0089] The above content describes the data reading process, and the following content is used to describe the storage structure and the conductive structure.

[0090] Optionally, the storage structure includes a metal pillar or a short-circuited magnetic tunnel junction.

[0091] The short-circuited magnetic tunnel junction is a structure formed by applying a specific voltage to the magnetic tunnel junction to break down the barrier layer in the magnetic tunnel junction, thereby causing the magnetic tunnel junction to be short-circuited.

[0092] The above-mentioned metal column can be in any shape, for example: a cylindrical metal column, a square metal column, a hexagonal metal column, etc., and the embodiment of the present application does not make any special limitation on this.

[0093] The material of the metal column may be copper, aluminum, tungsten, nickel or cobalt, etc., and the embodiment of the present application does not specifically limit this.

[0094] The above-mentioned magnetic tunnel junction can also be in any shape, for example: a cylindrical magnetic tunnel junction, a square columnar magnetic tunnel junction, a hexagonal columnar magnetic tunnel junction, etc., and the embodiments of the present application do not make any special limitations on this.

[0095] In addition, the size of the conductive structure in this embodiment is 2-10 nanometers, while the size of the eFuse in the prior art eFuse OTP is generally micrometer-level, which is tens to hundreds of times the size of the conductive structure in this embodiment, and the sizes here are all along the height direction. The conductive structure in this embodiment is small in size, and the open circuit is not easy to directly observe, so the stored information is more secure and can be used to generate OTP storage keys to achieve encrypted storage.

[0096] As a specific description, the short-circuit processing of the magnetic tunnel junction may include: applying a specific voltage to the tunnel junction, and the specific voltage needs to be greater than or equal to the open-circuit voltage of the magnetic tunnel junction. Since the barrier layer in the magnetic tunnel junction has a dielectric breakdown effect, when the applied specific voltage is large enough, the barrier layer will be permanently broken down to form a short circuit.

[0097] Based on the above storage structure, it can be known that the resistance of the storage structure is relatively small. At this time, when a write voltage is applied to the one-time programmable memory through the write path, the generated Joule heat will cause one end of the conductive structure to be disconnected, thereby realizing data writing.

[0098] In an optional implementation, when the storage structure is a magnetic tunnel junction after a short-circuit process, the conductive structure may be a spin-orbit moment structure.

[0099] The thickness of the barrier layer in the magnetic tunnel junction meets a preset thickness so that the specific voltage is less than the off-circuit voltage of the target area.

[0100] According to the above description, when a magnetic tunnel junction is short-circuited, a specific voltage needs to be applied to break through the barrier layer in the magnetic tunnel junction. If the specific voltage is greater than or equal to the open-circuit voltage of the target area in the conductive structure, the target area will be open-circuited at the same time, causing the one-time programmable memory cell to lose its storage function. Therefore, the specific voltage needs to be less than the open-circuit voltage of the target area.

[0101] It should be understood that the magnitude of the specific voltage is related to the thickness of the barrier layer in the magnetic tunnel junction. When the barrier layer is thick, a larger specific voltage needs to be applied to the top and bottom of the magnetic tunnel junction to break down the barrier layer, but at this time, the breakdown of the barrier layer and the disconnection of the target area may occur at the same time. Therefore, the thickness of the barrier layer can be adjusted to distinguish the breakdown of the barrier layer and the disconnection voltage of the target area, so that the barrier layer breaks down first, and then the voltage is increased to disconnect the target area.

[0102] Therefore, the thickness of the barrier layer may be set to adjust the specific voltage so that the specific voltage is less than the trip voltage of the target region.

[0103] In some examples, the off-circuit voltage of the target area can be obtained experimentally, and then a specific voltage can be set according to the off-circuit voltage, and then the upper limit of the thickness of the barrier layer can be obtained by reverse calculation.

[0104] In practice, the thickness of the barrier layer can be set according to needs and the upper limit of the thickness of the barrier layer to ensure that when the barrier layer is disconnected under a specific voltage, the target area will not be disconnected.

[0105] In an alternative embodiment, referring to Figure 7 When the voltage applied to the top and bottom of the magnetic tunnel junction is V1, the barrier layer can be broken down and the target area can be disconnected. Figure 8 When the voltage applied to the top and bottom of the magnetic tunnel junction is V2, the barrier layer breaks down. When the applied voltage continues to increase to V3, a short circuit occurs in the target area.

[0106] According to the voltage V2 and the voltage V3, the magnitude of the specific voltage is set, thereby adjusting the thickness of the barrier layer.

[0107] Reference Fig. 9 If the thickness of the barrier layer is relatively thick, so that the specific voltage to be applied is greater than or equal to the off-circuit voltage of the target area, the thickness of the barrier layer can be reduced so that the specific voltage to be applied is less than the off-circuit voltage of the target area.

[0108] Reference Fig.10 It can be seen that when the barrier layer is thicker, the breakdown voltage V BD and the target area’s open circuit voltage V Open There is an overlap. As the thickness of the barrier layer decreases, the breakdown voltage V of the barrier layer can be adjusted. BD and the target area’s open circuit voltage V Open The write voltage window shows that the thinner the barrier layer is, the lower the breakdown voltage V BD and the target area’s open circuit voltage V Open The larger the write voltage window.

[0109] Based on this, the specific thickness of the barrier layer can be set according to actual needs in this embodiment, and the embodiment of the present application does not make any special limitation on this.

[0110] It should be understood that the short-circuit voltage of the target area is related to the structure of the target area, and when the cross-sectional area of ​​the target area is reduced, the short-circuit voltage of the target area will also be reduced. Based on this, the target area in this embodiment can be set.

[0111] In another optional implementation, the storage structure is a magnetic tunnel junction after short-circuit processing, and the conductive structure has a first region and a second region, the first region is a target region, and the second region is a region other than the target region;

[0112] The cross-sectional area of ​​the first region is smaller than the cross-sectional area of ​​the second region, so as to reduce the open-circuit voltage of the target region.

[0113] In one example, referring to Fig.11 , the cross-sectional area of ​​the target area can be reduced by reducing the width of the target area.

[0114] In another example, referring to Fig.12 , the cross-sectional area of ​​the target area can be reduced by reducing the thickness of the target area.

[0115] Wherein, reducing the width of the target area and reducing the thickness of the target area can be achieved through photolithography and etching processes.

[0116] It is worth noting that although Fig.11 and Fig.12 In the embodiment, the target area is set at both the first end 101 and the second end 102 of the conductive structure. However, in practice, the target area may be set only at the first end 101 or the second end 102 according to actual needs.

[0117] The above describes the storage structure and the conductive structure.

[0118] In this embodiment, refer to Fig.13 The one-time programmable memory cell may further include a first switch S1, wherein an output end of the first switch S1 is connected to an end of the conductive structure where a target region is located.

[0119] For example, refer to Fig.13 , the target area is located at the second end 102 of the conductive structure, and the output end of the first switch S1 is connected to the second end 102 of the conductive structure.

[0120] It should be understood that if the target area is located at the first end 101 of the conductive structure, the output end of the first switch S1 is connected to the first end 101 of the conductive structure. Alternatively, if the target area is located at the first end 101 and the second end 102 of the conductive structure, the output end of the first switch S1 is connected to the first end 101 and the second end 102 of the conductive structure.

[0121] Exemplarily, the first switch tube can be a bipolar junction transistor (BJT), a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), or other types of switch tubes, and the embodiments of the present application do not specifically limit this.

[0122] When data is written, the first switch is turned on, and a write voltage is applied to the write path through the first switch to disconnect the target area, so as to realize data writing of the one-time programmable memory cell.

[0123] After the target area is disconnected, the first switch is turned off, a read voltage is applied to the one-time programmable memory cell, and the current values ​​at the first end and the second end are compared to read the written data.

[0124] Based on this, the writing and reading of data can be controlled by controlling the state of the first switch tube S1. Specifically, the control end of the first switch tube S1 is connected to the first control signal line, and the first control signal in the first control signal line is used to control the first switch tube S1 to turn off, and the input end of the first switch tube is connected to the write signal line, which is used to apply a write voltage to the write path when the first switch tube S1 is turned on.

[0125] Based on this, the controllability of the one-time programmable storage unit in this embodiment is increased; and, only one switch tube is used in the structure, which can further save device area and facilitate integration.

[0126] Optional, see Fig.14 The one-time programmable memory cell further includes a second switch S2, and an output end of the second switch S2 is connected to the top of the memory structure.

[0127] Exemplarily, the second switch tube can be a bipolar junction transistor (BJT), a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), or other types of switch tubes, and the embodiments of the present application do not specifically limit this.

[0128] When writing data, the first switch S1 is turned on, the second switch S2 is turned on, and the write voltage is applied to the write path through the first switch S1 and the second switch S2 to disconnect the target area to achieve data writing of the one-time programmable memory cell.

[0129] After the target area is disconnected, the first switch S1 is turned off, the second switch S2 is turned on, a read voltage is applied to the one-time programmable memory cell through the second switch S2, and the current values ​​of the first end and the second end are compared to read the written data.

[0130] Based on this, the writing and reading of data can be controlled by controlling the states of the first switch tube S1 and the second switch tube S2. Specifically, the control end of the first switch tube S1 is connected to the first control signal line, and the first control signal in the first control signal line is used to control the conduction and shutoff of the first switch tube S1, and the input end of the first switch tube is connected to the write signal line. The control end of the second switch tube S2 is connected to the second control signal line, and the second control signal in the second control signal line is used to control the conduction and shutoff of the second switch tube S2. The input end of the second switch tube is connected to the read signal line, and is used to apply a write voltage to the one-time programmable storage unit together with the write voltage end when the first switch tube S1 is turned on and the second switch tube S2 is turned on, and is also used to apply a read voltage to the one-time programmable storage unit when the first switch tube S1 is turned off and the second switch tube S2 is turned on.

[0131] Based on this, the controllability of the one-time programmable memory cell in this embodiment is further increased, and the unit structure can also be compatible with the preparation process of the memory cell, and the one-time programmable memory cell can be formed synchronously, thereby simplifying the manufacturing steps.

[0132] In a second aspect, an embodiment of the present application further provides a storage array, which includes a one-time programmable storage cell area, wherein the one-time programmable storage cell area includes a plurality of one-time programmable storage cells arranged in an array as in the first aspect.

[0133] By applying a write voltage to a write path between any end of the conductive structure corresponding to the one-time programmable memory cell and the top of the memory structure, a target area of ​​the conductive structure is disconnected to implement data writing of the corresponding one-time programmable memory cell.

[0134] After the target area is disconnected, a read voltage is applied to the corresponding one-time programmable memory cell, and the current values ​​at the first end and the second end are compared to read the data written in the corresponding one-time programmable memory cell.

[0135] According to the above description, the one-time programmable memory cell can read data by comparing the current values ​​at the first end and the second end of the conductive structure, and does not need to set up additional reference cells in the storage array to read data, so the storage density of the memory chip where the one-time programmable memory cell is located can be improved. In addition, since the one-time programmable memory cell writes data based on the disconnection of the target area of ​​the conductive structure, the data writing is based on the change of its own structure, so the storage state of the one-time programmable memory cell is fixed, and the state is stable after the data is written, and is not affected by the environment, current, etc.

[0136] In some examples, the storage array is entirely composed of the one-time programmable storage cells arranged in an array. Based on this, the storage array is used to store critical data, such as encryption keys, firmware signatures, serial numbers, error correction addresses and other information.

[0137] The structure of the above storage array is described below with reference to a specific embodiment.

[0138] The first example, see Fig.15 The storage array includes a storage area 2 and a one-time programmable storage cell area 1. The one-time programmable storage cell area 1 can be obtained by integrating the one-time programmable storage cell 11. The one-time programmable storage cell area 1 is deployed at the edge of the array. It should be understood that the one-time programmable storage cell area 1 can also be deployed at other positions of the storage array, and this embodiment does not make any special limitation on this.

[0139] The one-time programmable storage cell 11 in the storage array is a magnetic tunnel junction after short-circuit treatment, and the writing method is as follows: first, the first switch tube S1 and the second switch tube S2 of the writing path are turned on through the first control signal line and the second control signal line, and a writing voltage is applied through the writing signal line and the reading signal line to disconnect the target area of ​​the conductive structure of the corresponding one-time programmable storage cell 11, so as to complete writing 0 or writing 1; then, the first switch tube S1 is turned off through the first control signal line, and the second switch tube S2 is turned on through the second control signal line, and a reading voltage is applied to the corresponding one-time programmable storage cell 11 through the reading signal line, and the written data is read from the first end and the second end of the corresponding one-time programmable storage cell 11. This process does not need to set the reference bit MTJ to complete the reading operation, and can also be compatible with the preparation process of the storage area 2, and the one-time programmable storage cell area 1 is formed synchronously, thereby simplifying the manufacturing steps.

[0140] In this example, before data is written, the second switch tube S2 is first turned on through the second control signal line, and a specific voltage is applied to break down the barrier layers of all the one-time programmable memory cells 11 .

[0141] For the second example, refer to Fig.16 The storage array includes a storage area 2 and a one-time programmable storage cell area 1. The one-time programmable storage cell area 1 can be obtained by integrating the one-time programmable storage cell 11. The one-time programmable storage cell area 1 is deployed at the edge of the array. It should be understood that the one-time programmable storage cell area 1 can also be deployed at other positions of the storage array, and this embodiment does not make any special limitation on this.

[0142] The difference between this example and the first example is that the second switch tube S2 at the top of the magnetic tunnel junction is removed to further improve the array integration density. The data writing process of the one-time programmable storage unit 11 in the array is as follows: turn on the first switch tube S1 through the first control signal line, apply a write voltage to the write path through the write signal line, and disconnect the target area to complete writing 0 or writing 1. After that, apply a read voltage to the corresponding one-time programmable storage unit 11 through the read signal line, and read the written data from the first and second ends of the corresponding one-time programmable storage unit. This process does not require setting the reference bit MTJ to complete the reading operation. In this example, before data is written, a specific voltage is applied to the top and bottom ends of the magnetic tunnel junction to break down the barrier layer of all one-time programmable storage units 11.

[0143] For the third example, refer to Fig.17 The storage array includes a storage area 2 and a one-time programmable storage cell area 1. The one-time programmable storage cell area 1 can be obtained by integrating the one-time programmable storage cell 11. The one-time programmable storage cell area 1 is deployed at the edge of the array. It should be understood that the one-time programmable storage cell area 1 can also be deployed at other positions of the storage array, and this embodiment does not make any special limitation on this.

[0144] The difference between this example and the first example is that the storage structure of the one-time programmable storage unit 11 is a metal pillar. Compared with the first and second examples, this example omits the short-circuit processing process of the magnetic tunnel junction. The data writing process is: the first switch tube S1 and the second switch tube S2 of the write path are turned on through the first control signal line and the second control signal line, and a write voltage is applied through the write signal line and the read signal line to disconnect the target area of ​​the conductive structure of the corresponding one-time programmable storage unit 11 to complete writing 0 or writing 1; then, the first switch tube S1 is turned off through the first control signal line, and the second switch tube S2 is turned on through the second control signal line, and a read voltage is applied to the corresponding one-time programmable storage unit 11 through the read signal line, and the written data is read from the first end and the second end of the corresponding one-time programmable storage unit 11. This process does not require setting the reference bit MTJ to complete the read operation.

[0145] It should be understood that since the storage array includes the one-time programmable storage unit, the storage array is Figure 1-Figure 14 The beneficial effects of the one-time programmable storage unit provided in the illustrated embodiment are the same and will not be described in detail here.

[0146] Finally, it should be noted that those skilled in the art will readily conceive of other embodiments of the present invention after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses or adaptations of the present invention, which follow the general principles of the present invention and include common knowledge or customary technical means in the art not disclosed by the present invention, are not limited to the precise structure described above and shown in the drawings, and may be modified and changed in various ways without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A one-time programmable storage unit, characterized in that: It includes a storage structure, and a conductive structure disposed below the storage structure; The conductive structure has a first end and a second end that are arranged opposite to each other, and a write voltage is applied to a write path between any end of the conductive structure and the top of the storage structure so that a target area of ​​the conductive structure is disconnected, thereby realizing data writing of the one-time programmable storage unit; After the target area is disconnected, a read voltage is applied to the one-time programmable memory cell and current values ​​at the first end and the second end are compared to read the written data.

2. The one-time programmable storage unit according to claim 1, characterized in that: During the process of applying the write voltage to the write path, a write current is formed by the write voltage, and the target area is an area in the conductive structure through which the write current flows.

3. The one-time programmable storage unit according to claim 1, characterized in that: By applying the read voltage simultaneously to a first read path between the top of the storage structure and the first end of the conductive structure, and to a second read path between the top of the storage structure and the second end of the conductive structure, a first current value is measured at the first end, and a second current value is measured at the second end; Wherein, when the first current value is greater than the second current value, the one-time programmable storage unit reads the first write data; When the first current value is less than the second current value, the one-time programmable storage unit reads the second write data; The first write data is different from the second write data.

4. The one-time programmable storage unit according to claim 1, characterized in that: The storage structure includes a metal pillar or a short-circuited magnetic tunnel junction; The short-circuited magnetic tunnel junction is a structure formed by applying a specific voltage to the magnetic tunnel junction to break down the barrier layer in the magnetic tunnel junction, thereby causing the magnetic tunnel junction to be short-circuited.

5. The one-time programmable storage unit according to claim 4, characterized in that: The storage structure is the magnetic tunnel junction after the short-circuit treatment, and the conductive structure is a spin-orbit moment structure; The thickness of the barrier layer in the magnetic tunnel junction satisfies a preset thickness so that the specific voltage is less than the open-circuit voltage of the target region.

6. The one-time programmable storage unit according to claim 4, characterized in that: The storage structure is the magnetic tunnel junction after the short-circuit treatment, the conductive structure has a first area and a second area, the first area is the target area, and the second area is other areas except the target area; The cross-sectional area of ​​the first region is smaller than the cross-sectional area of ​​the second region, so as to reduce the open-circuit voltage of the target region.

7. The one-time programmable storage unit according to claim 1, characterized in that: The one-time programmable memory cell further comprises a first switch, wherein an output end of the first switch is connected to an end of the conductive structure where a target region is located; When writing data, the first switch is turned on, and the write voltage is applied to the write path through the first switch to disconnect the target area, so as to realize data writing of the one-time programmable memory cell; After the target area is disconnected, the first switch is turned off, a read voltage is applied to the one-time programmable memory cell, and current values ​​at the first end and the second end are compared to read the written data.

8. The one-time programmable storage unit according to claim 7, characterized in that: The one-time programmable memory cell further includes a second switch, an output end of the second switch being connected to the top of the memory structure; When writing data, the first switch is turned on, the second switch is turned on, and the write voltage is applied to the write path through the first switch and the second switch to disconnect the target area, so as to realize data writing of the one-time programmable memory cell; After the target area is disconnected, the first switch is turned off, the second switch is turned on, a read voltage is applied to the one-time programmable memory cell through the second switch, and the current values ​​of the first end and the second end are compared to read the written data.

9. A storage array, characterized in that: The storage array includes a one-time programmable storage cell area, and the one-time programmable storage cell area includes a plurality of one-time programmable storage cells according to any one of claims 1 to 8 arranged in an array; Applying a write voltage to a write path between any end of the conductive structure corresponding to the one-time programmable memory cell and the top of the memory structure so as to disconnect a target area of ​​the conductive structure to implement data writing corresponding to the one-time programmable memory cell; After the target area is disconnected, a read voltage is applied to the corresponding one-time programmable memory cell, and current values ​​at the first end and the second end are compared to read the data written in the corresponding one-time programmable memory cell.

10. The storage array according to claim 9, characterized in that: The storage array is entirely composed of the one-time programmable storage cells arranged in an array.

Citation Information

Patent Citations

  • Implementation of one time programmable memory using MRAM stack design

    CN107636762A

  • Semiconductor memory device and method of manufacturing the same

    CN107863124A

  • Magnetic storage unit and SOT-MRAM memory

    CN111370573A

  • One-time programmable memory based on MRAM (Magnetic Random Access Memory)

    CN116935911A

  • One-time programmable memory and electronic equipment

    CN116959520A