BC battery polishing process, BC battery and preparation method of BC battery

Abstract

The invention discloses a polishing process of a BC battery, the BC battery and a preparation method of the BC battery, and the polishing process comprises the following steps: placing a silicon wafer in an oxidation cavity, and introducing a dielectric gas into the oxidation cavity at 400-700 DEG C to form a mask layer on a single surface of the silicon wafer so as to obtain a coated silicon wafer; the standing time of the silicon wafer in the oxidation cavity is 20-100 S; the coated silicon wafer is put into alkali liquor to be polished, and a polished face is formed on the other end face of the coated silicon wafer; the polished silicon wafer is subjected to water washing and acid pickling, and the mask layer is removed; and dehydrating and drying the silicon wafer from which the mask layer is removed. According to the method, a layer of mask is applied in advance before the alkali polishing process, so that the erosion of alkali liquor to the front surface of the silicon wafer in the polishing process is effectively prevented, and the integrity and damage of the front surface of the silicon wafer are ensured. Besides, single-face polishing is adopted, so that silicon wafer thickness loss caused by an alkali polishing process is greatly reduced, the situation that the absorption capacity of the silicon wafer to sunlight is weakened due to excessive thinning is avoided, and improvement of the overall efficiency of the cell is promoted.

Description

Technical Field

[0001] The invention relates to the field of BC battery production, and specifically to a BC battery polishing process, a BC battery and a preparation method thereof. Background Art

[0002] In the photovoltaic industry chain, battery manufacturing technology is constantly being updated and iterated. After PERC cells (passivated emitter and back contact), BC cells (interdigitated back contact cell technology) have attracted the attention of companies in the industry due to their higher theoretical efficiency. Some companies have begun to put them into operation in small batches, and the current TOPCon companies with larger scale are also paying attention to the progress of BC cells.

[0003] The core technology of BC battery (including IBC, TBC, HBC, HPBC, hereinafter collectively referred to as BC battery) lies in a new type of structural battery in which the P-type area and the N-type area are alternately arranged on the back of the battery. The advantage of this structure is that there is no metal electrode blocking the front side (light-receiving side) of the battery, which effectively increases the short-circuit current of the battery. At the same time, the back side (non-light-receiving side) can accommodate wider metal grid lines to reduce series resistance and increase fill factor. Therefore, the front surface field of the battery and the good passivation effect can increase the open circuit voltage and improve the battery conversion efficiency.

[0004] In the traditional BC preparation process, the first step is to polish the original silicon wafer. The industry currently uses an alkaline polishing process, which performs double-sided polishing in a trough machine. The front side is also polished during the process, resulting in a reduction in the overall thickness of the silicon wafer, affecting the photoelectric conversion efficiency of the battery.

[0005] In the preparation process of BC batteries, the first step is to polish the original silicon wafer to remove the surface damage layer of the silicon wafer, enhance the etching of the line marks, reduce the height difference, improve the overall flatness after polishing, reduce defects, and help improve the overall performance of the battery. Because the current process uses a trough reaction, the original silicon wafer is polished on both sides. While the polished surface is formed on the back, the front is also polished and etched. In the current industry process, the polishing weight loss is 0.5-0.7g, the corrosion depth is 5-7um, and the back tower base is controlled at 15-25um; therefore, while meeting the requirements of the back tower base, the front is also polished, resulting in a low overall thickness of the silicon wafer, affecting the overall performance. The thinner the silicon wafer, the easier it is to produce process debris, collapse edges, and missing corners, affecting the yield; the thinner the silicon wafer, the lower its mechanical strength, which may affect the processing, packaging and long-term outdoor use of the battery. Summary of the invention

[0006] In view of this, the present invention provides a BC battery polishing process, a BC battery and a preparation method thereof to solve the problems raised in the above background technology.

[0007] To achieve the above object, the present invention provides the following technical solutions:

[0008] In a first aspect, the present invention discloses a polishing process for a BC battery, comprising the following steps:

[0009] S1. Place the silicon wafer in an oxidation chamber, introduce dielectric gas into the oxidation chamber at 400-700°C to form a mask layer on one side of the silicon wafer to obtain a coated silicon wafer; the residence time of the silicon wafer in the oxidation chamber is 20-100S;

[0010] S2, placing the coated silicon wafer in an alkaline solution for polishing, and forming a polished surface on the other end surface of the coated silicon wafer;

[0011] S3, washing the polished silicon wafer with water and pickling to remove the mask layer;

[0012] S4, dehydrating and drying the silicon wafer with the mask layer removed.

[0013] A further solution: in step S1, the oxidation chamber is a chain oxidation furnace, the medium gas is oxygen, and the medium gas is introduced from above the silicon wafer.

[0014] A further solution: in step S1, the mask layer is silicon dioxide, and its thickness is 1-5 nm.

[0015] A further solution: in step S1, the oxidation chamber is a closed furnace tube, and the medium gas is a mixture of silane and ammonia in a volume ratio of 1:(3-12).

[0016] A further solution: In step S1, the sealed furnace tube is provided with a radio frequency power source, the power of the radio frequency power source is 10-18 kW, and the switching ratio is (3-6): (60-90).

[0017] A further solution: In step S1, the silicon wafer is placed in a graphite boat, and then placed in a sealed furnace tube.

[0018] A further solution: in step S1, the mask layer is silicon nitride, and its thickness is 2-10 nm.

[0019] A further solution: In step S3, the pickling is specifically: the silicon wafer is placed in an HF solution for cleaning, and the concentration of the HF solution is 45-50w%.

[0020] In a second aspect, the present invention discloses a method for preparing a BC battery, which includes the above-mentioned BC battery polishing process.

[0021] In a third aspect, the present invention discloses a BC battery, which is prepared by the above-mentioned preparation method.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] The present invention applies a layer of mask in advance before the alkali polishing process, thereby effectively preventing the alkali solution from corroding the front side of the silicon wafer during the polishing process, and ensuring that the front side of the silicon wafer is intact.

[0024] In addition, the single-sided polishing adopted by the present invention greatly reduces the loss of silicon wafer thickness caused by the alkali polishing process, thereby avoiding the weakening of the silicon wafer's ability to absorb sunlight due to excessive thinning, and promoting the improvement of the overall efficiency of the battery. On the contrary, maintaining a moderate silicon wafer thickness can accommodate more space to generate and collect light-excited electron-hole pairs, which is of great benefit to enhancing the fill factor and open circuit voltage of the battery. More importantly, the single-sided polishing method provides important implementation conditions for the subsequent production of silicon wafer thinning. DETAILED DESCRIPTION

[0025] For ease of understanding of the present invention, the present invention will be described more fully below in conjunction with specific embodiments. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly understood.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0027] Example 1

[0028] Step 1: The original silicon wafer (thickness 150um) is transferred to the ceramic roller; it is brought into the high-temperature furnace chamber chain oxidation furnace through the conveyor chain;

[0029] Step 2: Install a lamp above the silicon wafer to heat it, and control the temperature in the furnace at 560°C. At the same time, oxygen is introduced above the silicon wafer, and the oxygen flow rate is 65L / min. After high-temperature heating by the lamp, a dense SiO2 film is formed on the front of the silicon wafer, and the back does not participate in the reaction, thus obtaining a single-sided coated silicon wafer;

[0030] Step 3, after cooling, the coated silicon wafer on one side is transported to the alkaline polishing machine;

[0031] Step 4: The coated silicon wafer in the polishing tank does not react with the alkali because the front side is protected by the SiO2 mask, while the back side of the silicon wafer reacts with the alkali, and the line marks and the damaged layer are polished to achieve back side flatness and single-side polishing; the NaOH mass concentration of the alkali solution is 46%, the temperature is 70-80°C, the immersion time is 150-200S, and the volume ratio of alkali to additive is 6-12:1.5-3.5;

[0032] Step 5: After single-side polishing, the silicon wafer is washed with water and then pickled. A 49w% HF solution is used to remove the SiO2 layer on the front side of the silicon wafer, and at the same time, Si-H passivation bonds are formed with silicon dangling bonds to increase dehydration properties.

[0033] Step 6: Pre-dehydration and drying are performed by a slow-lift device, and the final thickness of the silicon wafer is measured to be 147um.

[0034] Example 2

[0035] Material placement: Place the original silicon wafer (thickness 150um) on the graphite boat and transport it to the tubular PECVD by a robotic arm;

[0036] Heating / constant temperature: Heating the furnace tube to make the temperature inside the furnace reach 500℃;

[0037] Vacuuming: Vacuum the inside of the furnace tube to achieve a low pressure state inside the tube, with the pressure less than 35mtorr;

[0038] Deposition step: introduce silane and ammonia (the volume ratio of silane and ammonia is 1:3.4), and the pressure is controlled at 1000-1500mtorr; (silane flow rate is 2500sccm, ammonia flow rate is 8500sccm); turn on the RF power supply (RF power supply power is 10-18KW, the switch ratio is 4:75) to react, and deposit a layer of silicon nitride film on the surface of the battery. The reaction time is 20-100S, and the film thickness is controlled to be 1-10nm;

[0039] Vacuuming: remove the reaction gas from the furnace tube;

[0040] Breaking vacuum / back pressure: Release the internal pressure of the furnace tube, withdraw the boat and cool down the graphite boat, and the final thickness of the silicon wafer is measured to be 148um.

[0041] Comparative Example

[0042] The original silicon wafer (thickness 150um) was transported to the alkali polishing machine; the front and back sides of the silicon wafer reacted with the alkali, and the line marks and the damaged layer were polished to achieve the flatness of the back side, and the double-sided polishing was achieved; the parameters of the alkali solution were the same as those in Example 1;

[0043] After water washing, the silicon wafer is post-picked with 49w% HF solution to form Si-H passivation bonds with silicon dangling bonds to increase dehydration properties to a certain extent.

[0044] After pre-dehydration and drying by a slow-lift device, the final thickness of the silicon wafer was measured to be 144um.

[0045] The performance parameters of the BC batteries obtained in Examples 1 and 2 and the comparative example were tested, and the performance parameters of Examples 1 and 2 were compared with those of Comparative Example 1. The results are shown in Table 1.

[0046] Table 1

[0047]

[0048] Although this specification is described according to implementation modes, not every implementation mode includes only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0049] Therefore, the above description is only a preferred embodiment of the present application and is not intended to limit the scope of implementation of the present application; that is, all equivalent changes made according to the scope of the claims of the present application are within the protection scope of the claims of the present application.

Claims

1. A polishing process for BC batteries, characterized in that: The following steps are involved: S1. Place the silicon wafer in an oxidation chamber, introduce dielectric gas into the oxidation chamber at 400-700°C to form a mask layer on one side of the silicon wafer to obtain a coated silicon wafer; the residence time of the silicon wafer in the oxidation chamber is 20-100S; S2, placing the coated silicon wafer in an alkaline solution for polishing, and forming a polished surface on the other end surface of the coated silicon wafer; S3, washing the polished silicon wafer with water and pickling to remove the mask layer; S4, dehydrating and drying the silicon wafer with the mask layer removed.

2. The BC battery polishing process according to claim 1, characterized in that: In step S1, the oxidation chamber is a chain oxidation furnace, the dielectric gas is oxygen, and the dielectric gas is introduced from above the silicon wafer.

3. The BC battery polishing process according to claim 2, characterized in that: In step S1, the mask layer is silicon dioxide, and its thickness is 1-5 nm.

4. The BC battery polishing process according to claim 1, characterized in that: In step S1, the oxidation chamber is a closed furnace tube, and the medium gas is a mixture of silane and ammonia in a volume ratio of 1:(3-12).

5. The BC battery polishing process according to claim 4, characterized in that: In step S1, the sealed furnace tube is provided with a radio frequency power source, the power of the radio frequency power source is 10-18KW, and the switch ratio is (3-6): (60-90).

6. The BC battery polishing process according to claim 4, characterized in that: In step S1, the silicon wafer is placed in a graphite boat and then placed in a sealed furnace tube.

7. The BC battery polishing process according to claim 4, characterized in that: In step S1, the mask layer is silicon nitride, and its thickness is 2-10 nm.

8. The BC battery polishing process according to claim 1, characterized in that: In step S3, pickling is specifically as follows: the silicon wafer is placed in an HF solution for cleaning, wherein the mass concentration of the HF solution is 45-50%.

9. A method for preparing a BC battery, comprising the BC battery polishing process as described in any one of claims 1-8.

10. A BC battery, prepared by the preparation method according to claim 9.

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