Log structure merging tree based on dual-heterogeneous system and data reading and writing method
By introducing a dual heterogeneous system into the LSM tree, using heterogeneous computing and storage modules to realize batch sequential writing of data, the write amplification problem of LSM tree in high update frequency scenarios is solved, and the write performance is improved.
Patent Information
- Application Number
- CN202411362613.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2025-02-11
AI Technical Summary
When existing LSM trees deal with large key-value pairs or high update frequency scenarios, they are prone to cause write amplification problems, resulting in performance degradation.
Using a log structure merging tree based on a dual heterogeneous system, combining heterogeneous computing modules and heterogeneous storage modules, the batch of data is realized through dynamic random access memory, field programmable gate arrays, phase-change random access memory and solid-state drives. Write sequentially, reduce write amplification.
Convert random write operations of solid-state drives into batch sequential writing, reduce the size of the log structure merge tree, reduce write amplification, and improve high-throughput write performance.
Smart Images
Figure CN119415021A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of data storage management, and in particular to a log structure merge tree based on a dual heterogeneous system and a data reading and writing method. Background Art
[0002] In the era of big data, efficiently collecting, organizing and managing data from multiple scenarios has become one of the key challenges facing current computer systems. The widespread application of cloud computing and edge computing has led to the continuous generation of structured and unstructured data. These data are usually presented in the form of key-value pairs and maintained by key-value stores (also known as key-value databases).
[0003] In the prior art, LSM-Tree (Log-Structured-Merge-Tree) is used as the infrastructure for building key-value storage, which has become the mainstream solution for well-known companies such as Google and Facebook to process data. LSM tree converts random write operations into batch sequential writes, thereby providing efficient write performance. However, the merge operation within the LSM tree causes the write amplification problem. In particular, the write amplification problem will be further exacerbated in scenarios where large key-value pairs or high update frequencies are processed. Summary of the invention
[0004] The purpose of the present invention is to provide a log structure merge tree based on a dual heterogeneous system to solve the above technical problems;
[0005] The present invention also aims to provide a data reading method based on a log structure merge tree to solve the above technical problems;
[0006] The present invention also aims to provide a data writing method based on a log structure merge tree to solve the above technical problems;
[0007] A log-structured merge tree based on a dual heterogeneous system, including,
[0008] A heterogeneous computing module, wherein the heterogeneous computing module comprises:
[0009] Dynamic random access memory, used for calculating and generating key-value data pairs;
[0010] A field programmable gate array, connected to the dynamic random access memory, for reading in and sorting the key-value data pairs;
[0011] A heterogeneous storage module is connected to the heterogeneous computing module, and the heterogeneous storage module includes:
[0012] A phase-change random access memory, used for storing a log file and a balanced tree, wherein the log file stores the sorted key-value data pairs;
[0013] A solid state drive is connected to the phase change random access memory and is used to store multiple hierarchical components.
[0014] Preferably, the balanced tree includes a plurality of key-value address pairs, and the key-value address pairs include key values corresponding to the key-value data pairs and physical addresses corresponding to the data in the key-value data pairs.
[0015] Preferably, the capacity of the hierarchical components in the solid-state drive increases exponentially, forming a tree structure that is narrow at the top and wide at the bottom.
[0016] Preferably, the hierarchical component comprises a plurality of sorted string table files, and the key values stored in the sorted string table files are ordered and non-overlapping.
[0017] Preferably, each node data of the balanced tree is an index record, and the index record includes the key-value address pair and a pointer.
[0018] Preferably, the pointers in the index record include a null pointer, a left pointer and a right pointer.
[0019] Preferably, the pointer in the index record is used to record the ascending order of the key values in the key-value address pair.
[0020] Preferably, the field programmable gate array traverses the nodes of the balanced tree based on the size of the key value, and sets and sorts the index records in the order of large on the left and small on the right.
[0021] A data reading method based on a log structure merge tree, used to read the data of the log structure merge tree, comprising:
[0022] Step S1, the field programmable gate array receives a read data request;
[0023] Step S2, traversing the balanced tree in sequence based on the key value of the read data request to find out whether there is an index record matching the key value of the read data request, if yes, executing step A, if not, executing step B;
[0024] Wherein, step A reads the data stored in the physical address corresponding to the key value in the key-value address pair in the index record;
[0025] Step B sequentially scans and searches the hierarchical components until the data corresponding to the key value is found, and loads the data into the dynamic random access memory, or
[0026] When no data is found in all the hierarchical components, a search error message is returned.
[0027] A data writing method based on a log structure merge tree, used for writing data into the log structure merge tree, comprising:
[0028] Step G1, the field programmable gate array receives a write data request;
[0029] Step G2, recording the input key-value data pair in the log file;
[0030] Step G3, checking whether the capacity of the current log file reaches a threshold, if not, executing step C, if yes, executing step D;
[0031] Wherein, in step C, the field programmable gate array constructs an index record based on the key value and the physical address of the stored data, and the field programmable gate array traverses the balanced tree based on the key value size of the index record, inserts the index record into the balanced tree in the form of a child node, and waits for subsequent data to continue to be written;
[0032] In step D, the field programmable gate array traverses the balanced tree, retrieves the key values stored in the log file and the data corresponding to the physical address, and writes them in the form of key-value data pairs in sequence into the solid-state drive as a sorted string table file for storage. The field programmable gate array retrieves the key values and data stored in the log file with the index records corresponding to the nodes of the balanced tree, clears the data, and then returns to execute step C.
[0033] The beneficial effects of the present invention are: converting random write operations of solid-state drives into batch sequential writes, reducing the size of the log structure merge tree, reducing write amplification, and improving high-throughput write performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 It is a schematic diagram of a log structure merge tree based on a dual heterogeneous system of the present invention;
[0035] Figure 2 It is a step diagram of the data reading method based on the log structure merge tree of the present invention;
[0036] Figure 3 It is a step diagram of the data writing method based on the log structure merge tree of the present invention;
[0037] Figure 4 It is a schematic diagram of the LSM tree creation process of the present invention;
[0038] Figure 5 is a schematic structural diagram of a solid state hard disk of the present invention;
[0039] Figure 6It is a schematic diagram of merging and sorting the dynamic random access memory and the solid state drive of the present invention;
[0040] Figure 7 is a flow chart of a data reading method according to an embodiment of the present invention;
[0041] Figure 8 It is a flow chart of a data writing method according to an embodiment of the present invention.
[0042] In the attached figure: 1. Heterogeneous computing module; 11. Dynamic random access memory; 12. Field programmable gate array; 121. Data linked list; 2. Heterogeneous storage module; 21. Phase change random access memory; 211. Log file; 212. Balanced tree; 22. Solid state drive. DETAILED DESCRIPTION
[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0044] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.
[0045] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.
[0046] Based on the log structured merge tree of dual heterogeneous systems, such as Figure 1 As shown, including
[0047] Heterogeneous computing module 1, the heterogeneous computing module 1 includes:
[0048] Dynamic random access memory 11 (DRAM), used for calculating and generating key-value data pairs;
[0049] A field programmable gate array 12 (FPGA), connected to the dynamic random access memory 11, is used to read in key-value data pairs and sort them;
[0050] The heterogeneous storage module 2 is connected to the heterogeneous computing module 1. The heterogeneous storage module 2 includes:
[0051] Phase change random access memory 21 (PCRAM), used to store log file 211 and balanced tree 212, log file 211 stores sorted key-value data pairs;
[0052] A solid state drive 22 (SSD), connected to the PCRAM 21, is used to store multiple hierarchical components.
[0053] Specifically, the present invention provides a log structure merge tree based on a dual heterogeneous system to convert SSD random write operations into batch sequential writes, reduce write amplification, and improve high-throughput write performance. The heterogeneous storage module 2 can use non-volatile random access memory to simultaneously achieve efficient retrieval and high reliability. The heterogeneous computing module 1 can query repetitive computing operations and offload them from the processor to the FPGA to improve system efficiency.
[0054] DRAM implements data calculation in storage system, and FPGA implements insertion<key,value> Quick sorting of key-value data pairs; PCRAM is used to store log files and B-Tree (balanced tree 212).
[0055] In a preferred embodiment, the balanced tree 212 includes a plurality of key-value address pairs, and the key-value address pairs include the key values corresponding to the key-value data pairs and the physical addresses corresponding to the data in the key-value data pairs;
[0056] The capacity of the hierarchical components in the solid state drive 22 increases exponentially, forming a tree structure that is narrow at the top and wide at the bottom;
[0057] The hierarchical component includes multiple sorted string table files. The key values stored in the sorted string table files are ordered and non-overlapping, which is convenient for quick search.
[0058] Specifically, the B-Tree consists of the input<key,value> A new data pair consisting of the key value key corresponding to the key-value data pair and the physical address addr where the data value is stored<key,addr> The SSD maintains a multi-layer data structure and persistently stores the multi-layer SSTable files (sorted string table files) that constitute the LSM-Tree body, forming a tree structure that is narrow at the top and wide at the bottom.
[0059] In a preferred embodiment, each node data of the balanced tree 212 is an index record, and the index record includes a key-value address pair and a pointer;
[0060] The pointers in the index record include null pointer, left pointer and right pointer;
[0061] The pointer in the index record is used to record the ascending order of the key values in the key-value address pair.
[0062] Specifically, B-Tree is a tree composed of ordered nodes, and each current node data is an index record. <PL,<key,addr> ,PR>, key-value address pair<key,addr> It consists of the key value key stored in the log file and the address addr where the data value is stored; different index records correspond to<key,addr> The key values of the nodes are different; the pointers PL and PR refer to the left child node and right child node of the current node respectively, where the left child node, the current node, and the right child node record the stored<key,addr> The key values of the data pairs are arranged in ascending order.
[0063] Reference Figure 2 , a data reading method based on a log structure merge tree, used to read the data of the log structure merge tree, including,
[0064] Step S1, the field programmable gate array 12 receives a read data request;
[0065] Step S2, traverse the balanced tree 212 in sequence based on the key value of the read data request to find out whether there is an index record matching the key value of the read data request, if yes, execute step A, if not, execute step B;
[0066] Wherein, step A reads the data stored in the physical address corresponding to the key value in the key-value address pair in the index record;
[0067] Step B scans and searches the hierarchical components in sequence until the data corresponding to the key value is found, and loads the data into the dynamic random access memory 11, or
[0068] When no data is found in all hierarchical components, a search error message is returned.
[0069] Reference Figure 3 , a data writing method based on a log structure merge tree, a log structure merge tree for writing data, including,
[0070] Step G1, the field programmable gate array 12 receives a write data request;
[0071] Step G2, recording the input key-value data pair in the log file 211;
[0072] Step G3, check whether the capacity of the current log file 211 reaches the threshold, if not, execute step C, if yes, execute step D;
[0073] In step C, the field programmable gate array 12 constructs an index record based on the key value and the physical address of the stored data, and the field programmable gate array 12 traverses the balanced tree 212 based on the key value size of the index record, inserts the index record into the balanced tree 212 in the form of a child node, and waits for subsequent data to continue to be written;
[0074] In step D, the field programmable gate array 12 traverses the balanced tree 212, retrieves the key values stored in the log file 211 and the data corresponding to the physical address, and writes them in the form of key-value data pairs in sequence into the solid state drive 22 for storage as a sorted string table file. The field programmable gate array 12 retrieves the key values and data stored in the log file 211 with the index records corresponding to the nodes of the balanced tree 212, clears the data and returns to execute step C.
[0075] Specifically, the FPGA receives the key-value data from the controller<key,value> The sequence is saved to the log file 211 and<key,value> The key value key corresponding to the key-value data pair and the physical address addr where the data value is stored construct the key-value address pair<key,addr> ;FPGA based on key-value address pair<key,addr> And the left and right pointers PL and PR form an index record <0,<key,addr> ,0>.<key,value> Sorting is performed while inputting. When the PCM reaches the threshold, the FPGA traverses the B-Tree layer by layer and sequentially reads the data to the L0 layer of the LSM tree and stores it as an SST file.
[0076] Reference Figure 5 LSM-Tree uses hierarchical components L1-L6 on SSD, and the capacity of each layer of components increases exponentially, forming a tree structure that is narrow at the top and wide at the bottom. LSM-Tree supports operations such as writing, deleting, and updating. Each layer of components is composed of multiple SSTable files, and the data key values stored in each SSTable file are ordered and non-overlapping. When the i-th level component reaches the threshold, the SSTable files on the Li and Li+1 layer components are merged and sorted, and the reorganized data is written to the Li+1 component. When a new SSTable file is generated and written to the Li+1 component, the SSTable file previously read from the Li+1 component is deleted.
[0077] SSTable files are constructed based on B-Trees in the PCRAM storage area.<key,addr> When the corresponding data reaches the PCRAM storage data threshold, the FPGA traverses the B-Tree stored in the PCRAM area and finds the key value address pair in the index record managed by the B-Tree.<key,addr> The corresponding key value key and the data value stored in the address addr constitute a key-value data pair<key,value> , and write it to the SSTable file in the first layer L1 component of the B-Tree at one time, clear the key value and data stored in the log file 211 corresponding to the B-Tree index record, and clear the B-Tree at the same time.
[0078] SSTable files are the main files for storing key-value LSM-Tree data. They are stored in layers in SSD. The data key values stored in different SSTable files at the same level are ordered and non-overlapping, which is convenient for quick search. SSTable files at different levels form the hierarchical structure of LSM-Tree components on SSD.
[0079] Reference Figure 6 ,When the i-th level component of LSM-Tree reaches the threshold, the upper component Li migrates to the lower component Li+1, and DRAM is used to implement the merging and sorting operations of SSTable files whose key ranges overlap between the components Li+1 and Li.
[0080] Reference Figure 7 , the steps for reading LSM-Tree data are as follows:
[0081] When a read data request is received, the FPGA traverses the key value B-Tree in turn with the read request key value key, looking for an index record that matches the key value. If it exists, the FPGA will search for the index record found. <PL,<key,addr> ,PR>Key-value address pair<key,addr> The data value stored in the physical address addr corresponding to the internal key value key completes the data reading task. If the data is not stored in PCRAM, the SSTable files of each level of LSM-Tree are scanned sequentially until the data value corresponding to the key value key is found, and the corresponding data is loaded into DRAM. If the corresponding key value is still not found after searching the last level, the search error information is returned.
[0082] Reference Figure 8 , the steps to read LSM-Tree and write data are as follows:
[0083] Step C1: When receiving a write data request, FPGA first writes the input key value data pair to the<key,value> The log file 211 is recorded for failure recovery.
[0084] Step C2, check whether the capacity of the current log file 211 reaches the threshold, if not, execute step E, if yes, execute step F;
[0085] Step E: FPGA builds the physical address addr corresponding to the key value key and the stored data value<key,addr> data pair, and fill it with the data pair and two null pointers <0,<key,addr> ,0>Index record, FPGA traverses the key value B-Tree based on the size of the key value of the newly created index record, sets the corresponding pointer to point to the index record, and inserts the above index record into the key value B-Tree in the form of a child node. After the data is inserted, it waits for subsequent data to continue to be written;
[0086] Step F, FPGA sequentially traverses the key value B-Tree stored in PCM, and retrieves the key value key and the data value corresponding to addr stored in the log file 211 according to the records corresponding to each node of the key value B-Tree, and stores the key value and the corresponding data in a single<key,value> The key values and data corresponding to all the node records of the B-Tree are written into the SSD in sequence as a SSTable file for storage. After the key values and data corresponding to all the node records of the B-Tree are written into the SSD, the FPGA sequentially traverses the key value B-Tree stored in the PCM, and retrieves the key values and the corresponding data stored in the log file 211 with the index records corresponding to each node of the key value B-Tree, and clears the data. Finally, the key value B-Tree is cleared to prepare for the subsequent data writing, and then returns to execute step E.
[0087] In a preferred embodiment, the field programmable gate array 12 traverses the nodes of the balanced tree 212 based on the key value size, sets and sorts the index records in the order of large on the left and small on the right.
[0088] Reference Figure 4The LSM tree creation process includes: FPGA receives the key-value data pairs from the controller<key0,value0> If the LSM tree in the current PCRAM is empty, a new B-Tree is created to input the data pair<key0,Value0> Create a root node, first form a key-value address pair with key0 and the starting address Addr0 of Value0<key0,Addr0> , and then insert the data pair into a new record, and set the left and right child node address pointers of the record to 0, thereby forming a new root node index record T0<0,<key0,Addr0> ,0>, if there is a non-empty node in the LSM tree in the current PCRAM, first form a key-value address pair with the starting address Addr0 of key0 and Value0<key0,Addr0> , and then the key-value address pair<key0,Addr0> Insert a new index record and set the left and right child node address pointers of the record to 0, thereby forming a complete index record of a new node T0<0.<key1,Addr1> ,0>, traverse each node of the B-Tree based on the size of the key value key0, in the order of left largest and right smallest, and set the corresponding left and right pointers of other nodes to point to the newly created index record <0,<key0,addr0> ,0>, implement key-value data pairs<key0,value0> Sorting is done while input is being processed.
[0089] In the field programmable gate array 12, after the sorting data is read in, it passes through the FPGA sorting algorithm, passes through the balanced tree 212 and the data linked list 121, and finally passes through the decoding algorithm operation.
[0090] The LSM-Tree of the present invention has efficient reading and writing performance. When the data capacity of a component exceeds a threshold, the component will trigger a merge and sort operation. Each time, two adjacent layers of components participate in the merge and sort operation. During the merge and sort process, the data participating in the merge and sort operation on the two components are sorted, and invalid and old versions of data are deleted to ensure the orderliness and accuracy of the data.
[0091] When the i-th level component reaches the threshold, the SSTable files on the Li component are merged and sorted, and the reorganized data is written to the Li+1 component. When data moves from the L1 component to the L2 component, in order to ensure that the key-range between the SSTable files migrated to the L2 component and the original SSTable files of the L2 component does not overlap, it is necessary to read all SSTableT files in the L2 component that cover the key-range of the L1 component and merge and sort the SSTable files on the L1 component. When a new SSTable file is generated, it is written to the L2 component and the SSTable file previously read from the L2 component is deleted. The orderliness and accuracy of the data are ensured by continuously migrating data from the upper-level components to the lower-level components.
[0092] In summary, this application provides a log structure merge tree and data reading and writing method based on a dual heterogeneous system. It is a key-value LSM tree based on a log sharing of a new storage system, which reduces the size of the LSM tree and alleviates the write amplification problem to a certain extent. It is applied to systems that build heterogeneous storage and DRAM+FPGA heterogeneous computing by DRAM+PCRAM+SSD to convert SSD random write operations into batch sequential writes, reduce write amplification, and improve high-throughput write performance.
[0093] The above description is only a preferred embodiment of the present invention, and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the description and illustrations of the present invention should be included in the protection scope of the present invention.
Claims
1. A log structured merge tree based on a dual heterogeneous system, characterized in that: include, A heterogeneous computing module (1), wherein the heterogeneous computing module (1) comprises: A dynamic random access memory (11), used for calculating and generating key-value data pairs; A field programmable gate array (12), connected to the dynamic random access memory (11), used for reading in the key-value data pairs and sorting them; A heterogeneous storage module (2) is connected to the heterogeneous computing module (1), and the heterogeneous storage module (2) includes: A phase-change random access memory (21) is used to store a log file (211) and a balanced tree (212), wherein the log file (211) stores the sorted key-value data pairs; A solid state drive (22) is connected to the phase change random access memory (21) and is used to store multiple hierarchical components.
2. The log structure merge tree based on dual heterogeneous system according to claim 1, characterized in that: The balanced tree (212) includes a plurality of key-value address pairs, wherein the key-value address pairs include key values corresponding to the key-value data pairs and physical addresses corresponding to the data in the key-value data pairs.
3. The log structure merge tree based on dual heterogeneous system according to claim 1, characterized in that: The capacity of the hierarchical components in the solid state drive (22) increases exponentially, forming a tree structure that is narrow at the top and wide at the bottom.
4. The log structure merge tree based on dual heterogeneous system according to claim 3, characterized in that: The hierarchical component includes a plurality of sorted string table files, and the key values stored in the sorted string table files are ordered and non-overlapping.
5. The log structure merge tree based on dual heterogeneous system according to claim 2, characterized in that: Each node data of the balanced tree (212) is an index record, and the index record includes the key-value address pair and a pointer.
6. The log structure merge tree based on dual heterogeneous system according to claim 5, characterized in that: The pointers in the index record include a null pointer, a left pointer, and a right pointer.
7. The log structure merge tree based on dual heterogeneous systems according to claim 5, characterized in that: The pointer in the index record is used to record the ascending order of the key values in the key-value address pair.
8. The log structure merge tree based on dual heterogeneous systems according to claim 5, characterized in that: The field programmable gate array (12) traverses the nodes of the balanced tree (212) based on the size of the key value, and sets and sorts the index records in the order of large on the left and small on the right.
9. A data reading method based on a log structure merge tree, characterized in that: Used to read the data of the log structure merge tree according to any one of claims 1 to 8, including: Step S1, the field programmable gate array (12) receives a read data request; Step S2, traversing the balanced tree (212) in sequence based on the key value of the read data request, and searching whether there is an index record matching the key value of the read data request, if yes, executing step A, if not, executing step B; Wherein, step A reads the data stored in the physical address corresponding to the key value in the key-value address pair in the index record; Step B sequentially scans and searches the hierarchical components until the data corresponding to the key value is found, and loads the data into the dynamic random access memory (11), or When no data is found in all the hierarchical components, a search error message is returned.
10. A data writing method based on a log structure merge tree, characterized in that: Used to write data into the log structure merge tree according to any one of claims 1 to 8, comprising: Step G1, the field programmable gate array (12) receives a write data request; Step G2, recording the input key-value data pair in the log file (211); Step G3, checking whether the capacity of the current log file (211) reaches a threshold value, if not, executing step C, if yes, executing step D; In step C, the field programmable gate array (12) constructs an index record based on the key value and the physical address of the stored data, and the field programmable gate array (12) traverses the balanced tree (212) based on the key value size of the index record, inserts the index record into the balanced tree (212) in the form of a child node, and waits for subsequent data to continue to be written; In step D, the field programmable gate array (12) traverses the balanced tree (212), retrieves the key values stored in the log file (211) and the data corresponding to the physical address, and writes them in the form of key-value data pairs in order into the solid state drive (22) as a sorted string table file for storage. The field programmable gate array (12) retrieves the key values and data stored in the log file (211) using the index records corresponding to the nodes of the balanced tree (212), clears the data, and then returns to execute step C.