Rapid thermal annealing treatment method for bonded wafer

By performing at least three gradual cooling treatments on the SOI wafer after heating up the SOI wafer, the lattice defect problem caused by rapid cooling in rapid thermal annealing treatment is solved, and more uniform thermal stress distribution and better mechanical properties are achieved. .

CN119419122APending Publication Date: 2025-02-11SHANGHAI SIMWINGS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411480836.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-22
Publication Date
2025-02-11

AI Technical Summary

Technical Problem

During the rapid thermal annealing process of SOI wafers, rapid cooling leads to lattice defects such as dislocation slip inside the wafer, forming slip lines, increasing the risk of brittle fracture and the inhomogeneity of local plastic deformation, and affecting the overall mechanical properties.

Method used

A fast thermal annealing treatment method for bonded wafers is adopted, including at least three gradual cooling treatments after the bonded wafer is subjected to gradually reduce the temperature from the target temperature to the initial temperature.

Benefits of technology

Through gradual cooling treatment, the thermal stress shock caused by rapid temperature drop is reduced, the thermal stress distribution is uniformized, the number of dislocation slip defects and slip lines is reduced, and the mechanical properties of the wafer are improved.

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Abstract

The invention provides a rapid thermal annealing treatment method for a bonded wafer, and the method comprises the steps: carrying out the heating treatment of the bonded wafer, and carrying out the cooling treatment of the bonded wafer for at least three times, so as to gradually reduce the temperature of the bonded wafer from a target temperature to an initial temperature. Thus, in the cooling treatment process of the bonded wafer, the bonded wafer gradually adapts to the temperature change, thermal stress impact caused by rapid temperature drop is reduced, the temperature difference of different positions of the bonded wafer can be reduced, thermal stress distribution of the bonded wafer is more uniform, dislocation and slippage defects in the bonded wafer are reduced, and the bonding quality of the bonded wafer is improved. And therefore, slip lines in the bonded wafer are reduced.
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Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a bonding wafer rapid thermal annealing processing method. Background Art

[0002] As a full dielectric isolation technology, SOI (Silicon-On-Insulator) wafers have many advantages over bulk silicon devices, including low power consumption (low leakage current), high speed (low parasitic capacitance), strong anti-interference ability, and high integration density (isolation area). In the process of SOI wafer preparation, after the bonding of the supporting substrate and the device layer in the SOI wafer is completed, the SOI wafer is usually required to be subjected to rapid thermal annealing to relieve the stress inside the SOI wafer. However, if Figure 1 As shown, in the current rapid thermal annealing process of the SOI wafer 10, the temperature of the SOI wafer 10 is usually directly and rapidly reduced to the initial temperature in the cooling stage. Due to the fast cooling rate in the cooling stage, the SOI wafer 10 is heated unevenly, which causes lattice defects such as dislocation slip inside the SOI wafer 10, and then forms slip lines 10a, especially in the edge area of ​​the SOI wafer 10. After the SOI wafer 10 is rapidly heat-treated using the current rapid cooling method, the number of slip lines 10a in the edge area of ​​the SOI wafer 10 is measured to be 35. More slip lines 10a will increase the risk of brittle fracture of the SOI wafer 10, and may also cause uneven local plastic deformation, thereby affecting the overall mechanical properties of the SOI wafer 10. Summary of the invention

[0003] The object of the present invention is to provide a method for rapid thermal annealing of bonded wafers to reduce dislocation slip defects in the bonded wafers.

[0004] To achieve the above object, the present invention provides a method for rapid thermal annealing of a bonded wafer, comprising:

[0005] Provide bonded wafers;

[0006] Performing a temperature raising process on the bonded wafer to raise the temperature of the bonded wafer from an initial temperature to a target temperature, and maintaining the temperature for a first preset time;

[0007] The bonded wafer is subjected to at least three temperature reduction processes to gradually reduce the temperature of the bonded wafer from the target temperature to the initial temperature.

[0008] Optionally, the method of performing at least three cooling processes on the bonded wafer includes:

[0009] Performing a first temperature reduction process on the bonded wafer to reduce the temperature of the bonded wafer from the target temperature to a first preset temperature, and maintaining the temperature for a second preset time;

[0010] Performing a second temperature reduction process on the bonded wafer to reduce the temperature of the bonded wafer from the first preset temperature to a second preset temperature, and maintaining the temperature for a third preset time;

[0011] A third temperature reduction process is performed on the bonded wafer to reduce the temperature of the bonded wafer from the second preset temperature to the initial temperature.

[0012] Optionally, the first preset temperature is 1010° C. to 1150° C., and the second preset time is 5s to 30s.

[0013] Optionally, the first preset temperature is 1050° C. to 1100° C., and the second preset time is 10s to 15s.

[0014] Optionally, the second preset temperature is 800° C. to 1000° C., and the third preset time is 5s to 30s.

[0015] Optionally, the second preset temperature is 800° C. to 950° C., and the third preset time is 10s to 25s.

[0016] Optionally, the second preset temperature is 850°C to 900°C, and the third preset time is 11s to 20s.

[0017] Optionally, process gases used in performing the first cooling treatment, the second cooling treatment and the third cooling treatment on the bonded wafer include at least one of nitrogen, argon and hydrogen.

[0018] Optionally, the target temperature is 1180°C-1250°C, and the first preset time is 20s-40s.

[0019] Optionally, the target temperature is 1190° C. to 1200° C., and the first preset time is 30s to 40s.

[0020] In the bonding wafer rapid thermal annealing treatment method provided by the present invention, after the bonding wafer is heated, the bonding wafer is cooled at least three times to gradually reduce the temperature of the bonding wafer from the target temperature to the initial temperature. In this way, during the cooling process of the bonding wafer, the bonding wafer can gradually adapt to the temperature change, reduce the thermal stress shock caused by the rapid temperature drop, and reduce the temperature difference at different positions of the bonding wafer, so that the thermal stress distribution is more uniform, thereby reducing the dislocation slip defects in the bonding wafer during the rapid thermal treatment process, and further reducing the slip lines in the bonding wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the surface of a bonded wafer after rapid thermal annealing in the prior art;

[0022] Figure 2 It is a schematic flow chart of a bonding wafer rapid thermal annealing method provided by an embodiment of the present invention;

[0023] Figure 3 It is a schematic structural diagram of a bonded wafer formed in the bonded wafer rapid thermal annealing method provided in an embodiment of the present invention;

[0024] Figure 4 It is a schematic diagram of temperature changes during the heating and cooling processes in the bonding wafer rapid thermal annealing method provided by an embodiment of the present invention;

[0025] Figure 5 and Figure 6 It is a surface schematic diagram of a bonded wafer in a bonded wafer rapid thermal annealing method provided in an embodiment of the present invention.

[0026] The reference numerals are described as follows:

[0027] 10-SOI wafer; 10a-slip line;

[0028] 100 - bonding wafer; 100a - slide line; 110 - supporting substrate; 110 - insulating buried layer; 120 - device layer. DETAILED DESCRIPTION

[0029] The following is a further detailed description of the bonding wafer rapid thermal annealing method proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0030] Figure 2 It is a flow chart of a rapid thermal annealing method for bonded wafers provided in an embodiment of the present invention.

[0031] like Figure 2 As shown, the bonding wafer rapid thermal annealing method provided in this embodiment includes:

[0032] Step S1: providing a bonding wafer;

[0033] Step S2: performing a temperature raising process on the bonded wafer to raise the temperature of the bonded wafer from an initial temperature to a target temperature, and maintaining the temperature for a first preset time;

[0034] Step S3: performing a temperature reduction treatment on the bonded wafer at least three times to gradually reduce the temperature of the bonded wafer from the target temperature to the initial temperature.

[0035] Figure 3 FIG. 1 is a schematic diagram of the structure of a bonded wafer formed in the method for rapid thermal annealing of a bonded wafer provided in an embodiment of the present invention. Figure 3 The rapid thermal annealing method for bonded wafers provided in this embodiment is described in more detail.

[0036] refer to Figure 3 , which is a schematic diagram of the structure of the bonded wafer in the rapid thermal annealing method of the bonded wafer provided by an embodiment of the present invention. Figure 3 As shown, step S1 is performed to provide a bonding wafer 100, wherein the bonding wafer 100 includes a supporting substrate 110, an insulating buried layer 120 and a device layer 130 stacked in sequence from bottom to top, that is, the bonding wafer 100 is a SOI (Silicon-On-Insulator) wafer. The supporting substrate 110 and the device layer 130 are bonded by a bonding process, and the supporting substrate 110 and the device layer 130 are isolated by the insulating buried layer 120.

[0037] In this embodiment, the material of the support substrate 110 and the material of the device layer 130 are both silicon, and the thickness of the device layer 130 and the thickness of the support substrate 110 can be 770μm to 780μm. The material of the insulating buried layer 120 can be silicon oxide, and its thickness can be greater than or equal to 0.2μm and less than or equal to 1μm.

[0038] In a further solution, a reinforcement heat treatment is further performed on the bonded wafer 100 to enhance the bonding strength between the support substrate 110 and the device layer 130 .

[0039] Next, step S2 is performed to heat the bonded wafer 100 to raise the temperature of the bonded wafer 100 from the initial temperature to the target temperature, and maintain the temperature for a first preset time. The target temperature is 1180°C to 1250°C, and the first preset time is 20s to 40s. Preferably, the target temperature is 1190°C to 1200°C, and the first preset time is 30s to 40s.

[0040] In this embodiment, the temperature increase treatment of the bonded wafer 100 may include three steps: a first temperature increase treatment, a second temperature increase treatment, and a third temperature increase treatment. Specifically, the method of temperature increase treatment of the bonded wafer 100 includes:

[0041] First, the bonded wafer 100 is subjected to a first temperature increase process to increase the temperature of the bonded wafer 100 from an initial temperature to a second preset temperature, and maintained for a third preset time, wherein the second preset temperature is 800° C. to 1000° C. and the third preset time is 5s to 30s.

[0042] Then, the bonded wafer 100 is subjected to a second temperature rising treatment to raise the temperature of the bonded wafer 100 from the second preset temperature to the first preset temperature and maintain it for a second preset time; wherein the first preset temperature is 1010°C to 1150°C and is maintained for 5s to 30s, preferably 10s to 15s.

[0043] It should be noted that if the second preset time and the third preset time are too long, for example, greater than 35 seconds, it will have a significant impact on the production capacity of the machine, which is not conducive to improving the manufacturing efficiency of the device. If the second preset time and the third preset time are too short, it is not conducive to reducing the thermal stress impact on the bonded wafer 100 caused by the rapid temperature rise. Therefore, the second preset time and the third preset time in this embodiment are both 5s to 30s, preferably 10s to 15s. In this way, while ensuring that the thermal stress impact on the bonded wafer 100 caused by the rapid temperature rise is reduced, the impact on the machine production capacity can be reduced.

[0044] Next, the bonded wafer 100 is subjected to a third temperature increase process to increase the temperature of the bonded wafer 100 from the second preset temperature to the target temperature and maintain the temperature for a first preset time. The target temperature is 1180°C to 1250°C, preferably 1190°C to 1200°C, and the first preset time is 20s to 40s, preferably 30s to 40s.

[0045] That is, in the process of heating the bonded wafer 100, the temperature of the bonded wafer 100 is increased from the initial temperature to the second preset temperature, and from the second preset temperature to the first preset temperature, and then from the first preset temperature to the target temperature. In other words, the temperature of the bonded wafer 100 is gradually increased to the target temperature, and in the process of gradually increasing from the initial temperature to the target temperature, the temperature of the bonded wafer 100 is maintained for the second preset time at the first preset temperature and for the third preset time at the second preset temperature. In this way, the bonded wafer 100 can gradually adapt to the temperature change and reduce the thermal stress shock caused by the rapid temperature rise. The temperature difference at different positions of the bonded wafer 100 can be reduced by gradually heating up, so that the thermal stress distribution is more uniform, which is beneficial to reducing the dislocation slip defects in the bonded wafer 100 during the heating process.

[0046] In addition, during the temperature rise process of the bonded wafer 100, the stress inside the bonded wafer 100 will gradually be released. The first temperature rise process, the second temperature rise process and the third temperature rise process are conducive to smoothly releasing the stress inside the bonded wafer 100, thereby avoiding deformation or damage of the bonded wafer 100 caused by stress concentration.

[0047] Preferably, the heating rate of the first heating treatment, the heating rate of the second heating treatment, and the heating rate of the third heating treatment are all the same. In this way, the bonded wafer 100 can be evenly heated during the heating process, avoiding the concentration of thermal stress caused by excessively high or low local temperatures, and helping to reduce the thermal stress shock caused by the rapid temperature change of the bonded wafer 100, thereby reducing the risk of deformation or breakage of the bonded wafer 100. In addition, the first heating treatment, the second heating treatment, and the third heating treatment all use the same heating rate to simplify the process flow. Among them, the heating rates of the first heating treatment, the second heating treatment, and the third heating treatment are all 10℃ / s to 50℃ / s.

[0048] In this embodiment, the process gases used in the first temperature rising treatment, the second temperature rising treatment, and the third temperature rising treatment all include at least one of nitrogen, argon, and hydrogen.

[0049] In this embodiment, the first temperature rise treatment, the second temperature rise treatment and the third temperature rise treatment are performed on the bonded wafer 100 by a rapid thermal annealing furnace tube to achieve precise temperature control. Optionally, during the first temperature rise treatment, the second temperature rise treatment and the third temperature rise treatment, the temperature of the bonded wafer 100 during the first temperature rise treatment, the second temperature rise treatment and the third temperature rise treatment can be adjusted by adjusting the heating source power of the rapid thermal annealing furnace tube, so that the temperature of the bonded wafer 100 gradually increases from the initial temperature to the target temperature. Among them, the surface temperature of the bonded wafer 100 during the heating process can be monitored in real time by a temperature monitor and the surface temperature of the bonded wafer 100 can be provided to the feedback control system in real time to adjust the heating source power through the feedback control system.

[0050] Next, step S3 is executed to perform a temperature reduction process on the bonded wafer 100 at least three times to gradually reduce the temperature of the bonded wafer from the target temperature to the initial temperature.

[0051] In this embodiment, the third cooling treatment of the bonded wafer 100 is taken as an example for explanation. Specifically, the method of performing at least three cooling treatments on the bonded wafer includes performing a first cooling treatment, a second cooling treatment and a third cooling treatment on the bonded wafer in sequence.

[0052] The first temperature reduction process is performed on the bonded wafer to reduce the temperature of the bonded wafer 100 from the target temperature to a first preset temperature, and the temperature is maintained for a second preset time.

[0053] In this embodiment, the first preset temperature is 1010°C to 1150°C, preferably 1050°C to 1100°C, and the second preset time is 5s to 30s, preferably 10s to 15s. The temperature difference between the second preset temperature and the target temperature is small, so that the bonded wafer 100 can gradually adapt to the temperature change and reduce the thermal stress shock caused by the rapid temperature drop.

[0054] The process gas used in the first cooling treatment includes at least one of nitrogen, argon and hydrogen to protect the surface of the bonded wafer 100 during the first cooling treatment, prevent oxidation and contamination of the surface of the bonded wafer 100, and facilitate uniform cooling, thereby helping to reduce thermal stress.

[0055] The second temperature reduction process is performed on the bonded wafer 100 to reduce the temperature of the bonded wafer 100 from the first preset temperature to a second preset temperature, and the temperature is maintained for a third preset time.

[0056] In this embodiment, the second preset temperature is 800°C to 1000°C, and the third preset time is 5s to 30s. Preferably, the second preset temperature is 800°C to 950°C, and the third preset time is 10s to 25s. In a more specific embodiment, the second preset temperature is 850°C to 900°C, and the third preset time is 11s to 20s. In this way, the temperature difference between the second preset temperature and the first preset temperature is small, so that the bonded wafer 100 can gradually adapt to the temperature change and reduce the thermal stress shock caused by the rapid temperature drop.

[0057] In this embodiment, the process gas used in the second cooling treatment includes at least one of nitrogen, argon and hydrogen, so as to protect the surface of the bonded wafer 100 during the second cooling treatment, prevent the surface oxidation and contamination of the bonded wafer 100, and facilitate uniform cooling, thereby helping to reduce thermal stress.

[0058] Next, the bonded wafer 100 is subjected to a third temperature reduction process to reduce the temperature of the bonded wafer 100 from the second preset temperature to the initial temperature, wherein the initial temperature refers to the temperature of the bonded wafer 100 before the temperature increase process.

[0059] In this embodiment, the process gas used in the third cooling treatment includes at least one of nitrogen, argon and hydrogen, so as to protect the surface of the bonded wafer 100 during the third cooling treatment, prevent the surface oxidation and contamination of the bonded wafer 100, and facilitate uniform cooling, thereby helping to reduce thermal stress.

[0060] In the present embodiment, in the process of cooling the bonded wafer 100, the temperature of the bonded wafer 100 is reduced from the target temperature to the first preset temperature, and from the first preset temperature to the second preset temperature, and then from the second preset temperature to the initial temperature. That is to say, the temperature of the bonded wafer 100 is gradually reduced from the target temperature to the initial temperature, and in the process of gradually reducing from the target temperature to the initial temperature, the bonded wafer 100 is maintained at the first preset temperature for a second preset time and at the second preset temperature stage for a third preset time. In this way, the bonded wafer 100 can gradually adapt to the temperature change and reduce the thermal stress shock caused by the rapid temperature drop. The temperature difference at different positions of the bonded wafer 100 can be reduced by gradually cooling down, so that the thermal stress distribution of the bonded wafer 100 is more uniform, thereby reducing the dislocation slip defects inside the supporting substrate 110, the insulating buried layer 120 and the device layer 130 of the bonded wafer 100, and further reducing the slip lines in the bonded wafer 100.

[0061] In addition, during the temperature reduction process of the bonded wafer 100 , the bonded wafer 100 can be cooled evenly to prevent deformation or breakage caused by rapid temperature reduction.

[0062] Preferably, the cooling rate of the first cooling treatment, the cooling rate of the second cooling treatment, and the cooling rate of the third cooling treatment are all the same. In this way, the bonded wafer 100 can be evenly cooled during the first cooling treatment, the second cooling treatment, and the third cooling treatment, avoiding the integration of thermal stress inside the bonded wafer 100 due to the rapid drop in local temperature, which is beneficial to reducing the stress difference inside the bonded wafer 100, thereby reducing the risk of deformation or fracture of the bonded wafer 100 caused by excessive thermal stress. In addition, the first cooling treatment, the second cooling treatment, and the third cooling treatment all use the same cooling rate to simplify the process flow.

[0063] In this embodiment, the process gases used in the first cooling treatment, the second cooling treatment and the third cooling treatment all include at least one of nitrogen, argon and hydrogen to prevent the bonded wafer 100 from being oxidized during the cooling treatment and to improve the cooling efficiency.

[0064] In this embodiment, the first cooling treatment, the second cooling treatment and the third cooling treatment are performed on the bonded wafer 100 by a rapid thermal annealing furnace tube to achieve precise temperature control. Optionally, during the first cooling treatment, the second cooling treatment and the third cooling treatment, the temperature of the bonded wafer 100 during the first cooling treatment, the second cooling treatment and the third cooling treatment can be adjusted by adjusting the heating source power of the rapid thermal annealing furnace tube, so that the temperature of the bonded wafer 100 is gradually reduced from the target temperature to the initial temperature. Among them, the surface temperature of the bonded wafer 100 during the first cooling treatment, the second cooling treatment and the third cooling treatment can be monitored in real time by a temperature monitor, and the surface temperature of the bonded wafer 100 can be provided to the feedback control system in real time to adjust the heating source power through the feedback control system.

[0065] Figure 4 Schematic diagram of temperature changes during the heating and cooling processes in the bonding wafer rapid thermal annealing method provided by an embodiment of the present invention. Figure 4 Curve a in FIG. 1 is a temperature variation curve during the heating and cooling treatments of the bonded wafer 100. This embodiment realizes rapid thermal annealing of the bonded wafer 100 by combining a heating treatment with at least three cooling treatments to relieve stress inside the bonded wafer 100 and repair lattice defects inside the bonded wafer 100.

[0066] In addition, during the cooling and heating processes of the present embodiment, the temperature for waiting for heating (i.e., the first preset temperature and the second preset temperature) is the same as the temperature for waiting for cooling (i.e., the first preset temperature and the second preset temperature), and the waiting time (i.e., the second preset time) is also the same. In this way, the process stability of the bonded wafer 100 during the rapid thermal annealing process can be ensured, and the parameter setting of the rapid thermal annealing process can be simplified, which is conducive to achieving consistent process effects between different batches of bonded wafers 100, thereby improving the stability and reliability of the product.

[0067] In this embodiment, after the bonded wafer 100 is subjected to the third temperature reduction treatment, the bonded wafer 100 is subjected to a thinning treatment to reduce the thickness of the device layer 130 in the bonded wafer 100 to a preset thickness.

[0068] Four embodiments are provided below to further illustrate the effect of the rapid thermal annealing method for bonded wafers provided in this embodiment.

[0069] Table 1. Comparison table of Example 1, Example 2, Example 3 and Example 4

[0070]

[0071] The numbers of edge slip lines in Table 1 are all obtained based on actual measurement results after the bonded wafer 100 is subjected to a rapid thermal annealing treatment using the rapid thermal annealing treatment method for the bonded wafer 100 provided in this embodiment.

[0072] For example, in the first embodiment, the target temperature of the bonding wafer 100 is 1200° C., the first preset temperature during the first cooling process is 1100° C., the second preset temperature during the second cooling process is 900° C., and the second preset time and the third preset time are both 5s. Figure 5 , Figure 5 FIG. 1 is a schematic diagram of the surface of the bonded wafer 100 after the bonded wafer 100 is subjected to a rapid thermal annealing treatment using the process conditions in Example 1. Figure 5 In combination with Table 1, after the bonded wafer 100 is subjected to rapid thermal annealing treatment using the process conditions in Example 1, the number of slip lines 100 a in the edge region of the bonded wafer 100 is 6.

[0073] The difference between the second embodiment and the first embodiment is that the second preset time and the third preset time in the second embodiment are both 10s. Figure 6 , Figure 6 FIG. 1 is a schematic diagram of the surface of the bonded wafer 100 after the bonded wafer 100 is subjected to rapid thermal annealing treatment using the process conditions in the second embodiment. Figure 6 In combination with Table 1, after the bonded wafer 100 is subjected to rapid thermal annealing treatment using the process conditions in the second embodiment, the number of slip lines 100 a in the edge region of the bonded wafer 100 is two.

[0074] The difference between Example 3 and Example 2 is that the first preset temperature in Example 3 is 1150°C, the second preset temperature is 800°C, and after the bonded wafer 100 is subjected to rapid thermal annealing treatment using the process conditions in Example 3, the number of slip lines 100a in the edge area of ​​the bonded wafer 100 is 15.

[0075] In Example 4, only during the temperature rising process of the bonded wafer, the temperature of the bonded wafer 100 is raised to the second preset temperature and maintained for the second preset time, and the temperature of the bonded wafer 100 is raised to the first preset temperature and maintained for the second preset time, and the number of slip lines 100a in the edge area of ​​the bonded wafer 100 is 20.

[0076] By comparing the above four embodiments, it can be seen that the rapid thermal annealing method for the bonded wafer 100 provided in this embodiment can effectively reduce the slip lines in the bonded wafer 100 compared with the rapid cooling method in the prior art for rapid thermal treatment of the bonded wafer (the number of slip lines in the prior art is 35). Moreover, the number of slip lines in the above embodiments 1, 2 and 3 is less than the number of slip lines in embodiment 4, that is, by comparison, it is found that in this embodiment, the effect of maintaining the second preset time at the first preset temperature and maintaining the third preset time at the second preset temperature during the cooling process is better than the effect of maintaining the second preset time at the first preset temperature and maintaining the third preset time at the second preset temperature during the heating process.

[0077] In summary, in the bonding wafer rapid thermal annealing treatment method provided by the present invention, after the bonding wafer is heated, the bonding wafer is cooled at least three times to gradually reduce the temperature of the bonding wafer from the target temperature to the initial temperature. In this way, during the cooling process of the bonding wafer, the bonding wafer can gradually adapt to the temperature change, reduce the thermal stress shock caused by the rapid temperature drop, and reduce the temperature difference at different positions of the bonding wafer, so that the thermal stress distribution is more uniform, thereby reducing the dislocation slip defects in the bonding wafer during the rapid thermal treatment process, and further reducing the slip lines in the bonding wafer.

[0078] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for rapid thermal annealing of bonded wafers, characterized in that: include: Provide bonded wafers; Performing a temperature raising process on the bonded wafer to raise the temperature of the bonded wafer from an initial temperature to a target temperature, and maintaining the temperature for a first preset time; The bonded wafer is subjected to at least three temperature reduction processes to gradually reduce the temperature of the bonded wafer from the target temperature to the initial temperature.

2. The method for rapid thermal annealing of bonded wafers according to claim 1, characterized in that: The method of performing at least three cooling processes on the bonded wafer comprises: Performing a first temperature reduction process on the bonded wafer to reduce the temperature of the bonded wafer from the target temperature to a first preset temperature, and maintaining the temperature for a second preset time; Performing a second temperature reduction process on the bonded wafer to reduce the temperature of the bonded wafer from the first preset temperature to a second preset temperature, and maintaining the temperature for a third preset time; A third temperature reduction process is performed on the bonded wafer to reduce the temperature of the bonded wafer from the second preset temperature to the initial temperature.

3. The method for rapid thermal annealing of bonded wafers according to claim 2, characterized in that: The first preset temperature is 1010° C. to 1150° C., and the second preset time is 5s to 30s.

4. The method for rapid thermal annealing of bonded wafers according to claim 3, characterized in that: The first preset temperature is 1050° C. to 1100° C., and the second preset time is 10s to 15s.

5. The method for rapid thermal annealing of bonded wafers according to claim 2, wherein: The second preset temperature is 800° C. to 1000° C., and the third preset time is 5s to 30s.

6. The method for rapid thermal annealing of bonded wafers according to claim 5, characterized in that: The second preset temperature is 800° C. to 950° C., and the third preset time is 10s to 25s.

7. The method for rapid thermal annealing of bonded wafers according to claim 6, characterized in that: The second preset temperature is 850° C. to 900° C., and the third preset time is 11 s to 20 s.

8. The method for rapid thermal annealing of bonded wafers according to claim 2, wherein: The process gas used when performing the first temperature reduction treatment, the second temperature reduction treatment and the third temperature reduction treatment on the bonded wafer includes at least one of nitrogen, argon and hydrogen.

9. The method for rapid thermal annealing of bonded wafers according to claim 1, wherein: The target temperature is 1180° C.-1250° C., and the first preset time is 20s-40s.

10. The method for rapid thermal annealing of bonded wafers according to claim 9, characterized in that: The target temperature is 1190° C. to 1200° C., and the first preset time is 30s to 40s.