Preparation method of high-gain photoelectric detector

By using Cascode technology and common emitter amplifiers in photodetectors, the circuit structure and signal processing are optimized, and the noise and power consumption problems of existing high-bandwidth photodetectors are solved when increasing gain, achieving higher gain Stability and signal quality.

CN119421526AActive Publication Date: 2025-02-11INST OF SENSOR TECH GANSU ACAD OF SCI
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Patent Information

Application Number
CN202411270904.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-11
Publication Date
2025-02-11
Estimated Expiration
2044-09-11

AI Technical Summary

Technical Problem

When existing high-bandwidth avalanche photodetectors increase gain, they are prone to introduce noise, reduce the signal-to-noise ratio of the signal-to-noise ratio of the signal, and high-bandwidth operation requires higher current or power, increasing power consumption, and may lead to nonlinear distortion of the signal, affecting the The quality of the signal.

Method used

The semiconductor circuit is optimized by using Cascode technology, and the gain of the photodetector is improved by adjusting the bias voltage of the circuit, the configuration of the gain circuit and external signal processing. The common emitter amplifier is used as the basic amplifier to add an additional gain cascade. , optimize the signal amplifier circuit design.

Benefits of technology

It improves the gain stability and linearity of the photodetector, reduces noise and distortion, improves the signal strength and sensitivity, and improves the overall performance of the detector.

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Abstract

The invention discloses a preparation method of a high-gain photoelectric detector, and relates to the technical field of photoelectric detectors, and the method comprises the steps: S1, structural design: selecting a corresponding photoelectric material to manufacture an avalanche photodiode according to the application scene requirements and the working environment of the detector, the method comprises the following steps: S1, preparing a semiconductor wafer, S2, preparing the wafer, namely cleaning the semiconductor wafer by using an ultrasonic cleaning agent and a chemical solution, S3, treating the material, namely performing doping operation, and injecting ions containing phosphorus and boron elements into a semiconductor material by using an ion accelerator, S4, performing gain optimization, namely optimizing a circuit by using a Cascode technology, connecting circuits of two transistors, and performing gain optimization. S5, packaging and integrating: packaging the manufactured chip into a shell; according to the photoelectric detector, the circuit of the semiconductor is optimized by using a Cascode technology, the gain of the photoelectric detector can be improved by adjusting the bias voltage of the circuit, configuring the gain circuit and processing external signals, and meanwhile, the influence on output impedance is reduced, so that the high-frequency performance and the linearity of the whole circuit are improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of photoelectric detectors, and in particular to a method for preparing a high-gain photoelectric detector. Background Art

[0002] Photodetectors are electronic devices that detect light signals and convert them into electrical signals. They are widely used in optical communications, laser ranging, image sensors and other fields. The basic operating principle of photodetectors is based on the photoelectric effect, which is the phenomenon in which the interaction of photons with materials generates electric charge. Photodetectors are mainly divided into photodiodes, photomultiplier tubes, photoconductive detectors, and CMOS sensors. Photodetectors use photons hitting the sensitive area of ​​the photodetector to excite electrons or other charge carriers in the material. The excited charges are converted into electrical signals through internal circuits, which are then amplified and processed to extract useful information. The performance of a photodetector is generally determined by parameters such as its sensitivity, response time, noise level, and operating wavelength range. Photodetectors are used to receive and decode optical signals in fiber-optic communications, for laser scanning and imaging in medicine, and in laser access control systems and detectors to prevent intrusion. They are used to detect weak light signals in astronomical observations and particle physics experiments, and for image sensing in cameras and smartphones. Before actual use, photodetectors usually need to be calibrated to ensure measurement accuracy. Photodetector settings, such as gain and bias voltage, should be adjusted according to actual application requirements. Photodetectors also require regular inspection and maintenance to ensure long-term stable operation.

[0003] According to the invention patent with the publication number CN 113540273 B, a high-speed, high-gain avalanche photodetector and its preparation method are proposed. The chip includes three steps arranged from top to bottom; wherein: the first step includes the P electrode, the first ohmic contact layer, the first absorption layer, and the upper part of the second absorption layer arranged in sequence from top to bottom; the second step includes the lower part of the second absorption layer, the transition layer, the first charge layer, the multiplication layer, the second charge layer, the transit layer, and the upper part of the second ohmic contact layer arranged in sequence from top to bottom; the third step includes the lower part of the second ohmic contact layer and the insulating substrate arranged in sequence from top to bottom; the horizontal projection areas of the three steps increase in sequence. The chip multiplication layer is made of ultra-thin InAlAs material. The three-step chip is flip-bonded to the substrate;

[0004] The preparation method of this photodetector uses a method of increasing the bandwidth of the avalanche photodiode to increase the gain, but increasing the bandwidth of the avalanche photodiode will affect the signal amplification effect. The increased bandwidth may introduce more noise, thereby reducing the signal-to-noise ratio of the signal, and high-bandwidth operation usually requires higher current or power, thereby increasing power consumption. At the same time, increasing the bandwidth may also cause nonlinear distortion of the signal, affecting the signal quality. Summary of the Invention

[0005] The purpose of the present invention is to solve the deficiencies in real life, and therefore a method for preparing a high-gain photodetector is proposed to solve the above-mentioned problems.

[0006] The following technical solutions are specifically adopted:

[0007] The preparation method includes the following:

[0008] S1 structural design: Based on the application scenario requirements and working environment of the detector, optoelectronic materials with corresponding wavelength range, sensitivity, response speed, noise level, and temperature stability are selected to produce avalanche photodiodes. A photoelectric material thin film is grown on the substrate using chemical vapor deposition technology, and the structure of the photodetector is defined on the wafer using photolithography technology.

[0009] S2 Wafer Preparation: Use ultrasonic cleaning agents and chemical solutions to clean semiconductor wafers to remove surface contamination and dust. Use nitrogen and dry air to dry the cleaned wafers to remove residual moisture on their surfaces. Mechanically polish the wafers to ensure surface flatness to improve light incident efficiency and reduce defects. At the same time, chemical etching methods are used to remove the naturally formed oxide layer on the wafer surface.

[0010] S3 Material Processing: Doping is performed by using an ion accelerator to implant ions containing phosphorus and boron into semiconductor materials to adjust the electronic properties of the semiconductor, dividing the semiconductor into p-type containing positive charge carriers and n-type rich in negative charge carriers. A pn ​​junction is formed by heating and diffusion, and then annealing is performed to improve the crystal structure and electrical properties of the material.

[0011] S4 gain optimization: Cascode technology is used to optimize the circuit. The circuit of the two transistors is connected to ensure that the output of the previous circuit is connected to the input of the next circuit. Gauss's law is applied to determine the electric field distribution pattern. Then, numerical calculation methods are used to reshape the electric field distribution. At the same time, electric field simulation experiments are performed to analyze the electric field parameters, and filters are used to optimize the resonance effect.

[0012] S5 packaging and integration: The fabricated chip is encapsulated into a housing to protect it from the external environment and ensure unobstructed connection with the external circuit. Quartz is used as the optical window of the photodetector to provide a channel for the entry of light signals. Finally, optical alignment and testing are performed.

[0013] Preferably, in step S1, in the structural design operation, silicon material is selected as the substrate for manufacturing the avalanche photodiode, the infrared light detection range of the selected silicon substrate is 400-1100nm, and the breakdown voltage of the prepared avalanche photodiode is 50-200V.

[0014] Preferably, in step S1, in the structural design operation, the substrate is pretreated first, and the surface of the substrate to be deposited is cleaned and activated to remove surface impurities and oxides, and to increase the roughness of the substrate surface, increase the number of surface active sites, and ensure deposition uniformity. The gaseous precursor is then transported to the reaction chamber to ensure that the reactants effectively participate in the deposition reaction. The substrate is then placed in the reaction chamber, and the reaction temperature is controlled to be 200-350 degrees Celsius, so that the precursor undergoes a pyrolysis reaction on the substrate surface to generate a deposition material. After deposition is completed, the sample is annealed, oxidized, and polished to ensure the crystallinity and flatness of the thin film attached to the substrate.

[0015] Preferably, in step S2, during the wafer preparation operation, the ultrasonic cleaning agent used is an aqueous cleaning agent, the chemical solution used is deionized water, the cleaning time is 5-10 minutes, the number of cleanings is 3-5 times, and after cleaning is completed, it is air-dried in an environment of 40-50 degrees Celsius, and then a double-wheel polishing machine is used to mechanically polish the surface of the substrate, the pressure of the polishing head is set to 150-200N, the polishing speed is 35-50r / min, and the polishing time is 6-12h.

[0016] Preferably, in step S2, during the wafer preparation operation, a hydrofluoric acid solution with a concentration of 4-10% is used as a chemical etching solution. Before etching, the wafer is first cleaned with deionized water to remove dirt and impurities on the surface. The wafer is immersed in the etching solution, and the etching time is set according to the thickness of the oxide layer. After etching is completed, the wafer is cleaned again with deionized water to remove the residue of the etching solution, and then nitrogen is used to blow dry the wafer surface.

[0017] Preferably, in step S3, in the material processing operation, phosphide and boride are used as doping raw materials. Before doping, the doping raw materials are placed in a doping furnace for heating at a temperature of 1000-1200 degrees Celsius for 5-8 minutes. The doping material is waited for to diffuse into the semiconductor wafer. After heating, the wafer is cooled to allow the dopant to be fixed in the wafer. After doping, an electron scanning microscope and an energy spectrum analyzer are used to inspect the doping layer image. At the same time, four-probe measurement and Hall effect measurement are performed on the semiconductor wafer to verify the doping effect and the electrical properties of the semiconductor.

[0018] Preferably, in step S5, in the gain optimization operation, a common emitter amplifier is used as a basic amplifier, and an additional gain cascade tube is added between the input stage and the output stage of the basic amplifier. The cascade tube used is the same as the input tube, and the cascade tube is used as a current source. At the same time, the input signal is connected to the gate of the amplifier, and its output end is connected to the gate of the cascade tube, and the drain of the cascade tube is connected to the drain of the basic amplifier, and bias voltage is provided for all pins to ensure that the circuit operates stably at the operating point.

[0019] Preferably, in step S5, in the gain optimization operation, Gauss's theorem and the symmetry of charge distribution are used for analysis to determine the distribution law of the electric field, and the finite element method and finite difference method are used to discretize the electric field area. At the same time, numerical simulation is performed on a computer to obtain an approximate solution to the electric field distribution, thereby achieving the reshaping of the electric field distribution.

[0020] Preferably, in step S5, the avalanche photodiode is cut into individual devices, cleaned and pretreated to remove surface impurities, leads are welded to the contact points of the avalanche photodiode to ensure electrical connection, the avalanche photodiode is placed in a package base, the base is made of ceramic material to provide protection and support, and the leads are connected to the pins of the package to provide a path for connection to the external circuit, and then the package is sealed using welding technology.

[0021] Preferably, in step S5, during the packaging integration operation, a laser is used to illuminate the photosensitive area of ​​the avalanche photodiode, and the distance between the light source and the avalanche photodiode is adjusted to ensure that the center of the light beam is aligned with the photodetection area of ​​the avalanche photodiode, while monitoring the current and voltage response parameters of the avalanche photodiode to confirm the alignment effect of the light beam.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] 1. The present invention optimizes semiconductor circuits using cascode technology. By adjusting the circuit bias voltage, gain circuit configuration, and external signal processing, the gain of the photodetector can be increased. By increasing the gain of the photodetector's preamplifier and improving the signal amplification circuit design, the signal strength and sensitivity can be increased, thereby improving the overall performance of the detector. This can further reduce photodetector noise and distortion, and enhance gain stability and linearity. By configuring two transistors in series, the cascode structure can improve the amplifier's gain stability while reducing the impact on output impedance, thereby improving high-frequency performance and the linearity of the overall circuit.

[0024] 2. The present invention uses a common-emitter amplifier as a basic amplifier, which can provide higher bandwidth and relatively simple circuit design, and can also provide higher voltage gain, while having lower input impedance and higher output impedance. The common-emitter amplifier has a simple structure and is easy to implement and adjust. The Gaussian theorem and the symmetry of the charge distribution are used for analysis to determine the distribution law of the electric field, which helps to optimize the band gap adjustment effect. At the same time, it can also better understand the characteristics of the gain medium and the overall performance of the device. The finite element method and the finite difference method are used to discretize the electric field region and convert the continuous electric field distribution into a discrete calculation region for numerical analysis and solution. This refinement makes the description of the changes in the electric field, potential energy and other related quantities in each small unit more accurate, thereby improving the accuracy of the calculation results. The discretized results can be presented as electric field distribution, potential energy distribution, etc. through visualization technology. This visualization helps to understand the behavior of the electric field, identify potential problem areas, and verify the rationality of the calculation results. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 The figure is a schematic flow chart of a method for preparing a high-gain photodetector in the present invention. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0027] Example 1:

[0028] like Figure 1 As shown, a method for preparing a high-gain photodetector includes the following steps:

[0029] S1 structural design: Based on the application scenario requirements and working environment of the detector, optoelectronic materials with corresponding wavelength range, sensitivity, response speed, noise level, and temperature stability are selected to produce avalanche photodiodes. A photoelectric material thin film is grown on the substrate using chemical vapor deposition technology, and the structure of the photodetector is defined on the wafer using photolithography technology.

[0030] S2 Wafer Preparation: Use ultrasonic cleaning agents and chemical solutions to clean semiconductor wafers to remove surface contamination and dust. Use nitrogen and dry air to dry the cleaned wafers to remove residual moisture on their surfaces. Mechanically polish the wafers to ensure surface flatness to improve light incident efficiency and reduce defects. At the same time, chemical etching methods are used to remove the naturally formed oxide layer on the wafer surface.

[0031] S3 Material Processing: Doping is performed by using an ion accelerator to implant ions containing phosphorus and boron into semiconductor materials to adjust the electronic properties of the semiconductor, dividing the semiconductor into p-type containing positive charge carriers and n-type rich in negative charge carriers. A pn ​​junction is formed by heating and diffusion, and then annealing is performed to improve the crystal structure and electrical properties of the material.

[0032] S4 gain optimization: Cascode technology is used to optimize the circuit. The circuit of the two transistors is connected to ensure that the output of the previous circuit is connected to the input of the next circuit. Gauss's law is applied to determine the electric field distribution pattern. Then, numerical calculation methods are used to reshape the electric field distribution. At the same time, electric field simulation experiments are performed to analyze the electric field parameters, and filters are used to optimize the resonance effect.

[0033] S5 packaging and integration: The fabricated chip is encapsulated into a housing to protect it from the external environment and ensure unobstructed connection with the external circuit. Quartz is used as the optical window of the photodetector to provide a channel for the entry of light signals. Finally, optical alignment and testing are performed.

[0034] Specifically, in step S1, in the structural design operation, silicon material is selected as the substrate for manufacturing the avalanche photodiode. The infrared light detection range of the selected silicon substrate is 400-1100nm, and the breakdown voltage of the prepared avalanche photodiode is 50-200V.

[0035] Specifically, in step S1, in the structural design operation, the substrate is first pretreated, and the surface of the substrate to be deposited is cleaned and activated to remove surface impurities and oxides, and to increase the roughness of the substrate surface, increase the number of surface active sites, and ensure deposition uniformity. The gaseous precursor is then transported to the reaction chamber to ensure that the reactants effectively participate in the deposition reaction. The substrate is then placed in the reaction chamber, and the reaction temperature is controlled to be 200-350 degrees Celsius, so that the precursor undergoes a pyrolysis reaction on the substrate surface to generate a deposition material. After deposition is completed, the sample is annealed, oxidized, and polished to ensure the crystallinity and flatness of the thin film attached to the substrate.

[0036] From the above, it can be seen that this method uses Cascode technology to optimize the semiconductor circuit during the preparation of the photodetector. By adjusting the circuit bias voltage, gain circuit configuration and external signal processing, the gain of the photodetector can be improved. By increasing the preamplifier gain of the photodetector and improving the signal amplification circuit design, the signal intensity and sensitivity can be improved, thereby improving the overall performance of the detector, thereby reducing the noise and distortion of the photodetector and improving the gain stability and linearity. By configuring two transistors in series, the Cascode structure can improve the gain stability of the amplifier while reducing the impact on the output impedance, thereby improving the high-frequency performance and the linearity of the overall circuit.

[0037] Example 2:

[0038] like Figure 1 As shown, in the wafer preparation operation, the ultrasonic cleaning agent used is an aqueous cleaning agent, the chemical solution used is deionized water, the cleaning time is 5-10 minutes, the number of cleanings is 3-5 times, and after cleaning is completed, it is air-dried in an environment of 40-50 degrees Celsius, and then a double-wheel polishing machine is used to mechanically polish the surface of the substrate. The pressure of the polishing head is set to 150-200N, the polishing speed is 35-50r / min, and the polishing time is 6-12h.

[0039] Specifically, in step S2, during the wafer preparation operation, a hydrofluoric acid solution with a concentration of 4-10% is used as a chemical etching solution. Before etching, the wafer is first cleaned with deionized water to remove dirt and impurities on the surface. The wafer is immersed in the etching solution, and the etching time is set according to the thickness of the oxide layer. After etching is completed, the wafer is cleaned again with deionized water to remove the residue of the etching solution, and then nitrogen is used to blow dry the wafer surface.

[0040] Specifically, in step S3, in the material processing operation, phosphide and boride are used as doping raw materials. Before doping, the doping raw materials are placed in a doping furnace for heating at a temperature of 1000-1200 degrees Celsius for 5-8 minutes. The doping material is waited for to diffuse into the semiconductor wafer. After heating, the wafer is cooled to allow the dopant to be fixed in the wafer. After doping, an electron scanning microscope and an energy spectrum analyzer are used to inspect the doping layer image. At the same time, four-probe measurement and Hall effect measurement are performed on the semiconductor wafer to verify the doping effect and the electrical properties of the semiconductor.

[0041] Specifically, in the gain optimization operation, a common-emitter amplifier is used as a basic amplifier, and an additional gain cascade tube is added between the input stage and the output stage of the basic amplifier. The cascade tube used is the same as the input tube, and the cascade tube is used as a current source. At the same time, the input signal is connected to the gate of the amplifier, and its output end is connected to the gate of the cascade tube. The drain of the cascade tube is connected to the drain of the basic amplifier, and bias voltage is provided for all pins to ensure stable operation of the circuit at the operating point.

[0042] As can be seen from the above, the present invention can provide higher bandwidth and relatively simple circuit design by using a common-emitter amplifier as a basic amplifier, and can also provide higher voltage gain, while having lower input impedance and higher output impedance. In addition, the common-emitter amplifier has a simple structure and is easy to implement and adjust.

[0043] Example 3:

[0044] like Figure 1 As shown, in step S5, in the gain optimization operation, Gauss's theorem and the symmetry of the charge distribution are used for analysis to determine the distribution law of the electric field, and the finite element method and the finite difference method are used to discretize the electric field area. At the same time, numerical simulation is performed on the computer to obtain an approximate solution of the electric field distribution, thereby realizing the reshaping of the electric field distribution.

[0045] Specifically, in step S5, the avalanche photodiode is cut into individual devices, cleaned and pretreated to remove surface impurities, leads are welded on the contact points of the avalanche photodiode to ensure electrical connection, the avalanche photodiode is placed in a package base, the base is made of ceramic material to provide protection and support, and the leads are connected to the pins of the package to provide a path for connection to the external circuit, and then the package is sealed using welding technology.

[0046] Specifically, in step S5, during the packaging integration operation, a laser is used to illuminate the photosensitive area of ​​the avalanche photodiode, and the distance between the light source and the avalanche photodiode is adjusted to ensure that the center of the light beam is aligned with the photodetection area of ​​the avalanche photodiode. At the same time, the current and voltage response parameters of the avalanche photodiode are monitored to confirm the alignment effect of the light beam.

[0047] From the above, it can be seen that the present invention uses Gauss's theorem and the symmetry of charge distribution for analysis to determine the distribution law of the electric field, which helps to optimize the bandgap adjustment effect. At the same time, it can also better understand the characteristics of the gain medium and the overall performance of the device, and use the finite element method and the finite difference method to discretize the electric field area, and convert the continuous electric field distribution into a discrete calculation area for numerical analysis and solution. This refinement makes the description of the changes in the electric field, potential energy and other related quantities in each small unit more accurate, thereby improving the accuracy of the calculation results. The discretized results can be presented as electric field distribution, potential energy distribution, etc. through visualization technology. This visualization helps to understand the behavior of the electric field, identify potential problem areas, and verify the rationality of the calculation results.

[0048] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. The replacement may be a replacement of a portion of a structure, device, or method step, or it may be a complete technical solution. Any equivalent replacement or modification based on the technical solution and inventive concept of the present invention shall be covered by the scope of protection of the present invention.

Claims

1. A method for preparing a high-gain photodetector, characterized in that: The following steps are involved: S1 structural design: According to the application scenario requirements and working environment of the detector, select optoelectronic materials with corresponding wavelength range, sensitivity, response speed, noise level, and temperature stability to make avalanche photodiodes, generate optoelectronic material films on the substrate through chemical vapor deposition technology, and use photolithography technology to define the structure of the photodetector on the wafer; S2 Wafer preparation: Use ultrasonic cleaning agent and chemical solution to clean semiconductor wafers to remove pollution and dust on the semiconductor surface. Use nitrogen and dry air to dry the cleaned wafers to remove the moisture remaining on the surface. Perform mechanical polishing on the wafers to ensure the flatness of the surface to improve the light incident efficiency and reduce defects. At the same time, use chemical etching method to remove the oxide layer naturally formed on the wafer surface. S3 Material Processing: Doping operation is performed, using an ion accelerator to implant ions containing phosphorus and boron into semiconductor materials, adjusting the electronic properties of the semiconductor, dividing the semiconductor into p-type containing positive charge carriers and n-type rich in negative charge carriers, and forming a pn junction by heating and diffusion, and then performing annealing to improve the crystal structure and electrical properties of the material; S4 gain optimization: Use Cascode technology to optimize the circuit, connect the circuit of two transistors, ensure that the output of the previous circuit is connected to the input of the next circuit, apply Gauss's law to determine the electric field distribution law, and then use numerical calculation methods to reshape the electric field distribution. At the same time, conduct electric field simulation experiments to analyze the electric field parameters, and use filters to optimize the resonance effect; S5 packaging and integration: The manufactured chip is packaged into a shell to protect the chip from the external environment and ensure smooth connection with the external circuit. Quartz is used as the optical window of the photodetector to provide a channel for the entry of light signals. Finally, optical alignment and testing are performed.

2. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S1, in the structure design operation, silicon material is selected as a substrate for manufacturing an avalanche photodiode. The infrared light detection range of the selected silicon substrate is 400-1100nm, and the breakdown voltage of the prepared avalanche photodiode is 50-200V.

3. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S1, in the structure design operation, the substrate is first pretreated, and the surface of the substrate to be deposited is cleaned and activated to remove surface impurities and oxides, and to increase the roughness of the substrate surface, increase the number of surface active sites, and ensure deposition uniformity. The gas phase precursor is then transported to the reaction chamber to ensure that the reactants effectively participate in the deposition reaction. The substrate is then placed in the reaction chamber, and the reaction temperature is controlled to be 200-350 degrees Celsius, so that the precursor undergoes a pyrolysis reaction on the substrate surface to generate a deposition material. After deposition is completed, the sample is annealed, oxidized, and polished to ensure the crystallinity and flatness of the thin film attached to the substrate.

4. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S2, in the wafer preparation operation, the ultrasonic cleaning agent used is an aqueous cleaning agent, the chemical solution used is deionized water, the cleaning time is 5-10 minutes, the number of cleaning times is 3-5 times, and after cleaning, it is air-dried in an environment of 40-50 degrees Celsius, and then a double-wheel polishing machine is used to mechanically polish the surface of the substrate. The pressure of the polishing head is set to 150-200N, the polishing speed is 35-50r / min, and the polishing time is 6-12h.

5. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S2, in the wafer preparation operation, a hydrofluoric acid solution with a concentration of 4-10% is used as a chemical etching solution. Before etching, the wafer is first cleaned with deionized water to remove dirt and impurities on the surface, and the wafer is immersed in the etching solution. The etching time is set according to the thickness of the oxide layer. After etching is completed, the wafer is cleaned again with deionized water to remove the residue of the etching solution, and then nitrogen is used to blow dry the wafer surface.

6. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S3, in the material processing operation, phosphide and boride are used as doping raw materials. Before doping, the doping raw materials are placed in a doping furnace for heating at a temperature of 1000-1200 degrees Celsius for 5-8 minutes. The doping material is waited for to diffuse into the semiconductor wafer. After the heating is completed, the wafer is cooled to fix the dopant in the wafer. After the doping is completed, an electron scanning microscope and an energy spectrum analyzer are used to inspect the doping layer image. At the same time, four-probe measurement and Hall effect measurement are performed on the semiconductor wafer to verify the doping effect and the electrical properties of the semiconductor.

7. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S5, in the gain optimization operation, a common emitter amplifier is used as a basic amplifier, and an additional gain cascade tube is added between the input stage and the output stage of the basic amplifier. The cascade tube used is the same as the input tube. The cascade tube is used as a current source, and the input signal is connected to the gate of the amplifier, and its output end is connected to the gate of the cascade tube, and the drain of the cascade tube is connected to the drain of the basic amplifier. A bias voltage is provided for all pins to ensure that the circuit operates stably at the operating point.

8. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S5, in the gain optimization operation, Gauss's theorem and the symmetry of charge distribution are used for analysis to determine the distribution law of the electric field, and the finite element method and finite difference method are used to discretize the electric field region. At the same time, numerical simulation is performed on the computer to obtain an approximate solution to the electric field distribution, thereby reshaping the electric field distribution.

9. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S5, the avalanche photodiode is cut into individual devices, cleaned and pretreated to remove surface impurities, leads are welded on the contact points of the avalanche photodiode to ensure electrical connection, the avalanche photodiode is placed in a packaging base made of ceramic material to provide protection and support, and the leads are connected to the pins of the package to provide a path for connection to the external circuit, and then the package is sealed using welding technology.

10. The method for preparing a high-gain photodetector according to claim 1, characterized in that: In step S5, during the packaging integration operation, a laser is used to illuminate the photosensitive area of ​​the avalanche photodiode, and the distance between the light source and the avalanche photodiode is adjusted to ensure that the center of the light beam is aligned with the photoelectric detection area of ​​the avalanche photodiode. At the same time, the current and voltage response parameters of the avalanche photodiode are monitored to confirm the alignment effect of the light beam.

Citation Information

Patent Citations

  • A high-speed, high-gain avalanche photodetector and its fabrication method

    CN113540273B

  • Chip packaging structure

    CN112420681A

  • DOW MIXER and its design method for high frequency (RF) transmission / reception

    KR1019990003754A

  • Method, Apparatus, Material, and System of Using a High Gain Avalanche Photodetector Transistor

    US20080230862A1