LabVIEW test method for multichannel programmable output clock buffer

Abstract

The invention belongs to the technical field of automatic test programs, and particularly relates to a LabVIEW test method of a multi-channel programmable output clock buffer. Comprising the following steps: performing power-on initialization on a clock buffer; resetting the FSWP frequency spectrograph, and clearing the previous interface settings; the radio frequency switch is switched to a channel 1, and the channel 1 is opened for output; setting a signal source input frequency; setting a signal source input amplitude; signal source input is started, and the set frequency and amplitude are output to the input end of the clock buffer; starting a register configuration module, transmitting 174 24-bit register values to an SPI (Serial Peripheral Interface) in sequence through a serial port, and transmitting the values to a clock buffer by the SPI; reading data on the FSWP frequency spectrograph; according to the method, automatic measurement, data storage and advantage and disadvantage judgment are carried out on key indexes of the clock buffers of the 14 channels. The burden of testing personnel is reduced, the testing time cost is reduced, and data errors are avoided.

Description

Technical Field

[0001] The invention belongs to the technical field of automated testing programs, and in particular relates to a LabVIEW testing method for a multi-channel programmable output clock buffer. Background Art

[0002] In modern electronic systems, clock buffers have always been a very important component, especially in hardware design and system operation, their role is increasingly valued. This circuit developed by the 58th Institute of China Electronics Technology Group Corporation is a 14-channel low-noise and configurable output clock buffer that can generate up to 7 DCLK and SYSREF clock trees required by the JESD204B interface; both DCLK and SYSREF clock tree clock outputs support different output modes, including CML, LVDS, LVPECL and LVCOMS. It has been widely used in data converter clocks, phased array reference distribution, and microwave baseband cards. This clock buffer can send addresses and data to configure the output mode and frequency through the SPI transmission protocol, and can perform independent and flexible frequency and phase adjustments for each of the 14 channels. The working environment range is wide from -55℃ to +105℃.

[0003] In the current test environment, independent channels are often connected to the FSWP spectrum analyzer receiving end with an RF cable SMA connector. After testing one channel, the RF cable is unplugged and replaced with another channel until all 14 channels are tested. Alternatively, the RF switch is used to manually switch the channels for testing, and finally the data on the spectrum analyzer is recorded on paper. The entire test process is cumbersome to operate the instrument, the RF cable is often plugged in and out and is easily damaged, and recording and organizing data is also troublesome. In addition, the test time is long and cannot meet the needs of mass production testing. Summary of the invention

[0004] The purpose of the present invention is to overcome the above-mentioned shortcomings of the prior art. The present invention provides a LabVIEW test method for a multi-channel programmable output clock buffer, which uses LabVIEW to implement an automated test program system and an automatic saving method; the program-controlled instrument automatically measures the key indicators of the 14-channel clock buffer, saves data, and makes good or bad judgments, thereby reducing the burden on testers, reducing test time costs, and avoiding data errors.

[0005] To solve the above technical problems, the present invention provides a LabVIEW test method for a multi-channel programmable output clock buffer, comprising the following steps:

[0006] Step 1: Power on and initialize the clock buffer;

[0007] Step 2: Reset the FSWP spectrum analyzer to clear the previous interface settings;

[0008] Step 3: Switch the RF switch to channel 1 and turn on the output of channel 1;

[0009] Step 4: Set the signal source input frequency;

[0010] Step 5: Set the signal source input amplitude;

[0011] Step 6: Turn on the signal source input and output the set frequency and amplitude to the input end of the clock buffer;

[0012] Step 7: Enable the register configuration module, and pass the 174 24-bit register values ​​to the SPI in sequence through the serial port, and the SPI sends them to the clock buffer;

[0013] Step 8: Read the data on the FSWP spectrum analyzer;

[0014] Step 9: Display the real-time frequency swing, phase noise and jitter parameters on the test system interface;

[0015] Step 10: Determine whether the above parameters are qualified. If qualified, PASS is displayed and the green light is on. Otherwise, FAIL is displayed and the light is off. Determine whether the switch channel is greater than 14. If it is greater than 14, save the data and end the test. Otherwise, the channel of the RF switch moves 1 bit and jumps to the above step 4 to continue to repeat the operation.

[0016] Preferably, before powering on and initializing the clock buffer in step 1, the method further includes: ensuring that the clock buffer, the FSWP spectrum analyzer and the radio frequency switch are connected to the bus.

[0017] Preferably, the connection circuit of the clock buffer includes: the output end of the FSWP spectrum analyzer is connected to the input end of the clock buffer, the two output ends of the clock buffer are respectively connected to the input ends of the FSWP spectrum analyzer and the RF switch, and the output ends of the FSWP spectrum analyzer and the RF switch are respectively connected to the LabVIEW host computer via a serial cable and a network cable.

[0018] Preferably, the algorithm of the register configuration module in step 7 specifically includes:

[0019] Step I: LabVIEW host computer sends a start configuration command;

[0020] Step II: Initialize the UART1 serial port PA9 and PA10 pins of the Stm32f103 microcontroller;

[0021] Step III: Initialize the PA4, PA5, PA6 and PA7 pins of the SPI1 port of the Stm32f103 microcontroller;

[0022] Step IV: Read the register value saved in the document, and register the M0 bit, and increase the number of registers by 1;

[0023] Step V: Split the single 24-bit register value into three 8-bit data;

[0024] Step VI: Repeat the above steps IV and V, and send the registers in sequence until the M0+1th bit is greater than the X-bit address;

[0025] Step VII: Transparently transmit to SPI1 through the serial port, and SPI1 sends to the clock buffer.

[0026] Preferably, in step IV, the M0 of the M1 register value is 0.

[0027] Preferably, the sending register address range X in step VI is 0 to 174.

[0028] Compared with the prior art, the present invention has the following beneficial effects:

[0029] The present invention uses LabVIEW to realize the automated testing and storage method; the program-controlled instrument automatically measures the key indicators of the 14-channel clock buffer, stores the data, and makes quality judgments, thereby reducing the burden on testers, reducing the test time cost, and avoiding data errors. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a common test hardware connection diagram in the prior art.

[0031] Figure 2 This is the hardware connection diagram of the test system of the present invention.

[0032] Figure 3 It is a flowchart of the LabVIEW testing method of the present invention.

[0033] Figure 4 The flowchart of the register configuration module algorithm of the present invention.

[0034] Figure 5 This is a diagram of the test parameter display result interface of the present invention. DETAILED DESCRIPTION

[0035] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and in non-precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0036] like Figure 2As shown, an embodiment of the present invention discloses a LabVIEW test method for a multi-channel programmable output clock buffer. According to the hardware connection diagram, a clock buffer test board, a FSWP spectrum analyzer, and a radio frequency switch are connected to a computer via a network cable and a serial port cable.

[0037] like Figure 3 As shown, after loading the program, it starts to run automatically and test the temperature, including the following steps:

[0038] ① Start the clock buffer (power-on initialization) to ensure that the clock buffer, FSWP spectrum analyzer and RF switch are connected to the bus;

[0039] ② Reset the FSWP spectrum analyzer and clear the previous interface settings;

[0040] ③Switch the RF switch to channel 1 and turn on the output of channel 1;

[0041] ④Set the signal source input frequency;

[0042] ⑤Set the signal source input amplitude;

[0043] ⑥ Turn on the signal source input and output the set frequency and amplitude to the clock buffer input;

[0044] ⑦ Turn on the register configuration module, and pass the 174 24-bit register values ​​to the SPI in sequence through the serial port, and the SPI sends them to the clock buffer;

[0045] ⑧Read the data on the spectrum analyzer;

[0046] ⑨Display real-time frequency swing, phase noise and jitter parameters on the test system interface.

[0047] ⑩Judge whether the parameters are qualified. If qualified, PASS is displayed and the green light is on. Otherwise, FAIL is displayed and the light is off. Judge whether the switch channel is greater than 14. If it is greater than 14, save the data and end the test. Otherwise, the RF switch channel moves 1 bit and jumps to step ④ to continue to repeat the operation.

[0048] like Figure 4 As shown, the register configuration module algorithm in step ⑦ is specifically as follows:

[0049] I. LabVIEW host computer sends a start configuration command;

[0050] II. Initialize the UART1 serial port PA9 and PA10 pins of Stm32f103 microcontroller;

[0051] III. Initialize the PA4, PA5, PA6 and PA7 pins of the SPI1 port of Stm32f103 microcontroller;

[0052] IV. Read the register value saved in the document, and register the M0 bit, and increase the number of registers by 1;

[0053] V. Split a single 24-bit register value into three 8-bit data;

[0054] VI. Repeat IV and V, sending registers in sequence until the M0+1th bit is greater than the X-bit address;

[0055] Ⅶ. Transmit to SPI1 through the serial port, and SPI1 sends to the clock buffer.

[0056] like Figure 5 As shown, the output frequency of the clock buffer and the corresponding amplitude, phase noise and jitter parameter values ​​are displayed in real time. The results of the whole circuit performance judgment after the test is completed are also displayed.

[0057] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A LabVIEW test method for a multi-channel programmable output clock buffer, characterized in that: The steps include: Step 1: Power on and initialize the clock buffer; Step 2: Reset the FSWP spectrum analyzer to clear the previous interface settings; Step 3: Switch the RF switch to channel 1 and turn on the output of channel 1; Step 4: Set the signal source input frequency; Step 5: Set the signal source input amplitude; Step 6: Turn on the signal source input and output the set frequency and amplitude to the input end of the clock buffer; Step 7: Enable the register configuration module, and pass the 174 24-bit register values ​​to the SPI in sequence through the serial port, and the SPI sends them to the clock buffer; Step 8: Read the data on the FSWP spectrum analyzer; Step 9: Display the real-time frequency swing, phase noise and jitter parameters on the test system interface; Step 10: Determine whether the above parameters are qualified. If qualified, PASS is displayed and the green light is on. Otherwise, FAIL is displayed and the light is off. Determine whether the switch channel is greater than 14. If it is greater than 14, save the data and end the test. Otherwise, the channel of the RF switch moves 1 bit and jumps to the above step 4 to continue to repeat the operation.

2. The LabVIEW test method of a multi-channel programmable output clock buffer as claimed in claim 1, characterized in that: Before the clock buffer is powered on and initialized in step 1, the method further includes: ensuring that the clock buffer, the FSWP spectrum analyzer and the radio frequency switch are connected to the bus.

3. The LabVIEW test method of a multi-channel programmable output clock buffer as claimed in claim 2, characterized in that: The connection circuit of the clock buffer includes: the output end of the FSWP spectrum analyzer is connected to the input end of the clock buffer, the two output ends of the clock buffer are respectively connected to the input ends of the FSWP spectrum analyzer and the radio frequency switch, and the output ends of the FSWP spectrum analyzer and the radio frequency switch are respectively connected to the LabVIEW host computer through a serial port cable and a network cable.

4. The LabVIEW test method of a multi-channel programmable output clock buffer as claimed in claim 1, characterized in that: The algorithm of the register configuration module in step 7 specifically includes: Step I: LabVIEW host computer sends a start configuration command; Step II: Initialize the UART1 serial port PA9 and PA10 pins of the Stm32f103 microcontroller; Step III: Initialize the PA4, PA5, PA6 and PA7 pins of the SPI1 port of the Stm32f103 microcontroller; Step IV: Read the register value saved in the document, and register the M0 bit, and increase the number of registers by 1; Step V: Split the single 24-bit register value into three 8-bit data; Step VI: Repeat the above steps IV and V, and send the registers in sequence until the M0+1th bit is greater than the X-bit address; Step VII: Transparently transmit to SPI1 through the serial port, and SPI1 sends to the clock buffer.

5. The LabVIEW test method of a multi-channel programmable output clock buffer as claimed in claim 4, characterized in that: In step IV, the M0 register value of M1 is 0.

6. The LabVIEW test method of a multi-channel programmable output clock buffer as claimed in claim 4, characterized in that: The sending register address range X in step VI is 0 to 174.

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