Display panel, electronic equipment and repair method of display panel

Abstract

The invention discloses a display panel, electronic equipment and a repair method of the display panel. The display panel comprises a substrate; the first electrode group is arranged in the first electrode area and comprises a first power supply electrode, a second power supply electrode and a plurality of data signal electrodes; a bonding pin group is arranged in the bonding area and comprises a first bonding pin, a second bonding pin and a plurality of third bonding pins, the first bonding pin is electrically connected with the first power supply electrode, the second bonding pin is electrically connected with the second power supply electrode, and the plurality of third bonding pins are electrically connected with the plurality of data signal electrodes in a one-to-one correspondence manner. According to the display panel, the display reliability can be guaranteed.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, an electronic device, and a method for repairing a display panel. Background Art

[0002] With the continuous development of display technology, the application scope of display panels is becoming more and more extensive, and people's requirements for display panels are also becoming higher and higher. For example, people pay more and more attention to display image quality.

[0003] However, the inventors of the present application have found that the display reliability of the current display panel needs to be improved, and the difficulty of manufacturing needs to be further reduced. Summary of the invention

[0004] The present application provides a display panel, an electronic device and a method for repairing a display panel, which can not only ensure the display reliability of the display panel but also reduce the difficulty of preparation.

[0005] According to a first aspect of an embodiment of the present application, there is provided a display panel, the display panel comprising: a substrate, provided with a first surface and a second surface opposite to each other, wherein the second surface is provided with a first electrode area and a bonding area, the first electrode area and the bonding area are arranged at intervals along a first direction; a first electrode group, arranged in the first electrode area, the first electrode group comprises a plurality of first electrodes arranged at intervals along a second direction, the plurality of first electrodes comprise at least one first power supply electrode, at least one second power supply electrode and a plurality of data signal electrodes, wherein in the first electrode group, at least one first power supply electrode is distributed between two of the data signal electrodes, and / or at least one second power supply electrode is distributed between two of the data signal electrodes, and the second direction intersects with the first direction; a bonding pin group, the bonding pin group is arranged in the bonding area, the bonding pin group comprises a plurality of bonding pins, the plurality of bonding pins comprise a first bonding pin, a second bonding pin and a plurality of third bonding pins, the first bonding pin is electrically connected to the first power supply electrode, the second bonding pin is electrically connected to the second power supply electrode, and the plurality of third bonding pins are electrically connected to the plurality of data signal electrodes in a one-to-one correspondence.

[0006] A second aspect of an embodiment of the present application provides an electronic device, comprising a display panel as described in any one of the above items, wherein there are multiple display panels, and the multiple display panels are spliced ​​together.

[0007] A third aspect of an embodiment of the present application provides a method for repairing a display panel, which is applied to the display panel in any one of the above items, and the repair method includes: when a short circuit is detected between a first target routing and a second target routing, determining a short circuit point between the first target routing and the second target routing; cutting off the first target routing on both sides of the short circuit point; wherein the first target routing and the second target routing are formed on the second surface of the substrate, the number of the first target routing is multiple, and at least part of the first target routing and the second target routing are arranged in different layers and their orthographic projections on the substrate intersect, and the first target routing is electrically connected to the first power electrode and the first bonding pin, or the first target routing is electrically connected to the second power electrode and the second bonding pin.

[0008] The beneficial effect is: the present application sets at least one first power electrode distributed between two data signal electrodes, and / or at least one second power electrode distributed between two data signal electrodes, which can avoid the first power electrode aggregation, and / or avoid the second power electrode aggregation, thereby avoiding the current density of the first power signal and / or the second power signal in the first electrode group to be large, avoiding the problem of local high temperature caused by local current density, avoiding display abnormalities, and ensuring the reliability of display. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0010] Figure 1 It is a schematic diagram of the arrangement structure of light-emitting elements on a display panel in the prior art;

[0011] Figure 2 It is a schematic diagram of a part of the circuit structure of driving a light-emitting element to emit light in the prior art;

[0012] Figure 3 is a front structural schematic diagram of an embodiment of a display panel of the present application;

[0013] Figure 4 yes Figure 3 A schematic diagram of the back structure of the display panel;

[0014] Figure 5 It is a schematic diagram of the structure of the back side of a display panel in the prior art;

[0015] Figure 6It is a schematic diagram of the structure in which the light emitting element is electrically connected to the second electrode group in the prior art;

[0016] Figure 7 It is a schematic diagram of the structure in which display panels are spliced ​​together in the prior art;

[0017] Figure 8 is a schematic diagram of the structure in which the light-emitting element is electrically connected to the second electrode group in the present application;

[0018] Fig. 9 It is a schematic diagram of the structure in which display panels are spliced ​​together in this application;

[0019] Fig.10 is a schematic structural diagram of the back side of the display panel in another embodiment of the present application;

[0020] Fig.11 is a schematic structural diagram of a first electrode group in one embodiment of the present application;

[0021] Fig.12 It is a structural schematic diagram of an embodiment of the electronic device of the present application;

[0022] Fig.13 yes Fig.12 A schematic diagram of a cross-sectional structure of an electronic device in an application scenario;

[0023] Fig.14 yes Fig.13 A schematic diagram of the structure of the back of an electronic device from a top view;

[0024] Fig.15 It is a structural schematic diagram of an implementation method of a signal source of the present application;

[0025] Fig.16 It is a structural schematic diagram of another implementation mode of the signal source of the present application;

[0026] Fig.17 It is a schematic diagram of a flow chart of an implementation method of a display panel repair method of the present application;

[0027] Fig.18 This is a schematic structural diagram of the back side of a display panel in one embodiment of the present application;

[0028] Fig.19 This is a schematic diagram of cutting off the first target routing line. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0030] It should be noted that the terms "first" and "second" in this application are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first" and "second" can explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

[0031] Before introducing the solution of this application, a brief introduction to the background of this application is given:

[0032] Currently, in order to achieve large-size displays, several display panels are spliced ​​together. In order to achieve a borderless display panel and extremely small splicing gaps, the signal source that drives the display panel is bonded to the non-display surface of the display panel. There are currently two mainstream methods. The first is to use a substrate (such as glass), with the front side used for display and the back side used for bonding the signal source. The second is to stack two substrates, with the surfaces of the two substrates facing away from each other used as one display surface and the other as a bonding signal source.

[0033] At the same time Figure 1 As shown, on the front side of the display panel, a plurality of light emitting elements 11 (i.e., sub-pixels) form a plurality of display columns, a plurality of light emitting elements 11 in the same display column are electrically connected to the same data line 12, and light emitting elements 11 in different display columns are electrically connected to different data lines 12, that is, the display columns correspond to the data lines 12 one by one, and the data lines 12 are electrically connected to all the light emitting elements 11 in the corresponding display columns. The data lines 12 are used to transmit data signals output by a signal source to the light emitting elements 11 in the corresponding display columns.

[0034] In addition to the data signal, in order for the light emitting element 11 to emit light normally, Figure 2As shown, it is also necessary to apply ELVSS signal and ELVDD signal to both ends of the light emitting element 11. It should be noted that there is a certain circuit connected in series between the light emitting element 11 and the ELVDD signal, which is not introduced in this application.

[0035] Combine the following Figures 3 to 19 , a detailed introduction to the scheme of the present application is given. First of all, it is necessary to explain that, for the clarity of the diagram, all electrodes and pins transmitting the first power signal are marked with 1, all electrodes and pins transmitting the second power signal are marked with 2, and all electrodes and pins transmitting the data signal are marked with 3.

[0036] See also Figure 3 as well as Figure 4 In one embodiment of the present application, the display panel 10 includes a substrate 100 , a first electrode group 200 , a bonding pin group 300 and a second electrode group 400 .

[0037] The substrate 100 can be a flexible substrate or a rigid substrate, and its material can be glass, polyimide, plastic and other materials. The substrate 100 can be a single-layer structure or a stacked structure with multiple sub-substrates stacked, which is not limited here. The substrate 100 is provided with a first surface 110 and a second surface 120 facing each other, and the second surface 120 is used to bond the signal source. The first surface 110 includes a display area 111 and a non-display area 112. The display area 111 is provided with light-emitting elements and data lines and other structures. The light-emitting elements and data lines and other structures in the display area 111 are the same as those in the prior art. The non-display area 112 is provided with a second electrode group 400. The second electrode group 400 is used to transmit the signal transmitted by the signal source bonded to the second surface 120 to the light-emitting element. For details, please refer to the following introduction.

[0038] The second surface 120 is provided with a first electrode area 101 and a bonding area 102, and the first electrode area 101 and the bonding area 102 are arranged at intervals along the first direction Y. The number of bonding areas 102 can be one, two, three or more, which is not limited here. The figures are schematically illustrated with two bonding areas 102. The bonding area 102 is used to bond a signal source. It should be noted that when there are multiple bonding areas 102, multiple bonding areas 102 can be used to bond a signal source, but only the signal source needs to be bonded to at least one of the bonding areas 102 to enable the display panel 10 to display normally. For details, please refer to the following introduction.

[0039] The first electrode group 200 is arranged in the first electrode area 101. The first electrode group 200 includes a plurality of first electrodes 210 arranged at intervals along the second direction X. The second direction X intersects with the first direction Y, and the two may be perpendicular or non-perpendicular. The plurality of first electrodes 210 are insulated from each other. At the same time, the plurality of first electrodes 210 include at least one first power electrode 211, at least one second power electrode 212, and a plurality of data signal electrodes 213, wherein the number of the first power electrodes 211 may be one or more, and the number of the second power electrodes 212 may be one or more. The first power electrode 211 is used to transmit a first power signal, and the second power electrode 212 is used to transmit a second power signal. In one application scenario, the first power signal is an ELVDD signal, and the second power signal is an ELVSS signal. In another application scenario, the first power signal is an ELVSS signal, and the second power signal is an ELVDD signal. For ease of description, the following description is based on the assumption that the first power signal is an ELVDD signal and the second power signal is an ELVSS signal.

[0040] The data signal electrodes 213 are used to transmit data signals, wherein the data signal electrodes 213 correspond to a plurality of display columns on the first surface 110 one by one, and the data signal electrodes 213 are electrically connected to all the light emitting elements 11 in the corresponding display columns at the same time.

[0041] Continue reading Figure 3 , the second electrode group 400 includes a plurality of second electrodes 410 arranged at intervals along the second direction X, the plurality of second electrodes 410 correspond one-to-one to the plurality of first electrodes 210 in the first electrode group 200, and the second electrodes 410 are electrically connected to the corresponding first electrodes 210. The second electrodes 410 are electrically connected to the corresponding first electrodes 210 through side wiring (not shown). It can be understood that the second electrode 410 electrically connected to the first power electrode 211 is used to transmit the first power signal, the second electrode 410 electrically connected to the second power electrode 212 is used to transmit the second power signal, and the second electrode 410 electrically connected to the data signal electrode 213 is used to transmit the data signal. For the convenience of explanation, the second electrode 410 electrically connected to the first power electrode 211 is defined as the second electrode 411, the second electrode 410 electrically connected to the second power electrode 212 is defined as the second electrode 412, and the second electrode 410 electrically connected to the data signal electrode 213 is defined as the second electrode 413.

[0042] The plurality of second electrodes 413 in the second electrode group 400 correspond to the display columns one by one, that is, the second electrodes 413 are electrically connected to all the light-emitting elements 11 in the corresponding display columns at the same time to transmit data signals to the light-emitting elements 11 in the corresponding display columns respectively.

[0043] Continue reading Figure 3 as well as Figure 4 In this embodiment, along the second direction X, the arrangement position of the second electrode 410 in the second electrode group 400 is the same as the arrangement position of the first electrode 210 electrically connected thereto in the first electrode group 200 .

[0044] Specifically, along the second direction X, if a certain second electrode 410 is the first electrode in the second electrode group 400, then along the second direction X, the first electrode 210 electrically connected to the second electrode 410 is also the first electrode in the first electrode group 200, and so on, along the second direction X, if a certain second electrode 410 is the last electrode in the second electrode group 400, then along the second direction X, the first electrode 210 electrically connected to the second electrode 410 is also the last electrode in the first electrode group 200.

[0045] This arrangement allows the side wiring electrically connecting the first electrode group 200 and the second electrode group 400 to be arranged in the same layer, thereby avoiding the short circuit caused by the intersection of the side wiring and reducing the difficulty of the manufacturing process.

[0046] Continue reading Figure 4 In the first electrode group 200 , at least one first power electrode 211 is distributed between two data signal electrodes 213 , and / or at least one second power electrode 212 is distributed between two data signal electrodes 213 .

[0047] Specifically, only the first power electrode 211 may be distributed between two data signal electrodes 213 , only the second power electrode 212 may be distributed between two data signal electrodes 213 , or both the first power electrode 211 and the second power electrode 212 may be distributed between two data signal electrodes 213 .

[0048] Continue reading Figure 4 A bonding pin group 300 is provided in each bonding area 102 for bonding a signal source (not shown). The bonding pin group 300 includes a plurality of bonding pins 310. The plurality of bonding pins 310 include a first bonding pin 311, a second bonding pin 312, and a plurality of third bonding pins 313. The first bonding pin 311 is electrically connected to the first power electrode 211, the second bonding pin 312 is electrically connected to the second power electrode 212, the plurality of third bonding pins 313 correspond one-to-one to the plurality of data signal electrodes 213, and the third bonding pins 313 are electrically connected to the corresponding data signal electrodes 213.

[0049] Specifically, the number of third bonding pins 313 included in the bonding pin group 300 is equal to the number of data signal electrodes 213 included in the first electrode group 200, and the third bonding pins 313 included in the bonding pin group 300 correspond one-to-one to the data signal electrodes 213 included in the first electrode group 200, and the corresponding third bonding pins 313 and data signal electrodes 213 are electrically connected.

[0050] It can be understood that after the driving signal source is bonded to the bonding area 102, the first power signal output by the signal source is transmitted to the first power electrode 211 through the first bonding pin 311, the second power signal output by the signal source is transmitted to the second power electrode 212 through the second bonding pin 312, and the data signal output by the signal source is transmitted to the data signal electrode 213 through the third bonding pin 313.

[0051] At the same time, in this embodiment, when the number of bonding areas 102 is multiple, the first bonding pins 311 in any two adjacent bonding areas 102 are electrically connected to each other, the second bonding pins 312 are electrically connected to each other, and the third bonding pins 313 electrically connected to the same data signal electrode 213 are electrically connected to each other.

[0052] Specifically, along the first direction Y, the first bonding pins 311 in two adjacent bonding areas 102 are connected in series, the second bonding pins 312 in two adjacent bonding areas 102 are connected in series, and the third bonding pins 313 electrically connected to the same data signal electrode 213 are connected in series. This arrangement allows the signal output by the signal source to be transmitted to the first surface 110 of the substrate 100 when a signal source is bonded in any bonding area 102.

[0053] See also Figure 5 In the related art, the plurality of data signal electrodes 213 are arranged continuously, and there is no first power electrode 211 and second power electrode 212 between any two adjacent data signal electrodes 213. In this case, the plurality of second power electrodes 212 are distributed on both sides of the plurality of data signal electrodes 213, the plurality of first power electrodes 211 are distributed on both sides of the plurality of second power electrodes 212, and there is only one bonding area 102, which will bring the following problems:

[0054] At the first point, the plurality of first power electrodes 211 and the plurality of second power electrodes 212 are gathered together, so that the region where the plurality of first power electrodes 211 and the plurality of second power electrodes 212 are gathered together (see Figure 5 The current density in the middle dashed box N) is large, which may easily cause the local temperature to be too high, thereby causing the display panel 10 to display abnormally.

[0055] Second, when the arrangement position of the second electrode 410 in the second electrode group 400 is the same as the arrangement position of the electrically connected first electrode 210 in the first electrode group 200, as shown in FIG. Figure 6 As shown, at this time, the multiple second electrodes 413 are also gathered together, the multiple second electrodes 412 are distributed on both sides of the multiple second electrodes 413, and the multiple second electrodes 411 are distributed on both sides of the multiple second electrodes 412. At this time, along the second direction X, there is an IR drop problem, causing the brightness of the light-emitting element 11 to change along the second direction X, resulting in uneven display.

[0056] Thirdly, when the position of the second electrode 410 in the second electrode group 400 is the same as the position of the electrically connected first electrode 210 in the first electrode group 200, as shown in FIG. Figure 6 As shown, multiple second electrodes 413 are also gathered together, and since each second electrode 413 needs to be electrically connected to the light-emitting element in the corresponding display column through a wiring, the slope of some wiring will become smaller. At this time, in order to increase the slope of the wiring, the distance between the light-emitting element 11 and the second electrode 413 can only be increased, but this is not conducive to the borderless development of the display panel 10.

[0057] Fourth, see Figure 7 When two display panels are spliced ​​together to form a display panel of a larger size, a support plate is needed to support each display panel at the same time. In order to bond the signal source, a through groove needs to be opened on the support plate to expose the bonding area 102 on the display panel. In order to avoid the influence of the groove on the strength of the support plate, firstly, the bonding area 102 is set on the side close to the edge of the substrate 100. Secondly, when the display panel is spliced, the substrates 100 are usually spliced ​​head to head or tail to tail, that is, one of the substrates 100 needs to be rotated 180 degrees around the center point (when splicing head to head or tail to tail, the through grooves opened on the support plate can be spaced a certain distance apart to ensure the strength of the support plate). This brings a problem. When the light-emitting element 11 is transferred on the first surface 110 of the substrate 100, in order to meet the requirement that some substrates need to be rotated 180 degrees during splicing, two sets of transfer processes need to be adopted. For example, one set is arranged according to RGB and the other set is arranged according to BGR. Otherwise, the red-emitting elements 11 will not be in a straight line as a whole after splicing, and the blue-emitting elements 11 will not be in a straight line as a whole, thereby increasing the complexity of the process.

[0058] However, in the solution of the present application, at least one first power electrode 211 is distributed in two data signal electrodes 213, and / or at least one second power electrode 212 is distributed in two data signal electrodes 213, so as to avoid the first power electrode 211 from gathering, and / or the second power electrode 212 from gathering. On the one hand, it is possible to avoid the current density of the first power signal and / or the current density of the second power signal in the first electrode group 200 from being large, thereby ensuring that there will be no problems such as local excessive temperature caused by the large local current density, and avoiding display abnormalities. On the other hand, when the arrangement position of the second electrode 410 in the second electrode group 400 is the same as the arrangement position of the electrically connected first electrode 210 in the first electrode group 200, at least one second electrode 411 and / or at least one second electrode 412 are also distributed between the two second electrodes 413, thereby improving the uniformity of the first power signal and / or the second power signal in the second direction X, and ensuring the uniformity of the display brightness. In addition, as Figure 8 As shown, when the arrangement position of the second electrode 410 in the second electrode group 400 is the same as the arrangement position of the electrically connected first electrode 210 in the first electrode group 200, since at least one second electrode 411 and / or at least one second electrode 412 is also distributed between the two second electrodes 413, the slope of the line electrically connecting the light-emitting element 11 and the second electrode 413 and located at the edge will become larger, thereby reducing the wiring space and facilitating the borderless development of the display panel 10.

[0059] At the same time, when multiple bonding areas 102 are set, all of the bonding areas 102 can be used to bond the signal source, so that when multiple display panels 10 are spliced ​​together, it is not necessary to rotate the display panels 10 180 degrees, and only the appropriate bonding area 102 needs to be selected, so that when the light emitting element 11 is transferred, only one transfer process is required. Fig. 9 The structure is used as an example to illustrate:

[0060] First, Fig. 9 The two display panels 10 are respectively defined as a first display panel 1 and a second display panel 2, wherein when bonding the signal source, the signal source can be bonded with the bonding area 102 on the first display panel 1 that is farthest from the second display panel 2, and the signal source can be bonded with the bonding area 102 on the second display panel 2 that is farthest from the first display panel 1, thereby increasing the distance between the through grooves opened on the support plate and ensuring the strength of the support plate without rotating the display panel 2 180 degrees.

[0061] It should be noted that, although it is described above that when multiple bonding areas 102 are provided, the distance between the through grooves provided on the support plate can be increased to ensure the strength of the support plate without rotating the display panel 2 180 degrees, this does not mean that the number of bonding areas 102 in the solution of the present application must be multiple. That is to say, in one embodiment of the present application, the number of bonding areas 102 can also be one. At this time, the provision of the first electrode group 200 can avoid the high current density of the first power supply signal and / or the second power supply signal in the first electrode group 200, thereby ensuring that there will be no problems such as excessive local temperature due to high local current density, thereby avoiding display abnormalities.

[0062] See also Figure 4 In one embodiment, the number of bonding areas 102 is two. For ease of description, the two bonding areas 102 are defined as a first bonding area 1021 and a second bonding area 1022, wherein the distance from the first bonding area 1021 to the first side edge 1011 of the substrate 100 is equal to the distance from the second bonding area 1022 to the second side edge 1012 of the substrate 100. This setting can ensure the uniform distribution of the bonding areas 102.

[0063] Of course, in other embodiments, the distance from the first bonding area 1021 to the first side 1011 of the substrate 100 may not be equal to the distance from the second bonding area 1022 to the second side 1012 of the substrate 100 .

[0064] Meanwhile, in other embodiments, when the number of the bonding regions 102 is more than three, the plurality of bonding regions 102 may be evenly distributed on the substrate 100 along the first direction Y, and the distance between any two bonding regions 102 is equal.

[0065] Continue reading Figure 4 In one embodiment, along the second direction X, the arrangement position of the bonding pin 310 in the bonding pin group 300 is the same as the arrangement position of the first electrode 210 electrically connected thereto in the first electrode group 200, that is, along the second direction X, if the first electrode 210 is arranged in the first position in the first electrode group 200, then along the second direction X, the bonding pin 310 electrically connected to the first electrode 210 is also arranged in the first position in the bonding pin group 300, and so on. That is, at this time, the first electrode 210 in the first electrode group 200 is electrically connected to the bonding pin 310 in the bonding pin group 300 in a one-to-one correspondence, and the arrangement order is the same. This setting can ensure that all the wirings electrically connecting the first electrode group 200 and the bonding pin group 300 can be prepared using the same layer of metal, thereby reducing the difficulty and cost of preparation, that is, at this time, the orthographic projections of all the wirings electrically connecting the first electrode group 200 and the bonding pin group 300 on the substrate 100 do not intersect.

[0066] See also Fig.10 In another embodiment, the number of the first bonding pin 311 and the second bonding pin 312 are both multiple, and the multiple second bonding pins 312 are distributed on both sides of the multiple third bonding pins 313, and the multiple first bonding pins 311 are distributed on both sides of the multiple second bonding pins 312. Figure 4 The difference in the implementation method is that, among all the routing lines electrically connecting the first electrode group 200 and the bonding pin group 300, some routing lines intersect in their orthographic projections on the substrate 100, and at least two layers of metal are required to prepare all the routing lines electrically connecting the first electrode group 200 and the bonding pin group 300.

[0067] In summary, the present application does not impose any specific limitation on the arrangement positions of the bonding pins 310 in the bonding pin group 300 .

[0068] See also Fig.11 When the number of the first power electrodes 211 and the number of the second power electrodes 212 are both plural, the multiple data signal electrodes 213 are divided into multiple data signal electrode groups Q, wherein the second power electrodes 212 are distributed between some adjacent data signal electrode groups Q, and the first power electrodes 211 are distributed between another part of adjacent data signal electrode groups Q.

[0069] Specifically, considering that the number of data signal electrodes 213 is greater than the number of first power electrodes 211 and second power electrodes 212 , the plurality of data signal electrodes 213 are grouped to ensure uniform distribution of the first power electrodes 211 and second power electrodes 212 among the plurality of data signal electrodes 213 .

[0070] Continue reading Fig.11 , along the second direction X, the first power electrodes 211 and the second power electrodes 212 are alternately arranged. In layman's terms, if only the first power electrodes 211 and the second power electrodes 212 are viewed, the first power electrodes 211 and the second power electrodes 212 are alternately arranged. This arrangement can ensure the display uniformity of the display panel 10 in the second direction X and avoid the IR drop problem in the second direction X.

[0071] Of course, in other embodiments, along the second direction X, the first power electrodes 211 and the second power electrodes 212 may not be arranged alternately.

[0072] Continue reading Fig.11 In order to further ensure the uniformity of distribution, the second power electrode 212 and the first power electrode 211 are respectively distributed on both sides of any data signal electrode group Q.

[0073] Each data signal electrode group Q includes one or more data signal electrodes 213, and the number of data signal electrodes 213 included in each data signal electrode group Q may be different; for example, Fig.11 In the embodiment, the data signal electrode group Q includes two data signal electrodes 213, and in Figure 4 In the embodiment, the data signal electrode group Q includes one data signal electrode 213 ; some data signal electrode groups Q may include one data signal electrode 213 , and some data signal electrode groups Q may include two or more data signal electrodes 213 .

[0074] Continue reading Fig.10 When the number of the first power electrodes 211 and the number of the second power electrodes 212 are both plural, in the first electrode area 101, some of the second power electrodes 212 are distributed between the multiple data signal electrodes 213, and another part of the second power electrodes 212 are distributed on both sides of the multiple data signal electrodes 213. At the same time, multiple first power electrodes 211 are distributed on both sides of the multiple data signal electrodes 213 and the multiple second power electrodes 212.

[0075] Specifically, Figure 4 as well as Fig.11 Different, at this time Fig.10 In the embodiment, only part of the second power electrodes 212 are distributed between the multiple data signal electrodes 213, while another part of the second power electrodes 212 are distributed on both sides of the multiple data signal electrodes 213, and at this time, the multiple first power electrodes 211 are distributed on both sides of all the second power electrodes 212 and the data signal electrodes 213.

[0076] In other implementations, only part of the first power electrodes 211 may be distributed between the plurality of data signal electrodes 213. In summary, the present application does not limit the specific arrangement of the first electrodes 210 in the first electrode group 200.

[0077] Continue reading Figure 4 The second surface 120 is further provided with a second electrode area 103, and the first electrode area 101, the bonding area 102 and the second electrode area 103 are arranged in sequence along the first direction Y, wherein the second electrode area 103 is also provided with a first electrode group 200, the first power electrode 211 in the second electrode area 103 is electrically connected to the first bonding pin 311 in the adjacent bonding area 102, the second power electrode 212 in the second electrode area 103 is electrically connected to the second bonding pin 312 in the adjacent bonding area 102, and the multiple data signal electrodes 213 in the second electrode area 103 are electrically connected to the multiple third bonding pins 313 in the adjacent bonding area 102 in a one-to-one correspondence.

[0078] Specifically, the distribution of the first electrode group 200 in the second electrode area 103 is exactly the same as that of the first electrode group 200 in the first electrode area 101, and the electrical connection relationship between the first electrode group 200 in the second electrode area 103 and the bonding pin group 300 in the adjacent bonding area 102 is exactly the same as that between the first electrode group 200 in the first electrode area 101 and the bonding pin group 300 in the adjacent bonding area 102.

[0079] The second electrode region 103 can be provided so that the signal transmitted by the signal source can be transmitted from the first side 1011 and the second side 1012 of the substrate 100 to the second surface 120 at the same time, ensuring the stability of transmission. It should be noted that in other embodiments, the second electrode region 103 may not be provided.

[0080] Continue reading Figure 4 as well as Fig.10 The first bonding pins 311 in any two adjacent bonding areas 102 are electrically connected in a one-to-one correspondence, and the second bonding pins 312 are electrically connected in a one-to-one correspondence. This arrangement can ensure the transmission stability of the first power signal and the second power signal.

[0081] It should be noted that, in other embodiments, the first bonding pin 311 in the bonding area 102 can be electrically connected to multiple first bonding pins 311 in an adjacent bonding area 102 at the same time, and / or the second bonding pin 312 in the bonding area 102 can be electrically connected to multiple second bonding pins 312 in an adjacent bonding area 102 at the same time.

[0082] See also Fig.12 In one embodiment of the present application, the electronic device 20 includes the display panel 10 in any one of the above embodiments.

[0083] The electronic device 20 may be any type of device such as a mobile phone, a computer or a computer, and is not limited here.

[0084] The electronic device 20 includes a plurality of display panels 10 , and the plurality of display panels 10 are spliced ​​together.

[0085] See also Fig.13 At this time, the electronic device 20 further includes a support plate 30, which supports the multiple display panels 10, and the support plate 30 is located on the non-display side of the display panel 10, that is, the second surface 120 of the substrate 100 faces the support plate 30.

[0086] For the convenience of description, one display panel 10 among the plurality of display panels 10 is defined as a first display panel 1 , and another display panel 10 is defined as a second display panel 2 , and the first display panel 1 and the second display panel 2 are spliced ​​together.

[0087] Combination Fig.13 as well as Fig.14 The support plate 30 is provided with a first through slot 301 and a second through slot 302 . The first through slot 301 exposes a bonding area 102 of the first display panel 1 , and the second through slot 302 exposes a bonding area 102 of the second display panel 2 .

[0088] A signal source (not shown) is bonded to the exposed bonding area 102 of the self-supporting plate 30 . Specifically, a signal source is bonded to each display panel 10 to ensure normal display of the display panel 10 .

[0089] In order to ensure the support strength of the support plate 30, other bonding areas 102 are distributed between the bonding area 102 exposed through the first through slot 301 and the bonding area 102 exposed through the second through slot 302. Fig. 9 That is to say, when bonding the signal source, the signal source is bonded with the bonding area 102 on the first display panel 1 that is farthest from the second display panel 2, and the signal source is bonded with the bonding area 102 on the second display panel 2 that is farthest from the first display panel 1, thereby increasing the distance between the first through groove 301 and the second through groove 302 to ensure the strength of the support plate 30.

[0090] It should be noted that in other embodiments, the support plate 30 may not have the first through slot 301 and the second through slot 302 . In this case, during assembly, the signal source may be first bonded to the display panel 10 , and then the display panel 10 may be placed on the support plate 30 .

[0091] See also Figure 4 as well as Fig.15 In one embodiment of the present application, the signal source 40 includes a substrate 41 and a driver chip 42 disposed on the substrate 41. At this time, the driver chip 42 has a plurality of pins that are electrically connected to the plurality of bonding pins 310 in the bonding pin group 300 in a one-to-one correspondence. That is, at this time, the driver chip 42 simultaneously outputs a first power signal, a second power signal, and a data signal. The material of the substrate 41 can be any material, and the present application does not limit it.

[0092] See also Figure 4 as well as Fig.16 In another embodiment of the present application, the signal source 50 includes a substrate 51 and a first chip 52 and a second chip 53 disposed on the substrate 51 .

[0093] The first chip 52 has a plurality of pins that are electrically connected to the first bonding pins 311 and the second bonding pins 312 in the bonding pin group 300 in a one-to-one correspondence, and the second chip 53 has a plurality of pins that are electrically connected to the third bonding pins 313 in the bonding pin group 300 in a one-to-one correspondence.

[0094] Specifically, the first chip 52 is bonded to the display panel 10 via the first bonding pin 311 and the second bonding pin 312, and the second chip 53 is bonded to the display panel 10 via the third bonding pin 313. That is, the first chip 52 transmits the first power signal and the second power signal at the same time, while the second chip 53 only transmits the data signal.

[0095] exist Fig.16 In an embodiment, the signal source 50 further includes a first routing line (not shown) and a second routing line (not shown) arranged on the substrate 51, the first chip 52 is electrically connected to the first bonding pin 311 and the second bonding pin 312 through multiple first routing lines, and the second chip 53 is electrically connected to multiple third bonding pins 313 through multiple second routing lines, multiple first routing lines are arranged on the same layer, multiple second routing lines are arranged on the same layer, and the first routing lines and the second routing lines are not arranged on the same layer.

[0096] Specifically, the first wiring realizes the electrical connection between the first chip 52 and the bonding pin group 300 , and the second wiring realizes the electrical connection between the second chip 53 and the bonding pin group 300 .

[0097] In order to flexibly adapt to various arrangements of the bonding pins 310 in the bonding pin group 300, all first routing lines electrically connected to the first chip 52 are arranged on the same layer, and all second routing lines electrically connected to the second chip 53 are arranged on the same layer, while the first routing lines and the second routing lines are not arranged on the same layer. That is to say, at this time, at least two layers of metal are required in the signal source 50 to form all the routing lines.

[0098] The following describes the repair method of the display panel of this application:

[0099] See also Fig.17 as well as Fig.18 When the plurality of second bonding pins 312 are distributed on both sides of the plurality of third bonding pins 313, and the plurality of first bonding pins 311 are distributed on both sides of the plurality of second bonding pins 312, the method for repairing the display panel includes:

[0100] S110 : When a short circuit is detected between the first target trace 601 and the second target trace 602 , a short circuit point O between the first target trace 601 and the second target trace 602 is determined.

[0101] S120: Cutting the first target wiring 601 on both sides of the short-circuit point O.

[0102] Specifically, the first target line 601 and the second target line 602 are both formed on the second surface 120 of the substrate 100, and the number of the first target lines 601 is multiple, and at least part of the first target lines 601 and the second target lines 602 are arranged in different layers and their orthographic projections on the substrate 100 intersect, that is, at least part of the first target lines 601 and the second target lines 602 are made of different layers of metal. Therefore, during the preparation process, when environmental dust particles (particles) easily fall on the substrate 100, once external pressure is applied to the particles, short circuits between different layers of metal will be caused, that is, there is a risk of short circuits between the first target lines 601 and the second target lines 602.

[0103] The first target trace 601 electrically connects the first power electrode 211 and the first bonding pin 311 , or the first target trace 601 electrically connects the second power electrode 212 and the second bonding pin 312 , and the second target trace 602 can be any trace electrically connecting the first electrode group 200 and the bonding pin group 300 .

[0104] Since there are multiple first target lines 601, removing one first target line 601 will not affect the normal display of the display panel 10. Therefore, when a short circuit is detected between the first target line 601 and the second target line 602, the short circuit point O is first found. Fig.19 As shown, the first target wiring 601 is cut off on both sides of the short-circuit point O, so that the first target wiring 601 can no longer transmit signals with the first electrode group 200, and can no longer transmit signals with the bonding pin group 300, thereby not affecting the normal transmission of the second target wiring 602, and thus achieving normal display of the display panel 10.

[0105] The above description is only an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises: A substrate, having a first surface and a second surface opposite to each other, wherein the second surface is provided with a first electrode area and a bonding area, and the first electrode area and the bonding area are arranged at intervals along a first direction; a first electrode group, arranged in the first electrode area, the first electrode group comprising a plurality of first electrodes spaced apart along a second direction, the plurality of first electrodes comprising at least one first power electrode, at least one second power electrode and a plurality of data signal electrodes, wherein in the first electrode group, at least one first power electrode is distributed between two of the data signal electrodes, and / or at least one second power electrode is distributed between two of the data signal electrodes, and the second direction intersects with the first direction; A bonding pin group is arranged in the bonding area, the bonding pin group includes a plurality of bonding pins, the plurality of bonding pins include a first bonding pin, a second bonding pin and a plurality of third bonding pins, the first bonding pin is electrically connected to the first power supply electrode, the second bonding pin is electrically connected to the second power supply electrode, and the plurality of third bonding pins are electrically connected to the plurality of data signal electrodes in a one-to-one correspondence.

2. The display panel according to claim 1, characterized in that: Along the second direction, the arrangement position of the bonding pins in the bonding pin group is the same as the arrangement position of the first electrodes electrically connected thereto in the first electrode group; Alternatively, the number of the first bonding pins and the number of the second bonding pins are both plural, and the plurality of the second bonding pins are distributed on both sides of the plurality of the third bonding pins, and the plurality of the first bonding pins are distributed on both sides of the plurality of the second bonding pins.

3. The display panel according to claim 1, characterized in that: The first electrode group includes a plurality of the first power supply electrodes and a plurality of the second power supply electrodes; The plurality of data signal electrodes are divided into a plurality of data signal electrode groups, wherein the second power supply electrodes are distributed between some adjacent data signal electrode groups, and the first power supply electrodes are distributed between another portion of adjacent data signal electrode groups; Preferably, along the second direction, the first power electrodes and the second power electrodes are alternately arranged; Preferably, the second power supply electrode and the first power supply electrode are respectively distributed on both sides of any data signal electrode group; Preferably, the data signal electrode group includes one or more data signal electrodes.

4. The display panel according to claim 1, characterized in that: The number of the first power supply electrodes and the second power supply electrodes in the bonding pin group are both multiple; In the first electrode area, part of the second power electrodes are distributed between the multiple data signal electrodes, and another part of the second power electrodes are distributed on both sides of the multiple data signal electrodes. At the same time, multiple first power electrodes are distributed on both sides of multiple data signal electrodes and multiple second power electrodes.

5. The display panel according to claim 1, characterized in that: The display panel further comprises: a second electrode group, disposed on the first surface, the second electrode group comprising a plurality of second electrodes spaced apart along the second direction, the plurality of second electrodes being electrically connected to the plurality of first electrodes in the first electrode group in a one-to-one correspondence; Wherein, along the second direction, the arrangement position of the second electrode in the second electrode group is the same as the arrangement position of the first electrode electrically connected thereto in the first electrode group.

6. The display panel according to claim 1, characterized in that: The second surface is further provided with a second electrode area, and the first electrode area, the bonding area and the second electrode area are sequentially arranged at intervals along the first direction; The second electrode area is provided with the first electrode group, the first power supply electrode in the second electrode area is electrically connected to the first bonding pin in the adjacent bonding area, the second power supply electrode in the second electrode area is electrically connected to the second bonding pin in the adjacent bonding area, and the multiple data signal electrodes in the second electrode area are electrically connected one-to-one with the multiple third bonding pins in the adjacent bonding area.

7. The display panel according to any one of claims 1 to 6, characterized in that: There are multiple bonding areas, and the first electrode area and the multiple bonding areas are sequentially spaced along the first direction; wherein each bonding area is provided with the binding pin group, and the first bonding pins in any two adjacent bonding areas are electrically connected to each other, the second bonding pins are electrically connected to each other, and the third bonding pins electrically connected to the same data signal electrode are electrically connected to each other; Preferably, the first bonding pins in any two adjacent bonding areas are electrically connected in a one-to-one correspondence, and the second bonding pins are electrically connected in a one-to-one correspondence; Preferably, the number of the bonding areas is two, the two bonding areas include a first bonding area and a second bonding area, and along the first direction, the distance from the first bonding area to the first side edge of the substrate is equal to the distance from the second bonding area to the second side edge of the substrate; Preferably, the first power electrode is used to transmit an ELVDD signal, and the second power electrode is used to transmit an ELVSS signal.

8. An electronic device, characterized in that: It comprises the display panel according to any one of claims 1 to 7, wherein there are multiple display panels, and the multiple display panels are spliced ​​together.

9. The electronic device according to claim 8, characterized in that: The electronic device further comprises: A support plate, supporting the plurality of display panels, wherein the second surfaces of the plurality of substrates all face the support plate; A signal source, the signal source being bonded to the bonding area; Preferably, the signal source comprises a substrate and a driving chip arranged on the substrate, and the driving chip is provided with a plurality of pins which are electrically connected to the plurality of bonding pins in the bonding pin group in a one-to-one correspondence; Preferably, the signal source comprises a substrate, a first chip and a second chip arranged on the substrate, the first chip has a plurality of pins which are electrically connected to the first bonding pins and the second bonding pins in the bonding pin group in a one-to-one correspondence, and the second chip has a plurality of pins which are electrically connected to the plurality of third bonding pins in the bonding pin group in a one-to-one correspondence; Among them, the signal source further includes a first routing line and a second routing line arranged on the substrate, the first chip is electrically connected to the first bonding pin and the second bonding pin respectively through multiple first routing lines, the second chip is electrically connected to multiple third bonding pins respectively through multiple second routing lines, multiple first routing lines are arranged on the same layer, multiple second routing lines are arranged on the same layer, and the first routing and the second routing are not arranged on the same layer.

10. A method for repairing a display panel, characterized in that: The method is applied to the display panel according to any one of claims 1 to 7, and the repair method comprises: When a short circuit is detected between a first target routing line and a second target routing line, determining a short circuit point between the first target routing line and the second target routing line; Cutting off the first target wiring on both sides of the short-circuit point; Among them, the first target routing and the second target routing are formed on the second surface of the substrate, the number of the first target routing is multiple, and at least part of the first target routing and the second target routing are arranged in different layers and their orthographic projections on the substrate intersect, and the first target routing is electrically connected to the first power electrode and the first bonding pin, or the first target routing is electrically connected to the second power electrode and the second bonding pin.

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