Semiconductor device and forming method thereof

Abstract

The invention relates to a semiconductor device and a forming method thereof. According to the semiconductor device and the forming method thereof, a second substrate and a first substrate are bonded to obtain high working efficiency, a heat dissipation unit is bonded to the surface of the first substrate, and the heat dissipation unit comprises a semiconductor heat dissipation layer and a first metal heat dissipation channel penetrating through the semiconductor heat dissipation layer and a dielectric layer on the surface of the semiconductor heat dissipation layer. According to the semiconductor device, heat generated in the working process of the second substrate and the first substrate can be quickly conducted out, and the heat dissipation capacity of the semiconductor device can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for forming the same. Background Art

[0002] The data processing capability (or computing power) of semiconductor chips is an important factor driving the booming development of technologies such as artificial intelligence and big data. As these technologies continue to develop rapidly, the demand for computing power of related semiconductor chips is also increasing.

[0003] By vertically interconnecting multiple core particles, the integration level can be improved, the global connection can be shortened, the interconnection speed can be increased, the response time can be reduced, and the energy consumption can be reduced. For example, a substrate with large storage capacity can be formed by vertically interconnecting multiple core particles. In addition, by packaging such a substrate with a substrate for data processing into a three-dimensional integrated device (such as a chip), due to the short physical distance between the two substrates, the delay of data movement can be reduced when processing data, the power consumption can be reduced, and the data processing efficiency can be improved.

[0004] However, as the integration level of three-dimensional integrated devices increases, more and more heat is generated during operation, and heat dissipation has become one of the core issues affecting their performance. Summary of the invention

[0005] In order to achieve higher working efficiency and improve heat dissipation capability of a three-dimensional integrated device, the present invention provides a semiconductor device and a method for forming the semiconductor device.

[0006] In one aspect, the present invention provides a semiconductor device, comprising:

[0007] A first substrate and at least one second substrate bonded to the first substrate;

[0008] A heat dissipation unit is bonded to the surface of the first substrate, and comprises a semiconductor heat dissipation layer, a dielectric layer stacked on at least one surface of the semiconductor heat dissipation layer, and a first metal heat dissipation channel penetrating the semiconductor heat dissipation layer and the dielectric layer in a thickness direction.

[0009] Optionally, the first substrate is a silicon interposer adapter board or a data processing substrate, and at least one of the second substrates is a stacked memory unit.

[0010] Optionally, at least one of the second substrates includes a second metal heat dissipation channel penetrating therein along a thickness direction.

[0011] Optionally, the first substrate includes two opposite surfaces, and the second substrate and the heat dissipation unit are discretely bonded to one surface of the first substrate; or, the second substrate and the heat dissipation unit are respectively bonded to the two surfaces.

[0012] Optionally, the first substrate further includes:

[0013] a bonding material layer, bonded to the second substrate and the heat dissipation unit; and

[0014] A metal heat dissipation structure is arranged in the bonding material layer.

[0015] Optionally, the metal heat dissipation structure includes a metal heat dissipation layer formed in the bonding material layer, a heat dissipation bonding pad embedded in the surface of the bonding material layer, and a heat dissipation column connecting the metal heat dissipation layer and the heat dissipation bonding pad.

[0016] Optionally, the first heat dissipation channel is connected to the metal heat dissipation structure.

[0017] Optionally, the semiconductor device further includes:

[0018] A filling covering layer covers the second substrate, the heat dissipation unit and the first substrate, and fills the gaps between the second substrate, the heat dissipation unit and the first substrate; and

[0019] The heat-conducting layer and the heat-dissipating metal sheet are sequentially stacked on the surface of the filling covering layer.

[0020] In another aspect, the present invention provides a method for forming a semiconductor device, the method comprising:

[0021] Cutting a heat-conducting substrate formed based on a semiconductor substrate to obtain a heat dissipation unit, wherein the heat dissipation unit includes a semiconductor heat dissipation layer formed by the semiconductor substrate, a dielectric layer stacked on at least one surface of the semiconductor heat dissipation layer, and a first metal heat dissipation channel penetrating the semiconductor substrate layer and the dielectric layer in a thickness direction; and

[0022] At least one second substrate is bonded to a first substrate and interconnected, and at least one heat dissipation unit is bonded to the surface of the first substrate.

[0023] Optionally, forming the thermally conductive substrate includes:

[0024] forming a first dielectric layer on the semiconductor substrate, and forming a first metal heat dissipation layer on the first dielectric layer;

[0025] Covering the first dielectric layer and the first metal heat dissipation layer with a second dielectric layer, forming a first through hole penetrating the second dielectric layer and exposing the first metal heat dissipation layer, and forming a first bonding pad hole by widening the top of the first through hole;

[0026] Filling the first through hole and the first bonding pad hole with metal material, forming a first heat dissipation column corresponding to the first through hole, and forming a first heat dissipation bonding pad corresponding to the first bonding pad hole;

[0027] Bonding a first carrier to a side of the second dielectric layer away from the semiconductor substrate, and thinning the semiconductor substrate from a side away from the first carrier;

[0028] forming a third dielectric layer on the thinned surface of the semiconductor substrate, and forming a second through hole penetrating the third dielectric layer, the semiconductor substrate and the first dielectric layer and exposing the first metal heat dissipation layer; and

[0029] A metal material is filled in the second through hole to form a second heat dissipation column, and the second heat dissipation column, the first metal heat dissipation layer, the first heat dissipation column and the first heat dissipation bonding pad constitute a first metal heat dissipation channel.

[0030] At least one of the second substrates is a stacked substrate structure, and forming the second substrate of the stacked substrate structure includes: stacking and interconnecting at least two substrates to obtain a three-dimensional stacked substrate, and cutting the three-dimensional stacked substrate.

[0031] Optionally, forming the three-dimensional stacked substrate comprises:

[0032] Providing a first substrate, wherein the first substrate comprises a front side and a back side facing each other;

[0033] Forming a fourth dielectric layer and a first rewiring layer, a first interconnection bonding pad, and a first via connecting the first rewiring layer and the first interconnection bonding pad in the fourth dielectric layer on the front side of the first substrate;

[0034] Bonding the fourth dielectric layer to the second carrier, and thinning the first substrate from the back side;

[0035] forming a fifth dielectric layer on the back side of the thinned first substrate, and forming a second via hole penetrating the fifth dielectric layer, the first substrate and the fourth dielectric layer and connecting the first redistribution layer;

[0036] forming a sixth dielectric layer and a second redistribution layer, a second interconnection bonding pad, and a third via connecting the second redistribution layer and the second interconnection bonding pad located in the sixth dielectric layer on the fifth dielectric layer; and

[0037] The first substrate is bonded to the second substrate.

[0038] Optionally, forming the three-dimensional stacked substrate further comprises:

[0039] When forming the first rewiring layer, the first interconnect bonding pad and the first via, a second metal heat dissipation layer, a second heat dissipation bonding pad and a third heat dissipation column connecting the second metal heat dissipation layer and the second heat dissipation bonding pad are also formed in the fourth dielectric layer respectively;

[0040] When forming the second via hole connected to the first rewiring layer, a fourth heat dissipation column penetrating the fifth dielectric layer, the first substrate, and the fourth dielectric layer and connected to the second metal heat dissipation layer is also formed; and

[0041] When forming the second redistribution layer, the second interconnection bonding pad and the third via, a third metal heat dissipation layer, a third heat dissipation bonding pad and a fifth heat dissipation column connecting the third metal heat dissipation layer and the third heat dissipation bonding pad are also formed in the sixth dielectric layer respectively;

[0042] The second metal heat dissipation layer, the second heat dissipation bonding pad, the third heat dissipation column, the fourth heat dissipation column, the third metal heat dissipation layer, the third heat dissipation bonding pad and the fifth heat dissipation column are used to form a second metal heat dissipation channel.

[0043] Optionally, before bonding and interconnecting the second substrate and the first substrate, the method further includes:

[0044] A bonding material layer is formed on the surface of the first substrate to be bonded, and a metal heat dissipation structure is formed in the bonding material layer.

[0045] In the semiconductor device and the method for forming the semiconductor device provided by the present invention, the second substrate is bonded to the first substrate to obtain higher working efficiency (such as data processing efficiency), and the heat dissipation unit is bonded to the surface of the first substrate. The heat dissipation unit includes a semiconductor heat dissipation layer and a first metal heat dissipation channel that penetrates the semiconductor heat dissipation layer and the dielectric layer on its surface, which helps to quickly dissipate the heat generated during the operation of the second substrate and the first substrate, thereby improving the heat dissipation capacity of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 It is a schematic flow chart of a method for forming a semiconductor device according to an embodiment of the present invention.

[0047] Figures 2 to 8 FIG. 4 is a cross-sectional schematic diagram of a method for forming a heat dissipation unit of a semiconductor device according to another embodiment of the present invention.

[0048] Figures 9 to 15 The invention is a cross-sectional view of a second substrate for forming a stacked substrate structure in a method for forming a semiconductor device according to an embodiment of the present invention.

[0049] Figures 16 to 18 It is a cross-sectional schematic diagram after a second substrate and a heat dissipation unit are bonded on a first substrate in a method for forming a semiconductor device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0050] The semiconductor device and the method for forming the same of the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be understood that the drawings of the specification are all in a very simplified form and are all in non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. It should be noted that the order of the steps in the method presented herein is not necessarily the only order for performing these steps, some of the steps described may be omitted and / or some other steps not described herein may be added to the method. It should be understood that spatial relative terms are intended to include different orientations in use or operation in addition to the orientation of the device described in the figure. For example, if the structure in the figure is inverted or positioned in other different ways (such as rotation), the exemplary term "on..." may also include "under..." and other orientation relationships.

[0051] In order to speed up the dissipation of the heat generated by the chip during operation, a heat-conducting layer is usually formed on the surface of the chip and covered with a heat-dissipating metal sheet (or heat sink), and heat is dissipated by heat exchange between the metal heat sink and the air. However, for three-dimensional integrated chips with high integration, large data processing volume, and fast processing speed, due to the large amount of heat generated internally, the heat is not easy to be quickly transferred to the heat-dissipating metal sheet, and it is easy to accumulate inside the chip, affecting the normal operation of the chip. An embodiment of the present invention relates to a semiconductor device and a method for forming a semiconductor device, which not only integrates a first substrate and a second substrate to obtain higher working efficiency, but also integrates at least one heat dissipation unit to enhance heat dissipation, thereby improving the heat dissipation capacity. The following first describes the method for forming the semiconductor device.

[0052] Reference Figure 1 According to the method for forming a semiconductor device according to an embodiment of the present invention, in step S1, a thermally conductive substrate formed based on a semiconductor substrate is cut to obtain a heat dissipation unit, wherein the heat dissipation unit includes a semiconductor heat dissipation layer formed by the semiconductor substrate, a dielectric layer stacked on at least one surface of the semiconductor heat dissipation layer, and a first metal heat dissipation channel that penetrates the semiconductor substrate layer and the dielectric layer along a thickness direction.

[0053] In an embodiment of the present invention, a heat dissipation unit in a semiconductor device is formed by step S1, and the heat dissipation unit includes a semiconductor heat dissipation layer formed by a semiconductor substrate and a dielectric layer for subsequent bonding with a first substrate. According to different requirements of the semiconductor device for heat dissipation capacity, when a heat-conducting substrate is formed based on a semiconductor substrate, the heat dissipation performance of the heat-conducting substrate can be adjusted according to the heat dissipation requirements. The semiconductor substrate is, for example, a silicon substrate, which has good thermal conductivity (the thermal conductivity of silicon at room temperature is about 140W / (m·K)). However, it is not limited to this, and the semiconductor substrate may also use other substrates with good thermal conductivity, such as a germanium silicon substrate or a silicon carbide substrate.

[0054] The heat dissipation unit formed in step S1 includes not only a semiconductor heat dissipation layer formed by a semiconductor substrate, but also a metal heat dissipation channel to provide a better heat conduction effect. As an example, step S1 may specifically include the following process:

[0055] Reference Figure 2 , forming a first dielectric layer 101 on a semiconductor substrate 100, and forming a first metal heat dissipation layer 102 on the first dielectric layer 101, wherein the first metal heat dissipation layer 102 is made of, for example, copper or other metal materials. As an example, a groove may be formed on the surface of the first dielectric layer 101 by using a Damascus process and filled with metal materials to obtain the first metal heat dissipation layer 102 embedded on the surface of the first dielectric layer 101;

[0056] Reference Figure 3 , covering the second dielectric layer 103 on the first dielectric layer 101 and the first metal heat dissipation layer 102, and forming a first through hole 103a penetrating the second dielectric layer 103 and exposing the first metal heat dissipation layer 102, and forming a first bonding pad hole 103b on the top of the first through hole 103a by widening the top of the first through hole 103a, and the first through hole 103a and / or the first bonding pad hole 103b may also be formed by other methods;

[0057] Reference Figure 4 , filling the first through hole 103a and the first bonding pad hole 103b with metal material, so that the metal material forms a first heat dissipation column 104 corresponding to the first through hole 103a, and forms a first heat dissipation bonding pad 105 corresponding to the first bonding pad hole 103b;

[0058] Reference Figure 5 , bonding the first carrier 200 to the side of the second dielectric layer 103 away from the semiconductor substrate 100, and thinning the semiconductor substrate 100 from the side away from the first carrier 200, and before bonding, a dielectric material may be formed between the second dielectric layer 103 and the first carrier 200;

[0059] Reference Figure 6, forming a third dielectric layer 106 on the surface of the thinned semiconductor substrate 100, and forming a second through hole 100a penetrating the third dielectric layer 106, the semiconductor substrate 100 and the first dielectric layer 101 and exposing the first metal heat dissipation layer 102, and then filling the second through hole 100a with metal material to form a second heat dissipation column 107, the second heat dissipation column 107, the first metal heat dissipation layer 102, the first heat dissipation column 104 and the first heat dissipation bonding pad 105 constitute a first metal heat dissipation channel M1;

[0060] Reference Figure 7 , removing the first carrier plate 200 to obtain a thermally conductive substrate;

[0061] Reference Figure 8 , cutting the thermally conductive substrate along the thickness direction (cutting position as shown in FIG. Figure 7 In the embodiment of the present invention, a core particle including a part of the semiconductor substrate 100 and the first metal heat dissipation channel M1 can be formed, and the core particle is used as a heat dissipation unit TU, and its effective heat dissipation component includes a semiconductor heat dissipation layer 10 formed by the semiconductor substrate 100 and the first metal heat dissipation channel M1. Since the metal material has excellent thermal conductivity (when the first metal heat dissipation channel M1 is made of copper, the thermal conductivity of copper at room temperature is about 385W / (m·K)), compared with only using the semiconductor substrate for heat dissipation, the heat dissipation effect can be improved.

[0062] The thickness of the heat dissipation unit TU can be controlled by the process of thinning the semiconductor substrate 100 in its manufacturing process. When thinning the semiconductor substrate 100, the thinning can be performed according to the height of the space used to set the heat dissipation unit in the semiconductor device to be formed. For example, in some embodiments, the heat dissipation unit TU and the second substrate are subsequently bonded to the same surface of the first substrate. Then, by controlling the degree of thinning of the semiconductor substrate 100, the thickness of the heat dissipation unit TU is equal to or close to the thickness of the second substrate (for example, the difference in thickness between the two is less than a set value).

[0063] Reference Figure 1 According to the method for forming a semiconductor device according to an embodiment of the present invention, in step S2, at least one second substrate is bonded to a first substrate for interconnection, and at least one heat dissipation unit TU is bonded to the surface of the first substrate.

[0064] In some embodiments, the first substrate may include at least one of a silicon interposer adapter, a data processing substrate and a storage substrate, and the second substrate may include at least one of a data processing unit and a storage unit. The data processing substrate and the data processing unit may include a logic die (e.g., a central processing unit, a graphics processing unit, a system chip, a microcontroller, etc.); the storage substrate and the storage unit may include a dynamic random access memory (DRAM) die, a static random access memory (SRAM) die, etc. The first substrate or the second substrate may also include a power management die (e.g., a power management integrated circuit (PMIC) die), a radio frequency (RF) die, a sensor die, a micro-electro-mechanical-system (MEMS) die, a signal processing die (e.g., a digital signal processing (DSP) die), a front-end die (e.g., an analog front-end (AFE) die), etc. or a combination thereof. Any one of the silicon interposer adapter, the data processing substrate, the storage substrate, the data processing unit, and the storage unit may be a stacked structure.

[0065] At least one of the second substrates bonded and interconnected with the first substrate may be a stacked substrate structure or a single substrate structure (i.e., a non-stacked substrate). According to the need for heat dissipation of the semiconductor device, in some embodiments, at least one of the second substrates bonded and interconnected with the first substrate may be formed with a metal heat dissipation channel running through it, so that the second substrate has better heat dissipation capability. In this way, in the semiconductor device finally formed, both the second substrate and the heat dissipation unit TU can dissipate heat, which can improve the heat dissipation efficiency.

[0066] The following takes the second substrate of the stacked substrate structure as an example to introduce the process of forming the second substrate. The second substrate of the stacked substrate structure is, for example, a stacked memory cell.

[0067] Forming the second substrate of the stacked substrate structure may include: stacking and interconnecting at least two substrates to obtain a three-dimensional stacked substrate, and cutting the three-dimensional stacked substrate. In the following embodiments, when forming the three-dimensional stacked substrate, according to the need of the semiconductor device for heat dissipation capacity, a metal heat dissipation channel running through each of the substrates may be formed while stacking and interconnecting at least two substrates. It can be understood that based on different needs of the semiconductor device for heat dissipation capacity, a metal heat dissipation channel may not be formed while stacking and interconnecting at least two substrates.

[0068] Reference Fig. 9 , providing a first substrate W1, the first substrate W1 includes a front side 300a and a back side 300b opposite to each other, and a fourth dielectric layer 310 is formed on the front side 300a. In the embodiment of the present application, the first substrate W1 is a wafer, and the first substrate W1 can also be other semiconductor materials. The first substrate W1 can have a memory device (not shown) such as a dynamic random access memory (DRAM) and / or a static random access memory (SRAM), and the surface on one side of the memory device is the front side 300a of the first substrate 300, and the surface opposite to the front side 300a is the back side 300b of the first substrate 300.

[0069] Next, refer to Fig.10 , a first redistribution layer 311, a first interconnection bonding pad 313, and a first via 312 connecting the first redistribution layer 311 and the first interconnection bonding pad 313 are formed in the fourth dielectric layer 310. In this embodiment, a second metal heat dissipation layer 311', a second heat dissipation bonding pad 313', and a third heat dissipation column 312' connecting the second metal heat dissipation layer 311' and the second heat dissipation bonding pad 313' are also formed in the fourth dielectric layer 310. The formation of the first redistribution layer 311, the first interconnection bonding pad 313, the first via 312, the second metal heat dissipation layer 311', the second heat dissipation bonding pad 313', and the third heat dissipation column 312' can refer to the process of forming the first metal heat dissipation layer 102, the first heat dissipation column 104, and the first heat dissipation bonding pad 105 on the semiconductor substrate 100. As an example, a dielectric layer is first formed, and a first rewiring layer 311 and a second metal heat dissipation layer 311' are formed on the surface of the dielectric layer by using a damascene process, and the two are insulated and isolated; another dielectric layer is then formed on the dielectric layer, and through holes are formed corresponding to the first rewiring layer 311 and the second metal heat dissipation layer 311', respectively, so that the tops of the through holes are widened according to the size of the interconnect bonding pad or the heat dissipation bonding pad to be made; thereafter, a metal material is filled in the through holes, so that the metal material forms a first conductive hole 312 and a first interconnect bonding pad 313 corresponding to the first rewiring layer 311, and forms a third heat dissipation column 312' and a second heat dissipation bonding pad 313' corresponding to the second metal heat dissipation layer 311'.

[0070] Afterwards, refer to Fig.11 The second carrier 400 is bonded to the front side 300a of the first substrate W1, and the first substrate W1 is thinned from the back side 300b.

[0071] Next, refer to Fig.12 , a fifth dielectric layer 320 is formed on the back side 100b of the first substrate W1, and a second via hole 314 is formed that penetrates the fifth dielectric layer 320, the first substrate W1 and the fourth dielectric layer 310 and connects to the first redistribution layer 311. In this embodiment, a fourth heat dissipation column 314' is also formed that penetrates the fifth dielectric layer 320, the first substrate W1 and the fourth dielectric layer 310 and connects to the second metal heat dissipation layer 311'. The second via hole 314 and the fourth heat dissipation column 314' can be formed by referring to the process of forming the second heat dissipation column 107 on the thinned side of the semiconductor substrate 100.

[0072] Afterwards, refer to Fig.13 A sixth dielectric layer 330 and a second redistribution layer 331, a second interconnection bonding pad 333, and a third via 332 connecting the second redistribution layer 331 and the second interconnection bonding pad 333 are formed on the surface of the fifth dielectric layer 320. In this embodiment, a third metal heat dissipation layer 331', a third heat dissipation bonding pad 333', and a fifth heat dissipation column 332' connecting the third metal heat dissipation layer 331' and the third heat dissipation bonding pad 333' are also formed in the sixth dielectric layer 330.

[0073] The first redistribution layer 311, the first via 312, the first interconnection bonding pad 313, the second via 314, the second redistribution layer 331, the third via 332 and the second interconnection bonding pad 333 are metal interconnection structures that penetrate the first substrate W1, and the metal interconnection structures can connect the memory device in the first substrate W1. In addition, the second metal heat dissipation layer 311', the third heat dissipation column 312', the second heat dissipation bonding pad 313', the fourth heat dissipation column 314', the third metal heat dissipation layer 331', the fifth heat dissipation column 332' and the third heat dissipation bonding pad 333' are metal heat dissipation structures that penetrate the first substrate W1, and the metal heat dissipation structures are used to form metal heat dissipation channels located in the second substrate.

[0074] Reference Fig.14 , the first substrate W1 is bonded to the second substrate W2. As an example, the front surface of the second substrate W2 where the memory device is formed is opposite to the back surface 300b of the first substrate W2 and bonded (the bonding position is as shown in FIG. Fig.14The second substrate W2 also has, for example, a front side 300a and a back side 300b opposite to each other. Before bonding, the process performed on the first substrate W1 can be applied to the second substrate W2, and the metal interconnection structure and the metal heat dissipation structure penetrating the second substrate W2 can also be obtained. The metal interconnection structure also includes, for example, a first redistribution layer 311, a first conductive via 312, a first interconnection bonding pad 313, a second conductive via 314, a second redistribution layer 331, a third conductive via 332 and a second interconnection bonding pad 333. The metal heat dissipation structure may include a second metal heat dissipation layer 311', a third heat dissipation column 312', a second heat dissipation bonding pad 313', a fourth heat dissipation column 314', a third metal heat dissipation layer 331', a fifth heat dissipation column 332' and a third heat dissipation bonding pad 333'.

[0075] By bonding the first substrate W1 and the second substrate W2, the metal interconnection structures in the first substrate W1 and the second substrate W2 can be connected to each other, and the metal heat dissipation structures in the first substrate W1 and the second substrate W2 can also be connected to each other. However, the present invention is not limited to this. In another embodiment, part of the metal interconnection structure and part of the metal heat dissipation structure in the second substrate W2 can also be formed after bonding with the first substrate W2. The bonding methods in the embodiments of the present application include but are not limited to hybrid bonding, melt bonding and bump bonding.

[0076] The above-mentioned processes of forming the metal interconnection structure and the metal heat dissipation structure in the first substrate W1 and the second substrate W2 and bonding the first substrate W1 and the second substrate W2 can be repeated to stack and interconnect a specified number of substrates to form a three-dimensional stacked substrate, wherein the metal interconnection structures in each substrate are interconnected, and the metal heat dissipation structures in each substrate are interconnected to form a metal heat dissipation channel (referred to as the second metal heat dissipation channel M2). The second carrier 400 can then be removed.

[0077] As an example, the three-dimensional stacked substrate is formed by bonding the first substrate W1 and the second substrate W2. After forming the three-dimensional stacked substrate, the three-dimensional stacked substrate is cut along the thickness direction (cutting position is as shown in FIG. Fig.14 BB' line in the figure), then at least one second substrate of a stacked substrate structure can be obtained, such as Fig.15 As shown in the memory unit MU shown. The memory unit MU, for example, includes a plurality of memory core grains stacked by a plurality of substrates. The core grains in each memory unit MU are bonded and electrically interconnected through the above-mentioned metal interconnect structure, and the metal heat dissipation structures in the core grains in each memory unit MU are connected. One or more second metal heat dissipation channels M2 may be formed in each memory unit MU, or no metal heat dissipation channel may be formed.

[0078] After obtaining the second substrate, at least one of the second substrates is bonded and interconnected with the first substrate, and at least one of the heat dissipation units TU is bonded to the surface of the first substrate.

[0079] Reference Fig.16 In one embodiment, the first substrate 500 used in step S2 is a silicon interposer adapter board. In step S2, at least one of the second substrates bonded on the first substrate 500 is a storage unit MU having a stacked substrate structure, and at least one of the second substrates is a data processing unit PU. The data processing unit PU can be a stacked substrate structure or a non-stacked substrate structure. The data processing unit PU is, for example, a central processing unit (CPU) core, a graphics processing unit (GPU) core, a stack of multiple central processing unit (CPU) cores formed by multiple substrates, or a stack of multiple graphics processing unit (GPU) cores formed by multiple substrates.

[0080] like Fig.16 As shown, at least one second substrate (for example, including a storage unit MU and a data processing unit PU) and at least one heat dissipation unit TU are bonded to the surface of the first substrate 500. The second substrate may be provided with a metal heat dissipation channel or may not be provided with a metal heat dissipation channel.

[0081] The first substrate 500 may include a substrate and a plurality of dielectric layers stacked on the substrate and dielectric vias and metal layers formed in the plurality of dielectric layers. By bonding the second substrate to the first substrate 500, the second substrate is connected to the first substrate 500, and different second substrates may be interconnected through the first substrate 500. As an example, each of the second substrates includes the above-mentioned metal interconnection structure, wherein the metal interconnection structure in each of the second substrates is interconnected through the first substrate 500; and at least part of the second substrates also include the above-mentioned second metal heat dissipation channel M2, and the second metal heat dissipation channel M2 in each of the second substrates may be connected to the heat dissipation component provided in the first substrate 500, so that the second metal heat dissipation channel M2 in each of the second substrates may be interconnected; in some embodiments, the second metal heat dissipation channel M2 in each of the second substrates may be connected to the metal interconnection structure in the corresponding second substrate or the metal interconnection structure in the first substrate 500. The at least one heat dissipation unit TU may be distributed between adjacent second substrates on the first substrate 500, or may be formed on their peripheries. In some embodiments, the heat dissipation unit TU may be connected to a conductive or heat dissipation component in the first substrate 500 , and further may be interconnected with the second metal heat dissipation channel M2 in the second substrate through the first substrate 500 .

[0082] like Fig.16As shown, on the basis of bonding the second substrate and the heat dissipation unit TU to the surface of the first substrate 500, a filling covering layer 610, a heat conductive layer 620 and a heat dissipation metal sheet 630 (such as a heat sink) may be formed on the first substrate 500, wherein the filling covering layer 610 covers the first substrate 500 and the second substrate and the heat dissipation unit TU bonded to the first substrate 500, and fills the gap between them, the heat dissipation metal sheet 630 is formed on the side of the filling covering layer 610 away from the first substrate 500, and the heat conductive layer 620 is formed between the filling covering layer 610 and the heat dissipation metal sheet 630. In addition, the surface of the first substrate 500 away from the second substrate may be bonded to another substrate (such as a PCB substrate or other type of packaging substrate, not shown). The semiconductor device finally obtained includes the following: Fig.16 In the semiconductor device, the heat dissipation unit TU can be used to quickly transfer the heat generated by the second substrate and the first substrate 500 during operation to the heat conducting layer 620 and the heat dissipation metal sheet 630 .

[0083] exist Fig.16 In the semiconductor device shown, at least one heat dissipation unit TU may not be bonded to the side of the first substrate 500 bonded to the second substrate, but may be bonded to the surface of the first substrate 500 away from the second substrate, which may also achieve the effect of heat transfer. The heat conducting layer 620 and the heat dissipation metal sheet 630 are, for example, disposed at least on one side of the heat dissipation unit TU.

[0084] Reference Fig.17 In one embodiment, the first substrate 500 used in step S2 is a data processing substrate, and the data processing substrate can be a central processing unit (CPU) core, a graphics processing unit (GPU) core, a stack of multiple central processing unit (CPU) cores formed by multiple substrates, or a stack of multiple graphics processing unit (GPU) cores formed by multiple substrates. At least one of the second substrates bonded on the first substrate 500 is a memory unit MU having a stacked substrate structure. When a plurality of heat dissipation units TU are bonded on the surface of the first substrate 500, the plurality of heat dissipation units TU can be dispersedly arranged in the gaps between adjacent second substrates or on the periphery of at least one second substrate. Fig.17 The second substrate shown does not have a metal heat dissipation channel, for example.

[0085] Reference Fig.18In another embodiment, the first substrate 500 used in step S2 is a data processing substrate, and at least one of the second substrates bonded on the first substrate 500 is a storage unit MU having a stacked substrate structure, and a second metal heat dissipation channel M2 is formed in at least one of the second substrates. In this embodiment, the heat generated by the second substrate during operation can be quickly transferred through the heat dissipation unit TU, and can also be quickly transferred through the second metal heat dissipation channel M2, with high heat dissipation efficiency, which can significantly improve the heat transfer effect.

[0086] like Fig.17 and Fig.18 As shown, optionally, before the second substrate is bonded and interconnected with the heat dissipation unit TU, a seventh dielectric layer 710 may be formed on the surface of the first substrate 500 to be bonded, and a metal heat dissipation structure may be formed in the seventh dielectric layer 710 to enhance heat dissipation. The metal heat dissipation structure may include a fourth metal heat dissipation layer 711 formed in the seventh dielectric layer 710, a fourth heat dissipation bonding pad 713 embedded in the surface of the seventh dielectric layer 710, and a sixth heat dissipation column 712 connecting the fourth metal heat dissipation layer 711 and the fourth heat dissipation bonding pad 713.

[0087] exist Fig.17 and Fig.18 In the illustrated embodiment, on the basis of bonding the second substrate and the heat dissipation unit TU to the surface of the first substrate 500, a filling covering layer 610, a heat conducting layer 620 and a heat dissipation metal sheet 630 may be further formed on the first substrate 500, wherein the filling covering layer 610 covers the second substrate and the heat dissipation unit and fills the gap between them, the heat dissipation metal sheet 630 is disposed on a side of the filling covering layer 610 away from the first substrate 500, and the heat conducting layer 620 is disposed between the filling covering layer 610 and the heat dissipation metal sheet 630. In addition, the surface of one side of the first substrate 500 away from the second substrate and the heat dissipation unit TU may be bonded to another substrate (such as a PCB substrate or other types of packaging substrates, not shown). Figures 16 to 18 In the illustrated embodiment, the formed semiconductor device at least utilizes the heat dissipation unit TU to enhance heat dissipation, so that the heat generated by the second substrate and the first substrate 500 can be quickly transferred to the heat conductive layer 620 and the heat dissipation metal sheet 630 .

[0088] In the method for forming a semiconductor device described in the above embodiment, the second substrate is bonded and interconnected with the first substrate 500 to obtain higher working efficiency (such as data processing efficiency), and the heat dissipation capacity can be improved by bonding at least one heat dissipation unit TU on the surface of the first substrate 500 or on the surface of the first substrate 500.

[0089] The embodiment of the present invention further relates to a semiconductor device. The semiconductor device may be formed by using the method for forming the semiconductor device described in the above embodiment, or may be formed by using other suitable methods.

[0090] Reference Figures 2 to 18 The semiconductor device in the embodiment of the present invention includes a first substrate 500, a second substrate and a heat dissipation unit TU, at least one of the second substrates is bonded to the first substrate 500, the heat dissipation unit TU is bonded to the surface of the first substrate 500, and the heat dissipation unit TU includes a semiconductor heat dissipation layer 10 and a dielectric layer stacked on at least one surface of the semiconductor heat dissipation layer 10, and a first metal heat dissipation channel M1 that penetrates the semiconductor heat dissipation layer 10 and the dielectric layer along the thickness direction.

[0091] The first substrate may be a silicon interposer adapter board or a data processing substrate.

[0092] At least one of the second substrates may have a stacked substrate structure, such as a stacked memory unit MU. The stacked memory unit MU may include at least two bonded memory cores, and the memory cores are electrically interconnected via a metal interconnection structure.

[0093] like Fig.16 and Fig.18 As shown, at least one of the second substrates may include a second metal heat dissipation channel M2 running through it in the thickness direction, and the second metal heat dissipation channel M2 is used for heat dissipation. The first metal heat dissipation channel M1 and / or the second metal heat dissipation channel M2 may be connected to the conductive or heat dissipation components in the first substrate 500, and adjacent first metal heat dissipation channels M1, adjacent second metal heat dissipation channels M2, or the first metal heat dissipation channel M1 and the second metal heat dissipation channel M2 may be interconnected through the first substrate 500.

[0094] like Figures 16 to 18 As shown, in one embodiment, the first substrate 500 includes two opposite surfaces, wherein the second substrate and the heat dissipation unit TU are discretely bonded to one surface of the first substrate 500. The other surface of the first substrate 500 can be bonded and interconnected with a packaging substrate (not shown). However, it is not limited thereto, in another embodiment, the second substrate and the heat dissipation unit TU can be bonded to the two surfaces of the first substrate 500, respectively.

[0095] like Figures 16 to 18As shown, in some embodiments, the first substrate 500 has a bonding material layer (i.e., the seventh dielectric layer 710) and a metal heat dissipation structure arranged in the bonding material layer, and the bonding material layer is bonded to the second substrate and the heat dissipation unit TU. The metal heat dissipation structure, for example, includes a fourth metal heat dissipation layer 711 formed in the bonding material layer, a fourth heat dissipation bonding pad 713 embedded in the surface of the bonding material layer, and a sixth heat dissipation column 712 connecting the fourth metal heat dissipation layer 711 and the fourth heat dissipation bonding pad 713. The fourth heat dissipation bonding pad 713 can be bonded to the metal heat dissipation channel in the second substrate or the heat dissipation unit. However, it is not limited to this. For example, in another embodiment, the metal heat dissipation structure arranged in the bonding material layer only includes the fourth metal heat dissipation layer 711. The first metal heat dissipation channel M1 and / or the second metal heat dissipation channel M2 can be connected to the metal heat dissipation structure of the first substrate 500.

[0096] like Figures 16 to 18 As shown, the semiconductor device may also include a filling covering layer 610, a heat dissipation metal sheet 630 and a thermal conductive layer 620, wherein the filling covering layer 610 covers the second substrate, the first substrate 500 and the heat dissipation unit TU, and fills the gaps between the second substrate, the first substrate 500 and the heat dissipation unit TU, and the thermal conductive layer 620 and the heat dissipation metal sheet 630 are stacked on the surface of the filling covering layer 610 in sequence.

[0097] In the semiconductor device described in the above embodiment, the second substrate is bonded and interconnected with the first substrate 500 to obtain higher working efficiency, and the heat dissipation unit TU is bonded to the surface of the first substrate 500. The heat dissipation unit TU includes a semiconductor heat dissipation layer 10 and a first metal heat dissipation channel M1 that penetrates the semiconductor heat dissipation layer 10 and the dielectric layer on its surface, which helps to quickly dissipate the heat generated during the operation of the second substrate and the first substrate 500, thereby improving the heat dissipation capacity of the semiconductor device.

[0098] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The relevant parts can be understood by reference.

[0099] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A semiconductor device, characterized in that: include: A first substrate and at least one second substrate bonded to the first substrate; A heat dissipation unit is bonded to the surface of the first substrate, and comprises a semiconductor heat dissipation layer, a dielectric layer stacked on at least one surface of the semiconductor heat dissipation layer, and a first metal heat dissipation channel penetrating the semiconductor heat dissipation layer and the dielectric layer in a thickness direction.

2. The semiconductor device according to claim 1, wherein The first substrate is a silicon interposer adapter or a data processing substrate, and at least one of the second substrates is a stacked memory unit.

3. The semiconductor device according to claim 1, wherein At least one of the second substrates includes a second metal heat dissipation channel penetrating therein along a thickness direction.

4. The semiconductor device according to claim 1, wherein: The first substrate includes two opposite surfaces, and the second substrate and the heat dissipation unit are discretely bonded to one surface of the first substrate; or, the second substrate and the heat dissipation unit are respectively bonded to the two surfaces.

5. The semiconductor device according to claim 4, wherein: The first substrate further comprises: a bonding material layer, bonded to the second substrate and the heat dissipation unit; and A metal heat dissipation structure is arranged in the bonding material layer.

6. The semiconductor device according to claim 5, wherein: The metal heat dissipation structure comprises a metal heat dissipation layer formed in the bonding material layer, a heat dissipation bonding pad embedded in the surface of the bonding material layer, and a heat dissipation column connecting the metal heat dissipation layer and the heat dissipation bonding pad.

7. The semiconductor device according to claim 5, wherein: The first metal heat dissipation channel is connected to the metal heat dissipation structure.

8. The semiconductor device according to any one of claims 1 to 7, wherein: Also includes: A filling covering layer covers the second substrate, the heat dissipation unit and the first substrate, and fills the gaps between the second substrate, the heat dissipation unit and the first substrate; as well as The heat-conducting layer and the heat-dissipating metal sheet are sequentially stacked on the surface of the filling covering layer.

9. A method for forming a semiconductor device, characterized in that: include: Cutting a heat-conducting substrate formed based on a semiconductor substrate to obtain a heat dissipation unit, wherein the heat dissipation unit includes a semiconductor heat dissipation layer formed by the semiconductor substrate, a dielectric layer stacked on at least one surface of the semiconductor heat dissipation layer, and a first metal heat dissipation channel penetrating the semiconductor substrate layer and the dielectric layer in a thickness direction; as well as At least one second substrate is bonded to a first substrate and interconnected, and at least one heat dissipation unit is bonded to the surface of the first substrate.

10. The forming method according to claim 9, characterized in that: Forming the thermally conductive substrate comprises: forming a first dielectric layer on the semiconductor substrate, and forming a first metal heat dissipation layer on the surface of the first dielectric layer; Covering the first dielectric layer and the first metal heat dissipation layer with a second dielectric layer, forming a first through hole penetrating the second dielectric layer and exposing the first metal heat dissipation layer, and forming a first bonding pad hole by widening the top of the first through hole; Filling the first through hole and the first bonding pad hole with metal material, forming a first heat dissipation column corresponding to the first through hole, and forming a first heat dissipation bonding pad corresponding to the first bonding pad hole; Bonding a first carrier to a side of the second dielectric layer away from the semiconductor substrate, and thinning the semiconductor substrate from a side away from the first carrier; forming a third dielectric layer on the thinned surface of the semiconductor substrate, and forming a second through hole penetrating the third dielectric layer, the semiconductor substrate and the first dielectric layer and exposing the first metal heat dissipation layer; and A metal material is filled in the second through hole to form a second heat dissipation column, and the second heat dissipation column, the first metal heat dissipation layer, the first heat dissipation column and the first heat dissipation bonding pad constitute the first metal heat dissipation channel.

11. The forming method according to claim 9, characterized in that: At least one of the second substrates is a stacked substrate structure, and forming the second substrate of the stacked substrate structure includes: stacking and interconnecting at least two substrates to obtain a three-dimensional stacked substrate, and cutting the three-dimensional stacked substrate.

12. The forming method according to claim 11, characterized in that: Forming the three-dimensional stacked substrate comprises: Providing a first substrate, wherein the first substrate comprises a front side and a back side facing each other; Forming a fourth dielectric layer and a first rewiring layer, a first interconnection bonding pad, and a first via connecting the first rewiring layer and the first interconnection bonding pad in the fourth dielectric layer on the front side of the first substrate; Bonding the fourth dielectric layer to the second carrier, and thinning the first substrate from the back side; forming a fifth dielectric layer on the back side of the thinned first substrate, and forming a second via hole penetrating the fifth dielectric layer, the first substrate and the fourth dielectric layer and connecting the first redistribution layer; forming a sixth dielectric layer and a second redistribution layer, a second interconnection bonding pad, and a third via connecting the second redistribution layer and the second interconnection bonding pad located in the sixth dielectric layer on the fifth dielectric layer; and The first substrate is bonded to the second substrate.

13. The forming method according to claim 12, characterized in that: Forming the three-dimensional stacked substrate further includes: When forming the first rewiring layer, the first interconnect bonding pad and the first via, a second metal heat dissipation layer, a second heat dissipation bonding pad and a third heat dissipation column connecting the second metal heat dissipation layer and the second heat dissipation bonding pad are also formed in the fourth dielectric layer respectively; When forming the second via hole connected to the first rewiring layer, a fourth heat dissipation column penetrating the fifth dielectric layer, the first substrate, and the fourth dielectric layer and connected to the second metal heat dissipation layer is also formed; and When forming the second redistribution layer, the second interconnection bonding pad and the third via, a third metal heat dissipation layer, a third heat dissipation bonding pad and a fifth heat dissipation column connecting the third metal heat dissipation layer and the third heat dissipation bonding pad are also formed in the sixth dielectric layer respectively; The second metal heat dissipation layer, the second heat dissipation bonding pad, the third heat dissipation column, the fourth heat dissipation column, the third metal heat dissipation layer, the third heat dissipation bonding pad and the fifth heat dissipation column are used to form a second metal heat dissipation channel.

14. The forming method according to claim 9, characterized in that: Before bonding and interconnecting the second substrate and the first substrate, the method further includes: A bonding material layer is formed on the surface of the first substrate to be bonded, and a metal heat dissipation structure is formed in the bonding material layer.

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