Current type band-gap reference starting circuit

Abstract

The invention discloses a current type band-gap reference starting circuit which comprises PMOS (P-channel Metal Oxide Semiconductor) tubes P1-P6, NMOS (N-channel Metal Oxide Semiconductor) tubes N1 and N2, resistors R1-R3 and a triode Q1, when the starting circuit works, two paths of current are generated, one path of current is injected to a V2 point to raise the voltage of the V2 point, the other path of current is injected to a V3 point to lower the voltage of the V3 point, and the V3 point is started before the V2 point. According to the invention, the design complexity of the starting circuit is reduced, and the starting circuit can work normally within the power supply voltage range of 2V-5.5 V without influencing the output band-gap reference; the waveform in the starting process is optimized by adopting the segmented starting scheme, and the starting time is shortened. The comparator used by the starting circuit is simple and independent in structure, does not depend on additional bias and reference circuits, and can flexibly adjust the threshold voltage. After the band-gap reference circuit works normally, the electric leakage of the starting circuit is smaller than 1pA, and the band-gap reference circuit is very suitable for low-power-consumption application.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a current-type bandgap reference startup circuit. Background Art

[0002] As an important integrated circuit module, the bandgap voltage regulator circuit is widely used in various linear regulators, rechargeable battery protection chips, communication circuits, and RF transceiver circuits because its output is independent of power supply voltage, temperature, and process. However, the actual bandgap circuit may have a degeneracy point problem when in use. During the power-on process, the chip power gradually rises, and the bandgap reference circuit may not be able to start or work in an abnormal state. Therefore, the startup circuit is crucial for the bandgap reference circuit. A properly designed startup circuit can allow the bandgap reference to start normally in any design voltage range and environment without affecting the output reference voltage during normal operation. The traditional voltage-type bandgap reference can easily design a suitable startup circuit by detecting the current of the PTAT in the main part of the circuit, such as Figure 1 shown.

[0003] But in Figure 2 In the current-type bandgap reference circuit shown, the main current is divided into two parts: PTAT and CTAT, and the CTAT current is generated before the PTAT current. This results in the fact that if a traditional startup structure is used, the existence of the CTAT current may cause the startup circuit to misjudge: it is believed that the main circuit is in normal working state, but the PTAT current is still close to 0. This type of startup circuit failure is more likely to occur when the reference circuit is required to operate in a wider power supply voltage range, such as 2V~5.5V.

[0004] like Figure 2 As shown in the figure, when the voltage at point V1 is greater than 0V but less than the turn-on voltage of the BJT, the PTAT current value is close to 0, but the CTAT current value may be enough to cause the startup circuit to misjudge. Although careful optimization can make the startup circuit work properly at 2V~5.5V to avoid the degeneracy point, the leakage of the startup circuit at 5.5V is likely to cause the low-power bandgap reference output to be abnormal. Summary of the invention

[0005] The object of the present invention is to provide a current-type bandgap reference startup circuit to solve the problems in the background technology.

[0006] In order to solve the above technical problems, the present invention provides a current-type bandgap reference startup circuit, comprising: PMOS tubes P1-P6, NMOS tubes N1 and N2, resistors R1-R3, and a transistor Q1; The source end of the PMOS tube P1 and the source end of the PMOS tube P2 are both connected to the power supply voltage, and the gate end of the PMOS tube P1 is connected to the gate end of the PMOS tube P2; the drain end of the PMOS tube P1 is simultaneously connected to its own gate end and the drain end of the NMOS tube N1, the gate end of the NMOS tube N1 is connected to the point V2, the source end is connected to the emitter of the transistor Q1, and the base and collector of the transistor Q1 are both connected to the first end of the resistor R2; the drain end of the PMOS tube P2 is connected to the drain end of the NMOS tube N2, the source end of the NMOS tube N2 is connected to the first end of the resistor R1, and the second end of the resistor R1 is connected to the first end of the resistor R2; the second end of the resistor R2 and the gate end of the NMOS tube N2 are commonly connected to the first end of the resistor R3, and the second end of the resistor R3 is grounded; The source end of the PMOS tube P3 and the source end of the PMOS tube P4 are both connected to the power supply voltage, the gate end of the PMOS tube P3 is connected to the gate end of the PMOS tube P4; the drain end of the PMOS tube P3 is connected to the V2 point; the drain end of the PMOS tube P3 is simultaneously connected to its own gate end and the source end of the PMOS tube P6, the source end of the PMOS tube P5 is connected to the V3 point, the gate end of the PMOS tube P5 and the gate end of the PMOS tube P6 are commonly connected to the drain end of the PMOS tube P2, and the drain end of the PMOS tube P5 and the drain end of the PMOS tube P6 are grounded respectively; Point V2 is an input terminal of an amplifier OP in the current-mode bandgap reference, and point V3 is an output terminal of the amplifier OP in the current-mode bandgap reference.

[0007] In one embodiment, the startup circuit generates two currents when working, one current is injected into point V2 to raise the voltage of point V2, and the other current is injected into point V3 to lower the voltage of point V3, and point V3 is started before point V2.

[0008] The present invention provides a current-type bandgap reference startup circuit, which reduces the complexity of the startup circuit design, can work normally in the range of power supply voltage 2V~5.5V without affecting the output bandgap reference; the adopted segmented startup scheme optimizes the waveform during the startup process and shortens the startup time. The comparator used in the startup circuit has a simple and independent structure, does not rely on additional bias and reference circuits, and can flexibly adjust the threshold voltage. After the bandgap reference circuit works normally, the startup circuit leakage is less than 1pA, which is very suitable for low-power applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is a schematic diagram of the first traditional voltage-type bandgap reference structure.

[0010] Figure 2 This is a schematic diagram of the second traditional voltage-type bandgap reference structure.

[0011] Figure 3 The present invention provides a schematic diagram of the structure of a current-type bandgap reference startup circuit. DETAILED DESCRIPTION

[0012] The following is a further detailed description of a current-type bandgap reference startup circuit proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0013] The present invention proposes a current-type bandgap reference startup circuit for low power consumption and wide power supply range, such as Figure 3 As shown, it includes PMOS tubes P1-P6, NMOS tubes N1 and N2, resistors R1-R3, and a transistor Q1.

[0014] The source end of the PMOS tube P1 and the source end of the PMOS tube P2 are both connected to the power supply voltage, and the gate end of the PMOS tube P1 is connected to the gate end of the PMOS tube P2; the drain end of the PMOS tube P1 is simultaneously connected to its own gate end and the drain end of the NMOS tube N1, the gate end of the NMOS tube N1 is connected to the point V2, the source end is connected to the emitter of the transistor Q1, and the base and collector of the transistor Q1 are both connected to the first end of the resistor R2; the drain end of the PMOS tube P2 is connected to the drain end of the NMOS tube N2, the source end of the NMOS tube N2 is connected to the first end of the resistor R1, and the second end of the resistor R1 is connected to the first end of the resistor R2; the second end of the resistor R2 and the gate end of the NMOS tube N2 are commonly connected to the first end of the resistor R3, and the second end of the resistor R3 is grounded.

[0015] The source end of PMOS tube P3 and the source end of PMOS tube P4 are both connected to the power supply voltage, the gate end of PMOS tube P3 is connected to the gate end of PMOS tube P4; the drain end of PMOS tube P3 is connected to point V2; the drain end of PMOS tube P3 is connected to its own gate end and the source end of PMOS tube P6 at the same time, the source end of PMOS tube P5 is connected to point V3, the gate end of PMOS tube P5 and the gate end of PMOS tube P6 are connected to the drain end of PMOS tube P2, and the drain end of PMOS tube P5 and the drain end of PMOS tube P6 are grounded respectively. Among them, point V2 is an input end of amplifier OP in the current-type bandgap reference, point V2 is both a detection point and a start point; point V3 is the output end of amplifier OP in the current-type bandgap reference.

[0016] During the startup process, by comparing the voltage, the startup circuit detects that the voltage at point V2 is too low and turns on to help the main circuit escape the degenerate point state. When point V2 rises to the appropriate voltage, the startup circuit turns off and the leakage generated has a negligible effect on the output reference.

[0017] When the startup circuit is working, two currents are generated, one is injected into point V2 to raise the voltage at point V2, and the other is injected into point V3 to lower the voltage at point V3.

[0018] Different from the conventional bandgap reference startup circuit that detects current, the startup circuit of the present invention directly detects the Vbe voltage (emitter-base voltage of transistor Q2). In wide power supply range and current type application scenarios, voltage detection is more sensitive and safer, and the problem of choosing between startup circuit sensitivity and leakage size in current detection can be avoided.

[0019] The startup circuit acts on points V2 and V3 respectively, and point V3 starts before point V2. When acting on point V3, the startup circuit adopts a source follower output, which can reduce the jitter phenomenon in the operation process of the startup circuit loop. The delayed response point V2 can accelerate the startup in the later stage of the startup process and reduce the overall startup time. Compared with the single-point startup circuit, the scheme of the present invention not only ensures the reliability of the startup circuit, but also takes into account the startup time and jitter control during the startup process.

[0020] The present invention adopts a new startup circuit comparator structure, such as Figure 3 As shown. Through reasonable parameter design and optimization, it is possible to detect whether Vbe meets the BJT turn-on condition without the reference input voltage. The comparator power consumption can be reduced to 200nA by adjusting the size of the source resistor string. The threshold voltage of the comparator can be flexibly controlled by the ratio of the resistor tap and the size of the input tube source resistance value to meet the design margin requirements.

[0021] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A current-type bandgap reference startup circuit, characterized in that: include: PMOS tubes P1~P6, NMOS tubes N1 and N2, resistors R1~R3, and transistor Q1; The source end of the PMOS tube P1 and the source end of the PMOS tube P2 are both connected to the power supply voltage, and the gate end of the PMOS tube P1 is connected to the gate end of the PMOS tube P2; the drain end of the PMOS tube P1 is simultaneously connected to its own gate end and the drain end of the NMOS tube N1, the gate end of the NMOS tube N1 is connected to the point V2, the source end is connected to the emitter of the transistor Q1, and the base and collector of the transistor Q1 are both connected to the first end of the resistor R2; the drain end of the PMOS tube P2 is connected to the drain end of the NMOS tube N2, the source end of the NMOS tube N2 is connected to the first end of the resistor R1, and the second end of the resistor R1 is connected to the first end of the resistor R2; the second end of the resistor R2 and the gate end of the NMOS tube N2 are commonly connected to the first end of the resistor R3, and the second end of the resistor R3 is grounded; The source end of the PMOS tube P3 and the source end of the PMOS tube P4 are both connected to the power supply voltage, the gate end of the PMOS tube P3 is connected to the gate end of the PMOS tube P4; the drain end of the PMOS tube P3 is connected to the V2 point; the drain end of the PMOS tube P3 is simultaneously connected to its own gate end and the source end of the PMOS tube P6, the source end of the PMOS tube P5 is connected to the V3 point, the gate end of the PMOS tube P5 and the gate end of the PMOS tube P6 are commonly connected to the drain end of the PMOS tube P2, and the drain end of the PMOS tube P5 and the drain end of the PMOS tube P6 are grounded respectively; Point V2 is an input terminal of an amplifier OP in the current-mode bandgap reference, and point V3 is an output terminal of the amplifier OP in the current-mode bandgap reference.

2. The current-source bandgap reference startup circuit according to claim 1, characterized in that: The startup circuit generates two currents when working, one current is injected into point V2 to raise the voltage of point V2, and the other current is injected into point V3 to lower the voltage of point V3, and point V3 is started before point V2.

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