EMMC test method and system based on overvoltage and overcurrent protection, storage medium and equipment

Abstract

The invention discloses an eMMC testing method and system based on overvoltage and overcurrent protection, a storage medium and equipment, and the method comprises the steps: controlling a voltage converter to sequentially output a preset current value and a preset voltage value, and carrying out the idle voltage and current testing of to-be-tested equipment; judging whether the idle voltage and current test is completed or not, and if yes, performing read-write process performance, voltage and current test on the to-be-tested equipment; in the idle voltage and current testing process and the read-write process performance, voltage and current testing process, the voltage and current monitoring module is controlled to monitor a testing current value and a testing voltage value of the to-be-tested equipment, and if the testing current value is larger than an over-current threshold value or the testing voltage value is larger than an over-voltage threshold value, an interrupt signal is generated; and controlling the load switch to receive the interrupt signal, cutting off power supply to the to-be-tested equipment, and starting a retry mechanism. The influence of other influence factors in the production process on the equipment to be tested can be covered, the voltage and current of the equipment to be tested are detected in the testing process, and overvoltage and overcurrent protection on the equipment to be tested is achieved.

Description

Technical Field

[0001] The present invention relates to the field of memory research and development test technology, and in particular to an eMMC test method, system, storage medium and device based on overvoltage and overcurrent protection. Background Art

[0002] As an important storage solution, eMMC (Embedded Multi Media Card) is widely used in various electronic products such as smartphones, tablets, and IoT devices. With the continuous advancement of technology and the increase in market demand, manufacturers have put forward higher requirements for the performance, reliability, and cost control of eMMC. Among them, yield testing is an important means to evaluate the manufacturing process and product quality. Through yield testing, potential problems can be discovered, thereby improving product reliability.

[0003] However, first of all, the existing tests for eMMC generally only include relevant performance tests such as reading and writing, without considering other influencing factors in the production process, resulting in the eMMC electrical parameters not meeting expectations and failing to effectively test the eMMC with problems. Secondly, during the eMMC test process, due to equipment damage or misoperation, error detection may occur, and a normal eMMC may be misjudged as a bad product, causing damage to the eMMC. Therefore, it is also necessary to find and eliminate equipment impacts and protect eMMC devices. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide an eMMC test method, system, storage medium and equipment based on overvoltage and overcurrent protection to ensure the comprehensiveness and safety of the test.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is: An eMMC testing method based on overvoltage and overcurrent protection, comprising: Control the voltage converter to output preset current values ​​and voltage values ​​in sequence, and perform idle voltage and current tests on the device under test; Determine whether the idle voltage and current test is completed, and if so, perform read and write process performance, voltage, and current tests on the device under test; During the idle voltage and current test and the read and write process performance, voltage and current test, the voltage and current monitoring module is controlled to monitor the test current value and the test voltage value of the device under test, and if the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, an interrupt signal is generated; The load switch is controlled to receive the interrupt signal, and the power supply to the device under test is cut off, and a retry mechanism is started.

[0006] In order to solve the above technical problems, another technical solution adopted by the present invention is: An eMMC test system based on overvoltage and overcurrent protection, the system is used to implement the eMMC test method based on overvoltage and overcurrent protection as described above, the system includes a main control device, a power supply device and a test device; the main control device is connected to at least one of the power supply devices; the power supply device is connected to at least one of the test devices; The test equipment includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch and a power management system chip; the central controller is connected to the voltage converter, the voltage and current monitoring module, the load switch and the power management system chip respectively; the power management system chip is connected to the voltage converter; the voltage converter is connected to the device under test through the load switch; the voltage and current monitoring module is used to monitor the voltage and current of the device under test; The power supply device includes a controller and at least one power switch connected to the controller; the other end of the power switch is connected to a selector, and the other end of the selector is connected to a power supply input end of the test device.

[0007] In order to solve the above technical problems, another technical solution adopted by the present invention is: A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements the steps in the above-mentioned eMMC test method based on overvoltage and overcurrent protection.

[0008] In order to solve the above technical problems, another technical solution adopted by the present invention is: An electronic device comprises a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, each step in the above-mentioned eMMC test method based on overvoltage and overcurrent protection is implemented.

[0009] The beneficial effects of the present invention are as follows: the voltage converter, the voltage and current monitoring module and the load switch are controlled respectively by the central controller to complete the idle voltage and current test of the device under test and the voltage and current test of the performance during the reading and writing process, which can cover the influence of other influencing factors in the production process on the device under test; and, during the test process, the voltage and current of the device under test are also detected. When the voltage or current exceeds the overvoltage or overcurrent threshold, the power supply to the device under test is interrupted to realize overvoltage and overcurrent protection of the device under test; at the same time, the retry mechanism is turned on after overvoltage and overcurrent occur, so as to eliminate the error detection caused by equipment damage or misoperation, and misjudge the normal eMMC as a bad product; the customized eMMC reading and writing method ensures the reliability of the test. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a flowchart of the steps of the eMMC testing method based on overvoltage and overcurrent protection in an embodiment of the present invention; Figure 2 A test system block diagram of an eMMC test system based on overvoltage and overcurrent protection in an embodiment of the present invention; Figure 3 This is a block diagram of a power supply device of an eMMC test system based on overvoltage and overcurrent protection in an embodiment of the present invention; Figure 4 This is a block diagram of a test device of an eMMC test system based on overvoltage and overcurrent protection in an embodiment of the present invention; Figure 5 A schematic diagram of the structure of an electronic device in an embodiment of the present invention; Description of labels: 1. Main control equipment; 2. Power supply equipment; 21. Controller; 22. Power switch; 23. Selector; 24. Power supply module; 25. Storage module; 26. Network module; 3. Test equipment; 31. Central controller; 32. Voltage converter; 33. Voltage and current monitoring module; 34. Load switch; 35. Power management system chip; 36. USF storage device; 37. USB device; 38. Serial port device; 39. MSDC controller. DETAILED DESCRIPTION

[0011] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in combination with the implementation modes and the accompanying drawings.

[0012] The existing eMMC production process may be affected by many factors, such as material quality, production process, equipment status, etc., all of which may lead to the production of defective products. However, the existing eMMC testing process does not consider the impact of the above factors on the eMMC, resulting in the eMMC electrical parameters not meeting expectations. At the same time, during the eMMC testing process, due to equipment damage or misoperation, false detection may occur, causing a normal eMMC to be misjudged as a defective product, and causing damage to the eMMC.

[0013] In view of the above problems, the present invention provides an eMMC test method, system, storage medium and device based on overvoltage and overcurrent protection, specifically: An eMMC testing method based on overvoltage and overcurrent protection, comprising: Control the voltage converter to output preset current values ​​and voltage values ​​in sequence, and perform idle voltage and current tests on the device under test; Determine whether the idle voltage and current test is completed, and if so, perform read and write process performance, voltage, and current tests on the device under test; During the idle voltage and current test and the read and write process performance, voltage and current test, the voltage and current monitoring module is controlled to monitor the test current value and the test voltage value of the device under test, and if the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, an interrupt signal is generated; The load switch is controlled to receive the interrupt signal, and the power supply to the device under test is cut off, and a retry mechanism is started.

[0014] From the above description, it can be seen that the beneficial effects of the present invention are: the voltage converter, the voltage and current monitoring module and the load switch are controlled respectively by the central controller to complete the idle voltage and current test of the device under test and the voltage and current test of the performance of the reading and writing process, which can cover the influence of other influencing factors in the production process on the device under test; and, during the test process, the voltage and current of the device under test are also detected. When the voltage or current exceeds the overvoltage or overcurrent threshold, the power supply to the device under test is interrupted to realize overvoltage and overcurrent protection of the device under test; at the same time, the retry mechanism is turned on after overvoltage and overcurrent occur, so as to eliminate the error detection caused by equipment damage or misoperation, and misjudge the normal eMMC as a bad product; the customized eMMC reading and writing method ensures the reliability of the test.

[0015] Furthermore, the controlling voltage converter to sequentially output preset current values ​​and voltage values ​​to perform idle voltage and current tests on the device to be tested includes: supplying power to the voltage converter through a power supply device; The power supply equipment includes a power supply module, a network module, a controller, a power supply switch and a selector; The power supply module is respectively connected to the network module, the controller, the power switch and the selector for power supply; The network module is used to receive a power supply instruction and send it to the controller; The controller controls the power switch to switch between an on state and an off state according to the power supply instruction; The input end of the selector is connected to the power supply module and the power supply switch respectively, and outputs a fixed voltage based on the power supply module or outputs an adjustable voltage based on the power supply switch according to the power supply instruction; The output terminal of the selector is used to supply power to the voltage converter.

[0016] From the above description, it can be seen that in the power supply device, the power supply instruction is received through the network module and sent to the controller, and the controller controls the opening or closing of the power supply switch according to the power supply instruction to achieve adjustable voltage output; at the same time, the selector is respectively connected to the power supply module and the power supply switch, so that power is supplied by switching the power supply module or the power supply switch to achieve fixed voltage output or adjustable voltage output.

[0017] Furthermore, it also includes: Controlling the voltage converter by means of a test device; The test equipment includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch and an MSDC controller; The central controller is used to receive test instructions to perform idle voltage and current tests on the device under test, or read and write process performance, voltage, and current tests; The central controller controls the output of the voltage converter to output a preset current value and voltage value according to the test instruction; and the central controller performs a read and write process performance test on the device under test through the MSDC controller, and obtains the voltage value and current value of the device under test; The input end of the load switch is connected to the output end of the voltage converter, and the output end of the load switch provides voltage for the device under test; The output voltage of the voltage converter is used as the input of the voltage and current monitoring module; The central controller controls the voltage and current monitoring module to perform voltage and current monitoring, and reads the current voltage value and current value through the voltage and current monitoring module.

[0018] From the above description, it can be seen that in the test equipment, after the central controller receives the test instruction, it controls the output of the voltage converter to set the preset current value and voltage value to the load switch, and then the load switch provides voltage to the device under test. At the same time, the MSDC controller performs a read and write process performance test on the device under test, and obtains the voltage and current values ​​of the device under test, thereby realizing the test of the device under test and recording the corresponding voltage and current values.

[0019] Furthermore, the test device also includes a power management system chip, and includes two voltage converters, two load switches and two voltage and current monitoring modules, each of the voltage converters is respectively connected to one of the load switches and one of the voltage and current monitoring modules; The central controller controls the power management system chip to output a first preset voltage and a second preset voltage to respectively supply power to different voltage converters; and controls one voltage converter to adjust the voltage based on the first preset voltage, and controls another voltage converter to adjust the voltage based on the second preset voltage; The central controller controls the two voltage and current monitoring modules to read the current voltage value and current value respectively.

[0020] From the above description, it can be seen that by setting up two voltage converters, two load switches and two voltage and current monitoring modules, and the central controller controls the power management system chip to power the voltage converters, and controls different voltage converters to adjust the voltage based on different preset voltages, testing can be achieved in different voltage ranges.

[0021] Furthermore, the idle voltage and current test includes: Controlling the central controller to run the idle voltage and current test; The voltage and current monitoring module is controlled to record the test current value and test voltage value corresponding to each target current value and target voltage value, and it is determined whether the preset waiting time is reached. If so, the voltage converter is controlled to adjust the preset current value and voltage value in sequence.

[0022] From the above description, it can be seen that by ensuring that the device under test enters the idle state, and then adjusting the current value and voltage value in sequence by controlling the voltage converter to perform an idle voltage and current test on the device under test, the response of the device under test to different input voltages and currents in the idle state can be effectively detected, thereby reflecting the changes in the electrical parameters of the device under test during the production process, and can cover the impact of other influencing factors in the production process on the device under test.

[0023] Furthermore, the read / write process performance, voltage, and current test include: Execute a first preset number of test cycles, and when executing each test cycle, sequential read, sequential write, random read, and random write are sequentially executed for a second preset number of times, and average test data is obtained according to the second preset number of times and the test data after executing the second preset number of times; It is determined whether the number of cycles reaches the first preset number. If so, all the average test data are obtained, and comprehensive average test data is obtained based on the first preset number and the test data after executing the second preset number of times.

[0024] From the above description, it can be seen that in each cycle test, the second preset number of sequential reads, sequential writes, random reads and random writes are executed in turn to obtain the average test data corresponding to the sequential reads, sequential writes, random reads and random writes, and then the results of the first preset number of cycle tests are combined to obtain the comprehensive average test data corresponding to the sequential reads, sequential writes, random reads and random writes, thereby effectively reflecting the performance of the device under test under different reading and writing modes.

[0025] Further, performing random reads and random writes includes: The test addresses for performing random reads and random writes are obtained using the following steps: Obtain the number of operations according to the preset data volume and the data volume of one operation; Determine the offset based on the preset data volume and the current number of operations; Execute a random calculation formula to calculate a random logic block address, and obtain a number of the random logic block addresses corresponding to the number of operations; The random calculation formula includes: random_lba[i]=(random(0,512M / 4KB / 8 / 4)*8*4+random(0,4)*4+random(0,8))*8+offset; Among them, random (x, y) represents the random number from x to y-1 obtained by using linear congruential algorithm. The formula for obtaining random numbers by linear congruential algorithm is: Xn+1=(a*Xn+c) mod m; Xn is the current random number, a is the multiplier, c is the increment, and m is the modulus; m is the largest power of 2 less than 512M / 4KB / 8 / 4; a is (seed%m*4+1)%m; seed is an even number, c is (seed-1)%m; seed is an odd number, c is seed%m; Xn is seed%m; offset is the offset.

[0026] From the above description, it can be seen that by randomly obtaining the logical block address to be tested in the above manner, it can ensure that the logical block address used for testing falls on different planes, improve concurrency, and thus ensure the reliability of testing random read and random write performance.

[0027] Furthermore, after cutting off the power supply to the device under test, the method further includes: Recording the number of overvoltage and overcurrent of the current device under test through a memory, and determining whether the number of overvoltage and overcurrent is greater than a number threshold, and if so, recording the overvoltage and overcurrent information to the memory, and reporting the overvoltage and overcurrent information; If not, after waiting for a preset time, the load switch is controlled to start powering the device under test, and the idle voltage and current test and the read / write process performance, voltage, and current test are re-executed.

[0028] From the above description, it can be seen that by recording the number of overvoltage and overcurrent events that occur in the device under test, and restoring the device under test after the overvoltage and overcurrent events occur, the device under test is tested again; at the same time, when the number of overvoltage and overcurrent events that occur in the device under test exceeds the threshold, it is considered that the device under test can no longer be recovered, and the overvoltage and overcurrent information is reported.

[0029] Another embodiment of the present invention provides an eMMC test system based on overvoltage and overcurrent protection, the system is used to implement the above-mentioned eMMC test method based on overvoltage and overcurrent protection, the system includes a main control device, a power supply device and a test device; the main control device is connected to at least one of the power supply devices; the power supply device is connected to at least one of the test devices; The test equipment includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch and a power management system chip; the central controller is connected to the voltage converter, the voltage and current monitoring module, the load switch and the power management system chip respectively; the power management system chip is connected to the voltage converter; the voltage converter is connected to the device under test through the load switch; the voltage and current monitoring module is used to monitor the voltage and current of the device under test; The power supply device includes a controller and at least one power switch connected to the controller; the other end of the power switch is connected to a selector, and the other end of the selector is connected to a power supply input end of the test device.

[0030] Another embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the computer program implements the steps in the above-mentioned eMMC testing method based on overvoltage and overcurrent protection.

[0031] Another embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, each step in the above-mentioned eMMC testing method based on overvoltage and overcurrent protection is implemented.

[0032] The eMMC test method, system, storage medium and device based on overvoltage and overcurrent protection provided by the present invention can test the performance of storage devices, for example, test eMMC, which is described below through specific implementation methods: Embodiment 1 Please refer to Figure 1 , an eMMC test method based on overvoltage and overcurrent protection, comprising: S0, establish a connection relationship between the main control device 1 (PC), the power supply device 2 and the test device 3 in the test system; S01. Connect the PC to at least two power supply devices 2, and connect the master device 1 and all power supply devices 2 to the same switch using a network cable, and assign an IP to each power supply device 2 so that the IP of the power supply device 2 and the IP of the master device 1 are in the same network segment. Then turn on the power supply device 2 and send a connection command to the master device 1 through the network port scoket protocol.

[0033] S02. Test authorization is performed. The tester sends the MAC address to the administrator to obtain a license, and places the license in the license directory under the PC test program path. The license is calculated from the MAC address using the HMACSHA-256 algorithm.

[0034] S03. The PC runs a PC-side test program to scan the power supply device 2 and establish a connection.

[0035] S04 . The PC sends a command to the power supply device 2 through the network port scoket in step S01 , so that the power supply device 2 starts to supply power to the test device, that is, powers on the test device 3 .

[0036] S04, check whether the test device 3 is turned on, and run the test program after the test device 3 is powered on; specifically: after sending the power-on command, the PC waits for a preset time, for example, 5 minutes, and then sends a GET_DEVICES command via USB, waiting for the return of the test device ID, and determines whether the test device 3 is turned on through the test device ID to ensure that the test device 3 is turned on.

[0037] S05, after the test device 3 is turned on, the overvoltage and overcurrent protection is turned on. That is, in the subsequent process, the current value and voltage value of the test device 3 are monitored, and when the monitored current value and voltage value are greater than the protection threshold, the overvoltage and overcurrent protection is performed.

[0038] S06. The PC sends the test application to the test device 3 via the USB, and the test device 3 runs the application to perform the eMMC test.

[0039] S1. Perform idle voltage and current test: control the voltage converter 32 to output preset current value and voltage value in sequence to perform idle voltage and current test on the device under test; wherein, the voltage converter 32 is powered by the power management system chip 35; the central controller 31 controls the power management system chip 35 to output the preset power supply voltage to power the voltage converter 32. The power management system chip 35 in the test device 3 is powered by the power supply device 2; after the controller 21 in the power supply device 2 receives the power control instruction issued by the main control device 1, the controller 21 controls the switch state of the power switch 22 according to the power control instruction. If the power control instruction is turned off, the power switch 22 stops supplying power to the test device 3; if the power control instruction is turned on, the selector 23 is controlled to output an adjustable voltage or a fixed voltage according to the power control instruction to supply power to the test device 3.

[0040] The specific test steps are as follows: S11 , controlling the central controller 31 to run an idle voltage and current test.

[0041] S12, control the voltage converter 32 to adjust the preset current value and voltage value in sequence, and determine whether the preset waiting time is reached. If so, execute S13; for example, wait for 30 seconds to ensure that the test device 3 enters the Idle state before conducting the test.

[0042] S13, control the voltage and current monitoring module 33 to record the test current value and test voltage value corresponding to each target current value and target voltage value; wherein, in idle mode, the normal current of VCC is [0.00006A, 0.000115A]; the normal current of VCCQ is [0.000025A, 0.0001A]; the normal voltage of VCC is [3.2V, 3.4V]; the normal voltage of VCCQ is [1.7V, 1.9V].

[0043] S2. Determine whether the idle voltage and current tests are completed. If so, perform read and write process performance, voltage, and current tests on the device under test. That is, the test process includes read and write process performance, voltage, and current tests. The specific test process is as follows: S21. To ensure the reliability of the read performance test, the eMMC device data is erased before the read and write test, and a preset time is waited, for example, 1 minute is waited to ensure that the eMMC has erased the data; then the data is pre-filled. For example, in an optional implementation, the filling range is 0 to 512M data, the write size is 512K at a time, and the write address is filled in an ascending manner; in other optional implementations, the filling range and the write data size can be adjusted according to actual needs.

[0044] S22, executing a first preset number of test cycles, the test cycle comprising: sequentially executing a second preset number of sequential reads, sequential writes, random reads, and random writes, and obtaining average test data according to the second preset number of times; for example, in a specific implementation, the following steps are performed: S221, perform a sequential read test: that is, read the data written in step S21 in sequence, the data reading method corresponds to the data filling method, that is, based on the data filling method in step S21, the data reading method is: the reading range is 0 to 512M of written data, the size of one read is 512K, the read address increases in sequence, and the time Tn (n is 1-10) spent on reading is recorded each time 512K is read, and the voltage and current values ​​are obtained; S222, repeat step S221 three times to obtain the average voltage, average current and average rate corresponding to the sequential reading; S223, perform a sequential write test: wherein the data writing method corresponds to the data reading method, that is, based on the data reading method in step S22, the data writing method is: the writing range is 0 to 512M data, the size of one write is 512K, the write address increases in sequence, and each time 512K is written, the writing time Tn (n is 1-10) is recorded, and the voltage and current values ​​are obtained; S224, repeat step S223 three times to obtain the average voltage, average current and average rate corresponding to the sequential writing; S225, perform random read test: the read address range is 0 to 512M, set the amount of data to be read and the size of one read, for example, set the amount of data to be read to 64M, the size of one read to 4K, and the read address is obtained by the following steps: a. Calculate the number of reads taskcnt, taskcnt=64M / 4KB = 65535; b. The current number is i (i is an integer from 0 to taskcnt); c. Obtain the offset, for example, define the offset = (i%8)*64*1024*2; d. Calculate the random logical block address: Let the random logical block address be random_lba[i]=(random(0,512M / 4KB / 8 / 4)*8*4 + random(0,4)*4 + random(0,8))*8+offset; where random(x,y) represents the random number from x to y-1 obtained by linear congruential algorithm. The formula for obtaining random numbers by linear congruential algorithm is: Xn+1=(a*Xn+c) mod m, where Xn is the current random number, a is the multiplier, c is the increment, and m is the modulus. When m is a power of 2, better performance can be achieved because the modulus operation is more efficient. You can also choose a larger prime number, which helps to improve the distribution of random numbers, and m is the largest power of 2 that is less than 512M / 4KB / 8 / 4. a is (seed%m*4+1)%m. If seed is an even number, c is (seed-1)%m. If seed is an odd number, c is seed%m. Xn is seed%m. The seed is selected as 30. e. Repeat steps ad to obtain taskcnt random logical block addresses (Logical Block Address, LBA); S226, repeat step S225 three times to obtain the average voltage, average current and average rate corresponding to the random read; S227, perform a random write test: the write address range is 0 to 512M, the write data volume is 64M, the read size is 4K, and the write address acquisition method is the same as step S225, which will not be repeated here; S228. Repeat step S227 three times to obtain the average voltage, average current and average rate corresponding to the random write.

[0045] S23, determine whether the number of cycles reaches the first preset number, if so, obtain all average test data, and obtain comprehensive average test data according to the first preset number; for example, if the first preset number is five times, then after repeating steps S221-S228 five times, obtain the sequential read rate, average voltage and average current; sequential write rate, average voltage and average current; random read rate, average voltage and average current; random write rate, average voltage and average current for five times; Verify the above test data: Among them, in the sequential read mode, the rate requirement is greater than 295MBps, the normal current of VCC is [0.09A, 0.121A]; the normal current of VCCQ is [0.1A, 0.138A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0046] In sequential write mode, the rate requirement is greater than 130MBps, the normal current of VCC is [0.055A, 0.074A]; the normal current of VCCQ is [0.055A, 0.084A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0047] In random read mode, the rate requirement is greater than 10MBps, the normal current of VCC is [0.09A, 0.121A]; the normal current of VCCQ is [0.1A, 0.138A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0048] In random write mode, the rate requirement is greater than 5MBps, the normal current of VCC is [0.055A, 0.074A]; the normal current of VCCQ is [0.055A, 0.084A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0049] During the data verification test, the eMMC data is read, and the reading range is 0-512M data; after the test is completed, the test device 3 reports the test data through the USB, and the PC displays the test data after receiving it; The test result is represented by 12 bits: 0 bit represents that the device is not powered on, the program is abnormal, or the power supply device 2 is abnormal; 1 bit represents that the idle voltage is abnormal, and 2 bit represents that the idle current is abnormal; 3 bit represents that the eMMC read voltage is abnormal, 4 bit represents that the eMMC read current is abnormal, 5 bit represents that the eMMC read rate is abnormal, 6 bit represents that the eMMC write voltage is abnormal, 7 bit represents that the eMMC write current is abnormal, 8 bit represents that the eMMC write rate is abnormal, 9 bit represents that the data verification is abnormal, 10 bit represents that the overvoltage is abnormal, and 11 bit represents that the overcurrent is abnormal. S3, during the idle voltage and current test and the read and write process performance, voltage and current test, the voltage and current monitoring module 33 is controlled to monitor the test current value and the test voltage value of the device under test, and if the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, an interrupt signal is generated; S4, control the load switch 34 to receive the interrupt signal, cut off the power supply to the device under test, and start the retry mechanism; then record the overvoltage and overcurrent times of the current device under test through the memory, and determine whether the overvoltage and overcurrent times are greater than the threshold value. If so, record the overvoltage and overcurrent information to the memory, and report the overvoltage and overcurrent information; if not, after waiting for a preset time, control the load switch 34 to turn on the power supply to the device under test, and re-execute the idle voltage and current test as well as the read and write process performance, voltage, and current test.

[0050] For example: set the VCC overvoltage to 3.6V, the VCCQ overvoltage to 1.98V, and the current overcurrent threshold to 300mA; if overvoltage or overcurrent occurs, the voltage and current monitoring module 33 generates an overcurrent and overvoltage interrupt signal and notifies the central controller 31, and the central controller 31 further controls the load switch 34 to turn off the power supply of the eMMC device and start the retry mechanism.

[0051] Execute the retry mechanism: for example, if the preset time is 10 seconds, then after waiting for 10 seconds, control the load switch 34 to turn on the power supply of the eMMC device, restart the eMMC test process, and wait for the next overvoltage and overcurrent to occur; set the retry number threshold to 5 times, that is, when overvoltage and overcurrent occur 5 times, it is considered that recovery is impossible, and read the voltage, current, overvoltage and overcurrent status, record the overvoltage and overcurrent information to the UFS storage device 36, and report the overvoltage and overcurrent information.

[0052] Embodiment 2 Please refer to Figure 2, an eMMC test system based on overvoltage and overcurrent protection, the system is used to implement an eMMC test method based on overvoltage and overcurrent protection described in Example 1; the system includes a main control device 1, a power supply device 2 and a test device 3; the main control device 1 is connected to at least one power supply device 2; the power supply device 2 is connected to at least one test device 3; the main control device 1 (PC) is connected to the power supply device 2 through a network interface, and is responsible for issuing instructions to control the power supply device 2 to start powering the test device 3; the PC and the test device 3 are connected through a USB interface, which is used to display the test process and results, and alert the staff by displaying the diagnostic results; each power supply device 2 can provide 4-way power supply control, which respectively supplies power to the test device 3.

[0053] Please refer to Figure 3 The power supply device 2 includes a controller 21, and at least one power switch 22 connected to the controller 21; the other end of the power switch 22 is connected to the selector 23, and the other end of the selector 23 is connected to the power input end of the test device 3; the power supply device 2 also includes a power supply module 24, a storage module 25 and a network module 26; wherein the power supply module 24 is a 5V DC power supply, the power supply is connected to other modules, and provides a working voltage and an input voltage; the storage module 25 is connected to the controller 21, and is responsible for running the power supply device 2 program; the controller 21 is connected to the network module 26, and after the power supply device 2 is powered on and runs the program, the controller 21 controls the network module 26 to accept the instructions issued by the PC and control the corresponding power switch 22 On and off; the power switch 22 is connected to the controller 21, and after the controller 21 receives the on or off command, it controls the corresponding power switch 22 to turn on or off; the selector 23 realizes adjustable voltage or fixed input, and the input of the selector 23 is the output of the power supply module 24 and the power switch 22, and the output voltage can be selected as the adjustable input voltage of the power switch 22, or the fixed voltage of the power supply module 24 input; the output voltage of the selector 23 is used as the power input of the test equipment 3 to power the test equipment 3; that is, the controller 21 performs the control of the power supply part for the test equipment 3 as in step S1 of the first embodiment, and controls the power switch 22 and the selector 23 based on the controller 21 to realize the corresponding power supply control.

[0054] Please refer to Figure 4The test device 3 includes a central controller 31, a voltage converter 32, a voltage and current monitoring module 33, a load switch 34, and a power management system chip 35, and also includes a USF storage device 36, a USB device 37, a serial port device 38, and a MSDC (Master System Display Console, main system display console) controller 21; wherein, the voltage converter 32, the voltage and current monitoring module 33 and the load switch 34 each include two groups; the voltage converter 32 adopts a DC-DC converter; wherein, the power supply input is the 5V voltage output by the power supply device 2, and the power supply input is connected to the voltage management system chip, the central controller 31, and the UFS memory to provide power for the entire test device 3; the UFS memory is connected to the central controller 31 and is responsible for running the system test program; after the power supply device 2 powers on the test device 3, the program starts running; the USB device 37 is connected to the central controller 31, and receives the test command to perform the eMMC test, that is, the central controller 31 executes the test-related part in steps S1-S4 of the first embodiment; including S11-S13, S2-S4; based on the central controller 31, the voltage converter 32, the voltage and current monitoring module 33, the load switch 34 and the power management system chip 35 are controlled to complete the corresponding steps in the test. After the test is completed, the test results are uploaded via USB; the power management system chip 35 is connected to the central controller 31. After the test device 3 is powered on, the central controller 31 controls the power management system chip 35 to output a first preset voltage and a second preset voltage. For example, the first preset voltage is 3.3V and the second preset voltage is 1.8V. The first preset voltage 3.3V is output as the input of the first DC-DC converter, and the second preset voltage 1.8V is output as the input of the second DC-DC converter; the central controller 31 is connected to the DC-DC converter via the I2C interface, controls the first DC-DC converter to output a 2.4V-5.5V voltage, and controls the second DC-DC converter to output a 1.2V-2.8V voltage; the central controller 31 is connected to the load switch 34, and controls the load switch 34 to output VCC voltage and VCCQ voltage for the eMMC device; The output voltage of the DC-DC converter is used as the input of the voltage and current monitoring module 33. The central controller 31 is connected to the voltage and current monitoring module 33. The central controller 31 controls the voltage and current monitoring module 33 to perform VCC voltage and current monitoring and VCCQ voltage and current monitoring. The voltage and current of VCC, as well as the voltage and current of VCCQ can also be read at any time through the voltage and current monitoring module 33.

[0055] The central controller 31 is connected to the MSDC controller 39 to run a test program. The central controller 31 performs a read and write test on the eMMC device through the eMMC interface of the MSDC controller 39 and obtains the voltage and current values ​​of the eMMC.

[0056] In an optional embodiment, the DC-DC converter uses a power conversion chip and inputs the required voltage through the power pin. If it is a VCC power supply circuit, the power input voltage is 3.3V; if it is a VCCQ power supply circuit, the power input voltage is 1.8V; the power management system chip 35 outputs the converter voltage output, and the central controller 31 sets the converter output VCC 3.3V power supply or VCCQ 1.8V power supply through the I2C interface.

[0057] The voltage and current monitoring module 33 uses a monitoring chip, which includes a communication interface for obtaining the current current and voltage of VCC / VCCQ, setting the overcurrent and overvoltage values, and reading the overvoltage and overcurrent status; it includes an overvoltage and overcurrent interrupt signal pin, which is used to generate an interrupt signal to the central controller 31 when overvoltage and overcurrent occur; in addition, it also includes an analog input pin, which is used to convert the current of VCC into voltage to realize the collection of current. For example, the reference voltage and current are set as follows: VCC overvoltage threshold 3.6V, overcurrent threshold 300mA; VCCQ overvoltage threshold 1.95V, overcurrent threshold 300ma; when the input voltage and current exceed the set reference voltage and current, an overvoltage and overcurrent signal is generated, the latch module records the instantaneous value of overcurrent and overvoltage, and starts the timer to turn off the reception of overvoltage and overcurrent signals. The timer is set to the first preset time, for example, 250ms. After the 250ms timing time is up, the reception of overvoltage and overcurrent signals is turned on. If there is still overvoltage and overcurrent information, it is considered to be a valid overvoltage and overcurrent, avoiding false detection due to voltage and current jitter. Finally, the overvoltage and overcurrent information is written into the storage module 25 through the UFS controller 21, and then the power supply of the eMMC device is cut off through the voltage control module.

[0058] The load switch 34 uses a switch MOS chip, and when overvoltage or overcurrent occurs, the internal MOSFET is turned on to cut off the eMMC VCC / VCCQ power supply. That is, if overvoltage or overcurrent occurs, the voltage and current monitoring module 33 generates an overcurrent or overvoltage interrupt to notify the central control module, and the central controller 31 controls the MOSFET in the load switch 34 to turn on, thereby shutting off the power supply to the eMMC device.

[0059] In summary, the eMMC test method, system, storage medium and device for overvoltage and overcurrent protection provided by the present invention control each device in the test system based on the test method. Specifically: the voltage converter, voltage and current monitoring module and load switch are controlled respectively by the central controller to complete the idle voltage and current test and the read and write performance voltage and current test of the device to be tested, which can cover the influence of other influencing factors in the production process on the device to be tested; and, during the test process, the voltage and current of the device to be tested are also detected. When the voltage and current exceed the overvoltage / overcurrent threshold, the power supply to the device to be tested is interrupted to realize overvoltage and overcurrent protection of the device to be tested; when overvoltage and overcurrent occur, the retry mechanism is turned on to eliminate the error detection caused by equipment damage or misoperation, and the normal eMMC is misjudged as a bad product; the customized eMMC reading and writing method ensures the reliability of the test.

[0060] In the above embodiments provided in the present application, it should be understood that the disclosed methods, systems, computer-readable storage media, and electronic devices can be implemented in other ways. For example, the system embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple components or modules can be combined or integrated into another system or device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or components or modules, which can be electrical, mechanical or other forms.

[0061] The components described as separate components may or may not be physically separated, and the components shown as components may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the components may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0062] In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each component may exist physically separately, or two or more modules may be integrated into one module. The above integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0063] If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0064] It should be noted that, for the convenience of description, the aforementioned method embodiments are all described as a series of action combinations, but those skilled in the art should be aware that the present invention is not limited by the described action sequence, because according to the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

[0065] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0066] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An eMMC testing method based on overvoltage and overcurrent protection, characterized in that: include: Control the voltage converter to output preset current values ​​and voltage values ​​in sequence, and perform idle voltage and current tests on the device under test; Determine whether the idle voltage and current test is completed, and if so, perform read and write process performance, voltage, and current tests on the device under test; During the idle voltage and current test and the read and write process performance, voltage and current test, the voltage and current monitoring module is controlled to monitor the test current value and the test voltage value of the device under test, and if the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, an interrupt signal is generated; The load switch is controlled to receive the interrupt signal, and the power supply to the device under test is cut off, and a retry mechanism is started.

2. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: The control voltage converter sequentially outputs preset current values ​​and voltage values ​​to perform idle voltage and current tests on the device under test, including: supplying power to the voltage converter through a power supply device; The power supply equipment includes a power supply module, a network module, a controller, a power supply switch and a selector; The power supply module is respectively connected to the network module, the controller, the power switch and the selector for power supply; The network module is used to receive a power supply instruction and send it to the controller; The controller controls the power switch to switch between an on state and an off state according to the power supply instruction; The input end of the selector is connected to the power supply module and the power supply switch respectively, and outputs a fixed voltage based on the power supply module or outputs an adjustable voltage based on the power supply switch according to the power supply instruction; The output terminal of the selector is used to supply power to the voltage converter.

3. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: Also includes: Controlling the voltage converter by means of a test device; The test equipment includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch and an MSDC controller; The central controller is used to receive test instructions to perform idle voltage and current tests on the device under test, or read and write process performance, voltage, and current tests; The central controller controls the voltage converter to output a preset current value and voltage value according to the test instruction; The central controller performs a read and write process performance test on the device under test through the MSDC controller, and obtains the voltage value and current value of the device under test; The input end of the load switch is connected to the output end of the voltage converter, and the output end of the load switch provides voltage for the device under test; The output voltage of the voltage converter is used as the input of the voltage and current monitoring module; The central controller controls the voltage and current monitoring module to perform voltage and current monitoring, and reads the current voltage value and current value through the voltage and current monitoring module.

4. The eMMC testing method based on overvoltage and overcurrent protection according to claim 3, characterized in that: The test device also includes a power management system chip, and includes two voltage converters, two load switches and two voltage and current monitoring modules, each of the voltage converters is respectively connected to one of the load switches and one of the voltage and current monitoring modules; The central controller controls the power management system chip to output a first preset voltage and a second preset voltage to respectively supply power to different voltage converters; and controlling one of the voltage converters to adjust the voltage based on the first preset voltage, and controlling another of the voltage converters to adjust the voltage based on the second preset voltage; The central controller controls the two voltage and current monitoring modules to read the current voltage value and current value respectively.

5. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: The idle voltage and current test includes: Controlling the central controller to run the idle voltage and current test; Control the voltage converter to adjust the preset current value and voltage value in sequence, determine whether the preset waiting time is reached, and if so, control the voltage and current monitoring module to record the test current value and test voltage value corresponding to each target current value and target voltage value.

6. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: The read and write process performance, voltage, and current tests include: Execute a first preset number of test cycles, and when executing each test cycle, sequential read, sequential write, random read, and random write are sequentially executed for a second preset number of times, and average test data is obtained according to the second preset number of times and the test data after executing the second preset number of times; It is determined whether the number of cycles reaches the first preset number. If so, all the average test data are obtained, and comprehensive average test data is obtained according to the first preset number and the test data after the first preset number is executed.

7. The eMMC testing method based on overvoltage and overcurrent protection according to claim 6, characterized in that: Performing random reads and random writes includes: The test addresses for performing random reads and random writes are obtained using the following steps: Obtain the number of operations according to the preset data volume and the data volume of one operation; Determine the offset based on the preset data volume and the current number of operations; Execute a random calculation formula to calculate a random logic block address, and obtain a number of the random logic block addresses corresponding to the number of operations; The random calculation formula includes: random_lba[i]=(random(0,512M / 4KB / 8 / 4)*8*4+random(0,4)*4+random(0,8))*8+offset; Among them, random (x, y) represents the random number from x to y-1 obtained by using linear congruential algorithm. The formula for obtaining random numbers by linear congruential algorithm is: Xn+1=(a*Xn+c) mod m; Xn is the current random number, a is the multiplier, c is the increment, and m is the modulus; m is the largest power of 2 less than 512M / 4KB / 8 / 4; a is (seed%m*4+1)%m; seed is an even number, c is (seed-1)%m; seed is an odd number, c is seed%m; Xn is seed%m; offset is the offset.

8. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: After cutting off the power supply to the device under test, the method further includes: Recording the number of overvoltage and overcurrent of the current device under test through a memory, and determining whether the number of overvoltage and overcurrent is greater than a number threshold, and if so, recording the overvoltage and overcurrent information to the memory, and reporting the overvoltage and overcurrent information; If not, after waiting for a preset time, the load switch is controlled to start powering the device under test, and the idle voltage and current test and the read / write process performance, voltage, and current test are re-executed.

9. An eMMC test system based on overvoltage and overcurrent protection, characterized in that: The system is used to implement an eMMC test method based on overvoltage and overcurrent protection as described in any one of claims 1 to 8, and the system includes a main control device, a power supply device and a test device; the main control device is connected to at least one of the power supply devices; the power supply device is connected to at least one of the test devices; The test equipment includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch and a power management system chip; The central controller is respectively connected to the voltage converter, the voltage and current monitoring module, the load switch and the power management system chip; The power management system chip is connected to the voltage converter; the voltage converter is connected to the device under test through the load switch; the voltage and current monitoring module is used to monitor the voltage and current of the device under test; The power supply device includes a controller and at least one power switch connected to the controller; The other end of the power switch is connected to the selector, and the other end of the selector is connected to the power input end of the test device.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, each step of the eMMC testing method based on overvoltage and overcurrent protection as described in any one of claims 1 to 8 is implemented.

11. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, each step of the eMMC testing method based on overvoltage and overcurrent protection as described in any one of claims 1 to 8 is implemented.

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