Power amplifier power-on time sequence control circuit and method

By designing the power-on timing control circuit of the amplifier, using clamp protection circuit, gate voltage regulation circuit and drain regulation circuit, the risk of power amplifier leakage voltage loss caused by abnormal operation of the microcontroller is solved, and the security guarantee of the amplifier is achieved.

CN119543849APending Publication Date: 2025-02-28FINAL FRONTIER (WUXI) AEROSPACE CO LTD
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Patent Information

Application Number
CN202411577095.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-06
Publication Date
2025-02-28

AI Technical Summary

Technical Problem

The prior art cannot effectively avoid the risk of power amplifier leakage and loss of control caused by abnormal operation of microcontrollers, and cannot guarantee the safety of the amplifier.

Method used

A power-on timing control circuit is designed, including clamp protection circuit, gate voltage adjustment circuit and drain adjustment circuit. The power amplifier drain current is pinched off through the clamp protection circuit. The gate voltage adjustment circuit raises the gate voltage to the safe bias range. The drain adjustment circuit provides voltage to the drain to achieve clamp protection of the gate voltage of the amplifier.

Benefits of technology

It effectively avoids the risk of power-on timing problems and the use of the power amplifier drain voltage in the event of abnormal operation of the microcontroller, ensuring the safety of the amplifier.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of circuits, particularly provides a power amplifier power-on time sequence control circuit and method, and aims to solve the problem that the voltage leakage and out-of-control risk of a power amplifier caused by abnormal working conditions of a microcontroller cannot be avoided in the prior art. In order to achieve the purpose, the power-on time sequence control circuit of the power amplifier comprises a clamping protection circuit connected with a grid electrode of the power amplifier and used for generating negative voltage and a first enable signal and converting the negative voltage into clamping voltage; the grid voltage adjusting circuit is used for outputting an adjusting voltage and a second enable signal based on the first enable signal and inputting the adjusting voltage to the clamping protection circuit so as to adjust the clamping voltage to a target voltage; and the drain electrode adjusting circuit is connected with the drain electrode of the power amplifier and is used for providing drain electrode voltage for the drain electrode of the power amplifier based on the second enable signal. According to the scheme, the drain current of the power amplifier is thoroughly pinched off through the clamping protection circuit, so that the power-on time sequence problem and the risk of using the drain voltage of the power amplifier under the condition that the microcontroller works abnormally are avoided.
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Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and specifically provides a power amplifier power-on timing control circuit and method. Background Art

[0002] The power-on sequence affects the safety of the power amplifier. In related technologies, a microcontroller and a switch circuit are usually combined to control the power-on sequence of the power amplifier. Specifically, the gate voltage of the power amplifier can be adjusted to a safe range before providing an operating voltage to the drain of the power amplifier. However, this solution still cannot avoid the risk of uncontrolled power amplifier leakage voltage caused by abnormal operation of the microcontroller, and cannot effectively ensure the safety of the power amplifier. Summary of the invention

[0003] The present invention aims to solve the above technical problem, that is, to solve the problem that the risk of power amplifier leakage out of control caused by abnormal operation of the microcontroller cannot be avoided in the prior art, and to ensure the safety of the power amplifier.

[0004] In a first aspect, the present invention provides a power amplifier power-on timing control circuit, comprising:

[0005] A clamping protection circuit connected to the gate of the power amplifier, the clamping protection circuit is used to generate a negative voltage and a first enable signal, and convert the negative voltage into a clamping voltage;

[0006] a gate voltage regulating circuit, the gate voltage regulating circuit being used to output a regulating voltage and a second enabling signal based on the first enabling signal, and input the regulating voltage to the clamping protection circuit to adjust the clamping voltage to a target voltage;

[0007] A drain regulating circuit connected to the drain of the power amplifier, wherein the drain regulating circuit is used to provide a drain voltage to the drain of the power amplifier based on the second enable signal.

[0008] In some embodiments, the clamping protection circuit includes: a negative voltage generator and an adding operational amplifier connected to the output end of the negative voltage generator, the negative voltage generator is used to generate the negative voltage, and the adding operational amplifier is used to convert the negative voltage to the clamping voltage.

[0009] In some embodiments, the gate voltage regulation circuit includes: a first switching power supply and a microcontroller connected to the output end of the first switching power supply, the first switching power supply is used to supply power to the microcontroller based on the first enable signal, and the microcontroller outputs the regulation voltage and the second enable signal after power-on.

[0010] In some embodiments, the drain regulation circuit includes a second switching power supply and a sampling resistor connected to an output end of the second switching power supply, and the second switching power supply is used to provide a drain voltage to the drain of the power amplifier through the sampling resistor based on the second enable signal.

[0011] In some embodiments, it also includes: a gate voltage temperature compensation circuit, which is used to obtain temperature information and drain current of the power amplifier, and input the temperature information and the drain current into the gate voltage regulation circuit; the gate voltage regulation circuit is used to compensate the regulation voltage based on the temperature information to adjust the drain current to the target current.

[0012] In some embodiments, the gate voltage temperature compensation circuit includes a thermistor and a current monitor, the thermistor is used to obtain an analog voltage corresponding to the current operating temperature of the power amplifier, characterize the temperature information with the analog voltage, and input the analog voltage into the gate voltage regulation circuit; the current monitor is used to obtain the drain current of the power amplifier and input the drain current into the gate voltage regulation circuit.

[0013] In some embodiments, the gate voltage regulation circuit further includes an analog-to-digital converter and a digital-to-analog converter, wherein the analog-to-digital converter is used to convert the analog voltage into a digital signal, and the digital-to-analog converter is used to convert the digital signal generated by the gate voltage regulation circuit into an analog signal.

[0014] In some embodiments, the current monitor and the gate voltage regulation circuit are connected via an I2C bus.

[0015] In a second aspect, the present invention provides a power amplifier power-on timing control method, which is implemented based on any one of the power amplifier power-on timing control circuits described above, and the method comprises:

[0016] Provide power to the clamp protection circuit;

[0017] The clamp protection circuit generates a negative voltage and a first enable signal, and converts the negative voltage into a clamp voltage and transmits it to the gate of the power amplifier;

[0018] The gate voltage regulating circuit outputs a regulating voltage and a second enabling signal based on the first enabling signal, and inputs the regulating voltage into the clamping protection circuit;

[0019] The clamp protection circuit adjusts the clamp voltage to a target voltage based on the regulation voltage and the negative voltage;

[0020] The drain regulating circuit provides a drain voltage to the drain of the power amplifier based on the second enable signal.

[0021] In some embodiments, the method further comprises:

[0022] Acquiring temperature information and drain current of the power amplifier by using a gate voltage temperature compensation circuit, and transmitting the temperature information and drain current to the gate voltage regulation circuit;

[0023] The gate voltage regulation circuit compensates the regulation voltage based on the temperature information to adjust the drain current to a target current.

[0024] In the case of adopting the above technical scheme, the present invention can include a clamping protection circuit connected to the gate of the power amplifier, the clamping protection circuit is used to generate a negative voltage and a first enable signal, and convert the negative voltage to a clamping voltage; a gate voltage regulation circuit, the gate voltage regulation circuit is used to output a regulation voltage and a second enable signal based on the first enable signal, and input the regulation voltage to the clamping protection circuit to adjust the clamping voltage to a target voltage; a drain regulation circuit connected to the drain of the power amplifier, the drain regulation circuit is used to provide a drain voltage to the drain of the power amplifier based on the second enable signal. This scheme first completely cuts off the drain current of the power amplifier through the clamping protection circuit, then raises the gate voltage of the power amplifier to a safe bias range through the gate voltage regulation circuit, and finally provides a voltage to the drain of the power amplifier through the drain regulation circuit, which can achieve clamping protection of the gate voltage of the power amplifier, avoid power-on timing problems and the risk of using the drain voltage of the power amplifier when the microcontroller is working abnormally, and effectively ensure the safety of the power amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings, in which:

[0026] Figure 1 It is a schematic diagram of a power amplifier power-on timing control circuit provided by an embodiment of the present invention;

[0027] Figure 2 It is a schematic diagram of a power amplifier power-on timing control circuit provided by a preferred embodiment of the present invention;

[0028] Figure 3 It is a partial circuit diagram of a power amplifier power-on timing control circuit provided by an embodiment of the present invention;

[0029] Figure 4 is a partial circuit diagram of a clamping protection circuit provided by an embodiment of the present invention;

[0030] Figure 5 It is a schematic diagram of a power-on timing control circuit of a power amplifier provided with a gate voltage temperature compensation circuit provided in an embodiment of the present invention;

[0031] Figure 6 It is a schematic diagram of a power-on timing control circuit of a power amplifier provided with a gate voltage temperature compensation circuit provided in a preferred embodiment of the present invention;

[0032] Figure 7 is a partial circuit diagram of a gate voltage temperature compensation circuit provided by an embodiment of the present invention;

[0033] Figure 8 The present invention is a flowchart of a power amplifier power-on timing control method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0034] Some embodiments of the present invention are described below with reference to the accompanying drawings. It should be understood by those skilled in the art that these embodiments are only used to explain the technical principles of the present invention and are not intended to limit the protection scope of the present invention.

[0035] See also Figure 1 As shown, Figure 1 1 is a schematic diagram of a power amplifier power-on timing control circuit provided by an embodiment of the present invention, which may include:

[0036] A clamping protection circuit 1 connected to the gate of the power amplifier, the clamping protection circuit 1 is used to generate a negative voltage and a first enable signal EN1, and convert the negative voltage into a clamping voltage;

[0037] The gate voltage regulating circuit 2 is used for outputting a regulating voltage Vset and a second enabling signal EN2 based on the first enabling signal EN1, and inputting the regulating voltage Vset to the clamping protection circuit 1 to adjust the clamping voltage to a target voltage;

[0038] The drain regulating circuit 3 is connected to the drain of the power amplifier, and the drain regulating circuit 3 is used to provide a drain voltage Vdd to the drain of the power amplifier based on the second enable signal EN2.

[0039] The clamping voltage or the target voltage is used as the gate voltage Vgg of the power amplifier.

[0040] In some embodiments, see Figure 2 As shown, Figure 2 It is a schematic diagram of a power amplifier power-on timing control circuit provided by a preferred embodiment of the present invention, wherein the clamping protection circuit 1 may include: a negative voltage generator and an adding operational amplifier connected to the output end of the negative voltage generator, the negative voltage generator is used to generate a negative voltage and a first enable signal EN1, and the adding operational amplifier is used to convert the negative voltage to a clamping voltage.

[0041] In some embodiments, the negative voltage generator may be powered by the system power supply, and the negative voltage generator is used to convert the positive voltage of the system power supply into a negative voltage. As an example, the negative voltage may be -5 V. In some embodiments, the negative voltage generator may synchronously output a PG indication signal for use as the first enable signal EN1.

[0042] See also Figure 3 As shown, Figure 3It is a partial circuit diagram of a power amplifier power-on timing control circuit provided by an embodiment of the present invention, wherein the negative voltage generator U23 can select the ADP5600ACPZ-R7 chip, the system power supply can be input into the negative voltage generator U23 through pin 1, the negative voltage is output through pin 8, and the PG indication signal is output through pin 5.

[0043] In some embodiments, Figure 2 As shown, the gate voltage regulation circuit may include: a first switching power supply and a microcontroller (Microcontroller Unit, MCU) connected to the output end of the first switching power supply, the first switching power supply is used to supply power to the microcontroller based on a first enable signal EN1, and the microcontroller outputs a regulated voltage and a second enable signal EN2 after power-on.

[0044] In some embodiments, the first switching power supply may be a DC / DC switching power supply, the system power supply supplies power to the first switching power supply, and the first switching power supply converts the positive voltage of the system power supply into the voltage required by the microcontroller after receiving the first enable signal EN1 output by the negative voltage generator, and supplies power to the microcontroller. As an example, the voltage required by the microcontroller may be 3.3V, and the first switching power supply may convert the positive voltage of the system power supply into 3.3V to supply power to the microcontroller.

[0045] In some embodiments, the microcontroller can be used to output a regulated voltage Vset and output the regulated voltage Vset to the adding operational amplifier of the clamping protection circuit 1, and the heating operational amplifier is used to sum the negative voltage and the regulated voltage Vset and then output a target voltage, wherein the target voltage is within the safe bias range of the power amplifier gate voltage.

[0046] In some embodiments, see Figure 3 As shown, the first switching power supply U25 can adopt the LTM8074IYPBF chip, the system power can be input into the first switching power supply U25 through pins A3 and A4, the first enable signal EN1 can be input into the first switching power supply U25 through pin A2, and the first switching power supply U25 converts the system power and outputs the voltage required by the microcontroller through pins E1 and E2.

[0047] In some embodiments, see Figure 4 As shown, Figure 4 It is a partial circuit diagram of the clamping protection circuit 1 provided in an embodiment of the present invention, wherein the adding operational amplifier U24 can adopt the OPA2192IDGK chip, wherein a negative voltage can be input through pin 3, and a voltage can be provided to the gate of the power amplifier through pin 1.

[0048] In some embodiments, Figure 2As shown, the gate voltage regulating circuit 2 may further include a digital-to-analog converter DAC, which is built in the microcontroller and is used to convert a digital signal generated by the microcontroller into an analog signal, namely, a regulating voltage, and transmit it to the adding operational amplifier.

[0049] In some embodiments, Figure 2 As shown, the drain regulating circuit 3 includes a second switching power supply and a sampling resistor connected to the output end of the second switching power supply. The second switching power supply is used to provide a drain voltage Vdd to the drain of the power amplifier through the sampling resistor based on a second enable signal EN2.

[0050] In some embodiments, the second switching power supply can be a DC / DC switching power supply, the system power supply supplies power to the first switching power supply, and the second switching power supply converts the positive voltage of the system power supply after receiving the second enable signal EN2 output by the microcontroller, and outputs the converted voltage to the sampling resistor, which is provided to the drain of the power amplifier through the sampling resistor. As an example, the positive voltage of the system power supply can be converted to a voltage of 8V.

[0051] In some embodiments, see Figure 3 As shown, the second switching power supply U27 can use the LTM4622AIY#PBF chip, and the system power is input through the D3, E2, A2, and B3 pins of the second switching power supply U27. After the second switching power supply U27 converts the system power, it outputs the voltage through the D1, E1, A1, and B1 pins.

[0052] The above is a power amplifier power-on control circuit provided by an embodiment of the present invention, which may include a clamping protection circuit connected to the gate of the power amplifier, the clamping protection circuit is used to generate a negative voltage and a first enable signal, and convert the negative voltage to a clamping voltage; a gate voltage regulation circuit, the gate voltage regulation circuit is used to output a regulation voltage and a second enable signal based on the first enable signal, and input the regulation voltage to the clamping protection circuit to adjust the clamping voltage to a target voltage; a drain regulation circuit connected to the drain of the power amplifier, the drain regulation circuit is used to provide a drain voltage to the drain of the power amplifier based on the second enable signal. This solution first completely cuts off the drain current of the power amplifier through the clamping protection circuit, then raises the gate voltage of the power amplifier to a safe bias range through the gate voltage regulation circuit, and finally provides a voltage to the drain of the power amplifier through the drain regulation circuit, which can achieve clamping protection of the gate voltage of the power amplifier, avoid power-on timing problems and the risk of using the drain voltage of the power amplifier when the microcontroller is working abnormally, and effectively ensure the safety of the power amplifier.

[0053] The static operating point of the power amplifier at different temperatures may drift, which may cause system performance to deteriorate. Based on this, in some embodiments, it is possible to Figure 1 The corresponding embodiment adds a gate voltage temperature compensation circuit 4 to obtain the following Figure 5The power amplifier power-on timing control circuit shown is used to improve system performance. The gate voltage temperature compensation circuit 4 is used to obtain the temperature information and drain current of the power amplifier, and input the temperature information and drain current into the gate voltage adjustment circuit 2; the gate voltage adjustment circuit 2 is used to compensate the adjustment voltage Vset based on the temperature information to adjust the drain current to the target current.

[0054] In some embodiments, see Figure 6 As shown, the gate voltage temperature compensation circuit 4 may include a thermistor and a current monitor. The thermistor is used to obtain an analog voltage Vt corresponding to the current operating temperature of the power amplifier, characterize the temperature information with the analog voltage Vt, and input the analog voltage Vt into the gate voltage regulation circuit 2; the current monitor is used to obtain the drain current of the power amplifier and input the drain current into the gate voltage regulation circuit 2.

[0055] In some embodiments, the thermistor is used to obtain an analog voltage Vt corresponding to the current operating temperature of the power amplifier, use the analog voltage Vt to represent temperature information, and input the analog voltage Vt into the microcontroller of the gate voltage regulation circuit 2 .

[0056] In some embodiments, the gate voltage regulating circuit 2 may include an analog-to-digital converter ADC, which is used to convert the analog voltage Vt into a digital signal. Specifically, the microcontroller of the gate voltage regulating circuit 2 is built with an analog-to-digital converter ADC, which is used to convert the analog voltage Vt into a digital signal.

[0057] In some embodiments, the current monitor is used to obtain the drain current of the power amplifier and input the drain current into the microcontroller of the gate voltage regulation circuit 2. Specifically, the current monitor and the gate voltage regulation circuit 2 are connected through an I2C bus, and the current monitor obtains the voltage difference across the sampling resistor and converts the voltage difference into a current signal to obtain the drain current, and transmits the drain current to the microcontroller through the I2C bus.

[0058] See also Figure 7 As shown, Figure 7 It is a partial circuit diagram of the gate voltage temperature compensation circuit provided by an embodiment of the present invention, wherein the current monitor U26 can adopt the INA236AIDDFR chip, and can collect the voltage across the sampling resistor through pins 1 and 2 to obtain the drain current, and can transmit the drain current to the microcontroller through pin 6.

[0059] The microcontroller determines the current operating temperature of the power amplifier based on the analog voltage Vt, and determines the compensation value corresponding to the current operating temperature according to the preset temperature-compensation value correspondence relationship, and compensates the adjustment voltage Vset based on the compensation value to obtain the compensated adjustment voltage. The microcontroller transmits the compensated adjustment voltage to the adding operational amplifier, and the sum of the negative voltage and the compensated adjustment voltage is used as the voltage input of the power amplifier gate to adjust the drain current to the target current. Among them, the static operating current value of the power amplifier at room temperature can be used as the target current.

[0060] Another aspect of the present invention further provides a power amplifier power-on timing control method, which is implemented based on the power amplifier power-on timing control circuit described in any of the above embodiments, see Figure 8 As shown, Figure 8 : is a schematic flow chart of a power amplifier power-on timing control method provided by an embodiment of the present invention, which may include:

[0061] Step S81: supplying power to the clamp protection circuit;

[0062] Step S82: the clamping protection circuit generates a negative voltage and a first enabling signal, and converts the negative voltage into a clamping voltage and transmits it to the gate of the power amplifier;

[0063] Step S83: the gate voltage regulating circuit outputs a regulating voltage and a second enabling signal based on the first enabling signal, and inputs the regulating voltage into the clamping protection circuit;

[0064] Step S84: the clamping protection circuit adjusts the clamping voltage to the target voltage based on the regulation voltage and the negative voltage;

[0065] Step S85: the drain regulating circuit provides a drain voltage to the drain of the power amplifier based on the second enable signal.

[0066] In some embodiments, step S81 may specifically be supplying power to the clamping protection circuit from the system power supply.

[0067] In some embodiments, Figure 2 As shown, step S82 can be specifically that the negative voltage generator in the clamping protection circuit 1 generates a negative voltage and inputs the negative voltage into the adding operational amplifier and synchronously generates a first enable signal EN1, and the adding operational amplifier converts the negative voltage into a clamping voltage and transmits it to the gate of the power amplifier.

[0068] In some embodiments, Figure 2 As shown, step S83 can be specifically that the first switching power supply in the gate voltage regulation circuit 2 converts the system power supply to the voltage required by the microcontroller based on the first enable signal EN1 and supplies power to the microcontroller based on the voltage; the microcontroller outputs the regulated voltage and the second enable signal EN2 after power-on, and inputs the regulated voltage into the adding operational amplifier of the clamp protection circuit 1.

[0069] In some embodiments, Figure 2 As shown, step S84 may be specifically that the adding operational amplifier in the clamping protection circuit 1 adjusts the clamping voltage to the target voltage based on the adjustment voltage Vset and the negative voltage and inputs the target voltage to the gate of the power amplifier.

[0070] In some embodiments, Figure 2 As shown, step S85 may be specifically that the second switch power supply of the drain regulating circuit 3 converts the system voltage based on the second enable signal EN2 and inputs it to the sampling resistor, and provides a positive voltage to the drain of the power amplifier through the sampling resistor.

[0071] The above is a power amplifier power-on timing control method provided by an embodiment of the present invention. The method is implemented based on a power amplifier power-on timing control circuit. First, a clamping voltage is provided by a clamping protection circuit and transmitted to the gate of the power amplifier to completely cut off the drain current of the power amplifier. Then, the gate voltage adjustment circuit raises the gate voltage of the power amplifier to a safe bias range based on a first enable signal. Finally, the drain adjustment circuit provides a voltage to the drain of the power amplifier based on a second enable signal to achieve clamping protection of the power amplifier gate voltage, avoid power-on timing problems and the risk of using the power amplifier drain voltage when the microcontroller is working abnormally, and effectively ensure the safety of the power amplifier.

[0072] In some other embodiments, the gate voltage may be temperature compensated, and the method may further include:

[0073] The gate voltage temperature compensation circuit 4 is used to obtain the temperature information and drain current of the power amplifier, and the temperature information and drain current are transmitted to the gate voltage regulation circuit 2;

[0074] The gate voltage regulating circuit 2 compensates the regulating voltage Vset based on the temperature information to adjust the drain current to the target current.

[0075] In some embodiments, Figure 6 As shown, the thermistor in the gate voltage temperature compensation circuit 4 can be used to obtain the analog voltage Vt corresponding to the current operating temperature of the power amplifier and transmit the analog voltage Vt to the microcontroller of the gate voltage regulation circuit 2; and the current monitor in the gate voltage temperature compensation circuit 4 can be used to obtain the drain current of the power amplifier and transmit the drain current to the microcontroller of the gate voltage regulation circuit 2.

[0076] In some embodiments, the microcontroller in the gate voltage regulation circuit 2 can compensate the regulation voltage Vset based on the analog voltage Vt. Specifically, the current operating temperature of the power amplifier is determined according to the analog voltage Vt, and the compensation value corresponding to the current operating temperature is determined according to the preset temperature-compensation value correspondence relationship. The regulation voltage is compensated based on the compensation value to obtain the compensated regulation voltage. The microcontroller transmits the compensated regulation voltage to the addition operational amplifier, and the sum of the negative voltage and the compensated regulation voltage is used as the voltage input of the power amplifier gate to adjust the drain current to the target current. Among them, the static operating current value of the power amplifier at room temperature can be used as the target current.

[0077] By using a thermistor, a current monitor, and a microcontroller to dynamically adjust the gate voltage based on the power amplifier temperature and drain current, the drain current at different temperatures can be compensated and the power amplifier can be ensured to work under normal bias conditions.

[0078] In some embodiments, the power amplifier power-on timing control circuit and method provided by the embodiments of the present invention can be applied to HBT (Heterojunction Bipolar Transistor) or LDMOS (Laterally Diffused Metal Oxide Semiconductor).

[0079] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A power amplifier power-on timing control circuit, characterized in that: include: A clamping protection circuit connected to the gate of the power amplifier, the clamping protection circuit is used to generate a negative voltage and a first enable signal, and convert the negative voltage into a clamping voltage; a gate voltage regulating circuit, the gate voltage regulating circuit being used to output a regulating voltage and a second enabling signal based on the first enabling signal, and input the regulating voltage to the clamping protection circuit to adjust the clamping voltage to a target voltage; A drain regulating circuit connected to the drain of the power amplifier, wherein the drain regulating circuit is used to provide a drain voltage to the drain of the power amplifier based on the second enable signal.

2. The circuit according to claim 1, characterized in that The clamping protection circuit includes: a negative voltage generator and an adding operational amplifier connected to the output end of the negative voltage generator, the negative voltage generator is used to generate the negative voltage, and the adding operational amplifier is used to convert the negative voltage into the clamping voltage.

3. The circuit according to claim 1, characterized in that The gate voltage regulation circuit includes: a first switching power supply and a microcontroller connected to the output end of the first switching power supply, the first switching power supply is used to supply power to the microcontroller based on the first enable signal, and the microcontroller outputs the regulation voltage and the second enable signal after power-on.

4. The circuit according to claim 1, characterized in that The drain regulating circuit includes a second switching power supply and a sampling resistor connected to an output end of the second switching power supply, and the second switching power supply is used to provide a drain voltage to the drain of the power amplifier through the sampling resistor based on the second enable signal.

5. The circuit according to any one of claims 1 to 4, characterized in that Also includes: A gate voltage temperature compensation circuit, the gate voltage temperature compensation circuit is used to obtain temperature information and drain current of the power amplifier, and input the temperature information and the drain current into the gate voltage regulation circuit; The gate voltage regulating circuit is used to compensate the regulating voltage based on the temperature information so as to adjust the drain current to a target current.

6. The circuit according to claim 5, characterized in that The gate voltage temperature compensation circuit includes a thermistor and a current monitor, the thermistor is used to obtain an analog voltage corresponding to the current operating temperature of the power amplifier, characterize the temperature information with the analog voltage, and input the analog voltage into the gate voltage regulation circuit; The current monitor is used to obtain the drain current of the power amplifier and input the drain current into the gate voltage regulation circuit.

7. The circuit according to claim 6, characterized in that The gate voltage regulating circuit also includes an analog-to-digital converter and a digital-to-analog converter. The analog-to-digital converter is used to convert the analog voltage into a digital signal, and the digital-to-analog converter is used to convert the digital signal generated by the gate voltage regulating circuit into an analog signal.

8. The circuit according to claim 6, characterized in that The current monitor and the gate voltage regulating circuit are connected via an I2C bus.

9. A power amplifier power-on timing control method, characterized in that: The method is implemented based on the power amplifier power-on timing control circuit according to any one of claims 1 to 8, comprising: Provide power to the clamp protection circuit; The clamp protection circuit generates a negative voltage and a first enable signal, and converts the negative voltage into a clamp voltage and transmits it to the gate of the power amplifier; The gate voltage regulating circuit outputs a regulating voltage and a second enabling signal based on the first enabling signal, and inputs the regulating voltage into the clamping protection circuit; The clamp protection circuit adjusts the clamp voltage to a target voltage based on the regulation voltage and the negative voltage; The drain regulating circuit provides a drain voltage to the drain of the power amplifier based on the second enable signal.

10. The method according to claim 9, characterized in that The method further comprises: Acquiring temperature information and drain current of the power amplifier by using a gate voltage temperature compensation circuit, and transmitting the temperature information and drain current to the gate voltage regulation circuit; The gate voltage regulation circuit compensates the regulation voltage based on the temperature information to adjust the drain current to a target current.