Heterojunction solar cell and manufacturing method and device thereof

Abstract

The invention discloses a heterojunction solar cell and a manufacturing method and equipment thereof. The cell is provided with at least one front passivation layer and at least one front doping layer which are positioned on one side of the front of the silicon substrate; the at least one back passivation layer and the at least one back doping layer are located on one side of the back of the silicon substrate; according to the manufacturing method, in the same deposition chain, at least one front passivation layer and at least one back passivation layer are deposited on the front face and the back face of a silicon substrate, so that at least one side edge passivation layer is formed on the side edge of the heterojunction solar cell and the edge area of the silicon substrate. According to the invention, pollution of the carrier plate bearing the silicon substrate can be avoided, the wafer turning frequency is reduced, and manufacturing equipment is simplified.

Description

Technical Field

[0001] The invention relates to a heterojunction solar cell and a manufacturing method and equipment thereof. Background Art

[0002] Heterojunction solar cells combine the advantages of single-crystal silicon solar cells and amorphous silicon solar cells, and have the advantages of simple process flow, high efficiency, low temperature coefficient, high conversion efficiency, etc., becoming a hot spot in the research and development of the photovoltaic industry. The process flow of heterojunction solar cells includes four main steps: cleaning and texturing, PECVD film deposition, PVD film deposition, and electrode metallization. Among them, the PECVD film deposition step is particularly critical and is the core process for forming heterojunction ninip or nipin structures.

[0003] During the PECVD thin film deposition process, four film layers need to be deposited, namely the front passivation layer (intrinsic layer), the back passivation layer (intrinsic layer), the front doping layer, and the back doping layer. If four deposition chains are used for thin film deposition, the cost is the highest. If a combination of equipment for the co-deposition chain of the passivation layer and the doping layer on one side is used, only two or three deposition chains are needed, which will greatly reduce the equipment cost. However, if the passivation layer and the doping layer are deposited on the same side of the deposition chain, the recycled use of the carrier for the silicon wafer will cause contamination of the process chamber, affect the preparation of the passivation layer film, and further affect the passivation effect.

[0004] In addition, in both schemes, the front intrinsic layer and the back intrinsic layer are not deposited in the same deposition chain, the substrate and the first deposited intrinsic layer are repeatedly heated, and a natural oxide layer is formed on the surface when exposed to the atmosphere, which further affects the performance of the solar cell. Summary of the invention

[0005] The object of the present invention is to provide a heterojunction solar cell and a method and device for manufacturing the same.

[0006] To achieve the purpose of the present invention, the present invention provides a method for manufacturing a heterojunction solar cell, wherein the heterojunction solar cell comprises: a silicon substrate doped with a first conductive type, at least one front passivation layer, at least one front doped layer, at least one transparent front conductive layer and at least one front electrode located on the front side of the silicon substrate; at least one back passivation layer, at least one back doped layer, at least one transparent back conductive layer and at least one back electrode located on the back side of the silicon substrate; in the front doped layer and the back doped layer, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type; the method comprises the following steps: providing a silicon substrate doped with the first conductive type; in the same deposition chain, forming at least one front passivation layer composed of an intrinsic amorphous silicon-based material and at least one back passivation layer composed of an intrinsic amorphous silicon-based material on the front and back sides of the silicon substrate respectively; and forming at least one front doped layer and at least one back doped layer on the at least one front passivation layer and at least one back passivation layer respectively.

[0007] As a preferred embodiment, the method forms at least one side edge passivation layer on the side edge of the heterojunction solar cell and on the edge region of the silicon substrate.

[0008] As a preferred embodiment, in the method, the front passivation layer and the back passivation layer are deposited simultaneously to form the side edge passivation layer; or, the front passivation layer is deposited first and then the back passivation layer is deposited to form the side edge passivation layer; or, the back passivation layer is deposited first and then the front passivation layer is deposited to form the side edge passivation layer.

[0009] As a preferred implementation manner, the front doping layer and / or the back doping layer is made of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.

[0010] As a preferred embodiment, the silicon substrate adopts an N-type textured silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type, or the silicon substrate adopts a P-type textured silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.

[0011] As a preferred embodiment, the method also includes: forming at least one transparent back conductive layer on at least one back doped layer; forming at least one transparent front conductive layer on at least one front doped layer; forming a back electrode on at least one transparent back conductive layer; and forming a front electrode on at least one transparent front conductive layer.

[0012] The present invention also proposes a heterojunction solar cell, which comprises: a silicon substrate with a first conductive type doping; at least one front passivation layer formed on the front surface of the silicon substrate and composed of an intrinsic amorphous silicon-based material; at least one front doped layer formed on the at least one front passivation layer; at least one back passivation layer formed on the back surface of the silicon substrate and composed of an intrinsic amorphous silicon-based material; at least one back doped layer formed on the at least one back passivation layer; one of the front doped layers and the back doped layer has a doping type of the first conductive type and the other has a doping type of the second conductive type opposite to the first conductive type; at least one transparent front conductive layer formed on at least one front doped layer; at least one transparent back conductive layer formed on at least one back doped layer; a front electrode formed on at least one transparent front conductive layer; a back electrode formed on at least one transparent back conductive layer; and at least one side edge passivation layer formed on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate.

[0013] As a preferred embodiment, at least one front passivation layer and at least one back passivation layer are deposited on the front and back sides of the silicon substrate in the same deposition chain to form at least one side edge passivation layer on the side edge of the heterojunction solar cell.

[0014] As a preferred embodiment, the front passivation layer and the back passivation layer are deposited simultaneously to form the side edge passivation layer; or, the front passivation layer is deposited first and then the back passivation layer is deposited to form the side edge passivation layer; or, the back passivation layer is deposited first and then the front passivation layer is deposited to form the side edge passivation layer.

[0015] The present invention also proposes an apparatus for manufacturing heterojunction solar cells, the apparatus being used to deposit at least one front passivation layer and at least one back passivation layer on the front and back sides of a silicon substrate, respectively; to deposit at least one front doped layer on the at least one front passivation layer, and to deposit at least one back doped layer on the at least one back passivation layer; the apparatus having no more than three layer deposition chains, the apparatus comprising: a first deposition chain being used to deposit at least one front passivation layer and at least one back passivation layer on the front side of the silicon substrate; a second layer deposition chain being used to deposit at least one front doped layer on the front passivation layer; a third layer deposition chain being used to deposit at least one back doped layer on the back passivation layer; and a silicon substrate transmission and flipping mechanism comprised between the second layer deposition chain and the third layer deposition chain.

[0016] As a preferred embodiment, in the device, the first deposition chain includes at least one process chamber for simultaneously depositing at least one front passivation layer and at least one back passivation layer on the front and back sides of the silicon substrate.

[0017] As a preferred embodiment, in the device, the first deposition chain includes at least one first process chamber for depositing a front passivation layer and at least one second process chamber for depositing a back passivation layer, which are connected to each other.

[0018] As a preferred implementation, in the carrier transport direction, the first process chamber is located upstream of the second process chamber; or, in the carrier transport direction, the second process chamber is located upstream of the first process chamber.

[0019] Compared with the prior art, the present invention has the following significant advantages:

[0020] (1) In the present invention, when manufacturing a cell, at least one front passivation layer and at least one back passivation layer are deposited on the front and back sides of the silicon substrate in the same deposition chain. Depositing the front passivation layer and the back passivation layer in the same deposition chain can avoid the formation of a natural oxide layer on the surface of the supporting silicon substrate and the first deposited intrinsic layer, thereby avoiding affecting the performance of the solar cell.

[0021] (2) In the device described in the present invention, the front intrinsic layer and the back intrinsic layer are deposited in the same deposition chain, which can reduce the number of times of flipping the wafer and simplify the equipment. Compared with the prior art in which the intrinsic layer and the doping layer are deposited in the same layer deposition chain and the carrier for carrying the silicon wafer is recycled, this method avoids the situation in which the doping components attached to the carrier affect the film quality of the passivation layer during the recycling of the carrier, thereby affecting the passivation effect.

[0022] Other features and advantages of the present invention will be described in the following description, and part of them will become obvious from the description, or will be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 Schematic diagram of the solar cell structure shown in an embodiment of the present invention.

[0024] Figure 2 It is a schematic diagram of the structure of a solar cell shown in another embodiment of the present invention.

[0025] Figure 3 It is a schematic diagram of the structure of a solar cell shown in another embodiment of the present invention.

[0026] Figure 4 It is a schematic diagram of an implementation of a process chamber in a first deposition chain in a solar cell manufacturing device shown in an embodiment of the present invention.

[0027] Figure 5It is a schematic diagram of another implementation of a process chamber in the first deposition chain in the solar cell manufacturing equipment shown in an embodiment of the present invention.

[0028] Figure 6 It is a schematic diagram of another implementation manner of the process chamber in the first deposition chain in the solar cell manufacturing equipment shown in an embodiment of the present invention.

[0029] Figure 7 It is a schematic diagram of an implementation of a process chamber in the second deposition chain or the third deposition chain in the solar cell manufacturing equipment shown in an embodiment of the present invention;

[0030] Description of reference numerals:

[0031] 10-silicon substrate; 11-front passivation layer; 12-front doping layer; 21-back passivation layer; 22-back doping layer; 30-carrier; 31-side edge passivation layer; 41-process chamber; 411, 511-upper plate electrodes; 412, 512-lower plate electrodes; 413-gas source; 414-RF power supply system; 416-roller; 417-pump; 51-first process chamber; 52-second process chamber. DETAILED DESCRIPTION

[0032] It is easy to understand that according to the technical solution of the present invention, without changing the essential spirit of the present invention, a person skilled in the art can imagine various embodiments of the present invention. Therefore, the following specific embodiments and drawings are only exemplary descriptions of the technical solution of the present invention, and should not be regarded as the whole of the present invention or as a limitation or limitation of the technical solution of the present invention. On the contrary, the purpose of providing these embodiments is to enable those skilled in the art to understand the present invention more thoroughly. The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of this application and are used together with the embodiments of the present invention to illustrate the innovative concept of the present invention.

[0033] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless otherwise specifically stated.

[0034] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0035] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0036] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0037] The present invention provides a method for manufacturing a heterojunction solar cell, wherein the structure of the heterojunction solar cell is as follows: Figure 1 As shown. The heterojunction solar cell comprises: a silicon substrate 10 doped with a first conductive type, at least one front passivation layer 11, at least one front doping layer 12, at least one transparent front conductive layer and at least one front electrode (not shown in the figure) located on the front side of the silicon substrate 10; at least one back passivation layer 21, at least one back doping layer 22, at least one transparent back conductive layer and at least one back electrode (not shown in the figure) located on the back side of the silicon substrate 10; in the front doping layer 12 and the back doping layer 22, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type. In addition, at the side edge of the heterojunction solar cell, at the edge region of the silicon substrate 10, at least one side edge passivation layer 31 is formed. Thus, the side edge passivation layer 31 located at the side edge and the front passivation layer 11 and the back passivation layer 21 wrap the silicon substrate 10, forming a good passivation protection effect on the side wall of the battery.

[0038] It should be noted that the above-mentioned front and back conductive layers and front and back electrodes belong to the conventional structure of heterojunction solar cells and will not be further explained here.

[0039] As a preferred embodiment, the front doping layer 12 and / or the back doping layer 22 are made of microcrystalline silicon-based materials or nanocrystalline silicon-based materials. Compared with traditional amorphous silicon-based materials, microcrystalline silicon-based materials or nanocrystalline silicon-based materials have good light transmittance and excellent doping efficiency, which can improve the performance of heterojunction solar cells.

[0040] When manufacturing the heterojunction solar cell described in the above embodiments, the following manufacturing steps are included: providing a silicon substrate 10 with a first conductive type doping; forming at least one front passivation layer 11 composed of an intrinsic amorphous silicon-based material and at least one back passivation layer 21 composed of an intrinsic amorphous silicon-based material on the front and back sides of the silicon substrate 10; and forming at least one front doping layer 12 and at least one back doping layer 22 on the at least one front passivation layer 11 and at least one back passivation layer 21. Based on the structure on the edge region of the silicon substrate 10 of the above heterojunction solar cell, when manufacturing the cell, the present invention can deposit at least one front passivation layer 11 and at least one back passivation layer 21 on the front and back sides of the silicon substrate 10 in the same deposition chain. The front passivation layer 11 and the back passivation layer 21 are deposited in the same deposition chain to avoid the formation of a natural oxide layer between the front and back passivation layers, thereby forming a side edge passivation layer 31 with better passivation effect on the edge area of ​​the silicon substrate 10, thereby achieving a better passivation protection effect; at the same time, compared with the prior art of depositing the passivation layer and the doping layer in the same deposition chain and recycling the carrier for carrying the silicon wafer, it is avoided that during the recycling process of the carrier, the doping components attached to the carrier affect the film quality of the passivation layer, thereby affecting the passivation effect, thereby avoiding affecting the performance of the solar cell.

[0041] When the front passivation layer 11 and the back passivation layer 21 are deposited in the same deposition chain, the deposition order of the front passivation layer 11 and the back passivation layer 21 is not limited. The front passivation layer 11 and the back passivation layer 21 can be deposited in the same deposition chain in the following different ways.

[0042] For example, Figure 1 As shown, the front passivation layer 11 and the back passivation layer 21 are deposited simultaneously to form the side edge passivation layer 31 on the edge region of the silicon substrate 10. This can avoid the formation of a natural oxide layer between the front and back passivation layers due to the formation of the front passivation layer and the back passivation layer in different deposition chains in the prior art, and can also improve the deposition efficiency.

[0043] For example, Figure 2 As shown, the back passivation layer 21 is deposited first, and then the front passivation layer 11 is deposited to form the side edge passivation layer 31 on the edge area of ​​the silicon substrate 10. At this time, the side edge passivation layer 31 is formed by stacking the back passivation layer 21 and the front passivation layer 11. In addition, it is also possible to Figure 3As shown, the front passivation layer 11 is deposited first, and then the back passivation layer 21 is deposited, so as to form the side edge passivation layer 31 on the edge region of the silicon substrate 10. At this time, the side edge passivation layer 31 is formed by stacking the front passivation layer 11 and the back passivation layer 21. Compared with depositing the front passivation layer 11 and the back passivation layer 21 at the same time, depositing the front passivation layer 11 first, or depositing the back passivation layer 21 first, can simplify the deposition equipment and reduce the complexity of the process on the basis of avoiding the formation of a natural oxide layer between the front and back passivation layers.

[0044] Of course, no matter whether the front passivation layer 11 and the back passivation layer 21 are deposited simultaneously, or the front passivation layer 11 is deposited first, or the back passivation layer 21 is deposited first, in the present invention, the front passivation layer 11 and the back passivation layer 21 are deposited in the same deposition chain to avoid the formation of a natural oxide layer between the front and back passivation layers on the side walls of the silicon substrate 10, and further improve the effect of the side edge passivation layer 31 on the passivation protection of the battery side walls.

[0045] In the present invention, the silicon substrate 10 has a first conductive type of doping; in the front doping layer 12 and the back doping layer 22, one of the doping types is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type. For example, the silicon substrate 10 adopts an N-type textured silicon wafer, the first conductive type is N-type, and the second conductive type is P-type. Alternatively, the silicon substrate 10 adopts a P-type textured silicon wafer, the first conductive type is P-type, and the second conductive type is N-type. That is, the heterojunction solar cell of the invention can be both a front emitter solar cell and a back emitter solar cell.

[0046] For the different heterojunction solar cell manufacturing methods shown in the above embodiments, preferably, the conductive layers and electrodes on the front and back sides of the silicon substrate 10 are formed according to the following steps, specifically: forming at least one transparent back conductive layer on at least one back doped layer 22; forming at least one transparent front conductive layer on at least one front doped layer 12; forming a back electrode on at least one transparent back conductive layer; forming a front electrode on at least one transparent front conductive layer. In the process of manufacturing solar cells, the carrier will absorb water vapor in the air, and water vapor will also provide oxygen in each deposition step. However, the incident light front side of the solar cell is sensitive to oxygen and has high oxygen control requirements. Therefore, the present invention first deposits the conductive layer on the back side of the silicon substrate 10, and then deposits the conductive layer on the front side. This is conducive to further control of water vapor during the deposition process on the front side of the solar cell.

[0047] Based on the various embodiments of the above-mentioned method for manufacturing a heterojunction solar cell of the present invention, a heterojunction solar cell with the following structure can be prepared.

[0048] The solar cell comprises: a silicon substrate 10 doped with a first conductive type; at least one front passivation layer 11 formed on the front surface of the silicon substrate 10 and composed of an intrinsic amorphous silicon-based material; at least one front doped layer 12 formed on the at least one front passivation layer 11; at least one back passivation layer 21 formed on the back surface of the silicon substrate 10 and composed of an intrinsic amorphous silicon-based material; at least one back doped layer 22 formed on the at least one back passivation layer 21; one of the front doped layers 12 and the back doped layer 22 has a doping type of the first conductive type and the other has a doping type of the second conductive type opposite to the first conductive type; at least one transparent front conductive layer formed on at least one front doped layer 12; at least one transparent back conductive layer formed on at least one back doped layer 22; a front electrode formed on at least one transparent front conductive layer; and a back electrode formed on at least one transparent back conductive layer. In addition, on the side edge of the heterojunction solar cell, on the edge area of ​​the silicon substrate 10, at least one side edge passivation layer 31, the side edge passivation layer 31 located at the side edge and the front passivation layer 11 and the back passivation layer 21 wrap the silicon substrate 10, forming a good passivation protection effect on the side wall of the cell.

[0049] It should be noted that the above-mentioned front and back conductive layers and front and back electrodes belong to the conventional structure of heterojunction solar cells and will not be further explained here.

[0050] The present invention also proposes a device for manufacturing heterojunction solar cells suitable for the above-mentioned manufacturing method and battery structure. The device is used to deposit at least one front passivation layer 11 and at least one back passivation layer 21 on the front and back of a silicon substrate 10, respectively; deposit at least one front doping layer 12 on the at least one front passivation layer 21, and deposit at least one back doping layer 22 on the at least one back passivation layer 21. The device has no more than three layer deposition chains, wherein the first deposition chain is used to deposit at least one front passivation layer 11 and at least one back passivation layer 21 on the front of the silicon substrate 10; the second deposition chain is used to deposit at least one front doping layer 12 on the front passivation layer 11; the third deposition chain is used to deposit at least one back doping layer 23 on the back passivation layer 21; and a silicon substrate transmission and flipping mechanism is included between the second deposition chain and the third deposition chain. When using this equipment, the front intrinsic layer and the back intrinsic layer are deposited in the same deposition chain, which avoids the formation of a natural oxide layer on the silicon wafer exposed to the atmosphere due to the deposition of the front passivation layer and the back passivation layer in different deposition chains, affecting the passivation effect. At the same time, it can reduce the number of wafer flipping times and simplify the equipment.

[0051] In addition, since the front and back passivation layers are formed in the same deposition chain, only the front doping layer and the back doping layer need to be deposited in the second deposition chain and the third deposition chain. Compared with the prior art in which the front passivation layer and the front doping layer are formed in one deposition chain, or the back passivation layer and the back doping layer are formed in one deposition chain, in the present invention, during the recycling process of the carrier, the carrier carrying the silicon wafer substrate 10 is only used in the first deposition chain, and there is no problem that the doping components attached to the carrier affect the film quality of the passivation layer, thereby affecting the passivation effect and thus affecting the performance of the solar cell.

[0052] As a priority, Figure 4 As shown, the first deposition chain includes at least one process chamber 41 for simultaneously depositing at least one front passivation layer 11 and at least one back passivation layer 21 on the front and back sides of the silicon substrate 10. The process chamber 41 includes an upper plate electrode 411 located above the carrier 30 and a lower plate electrode 412 located below the carrier 30, as well as a gas source 413, a radio frequency power system 414, a roller 416, and a pump 417. That is, in the first deposition chain, the front passivation layer 11 and the back passivation layer 21 are deposited simultaneously in the same process chamber.

[0053] As another optional method, the first deposition chain includes at least one first process chamber 51 for depositing the front passivation layer 11 and at least one second process chamber 52 for depositing the back passivation layer 21. The first process chamber 51 includes an upper plate electrode 511 located above the carrier 30, and the second process chamber 52 includes a lower plate electrode 512 located below the carrier 30. At this time, the upstream and downstream positions of the first process chamber 51 and the second process chamber 52 can also be set differently according to different situations. For example, Figure 5 As shown, in the transmission direction of the carrier 30, the first process chamber 51 is located upstream of the second process chamber 52. At this time, the first process chamber 51 and the second process chamber 52 both include a gas source 413, a radio frequency power system 414, a roller 416, and a pump 417. The difference is that the first process chamber 51 includes an upper flat electrode 511 located above the carrier 30, and the second process chamber 52 includes a lower flat electrode 512 located below the carrier 30. In this way, in the same deposition chain, the front passivation layer is first deposited in the first process chamber 51, and then the back passivation layer 21 is deposited in the second process chamber 52. In addition, as Figure 6As shown, in the transmission direction of the carrier 30, the first process chamber 51 is located downstream of the second process chamber 52. At this time, the first process chamber 51 and the second process chamber 52 both include a gas source 413, a radio frequency power system 414, a roller 416, and a pump 417. The difference is that the second process chamber 52 includes a lower plate electrode 512 located below the carrier 30, and the first process chamber 51 includes an upper plate electrode 511 located above the carrier 30. In this way, in the same deposition chain, the back passivation layer 21 is first deposited in the second process chamber 52, and then the front passivation layer is deposited in the first process chamber 51.

[0054] As another preferred method, the second layer deposition chain is used to deposit at least one front doping layer 12 on the front passivation layer 11; the third layer deposition chain is used to deposit at least one back doping layer 22 on the back passivation layer 21, and a silicon substrate transmission and flipping mechanism is set between the second layer deposition chain and the third layer deposition chain. Figure 7 As shown, in the transport direction of the carrier 30 , at least one front doping layer 12 is formed on the front passivation layer 11 , or at least one back doping layer 22 is formed on the back passivation layer 21 .

[0055] In addition, it should be noted that the number of the first process chamber and the second process chamber in the first layer deposition chain, as well as the number of doping process chambers in the second layer deposition chain and the third layer deposition chain can be set according to the production rhythm, for example, one, two, or greater than or equal to three, and the number is not further limited.

[0056] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

[0057] It should be understood that in order to simplify the present invention and help those skilled in the art understand the various aspects of the present invention, in the above description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes described in a single embodiment or described with reference to a single figure. However, the present invention should not be interpreted as the features included in the exemplary embodiments are all necessary technical features of the patent claims.

Claims

1. A method for manufacturing a heterojunction solar cell, The heterojunction solar cell comprises: A silicon substrate (10) having a first conductivity type doping, At least one front passivation layer (11), at least one front doping layer (12), at least one transparent front conductive layer and at least one front electrode located on the front side of the silicon substrate (10); At least one back passivation layer (21), at least one back doping layer (22), at least one transparent back conductive layer and at least one back electrode are located on the back side of the silicon substrate (10); In the front doped layer (12) and the back doped layer (22), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type; The method is characterized in that the method comprises the following steps: Providing a silicon substrate (10) doped with a first conductivity type; In the same deposition chain, at least one front passivation layer (11) made of an intrinsic amorphous silicon-based material and at least one back passivation layer (21) made of an intrinsic amorphous silicon-based material are formed on the front and back sides of the silicon substrate (10), respectively; At least one front doping layer (12) and at least one back doping layer (22) are formed on the at least one front passivation layer (11) and the at least one back passivation layer (21), respectively.

2. The method according to claim 1, characterized in that The method enables at least one side edge passivation layer (31) to be formed on the side edge of the heterojunction solar cell.

3. The method according to claim 2, characterized in that The front passivation layer (11) and the back passivation layer (21) are deposited simultaneously to form the side edge passivation layer (31); or, Firstly depositing the front passivation layer (11) and then depositing the back passivation layer (21) to form the side edge passivation layer (31); or, The back passivation layer (21) is deposited first, and then the front passivation layer (11) is deposited to form the side edge passivation layer (31).

4. The method according to claim 1, characterized in that The front doping layer (12) and / or the back doping layer (22) are made of microcrystalline silicon-based materials or nanocrystalline silicon-based materials.

5. The method according to claim 1, characterized in that The silicon substrate (10) is an N-type textured silicon wafer, the first conductivity type is N-type, the second conductivity type is P-type, or, The silicon substrate (10) is a P-type textured silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.

6. The method according to claim 1, characterized in that The method further comprises: forming at least one transparent back conductive layer on at least one back doping layer (22); forming at least one transparent front conductive layer on at least one front doped layer (12); forming a back electrode on at least one transparent back conductive layer; A front electrode is formed on at least one transparent front conductive layer.

7. A heterojunction solar cell, comprising: A silicon substrate (10) doped with a first conductivity type; At least one front passivation layer (11) formed on the front side of the silicon substrate (10) and composed of an intrinsic amorphous silicon-based material; At least one front doping layer (12) formed on the at least one front passivation layer (11); At least one back passivation layer (21) formed on the back side of the silicon substrate (10) and composed of an intrinsic amorphous silicon-based material; At least one back doping layer (22) formed on the at least one back passivation layer (21); In the front doped layer (12) and the back doped layer (22), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type; at least one transparent front conductive layer formed on at least one front doped layer (12); at least one transparent back conductive layer formed on at least one back doped layer (22); a front electrode formed on at least one transparent front conductive layer; a back electrode formed on at least one transparent back conductive layer; Wherein, at least one side edge passivation layer (31) is formed on the side edge of the heterojunction solar cell.

8. The solar cell according to claim 7, characterized in that: In the same deposition chain, at least one front passivation layer (11) and at least one back passivation layer (21) are deposited on the front and back sides of the silicon substrate (10) to form at least one side edge passivation layer (31) on the side edge of the heterojunction solar cell.

9. The solar cell according to claim 8, characterized in that: Depositing the front passivation layer (11) and the back passivation layer (21) simultaneously to form the side edge passivation layer (31); or, Firstly depositing the front passivation layer (11) and then depositing the back passivation layer (21) to form the side edge passivation layer (31); or, The back passivation layer (21) is deposited first, and then the front passivation layer (11) is deposited to form the side edge passivation layer (31).

10. The solar cell according to claim 7, characterized in that: The front doping layer (12) and / or the back doping layer (22) are made of microcrystalline silicon-based materials or nanocrystalline silicon-based materials.

11. The solar cell according to claim 7, characterized in that: The silicon substrate (10) is an N-type textured silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type; or, The silicon substrate (10) is a P-type textured silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.

12. A device for manufacturing a heterojunction solar cell, the device being used for depositing at least one front passivation layer (11) and at least one back passivation layer (21) on the front and back sides of a silicon substrate (10), respectively; depositing at least one front doping layer (12) on the at least one front passivation layer (21), and depositing at least one back doping layer (22) on the at least one back passivation layer (21); It is characterized in that The apparatus has no more than three layer deposition chains, the apparatus comprising: The first deposition chain is used for depositing at least one front passivation layer (11) and at least one back passivation layer (21) on the front side of the silicon substrate (10); The second layer deposition chain is used to deposit at least one front doping layer (12) on the front passivation layer (11); The third layer deposition chain is used for depositing at least one back doping layer (22) on the back passivation layer (21); And a silicon substrate transmission and flipping mechanism is included between the second layer deposition chain and the third layer deposition chain.

13. The device according to claim 12, characterized in that The first deposition chain comprises at least one process chamber (41) for simultaneously depositing at least one front passivation layer (11) and at least one back passivation layer (21) on the front and back sides of the silicon substrate (10).

14. The device according to claim 12, characterized in that The first deposition chain comprises at least one first process chamber (51) for depositing a front passivation layer (11) and at least one second process chamber (52) for depositing a back passivation layer (21) which are arranged in a connected manner.

15. The device according to claim 14, characterized in that In the carrier transport direction, the first process chamber (51) is located upstream of the second process chamber (52); or, In the carrier transport direction, the second process chamber (52) is located upstream of the first process chamber (51).

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