Wafer laser implicit cutting positioning method

By adopting the wafer laser stalking positioning method in the laser stalking technology, and using the cooperation of 3D cameras and coaxial cameras for precise rotation positioning, the problems of focus instability and high cost of detection equipment in traditional laser stalking technology are solved, and high-precision and low-cost wafer cutting are achieved.

CN119549902AActive Publication Date: 2025-03-04合肥欣奕华智能机器股份有限公司

Patent Information

Application Number
CN202411885890.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-19
Publication Date
2025-03-04
Estimated Expiration
2044-12-19

AI Technical Summary

Technical Problem

During the processing process, traditional laser hidden cutting technology is caused by factors such as flatness drop of the stage platform and wafer warping, which leads to unstable focus of the laser beam, affecting the cutting depth and quality. The high-precision detection equipment is costly and complex.

Method used

A wafer laser tangent positioning method is adopted to generate a 3D morphology map of the wafer surface by presetting the wafer standard template and 3D camera scanning, obtaining the flat edge and center point coordinates of the wafer, performing rough rotation and precise rotation positioning, ensuring the precise alignment of the cutting path and the electrode.

Benefits of technology

It improves the accuracy of wafer cutting, reduces material waste caused by positioning errors, reduces the manufacturing cost of laser cutting equipment, and is suitable for different types of wafer and electrode structures.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The invention discloses a wafer laser implicit cutting positioning method, and relates to the technical field of wafer processing methods. The method specifically comprises the following steps: presetting a wafer standard template; generating a complete 3D morphology graph of the surface of the wafer; obtaining the coordinates of the flat edge and the center point of the wafer, determining the actual position of the wafer, and determining a first rotation angle at which the wafer needs to rotate; the glass carrying table is rotated, and coarse rotation positioning is completed; obtaining a first electrode contour image of an electrode below the wafer, obtaining a center point coordinate and a direction angle of the wafer according to the first electrode contour image, determining a current position of the wafer, determining a second rotation angle of the wafer according to the current position of the wafer and the position of the wafer standard template, and rotating the glass carrying table to obtain a second rotation angle of the wafer; and finishing the fine rotation positioning of the wafer. And determining the horizontal coordinate and the vertical coordinate of the cutting channel in the wafer, and fitting the horizontal coordinate and the vertical coordinate with the 3D morphology graph to obtain the accurate coordinate of the cutting channel in the wafer. The invention aims to reduce the manufacturing cost of laser cutting equipment while ensuring the cutting precision.
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Description

Technical Field

[0001] The present invention relates to the technical field of wafer processing methods, and in particular to a wafer laser hidden cutting positioning method. Background Art

[0002] In modern semiconductor device manufacturing, the precision of wafer cutting directly affects the performance and quality of the product. Traditional wafer cutting methods mainly use mechanical cutting, but with the continuous improvement of processing accuracy and material quality requirements, traditional cutting methods can no longer meet the needs of high precision and high efficiency.

[0003] Laser cutting technology has been gradually widely used in wafer cutting due to its advantages of non-contact, high precision, and strong controllability. Laser hidden cutting technology is an innovative laser cutting technology. Its main principle is to focus the laser beam to a certain depth below the surface of the wafer, form a modified layer at the required depth, and then peel off the wafer by applying a certain external force. Compared with traditional mechanical cutting methods, this technology has higher processing accuracy, less mechanical damage and less heat-affected zone, and is suitable for the processing of high-precision and high-reliability semiconductors and optoelectronic devices.

[0004] However, although laser hidden cutting technology has obvious advantages in improving processing accuracy, the flatness difference of the platform on which the wafer is placed may occur during the processing, which causes the laser beam to be unable to always remain within the ideal focal length range, affecting the depth and quality of laser cutting. At the same time, the wafer may be affected by factors such as thermal stress, material non-uniformity, and unstable process parameters during the process, causing the wafer to warp. The warping phenomenon not only affects the stability of laser focusing, but may also cause the laser beam to not always focus at the predetermined depth of the wafer, resulting in inconsistent processing depth, further affecting the cutting quality of the product.

[0005] In order to ensure the depth consistency of the modified layer during the laser stealth cutting process, the processing process needs to be continuously monitored and adjusted. In traditional laser stealth cutting systems, it is usually necessary to equip real-time focusing sensors, rangefinders, and multiple cameras and other detection equipment to accurately control the focus position, monitor the relative position of the laser beam and the wafer surface, and adjust the laser power and cutting speed in real time. These devices help maintain processing accuracy and reduce the impact of warping and deviation on cutting results by monitoring the surface state of the wafer and its relative position to the laser beam. However, while this high-precision detection method improves processing accuracy, it also brings higher cost investment and equipment complexity, which greatly increases the cost of laser cutting equipment.

[0006] Therefore, how to reduce the manufacturing cost of laser cutting equipment while ensuring cutting accuracy has become a technical problem that needs to be solved urgently. Summary of the invention

[0007] The main purpose of the present invention is to provide a wafer laser hidden cutting positioning method, aiming to reduce the manufacturing cost of laser cutting equipment while ensuring cutting accuracy.

[0008] In order to achieve the above object, the present invention proposes a wafer laser hidden cutting positioning method, comprising the following steps: A wafer standard template which is the same as the wafer to be cut and has cut lanes distributed thereon is preset; Use a 3D camera to scan and generate a complete 3D topography map of the wafer surface; Obtain the coordinates of the flat edge and the center point of the wafer according to the generated 3D topography image, determine the actual position of the wafer, and determine the first rotation angle that the wafer needs to rotate according to the actual position of the wafer and the position of the wafer standard template; Rotating the glass stage according to the first rotation angle to complete the rough rotation positioning of the wafer; There are multiple electrodes arranged in an array under the wafer. A first electrode contour image of the electrodes under the wafer is obtained. The center point coordinates and direction angle of the wafer are obtained based on the acquired first electrode contour image to determine the current position of the wafer. Based on the current position of the wafer and the position of the wafer standard template, the second rotation angle that the wafer needs to rotate is determined. The glass carrier is rotated according to the second rotation angle to complete the precise rotation positioning of the wafer.

[0009] In one embodiment of the present application, after completing the precise rotation positioning, the following steps are further included: Acquire the first center point coordinates of the wafer according to the first electrode outline image; The glass stage is translated laterally along the plane, and a second electrode contour image of the electrode under the wafer is obtained; and a second center point coordinate of the wafer is obtained according to the second electrode contour image; It is determined whether the plane vertical coordinates of the coordinates of the first center point and the second center point are the same. If they are the same, it indicates that the wafer has moved to the defined position of the wafer standard template.

[0010] In one embodiment of the present application, the flat edge and center point coordinates of the wafer are obtained based on the generated 3D topography image; and the center point coordinates and direction angle of the wafer are obtained based on the obtained electrode contour image; and the first center point coordinates of the wafer are obtained based on the obtained electrode contour image; and the second center point coordinates of the wafer are obtained based on the second electrode contour image; all are completed using a template matching algorithm.

[0011] In one embodiment of the present application, obtaining a first electrode contour image of an electrode under a wafer includes the following steps: Construct a focal length adjustment model; Shooting the wafer at different focal lengths to obtain original images of the wafer at different focal lengths, annotating each original image to generate a training image, and training the focus adjustment model through the training image, so that the focus adjustment model can automatically adjust the position between the coaxial camera and the wafer, so that the coaxial camera always focuses on the upper surface of the wafer; After the coaxial camera focuses on the upper surface of the wafer, the coaxial camera is controlled to move downward by a standard thickness so that the coaxial camera can obtain a first electrode contour image of the electrode under the wafer; wherein the standard thickness is equal to the wafer thickness.

[0012] In one embodiment of the present application, it is determined whether the plane vertical coordinates of the coordinates of the first center point and the coordinates of the second center point are the same. If they are not the same, the angle value between the line connecting the first center point and the second center point and the cutting path on the wafer is obtained, and the wafer is rotated according to the angle value and with the first center point as the reference.

[0013] In one embodiment of the present application, the focus adjustment model is constructed using a convolutional neural network.

[0014] In one embodiment of the present application, after completing the precise rotation and positioning of the wafer, the method further includes: The cutting paths in the wafer standard template are mapped to the actual cutting paths of the wafer to determine the horizontal and vertical coordinates of the cutting paths in the wafer when the wafer is in a completely flat state; according to the horizontal and vertical coordinates of the cutting paths in the wafer, the 3D topography map is fitted to obtain the horizontal, vertical, and height coordinates of the cutting paths in the wafer to achieve accurate planning of the cutting paths.

[0015] By adopting the above technical solution, the wafer is roughly rotated and finely rotated to position, ensuring the precise alignment of the wafer's cutting path and the electrode during the cutting process. By using the cooperation of a 3D camera and a coaxial camera, the position information of the wafer can be obtained in real time, and the corresponding rotation angle can be calculated based on the information to achieve precise positioning of the wafer. This method can greatly improve the accuracy of wafer cutting, reduce material waste caused by positioning errors during the cutting process, and adapt to different types of wafers and electrode structures, with good versatility. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The present invention is described in detail below with reference to specific embodiments and accompanying drawings, wherein: Figure 1 It is a schematic diagram of the process of the first embodiment of the present invention. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention is described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the following specific embodiments are only used to explain the present invention and do not constitute a limitation to the present invention.

[0018] like Figure 1 As shown, in order to achieve the above purpose, the present invention proposes a wafer laser hidden cutting positioning method, comprising the following steps: A wafer standard template which is the same as the wafer to be cut and has cut lanes distributed thereon is preset; Use a 3D camera to scan and generate a complete 3D topography map of the wafer surface; Obtain the coordinates of the flat edge and the center point of the wafer according to the generated 3D topography image, determine the actual position of the wafer, and determine the first rotation angle that the wafer needs to rotate according to the actual position of the wafer and the position of the wafer standard template; Rotating the glass stage according to the first rotation angle to complete the rough rotation positioning of the wafer; There are multiple electrodes arranged in an array under the wafer. A first electrode contour image of the electrodes under the wafer is obtained. The center point coordinates and direction angle of the wafer are obtained based on the acquired first electrode contour image to determine the current position of the wafer. Based on the current position of the wafer and the position of the wafer standard template, the second rotation angle that the wafer needs to rotate is determined. The glass carrier is rotated according to the second rotation angle to complete the precise rotation positioning of the wafer.

[0019] Specifically, in this embodiment, the preset wafer standard template is a template of the same size as the wafer to be cut, and the template is calibrated with cutting paths according to the actual cutting paths of the wafer to be cut, ensuring that the position, number, size, etc. of the cutting paths on the template are consistent with the wafer to be cut. The template is modeled using computer software and adjusted according to different wafer sizes in actual applications. The use of the wafer standard template ensures the accurate matching of the wafer positioning accuracy and the cutting paths.

[0020] Use a 3D camera to scan the surface of the wafer to be cut to obtain a complete 3D topography. The 3D camera can choose to use laser scanning or structured light scanning. The scanning process ensures that the morphological features of the wafer surface are obtained, including flat edges and surface textures. The resolution of the 3D camera is at least 1μm, ensuring that the scanning data is accurate enough for subsequent positioning and rotation.

[0021] After obtaining the complete 3D topography of the wafer, the image processing algorithm is used to extract the flat edge information of the wafer and calculate the coordinates of the center point of the wafer. The specific method includes extracting the flat edge contour through the edge detection algorithm and then determining the center point position through geometric calculation. Through this step, the position of the wafer can be accurately determined.

[0022] Based on the coordinates of the center point of the wafer and the position comparison with the standard template, the first rotation angle that the wafer needs to rotate is calculated. The specific calculation method is to obtain the angle difference between the flat edge of the wafer and the standard template through geometric transformation, and determine the initial rotation angle of the wafer on the glass stage. After that, the rotation axis of the glass stage is controlled to rotate so that the wafer on the stage roughly matches the standard template to complete the rough rotation positioning.

[0023] In the electrode area below the wafer surface, a coaxial camera or a high-resolution camera is configured to shoot and obtain the first electrode contour image. When shooting the image, ensure that the camera focal length and focus position are accurate so that the electrode contour can be clearly obtained. After image processing, the electrode shape information can be extracted, and then the center point coordinates and direction angles of the wafer can be calculated.

[0024] According to the difference between the current position of the wafer and the position of the standard template, the second rotation angle that the wafer needs to rotate is calculated. This rotation angle is mainly analyzed by comparing the coordinates and direction angles of the electrode contour image with the corresponding parts of the standard template to obtain the precise position of the wafer. By adjusting the rotation angle of the glass stage, the precise rotation positioning of the wafer is completed to ensure that the position of the wafer on the glass stage completely matches the standard template.

[0025] By adopting the above technical solution, the wafer is roughly rotated and finely rotated to position, ensuring the precise alignment of the wafer's cutting path and the electrode during the cutting process. By using the cooperation of a 3D camera and a coaxial camera, the position information of the wafer can be obtained in real time, and the corresponding rotation angle can be calculated based on the information to achieve precise positioning of the wafer. This method can greatly improve the accuracy of wafer cutting, reduce material waste caused by positioning errors during the cutting process, and adapt to different types of wafers and electrode structures, with good versatility.

[0026] In one embodiment of the present application, after completing the precise rotation positioning, the following steps are further included: Acquire the first center point coordinates of the wafer according to the first electrode outline image; The glass stage is translated laterally along the plane, and a second electrode contour image of the electrode under the wafer is obtained; and a second center point coordinate of the wafer is obtained according to the second electrode contour image; It is determined whether the plane vertical coordinates of the coordinates of the first center point and the second center point are the same. If they are the same, it indicates that the wafer has moved to the defined position of the wafer standard template.

[0027] Specifically, Example 1: After completing the precise rotation positioning, the electrode contour image obtained above is first used to analyze the electrode contour through the image processing algorithm to extract the first center point coordinates of the wafer. The calculation of this coordinate is achieved through image analysis technologies such as edge detection and contour matching to ensure that the accuracy reaches the micron level. The first center point coordinates are the initial point for positioning the wafer on the glass stage.

[0028] Control the glass stage to translate laterally along the plane (i.e., along the X-axis direction) to ensure that the electrode area under the wafer can be photographed again by the coaxial camera or high-resolution camera. During the translation process, the movement speed and accuracy of the stage must be strictly controlled to avoid positioning deviations in subsequent steps due to translation errors. Obtain the second electrode contour image by scanning the electrode area under the wafer.

[0029] By processing the image of the second electrode contour, the same electrode recognition algorithm is used to calculate the coordinates of the second center point of the wafer. The calculation method is consistent with the calculation method of the first center point coordinates, ensuring that the calculation of the second center point is highly accurate with the previous step.

[0030] Compare the ordinates (i.e., Y-axis coordinates) of the first center point coordinates and the second center point coordinates to see if they are consistent. This judgment is used to confirm whether the wafer has been accurately moved to the defined position of the wafer standard template. If the ordinates are consistent, it means that the wafer is already in the precise position and no further adjustment is required; if the ordinates are inconsistent, it means that the wafer has not met the positioning requirements of the standard template and further adjustment and optimization are required.

[0031] By adopting the above technical solution, after completing the precise rotation positioning of the wafer, the wafer is precisely positioned by judging whether the vertical coordinates of the center point coordinates obtained twice are consistent. By translating the wafer laterally and obtaining the contour image of the electrode, the position accuracy of the wafer is further verified, effectively avoiding the processing error caused by positioning error.

[0032] In one embodiment of the present application, the flat edge and center point coordinates of the wafer are obtained based on the generated 3D topography image; and the center point coordinates and direction angle of the wafer are obtained based on the obtained electrode contour image; and the first center point coordinates of the wafer are obtained based on the obtained electrode contour image; and the second center point coordinates of the wafer are obtained based on the second electrode contour image; all are completed using a template matching algorithm.

[0033] By using the above technical solution, the template matching algorithm can accurately find the target position in the image by comparing the similarity between the actual image and the preset standard template. At the same time, the template matching algorithm is relatively simple and easy to implement. Through standardized tools and algorithm libraries, applications can be developed and deployed relatively quickly, reducing development costs and time.

[0034] In one embodiment of the present application, obtaining a first electrode contour image of an electrode under a wafer includes the following steps: Construct a focal length adjustment model; Shooting the wafer at different focal lengths to obtain original images of the wafer at different focal lengths, annotating each original image to generate a training image, and training the focus adjustment model through the training image, so that the focus adjustment model can automatically adjust the position between the coaxial camera and the wafer, so that the coaxial camera always focuses on the upper surface of the wafer; After the coaxial camera focuses on the upper surface of the wafer, the coaxial camera is controlled to move downward by a standard thickness so that the coaxial camera can obtain a first electrode contour image of the electrode under the wafer; wherein the standard thickness is equal to the wafer thickness.

[0035] Specifically, a focal length adjustment model is constructed to adjust the focal length position between the coaxial camera and the wafer to ensure that the camera can always focus on the upper surface of the wafer. The construction process of the focal length adjustment model is trained by a large amount of image data at different focal lengths to optimize the adjustment mechanism so that the coaxial camera can automatically adjust to the most appropriate focal length.

[0036] The training process of the model is: Photograph the wafer at different focal lengths to obtain the original images of the wafer at different focal lengths. These image data can cover the different surface states and focal length positions of the wafer, and provide a basis for subsequent annotation and training.

[0037] Each acquired original image is annotated. The annotation content includes the correspondence between the focal length position and different positions on the wafer surface. Based on this annotation information, a training image set is generated. Each training image corresponds to a specific focal length value. These training images will be used as input data sets to train the focal length adjustment model so that it can adaptively adjust the focal length of the coaxial camera according to the actual shooting situation.

[0038] The focus adjustment model is trained using the generated training image set. The model automatically learns the relationship between focus and image clarity from the training images using deep learning techniques combined with convolutional neural networks (CNNs) or other suitable network architectures. The training process gradually improves the accuracy of the model by optimizing the loss function to ensure that the coaxial camera can always maintain a clear focus on the top surface of the wafer.

[0039] Once the focus adjustment model is trained and verified, the system controls the coaxial camera to automatically adjust the focus to ensure that the coaxial camera can accurately focus on the upper surface of the wafer. At this point, through the control of the focus adjustment model, the coaxial camera will clearly image the wafer surface.

[0040] After the coaxial camera focuses on the upper surface of the wafer, the coaxial camera is further controlled to move downward along the Z-axis direction. The moving distance is set to the standard thickness of the wafer, which is equal to the actual thickness of the wafer. At this time, the coaxial camera will focus on the bottom of the wafer and can obtain the first electrode contour image of the electrode below.

[0041] After the coaxial camera moves downward through the standard thickness, it will obtain the first electrode contour image of the electrode under the wafer, thereby ensuring the clarity of the first contour.

[0042] The following are some examples: Place a 6-inch wafer on a homemade image acquisition device, set 1000 base point coordinates for self-focusing, set the defocus offset to 0.005mm, and set the upper and lower limits of the offset to [-2,2]mm. Start automatic image acquisition and output the image and offset data.

[0043] The obtained images were processed with ROI, the central 56*56 size images were cropped, and the corresponding image enhancement processing was performed; the above data were divided into training set, validation set, and test set in a 6:2:2 ratio; The PyTorch deep learning architecture is used to migrate the ResNet50 network using a pre-trained method to extract important features from the input image. Then, a custom loss function and optimizer are used to complete the classification through the corresponding linear layer.

[0044] Based on the built model, set the number of cycles to 50, the initial learning rate to 0.0001, and the sample size to 128 for each training.

[0045] The trained model is tested on the test set data. When the accuracy reaches 99%, the corresponding focus task can be completed. If the accuracy is not enough, it is necessary to modify the corresponding parameters based on the existing model and retrain.

[0046] By adopting the above technical solution and training the focal length adjustment model, the coaxial camera can automatically adapt to different focal length requirements, ensuring that the camera can accurately focus on the upper surface of the wafer, improving the clarity and quality of the image. Through precise control of the coaxial camera, the camera can not only focus on the upper surface of the wafer, but also accurately control the camera position to obtain a clear contour image of the electrode under the wafer, which is convenient for subsequent processing and analysis. The application of the focal length adjustment model makes the entire process automated, without the need for manual adjustment of the focal length position, greatly improving work efficiency and reducing human operation errors.

[0047] In one embodiment of the present application, it is determined whether the plane vertical coordinates of the coordinates of the first center point and the coordinates of the second center point are the same. If they are not the same, the angle value between the line connecting the first center point and the second center point and the cutting path on the wafer is obtained, and the wafer is rotated according to the angle value and with the first center point as the reference.

[0048] Specifically, a first electrode contour image and a second electrode contour image of the electrode under the wafer are obtained. The first center point coordinates and the second center point coordinates are extracted from the two electrode contour images respectively through a template matching algorithm. After obtaining the coordinates of the two points, the difference in the longitudinal coordinates of the two on the plane is calculated. If the longitudinal coordinates of the two are the same, it indicates that the wafer has been accurately positioned to the defined position of the wafer standard template and no further adjustment is required. If the longitudinal coordinates are different, the angle between the line between the first center point and the second center point and the cutting path on the wafer is calculated. Through the value of the angle, the glass carrier is controlled to rotate and adjust the wafer based on the first center point until the longitudinal coordinates of the two center points match, thereby completing the precise positioning of the wafer.

[0049] By adopting the above technical solution, by accurately judging whether the longitudinal coordinates of the first center point and the second center point are consistent, it is possible to effectively judge whether the wafer has been correctly aligned. If they are inconsistent, the angle is calculated and the wafer is rotated to further ensure the accurate positioning of the wafer during the processing. This method can significantly reduce the position deviation of the wafer in subsequent processing and ensure high-precision cutting and processing.

[0050] In one embodiment of the present application, the focus adjustment model is constructed using a convolutional neural network.

[0051] With the above technical solution, the convolutional neural network can automatically extract and learn multi-level features in the image when processing the image. It has strong accuracy and robustness in image recognition and processing, can cope with complex environmental changes such as different lighting, backgrounds, textures, etc., and can accurately adjust the slight changes in focal length, which is convenient for forming a focal length adjustment model.

[0052] In one embodiment of the present application, after completing the precise rotation and positioning of the wafer, the method further includes: The cutting paths in the wafer standard template are mapped to the actual cutting paths of the wafer to determine the horizontal and vertical coordinates of the cutting paths in the wafer when the wafer is in a completely flat state; according to the horizontal and vertical coordinates of the cutting paths in the wafer, the 3D topography map is fitted to obtain the horizontal, vertical, and height coordinates of the cutting paths in the wafer to achieve accurate planning of the cutting paths.

[0053] Specifically, the cutting path coordinates in the preset wafer standard template are mapped to the cutting paths of the actual wafer. During the mapping process, the center point coordinates and direction angles of the actual wafer are obtained through the precise rotation positioning results of the wafer, and the horizontal and vertical coordinates of the cutting paths are adjusted in combination with the cutting path information in the wafer standard template to fully align them with the positions of the actual wafers, ensuring that the mapped cutting paths have consistent geometric distribution with the cutting paths on the actual wafer.

[0054] Based on the mapped wafer standard template cutting path, coordinate fitting is performed with the three-dimensional topography of the actual wafer. First, based on the wafer surface information in the three-dimensional topography, the corresponding position of the cutting path on the horizontal coordinate (X axis) and the vertical coordinate (Y axis) is extracted. Then, combined with the height information of the three-dimensional topography, the height coordinate (Z axis) of each point on the cutting path is calculated. Through fitting calculation, the precise position coordinates of the cutting path in three-dimensional space are obtained, including the horizontal coordinate, vertical coordinate and height coordinate.

[0055] The cutting path is accurately planned based on the three-dimensional spatial coordinates of the cut path obtained by fitting. Based on the height coordinate information of the cut path, the local tilt or deformation that may exist in the wafer during the cutting process is calculated. By adjusting the height parameters of the cutting path, it is ensured that the cutting tool always maintains an ideal relative position with the wafer surface during the processing process, thereby achieving precise cutting.

[0056] By adopting the above technical solution, precise three-dimensional coordinate planning from precise rotation positioning of the wafer to the cutting path is achieved, ensuring that the wafer cutting path is completely consistent with the standard cutting path, thereby significantly improving the quality and accuracy of wafer processing.

[0057] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the inventive concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A wafer laser hidden cutting positioning method, characterized in that: The following steps are involved: A wafer standard template which is the same as the wafer to be cut and has cut lanes distributed thereon is preset; Use a 3D camera to scan and generate a complete 3D topography map of the wafer surface; Obtain the coordinates of the flat edge and the center point of the wafer according to the generated 3D topography image, determine the actual position of the wafer, and determine the first rotation angle that the wafer needs to rotate according to the actual position of the wafer and the position of the wafer standard template; Rotating the glass stage according to the first rotation angle to complete the rough rotation positioning of the wafer; There are multiple electrodes arranged in an array under the wafer. A first electrode contour image of the electrodes under the wafer is obtained. The center point coordinates and direction angle of the wafer are obtained based on the acquired first electrode contour image to determine the current position of the wafer. Based on the current position of the wafer and the position of the wafer standard template, the second rotation angle that the wafer needs to rotate is determined. The glass carrier is rotated according to the second rotation angle to complete the precise rotation positioning of the wafer.

2. The wafer laser hidden cutting positioning method according to claim 1, characterized in that: After completing the precise rotation positioning, the following steps are also included: Acquire the first center point coordinates of the wafer according to the first electrode outline image; The glass stage is translated laterally along the plane, and a second electrode contour image of the electrode under the wafer is obtained; and a second center point coordinate of the wafer is obtained according to the second electrode contour image; It is determined whether the plane vertical coordinates of the coordinates of the first center point and the second center point are the same. If they are the same, it indicates that the wafer has moved to the defined position of the wafer standard template.

3. The wafer laser hidden cutting positioning method according to claim 2, characterized in that: The flat edge and center point coordinates of the wafer are obtained according to the generated 3D topography image; the center point coordinates and direction angle of the wafer are obtained according to the obtained electrode contour image; the first center point coordinates of the wafer are obtained according to the obtained electrode contour image; and the second center point coordinates of the wafer are obtained according to the second electrode contour image; all are completed using a template matching algorithm.

4. The wafer laser hidden cutting positioning method according to claim 1, characterized in that: Acquiring a first electrode contour image of an electrode under a wafer includes the following steps: Construct a focal length adjustment model; Shooting the wafer at different focal lengths to obtain original images of the wafer at different focal lengths, annotating each original image to generate a training image, and training the focus adjustment model through the training image, so that the focus adjustment model can automatically adjust the position between the coaxial camera and the wafer, so that the coaxial camera always focuses on the upper surface of the wafer; After the coaxial camera focuses on the upper surface of the wafer, the coaxial camera is controlled to move downward by a standard thickness so that the coaxial camera can obtain a first electrode contour image of the electrode under the wafer; wherein the standard thickness is equal to the wafer thickness.

5. The wafer laser hidden cutting positioning method according to claim 2, characterized in that: Determine whether the plane vertical coordinates of the coordinates of the first center point and the coordinates of the second center point are the same. If they are not the same, obtain the angle value between the line connecting the first center point and the second center point and the cutting path on the wafer, and rotate the wafer according to the angle value and with the first center point as the reference.

6. The wafer laser hidden cutting positioning method according to claim 4, characterized in that: The focus adjustment model is constructed using a convolutional neural network.

7. The wafer laser hidden cutting positioning method according to claim 1, characterized in that: After completing the precise rotation and positioning of the wafer, it also includes: The cutting paths in the wafer standard template are mapped to the actual cutting paths of the wafer to determine the horizontal and vertical coordinates of the cutting paths in the wafer when the wafer is in a completely flat state; according to the horizontal and vertical coordinates of the cutting paths in the wafer, the 3D topography map is fitted to obtain the horizontal, vertical, and height coordinates of the cutting paths in the wafer to achieve accurate planning of the cutting paths.

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