Impulse voltage disturbance source equivalent modeling method and system in immunity test

Abstract

The invention relates to an equivalent modeling method and system for an impulse voltage disturbance source in a immunity test, and the method comprises the steps: building an equivalent circuit model of a static gun according to a static gun equivalent circuit in combination with SPICE simulation optimization, and in combination with the overall structure of the static gun used by a human body; the method comprises the following steps: constructing an equivalent circuit model of an electrical fast pulse train based on a circuit structure suggested by an electrical fast pulse train immunity test standard in combination with SPICE simulation optimization; a combined wave circuit is analyzed by adopting an SPICE tool, a surge combined wave generator circuit model is constructed by adopting a step voltage source on the basis of an original circuit model in combination with circuit parameters, and an impulse voltage disturbance source in an immunity test is realized based on the three models. By constructing the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electrical fast pulse train and the circuit model of the surge combination wave generator, the protection performance of the electromagnetic protection device under the surge voltage disturbance source is simulated and tested, and the anti-interference performance of protection measures is accurately predicted and evaluated.

Description

Technical Field

[0001] The present invention relates to the technical field of electromagnetic protection of electrical equipment, and in particular to a method and system for equivalent modeling of an impulse voltage disturbance source in an immunity test. Background Art

[0002] Ultra-high voltage direct current (UHVDC) transmission technology is the primary means of achieving large-scale power transmission and grid interconnection worldwide. As the core equipment for AC / DC conversion, converter valve performance is inextricably linked to system reliability, and the reliability and stability of online monitoring units directly impact valve performance. Several converter valves currently used in HVDC transmission projects utilize similar thyristor-level monitoring technology. The converter valve monitoring system consists of a thyristor trigger monitoring unit (TTM), valve-based electronics (VBE), and optical communication fibers. The monitoring unit typically comprises a high-speed floating-point CPU, high-precision sampling circuits, and high-speed communication circuits. Because the monitoring unit's circuit board is mounted directly near the thyristors within the converter valve module, it is exposed to a harsh operating environment characterized by high potential, strong electromagnetic fields, and high heat generation. This places high demands on the monitoring unit's electromagnetic compatibility (EMC) performance. Research on the electromagnetic environment of ±800 kV converter valve towers has concluded that transients generated during thyristor turn-on and turn-off can generate interference on the online monitoring unit's circuit board through conduction and near-field radiation coupling. In severe cases, this can negatively impact measurement accuracy and communication, potentially even causing CPU failures.

[0003] For the online monitoring unit in the converter valve, the severity level of on-site electromagnetic interference exceeds the requirements of traditional laboratory electromagnetic compatibility immunity test standards in some aspects such as voltage, pulse magnetic field amplitude and frequency range. Therefore, it is urgent to propose a more complete research method that goes beyond the traditional immunity test level for protection against impulse voltage. Summary of the Invention

[0004] To address the problem in existing technologies that the severity of on-site electromagnetic disturbances in online monitoring units of converter valves exceeds the requirements of traditional laboratory electromagnetic compatibility immunity test standards in terms of voltage, pulse magnetic field amplitude, and frequency range, the present invention proposes an equivalent modeling method for impulse voltage disturbance sources in immunity testing, including:

[0005] Based on the equivalent circuit of the electrostatic gun combined with SPICE simulation optimization and the overall structure of the electrostatic gun used by the human body, an equivalent circuit model of the electrostatic gun is constructed;

[0006] Based on the circuit structure recommended by the electrical fast pulse group immunity test standard and combined with SPICE simulation optimization, an equivalent circuit model of the electrical fast pulse group is constructed;

[0007] The SPICE tool is used to analyze the combination wave circuit. Based on the circuit parameters and the original circuit model, a step voltage source is used to construct the surge combination wave generator circuit model.

[0008] The impulse voltage disturbance source in the immunity test is realized based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group and the surge combination wave generator circuit model.

[0009] Preferably, the equivalent circuit model of the electrostatic gun is constructed based on the equivalent circuit of the electrostatic gun in combination with SPICE simulation optimization and the overall structure of the electrostatic gun when used by the human body, including:

[0010] One end of the inductor introduced into the ground loop of the electrostatic gun is grounded, and the other end is connected in series with the electrostatic gun to simulate the human body capacitance to form a branch circuit;

[0011] The branch is connected in parallel with the capacitance of the electrostatic gun to the ground, and then connected in series with the resistance of the simulated human arm, the step voltage source, the resistance of the discharge head, and one end of the inductance;

[0012] The other end of the inductor is connected to one end of the current target load, and the other end of the current target load is grounded;

[0013] The capacitance between the arm and the discharge point is connected in parallel with the resistance of the simulated human arm.

[0014] Preferably, the circuit structure recommended by the electrical fast pulse group immunity test standard is combined with SPICE simulation optimization to construct an equivalent circuit model of the electrical fast pulse group, including:

[0015] One end of the pulse source is grounded, and the other end is connected to one end of the energy storage capacitor, and the other end of the energy storage capacitor is respectively connected to one end of the pulse holding time adjustment resistor and one end of the impedance matching resistor;

[0016] The other end of the pulse holding time adjustment resistor is grounded; the other end of the impedance matching resistor is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of RL, and the other end of RL is grounded.

[0017] Preferably, the SPICE tool is used to analyze the combination wave circuit, and a step voltage source is used based on the original circuit model in combination with the circuit parameters to construct a surge combination wave generator circuit model, including:

[0018] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0019] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to simulate the open circuit voltage waveform and short circuit current waveform during the surge immunity test.

[0020] Preferably, the original surge combination wave generator circuit model includes:

[0021] The other end of the energy storage capacitor is connected to one end of the first pulse holding time adjustment resistor and the impedance matching resistor respectively, the other end of the impedance matching resistor is connected to one end of the rise time adjustment inductor, the other end of the rise time adjustment inductor is connected to one end of the second pulse holding time adjustment resistor, and the other end of the second pulse holding time adjustment resistor is grounded.

[0022] Preferably, the method of analyzing the combination wave circuit using a SPICE tool, combining circuit parameters with a step voltage source on the basis of an original circuit model, and constructing a surge combination wave generator circuit model further includes:

[0023] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0024] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to evaluate the pulse tolerance capability of the transient suppression device.

[0025] Preferably, the original surge combination wave generator circuit model includes:

[0026] The other end of the energy storage capacitor is connected to one end of the rise time adjustment inductor, and the other end of the rise time adjustment inductor is connected to one end of the pulse holding time adjustment resistor and the impedance matching resistor respectively;

[0027] The other end of the pulse holding time adjustment resistor is grounded;

[0028] Cs is connected in parallel with the pulse holding time adjustment resistor.

[0029] In another aspect, the present invention further provides an equivalent modeling system for an impulse voltage disturbance source in an immunity test, comprising:

[0030] The discharge model construction module is used to build an equivalent circuit model of the electrostatic gun based on the equivalent circuit of the electrostatic gun combined with SPICE simulation optimization and the overall structure of the electrostatic gun used by the human body;

[0031] The pulse model building module is used to build an equivalent circuit model of an electrical fast pulse group based on the circuit structure recommended by the electrical fast pulse group immunity test standard and SPICE simulation optimization;

[0032] The combination wave model construction module is used to analyze the combination wave circuit using the SPICE tool. Based on the original circuit model, a step voltage source is used to construct a surge combination wave generator circuit model based on the circuit parameters.

[0033] The disturbance source simulation module is used to realize the impulse voltage disturbance source in the immunity test based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group and the surge combination wave generator circuit model.

[0034] Preferably, the discharge model building module is specifically used to:

[0035] One end of the inductor introduced into the ground loop of the electrostatic gun is grounded, and the other end is connected in series with the electrostatic gun to simulate the human body capacitance to form a branch circuit;

[0036] The branch is connected in parallel with the capacitance of the electrostatic gun to the ground, and then connected in series with the resistance of the simulated human arm, the step voltage source, the resistance of the discharge head, and one end of the inductance;

[0037] The other end of the inductor is connected to one end of the current target load, and the other end of the current target load is grounded;

[0038] The capacitance between the arm and the discharge point is connected in parallel with the resistance of the simulated human arm.

[0039] Preferably, the pulse model building module is specifically used to:

[0040] One end of the pulse source is grounded, and the other end is connected to one end of the energy storage capacitor, and the other end of the energy storage capacitor is respectively connected to one end of the pulse holding time adjustment resistor and one end of the impedance matching resistor;

[0041] The other end of the pulse holding time adjustment resistor is grounded; the other end of the impedance matching resistor is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of RL, and the other end of RL is grounded.

[0042] Preferably, the combination wave model building module is specifically used to:

[0043] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0044] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to simulate the open circuit voltage waveform and short circuit current waveform during the surge immunity test.

[0045] Preferably, the original surge combination wave generator circuit model includes:

[0046] The other end of the energy storage capacitor is connected to one end of the first pulse holding time adjustment resistor and the impedance matching resistor respectively, the other end of the impedance matching resistor is connected to one end of the rise time adjustment inductor, the other end of the rise time adjustment inductor is connected to one end of the second pulse holding time adjustment resistor, and the other end of the second pulse holding time adjustment resistor is grounded.

[0047] Preferably, the combination wave model building module is used to:

[0048] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0049] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to evaluate the pulse tolerance capability of the transient suppression device.

[0050] Preferably, the original surge combination wave generator circuit model includes:

[0051] The other end of the energy storage capacitor is connected to one end of the rise time adjustment inductor, and the other end of the rise time adjustment inductor is connected to one end of the pulse holding time adjustment resistor and the impedance matching resistor respectively;

[0052] The other end of the pulse holding time adjustment resistor is grounded;

[0053] Cs is connected in parallel with the pulse holding time adjustment resistor.

[0054] In another aspect, the present invention further provides a method for testing the standard immunity of a converter valve monitoring unit, comprising:

[0055] The pulse suppression performance of MOV devices was tested by simulating direct discharge from an electrostatic gun using a pre-built equivalent circuit model of the electrostatic gun.

[0056] Use the pre-built equivalent circuit model of the electrical fast pulse group to simulate the signal source generator during the EFT test and simulate and analyze the pulse tolerance capability of the transient suppression device;

[0057] Use the pre-built surge combination wave generator circuit model to simulate the open-circuit voltage waveform and short-circuit current waveform during the surge immunity test, and simulate and analyze the GDT gas discharge tube's ability to suppress surge pulses;

[0058] Among them, the pre-constructed equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group, and the surge combination wave generator circuit model are constructed using the equivalent modeling method of the impulse voltage disturbance source in the immunity test as described in any one of claims 1 to 7.

[0059] Preferably, it also includes:

[0060] Using the pre-built equivalent circuit model of the electrostatic gun and the electrical fast transient pulse disturbance model, electrostatic discharge and electrical fast transient pulse disturbance are simulated to test the pulse suppression performance of the TVS device.

[0061] In another aspect, the present invention further provides a standard immunity test system for a converter valve monitoring unit, comprising:

[0062] The pulse test module is used to simulate the direct discharge of the electrostatic gun using a pre-built equivalent circuit model of the electrostatic gun to test the pulse suppression performance of the MOV device;

[0063] The electrical fast pulse group test module is used to simulate the signal source generator during the EFT test using a pre-built equivalent circuit model of the electrical fast pulse group, and simulate and analyze the protection effect of MOV devices against electrical fast transient pulse groups;

[0064] The surge pulse test module is used to simulate the open-circuit voltage waveform and short-circuit current waveform during the surge immunity test using a pre-built surge combination wave generator circuit model, and simulate and analyze the GDT gas discharge tube's ability to suppress surge pulses;

[0065] Among them, the pre-constructed equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group, and the surge combination wave generator circuit model are constructed using the equivalent modeling method of the impulse voltage disturbance source in the immunity test as described above.

[0066] Preferably, it also includes: a TVS device test module, which is used to: use a pre-built equivalent circuit model of an electrostatic gun and an electrical fast transient pulse disturbance model to simulate electrostatic discharge and electrical fast transient pulse disturbance to test the pulse suppression performance of the TVS device.

[0067] In another aspect, the present application further provides an electronic device, comprising: at least one processor and a memory; the memory and the processor are connected via a bus;

[0068] The memory is used to store one or more programs;

[0069] When the one or more programs are executed by the at least one processor, an equivalent modeling method for an impulse voltage disturbance source in an immunity test and a standard immunity test method for a converter valve monitoring unit as described above are implemented.

[0070] On the other hand, the present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed, it implements an equivalent modeling method for an impulse voltage disturbance source in an immunity test as described above, as well as a standard immunity test method for a converter valve monitoring unit.

[0071] Compared with the prior art, the present invention has the following beneficial effects:

[0072] The present invention provides an equivalent modeling method for an impulse voltage disturbance source in an immunity test, comprising: constructing an equivalent circuit model of an electrostatic gun based on its equivalent circuit combined with SPICE simulation optimization and the overall structure of the electrostatic gun when used by a human body; constructing an equivalent circuit model of an electrical fast pulse group based on the circuit structure recommended by the electrical fast pulse group immunity test standard combined with SPICE simulation optimization; analyzing the combination wave circuit using a SPICE tool, and constructing a surge combination wave generator circuit model based on the original circuit model using a step voltage source in combination with circuit parameters; and implementing the impulse voltage disturbance source in the immunity test based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electrical fast pulse group, and the surge combination wave generator circuit model. By constructing the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electrical fast pulse group, and the surge combination wave generator circuit model, the present invention simulates and tests the protection performance of electromagnetic protection devices under an impulse voltage disturbance source, thereby accelerating the relevant electromagnetic compatibility design cycle and accurately predicting and evaluating the interference resistance performance of protective measures. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 This is a flow chart of an equivalent modeling method for an impulse voltage disturbance source in an immunity test of the present invention;

[0074] Figure 2 It is an electrostatic gun circuit model;

[0075] Figure 3 It is the EFT pulse train circuit model;

[0076] Figure 4(a) is the circuit model of the 1.2 / 50us and 8 / 20us surge combination wave generator;

[0077] Figure 4(b) is the circuit model of the 1.2 / 3000us and 10 / 1000us surge combination wave generator;

[0078] Figure 5(a) is a simulation circuit of the 2kV ESD protection characteristics of MOV;

[0079] Figure 5(b) shows the simulation results of the 2kV ESD protection characteristics of MOV;

[0080] Figure 6(a) is a simulation circuit of the 2.5kV surge protection characteristics of the MOV;

[0081] Figure 6(b) and Figure 6(c) are the simulation results of the 2.5kV surge protection characteristics of the MOV;

[0082] Figure 7(a) is a simulation circuit of the GDT's 20kV surge protection characteristics;

[0083] Figure 7(b) shows the simulation results of the 20kV surge protection characteristics of the GDT;

[0084] Figure 7(c) shows the simulation results of the forward and reverse currents flowing through the GDT when the surge voltage is suppressed to 50V within 0.6µs.

[0085] Figure 8 It is a TVS transient voltage suppression performance simulation circuit;

[0086] Figure 9(a) is a simulation diagram of TVS ESD suppression performance;

[0087] Figure 9(b) is a simulation diagram of TVS's EFT suppression performance;

[0088] Figure 10 The figure is a schematic structural diagram of an electronic device of the present invention. DETAILED DESCRIPTION

[0089] Building on previous research, this paper proposes an equivalent modeling method for impulse voltage disturbance sources used in standard immunity tests for converter valve monitoring units, targeting three electromagnetic compatibility (EMC) immunity tests: electrostatic discharge (ESD), electrical fast transient (EFT), and surge combination waves. This model is used to simulate and test the performance of electromagnetic protection devices under these impulse voltage disturbance sources, accelerating the design cycle for related EMC designs and enabling more accurate prediction and evaluation of the immunity performance of protective measures.

[0090] In order to better understand the present invention, the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0091] Example 1:

[0092] An equivalent modeling method for impulse voltage disturbance source in immunity test, such as Figure 1 Shown, including:

[0093] Step S1: constructing an equivalent circuit model of the electrostatic gun based on the equivalent circuit of the electrostatic gun and combining SPICE simulation optimization with the overall structure of the electrostatic gun used by the human body;

[0094] Step S2: Based on the circuit structure recommended by the electrical fast pulse group immunity test standard and combined with SPICE simulation optimization, an equivalent circuit model of the electrical fast pulse group is constructed;

[0095] Step S3: Use SPICE tools to analyze the combination wave circuit, and use a step voltage source based on the original circuit model in combination with the circuit parameters to construct a surge combination wave generator circuit model;

[0096] Step S4: realizing the impulse voltage disturbance source in the immunity test based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group and the surge combination wave generator circuit model.

[0097] This paper provides an equivalent modeling method for impulse voltage disturbance sources used in immunity testing. In impulse voltage protection, devices such as gas discharge tubes, MOV multilayer zinc oxide varistors, and TVS avalanche diodes are typically placed at device ports to suppress transient impulse voltages. Therefore, in simulation, equivalent circuit models for these three protection devices are established. These three impulse voltage disturbance source models are then used to simulate and test the pulse suppression performance of these devices under these impulse voltage disturbance sources.

[0098] The following is a detailed introduction to each step.

[0099] Step S1: Based on the equivalent circuit of the electrostatic gun and combined with SPICE simulation optimization, and combined with the overall structure of the electrostatic gun used by the human body, an equivalent circuit model of the electrostatic gun is constructed, such as Figure 2 Shown, including:

[0100] The electrostatic gun simulates the capacitance of the human body and the inductor introduced into the electrostatic gun ground return line is connected in series to form a branch circuit;

[0101] The branch is connected in parallel with the capacitance of the electrostatic gun to the ground, and then connected in series with the resistance of the simulated human arm, the step voltage source, the resistance of the discharge head, and one end of the inductance;

[0102] The other end of the inductor is connected to one end of the current target load, and the other end of the current target load is grounded;

[0103] The capacitance between the arm and the discharge point is connected in parallel with the resistance of the simulated human arm.

[0104] Step S1 specifically includes:

[0105] Applying SPICE simulation to transient voltage pulse protection design first requires establishing a circuit model for the impulse voltage signal generator. Research has already been conducted in various areas. Professor D. Pommerenke and his colleagues at the Electromagnetic Compatibility Laboratory at the University of Missouri, USA, modeled an electrostatic gun using circuit and numerical calculation methods, successfully applying this model to electrostatic discharge research. Italian scholar F. Maradei and his colleagues also developed an equivalent circuit model for an electrostatic gun and simulated the discharge current waveform. G. Cerri and his colleagues calculated and determined the circuit parameters of an EFT generator based on single-pulse energy specifications. Zhai Xiaoshe, Geng Yingsan, and their colleagues at Xi'an Jiaotong University proposed an equivalent circuit for an EFT generator using network synthesis. Ji Zhang and his colleagues used equivalent circuit methods to model the power supply and I / O pins of an EFT injection chip. Regarding impulse voltage generators, Wang Yufeng, Liu Liang, Sun Wei, and Yang Zhongjiang, respectively, developed a combination wave generator for live lightning arrester testing, optimized its circuit parameters, and implemented the device in manufacturing.

[0106] 1. Equivalent circuit model of electrostatic gun

[0107] According to the equivalent circuit of the electrostatic gun and combined with SPICE simulation optimization, the following improved circuit model is proposed to simulate the direct discharge of the electrostatic gun, such as Figure 2 As shown in the figure, Cb is the capacitance of the electrostatic gun simulating a human body, Cb1 is the capacitance of the electrostatic gun to ground, Rarm is the resistance of the simulated human arm, Carm is the capacitance between the arm and the discharge point, Rt and Lt are the resistance and inductance of the discharge head, simulating the parasitic parameters of discharge through the finger, and Lline is the inductance introduced by the electrostatic gun ground return line. VtStep is a step voltage source that simulates the electrostatic gun turn-on process. Its voltage value can be set according to the test level. Rtarget is the 2Ω current target load used for electrostatic gun discharge current calibration. t is time, Vlow is the low level, Vhigh is the high level, and Rise is the rising edge.

[0108] Step S2: Based on the circuit structure recommended by the electrical fast pulse group immunity test standard and combined with SPICE simulation optimization, an equivalent circuit model of the electrical fast pulse group is constructed, including:

[0109] One end of the pulse source is grounded, and the other end is connected to one end of the energy storage capacitor, and the other end of the energy storage capacitor is respectively connected to one end of the pulse holding time adjustment resistor and one end of the impedance matching resistor;

[0110] The other end of the pulse holding time adjustment resistor is grounded; the other end of the impedance matching resistor is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of RL, and the other end of RL is grounded.

[0111] Step S2 specifically includes: the equivalent circuit of the electrical fast pulse group, such as Figure 3 shown.

[0112] Based on the circuit structure recommended by the electrical fast pulse group immunity test standard and combined with SPICE simulation optimization, the following circuit model is proposed to simulate the signal source generator during the EFT (Electrical Fast Transient) test. For a single pulse repetition frequency of 5kHz, a group of 75 single pulse signals (lasting 15ms) is generated. Figure 3 As shown in the figure, Vt is the pulse source, which generates a set of disturbance signals with a single pulse repetition frequency of 5kHz. When studying a single pulse, a step voltage source can also be used for excitation. The voltage value can be set according to the test level. Cc is the energy storage capacitor, Rs is the pulse holding time adjustment resistor, Rm is the impedance matching resistor, Cd is the DC blocking capacitor, VtPulse is the pulse source, Width is the pulse width, Fall is the falling edge, Period is the period, and RL is the load.

[0113] Step S3: Use SPICE tools to analyze the combination wave circuit, and build a surge combination wave generator circuit model based on the original circuit model using a step voltage source in combination with the circuit parameters, including:

[0114] The surge combination wave generator circuit model is divided into two combinations. The first is the 1.2 / 50us and 8 / 20us surge combination wave generator circuit model. This model simulates the open-circuit voltage waveform and short-circuit current waveform during the surge immunity test. The second is the 1.2 / 3000us and 10 / 1000us surge combination wave generator circuit model, which tests the pulse tolerance capability of transient suppression devices. The construction of these two models is introduced below:

[0115] The first surge combination wave generator circuit model is shown in Figure 4(a):

[0116] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0117] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to simulate the open circuit voltage waveform and short circuit current waveform during the surge immunity test.

[0118] Furthermore, the original surge combination wave generator circuit model includes:

[0119] The other end of the energy storage capacitor is connected to one end of the first pulse holding time adjustment resistor and the impedance matching resistor respectively, the other end of the impedance matching resistor is connected to one end of the rise time adjustment inductor, the other end of the rise time adjustment inductor is connected to one end of the second pulse holding time adjustment resistor, and the other end of the second pulse holding time adjustment resistor is grounded.

[0120] The second surge combination wave generator circuit model is shown in Figure 4(b):

[0121] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0122] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to evaluate the pulse tolerance capability of the transient suppression device.

[0123] Furthermore, the original surge combination wave generator circuit model includes:

[0124] The other end of the energy storage capacitor is connected to one end of the rise time adjustment inductor, and the other end of the rise time adjustment inductor is connected to one end of the pulse holding time adjustment resistor and the impedance matching resistor respectively;

[0125] The other end of the pulse holding time adjustment resistor is grounded;

[0126] Cs is connected in parallel with the pulse holding time adjustment resistor.

[0127] Step S3 specifically includes:

[0128] 3. Surge combination wave generator circuit model

[0129] Regarding the circuit model for the 1.2 / 50µs and 8 / 20µs surge combination wave generator, SPICE tools were used to comprehensively analyze combination wave circuits from the literature. Drawing on the circuit parameters recommended in the literature, a circuit model using a step voltage source for excitation was proposed. This model simulates the open-circuit voltage and short-circuit current waveforms during surge immunity testing. As shown in Figure 4(a), Vt is the step voltage source, which can be described by a piecewise linear source in the SPICE simulation tool. Its voltage value can be set according to the test level. Cc is the energy storage capacitor, Rs1 and Rs2 are the pulse hold time adjustment resistors, Rm is the impedance matching resistor, and Lr is the rise time adjustment inductor. The specific parameters of each component in the equivalent circuit are shown in the figure. Furthermore, transient suppression devices are often evaluated for their pulse tolerance capabilities using 1.2 / 3000µs and 10 / 1000µs combination waves. The equivalent circuit for this combination wave is shown in Figure 4(b), where Cs is the pulse hold time adjustment capacitor.

[0130] Step S4: realizing the impulse voltage disturbance source in the immunity test based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group and the surge combination wave generator circuit model.

[0131] Example 2:

[0132] The present invention based on the same inventive concept also provides an equivalent modeling system for impulse voltage disturbance sources in immunity testing, comprising:

[0133] The discharge model construction module is used to build an equivalent circuit model of the electrostatic gun based on the equivalent circuit of the electrostatic gun combined with SPICE simulation optimization and the overall structure of the electrostatic gun used by the human body;

[0134] The pulse model building module is used to build an equivalent circuit model of an electrical fast pulse group based on the circuit structure recommended by the electrical fast pulse group immunity test standard and SPICE simulation optimization;

[0135] The combination wave model construction module is used to analyze the combination wave circuit using the SPICE tool. Based on the original circuit model, a step voltage source is used to construct a surge combination wave generator circuit model based on the circuit parameters.

[0136] The disturbance source simulation module is used to realize the impulse voltage disturbance source in the immunity test based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group and the surge combination wave generator circuit model.

[0137] Preferably, the discharge model building module is specifically used to:

[0138] One end of the inductor introduced into the ground loop of the electrostatic gun is grounded, and the other end is connected in series with the electrostatic gun to simulate the human body capacitance to form a branch circuit;

[0139] The branch is connected in parallel with the capacitance of the electrostatic gun to the ground, and then connected in series with the resistance of the simulated human arm, the step voltage source, the resistance of the discharge head, and one end of the inductance;

[0140] The other end of the inductor is connected to one end of the current target load, and the other end of the current target load is grounded;

[0141] The capacitance between the arm and the discharge point is connected in parallel with the resistance of the simulated human arm.

[0142] Preferably, the pulse model building module is specifically used to:

[0143] One end of the pulse source is grounded, and the other end is connected to one end of the energy storage capacitor, and the other end of the energy storage capacitor is respectively connected to one end of the pulse holding time adjustment resistor and one end of the impedance matching resistor;

[0144] The other end of the pulse holding time adjustment resistor is grounded; the other end of the impedance matching resistor is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of RL, and the other end of RL is grounded.

[0145] Preferably, the combination wave model building module is specifically used to:

[0146] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0147] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to simulate the open circuit voltage waveform and short circuit current waveform during the surge immunity test.

[0148] Preferably, the original surge combination wave generator circuit model includes:

[0149] The other end of the energy storage capacitor is connected to one end of the first pulse holding time adjustment resistor and the impedance matching resistor respectively, the other end of the impedance matching resistor is connected to one end of the rise time adjustment inductor, the other end of the rise time adjustment inductor is connected to one end of the second pulse holding time adjustment resistor, and the other end of the second pulse holding time adjustment resistor is grounded.

[0150] Preferably, the combination wave model building module is used to:

[0151] The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level;

[0152] One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to evaluate the pulse tolerance capability of the transient suppression device.

[0153] Preferably, the original surge combination wave generator circuit model includes:

[0154] The other end of the energy storage capacitor is connected to one end of the rise time adjustment inductor, and the other end of the rise time adjustment inductor is connected to one end of the pulse holding time adjustment resistor and the impedance matching resistor respectively;

[0155] The other end of the pulse holding time adjustment resistor is grounded;

[0156] Cs is connected in parallel with the pulse holding time adjustment resistor.

[0157] Example 3

[0158] The present invention also provides a standard anti-interference test method for a converter valve monitoring unit, comprising:

[0159] The pulse suppression performance of MOV devices was tested by simulating direct discharge from an electrostatic gun using a pre-built equivalent circuit model of the electrostatic gun.

[0160] Use the pre-built equivalent circuit model of the electrical fast pulse group to simulate the signal source generator during the EFT test and simulate and analyze the pulse tolerance capability of the transient suppression device;

[0161] Use the pre-built surge combination wave generator circuit model to simulate the open-circuit voltage waveform and short-circuit current waveform during the surge immunity test, and simulate and analyze the GDT gas discharge tube's ability to suppress surge pulses;

[0162] Among them, the pre-constructed equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group, and the surge combination wave generator circuit model are constructed using the equivalent modeling method of the impulse voltage disturbance source in the immunity test as described in the above embodiment.

[0163] Preferably, it also includes:

[0164] Using the pre-built equivalent circuit model of the electrostatic gun and the electrical fast transient pulse disturbance model, electrostatic discharge and electrical fast transient pulse disturbance are simulated to test the pulse suppression performance of the TVS device.

[0165] 1. Based on the unidirectional characteristics of the MOV device, its ability to suppress electrostatic discharge was simulated. Using the equivalent circuit model of the electrostatic gun and the MOV circuit model, the simulation circuit is shown in Figure 5(a) and the simulation results are shown in Figure 5(b). In the figure, Vout is the protection voltage, V is volts, time is time, and nsec is nanoseconds. It can be seen that the selected MOV device has a good suppressive effect on the amplitude of the 2kV direct electrostatic discharge pulse, suppressing it from 260V when no MOV is added to below 50V.

[0166] 2. Analyze the MOV device's protection against lightning surge pulses. Lightning surge signals manifest as open-circuit voltage and short-circuit current, and exhibit reverse characteristics. Therefore, the MOV device's equivalent circuit must reflect its bidirectional characteristics. The MOV's 2.5kV surge protection simulation circuit is shown in Figure 6(a), and the protection simulation results are shown in Figures 6(b) and 6(c). Here, 1_Probe1.i,KA is the forward current, 1_Probe2.i,KA is the reverse current, and usec is microseconds. This shows that the MOV device effectively suppresses both forward and reverse surge signals.

[0167] 3. Evaluate the surge pulse suppression capability of a GDT gas discharge tube. A simulation circuit is established using the GDT gas discharge tube circuit model combined with the surge generator equivalent circuit model. The simulation circuit is shown in Figure 7(a) and the calculation results are shown in Figure 7(b). It can be seen that within its safe operating range, the surge voltage is suppressed to 50V within 0.6us. The forward and reverse currents flowing through the GDT are shown in Figure 7(c), where 1_Probe3.i,KA is the forward current flowing through the GDT, and 1_Probe4.i,KA is the reverse current flowing through the GDT.

[0168] 4. Taking the bidirectional TVS device as the research object, the pulse protection performance under the conditions of electrostatic discharge and electrical fast transient pulse disturbance at different voltage levels is simulated and analyzed. The specific implementation process is as follows: Figure 8 The TVS circuit model shown in the figure is composed of simulation circuits with electrostatic discharge and electrical fast transient pulse disturbance models, where Voltage is the voltage across the TVS tube, Current is the current flowing through the TVS tube, and ohms is ohms. The pulse generator part in the left half of the figure is equipped with electrostatic discharge and electrical fast transient pulse disturbance models, and the pulse suppression performance of the TVS device is simulated and tested by two different disturbance sources. The protection performance simulation results of the TVS device under electrostatic discharge and electrical fast transient pulse disturbances of different voltage levels are shown in the figure. Figure 9(a) and 9(b) As shown in the figure, where ESD stands for electrostatic discharge, EET stands for electrical fast transient (EFT), and Time stands for time. Under ESD disturbances of 1kV, 2kV, and 4kV, the protection voltage stabilizes and gradually decays to zero after 5ns. Under EFT disturbances of 1kV, 2kV, and 4kV, the protection voltage reaches zero after 4us. This shows that TVS diodes provide excellent protection against both ESD and EFT.

[0169] Example 4

[0170] The present invention also provides a standard immunity test system for a converter valve monitoring unit, comprising:

[0171] The pulse test module is used to simulate the direct discharge of the electrostatic gun using a pre-built equivalent circuit model of the electrostatic gun to test the pulse suppression performance of the MOV device;

[0172] The electrical fast pulse group test module is used to simulate the signal source generator during the EFT test using a pre-built equivalent circuit model of the electrical fast pulse group, and simulate and analyze the protection effect of MOV devices against electrical fast transient pulse groups;

[0173] The surge pulse test module is used to simulate the open-circuit voltage waveform and short-circuit current waveform during the surge immunity test using a pre-built surge combination wave generator circuit model, and simulate and analyze the GDT gas discharge tube's ability to suppress surge pulses;

[0174] Among them, the pre-constructed equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group, and the surge combination wave generator circuit model are constructed using the equivalent modeling method of the impulse voltage disturbance source in the immunity test described in the above embodiment.

[0175] Preferably, it also includes: a TVS device test module, which is used to: use a pre-built equivalent circuit model of an electrostatic gun and an electrical fast transient pulse disturbance model to simulate electrostatic discharge and electrical fast transient pulse disturbance to test the pulse suppression performance of the TVS device.

[0176] Example 5

[0177] like Figure 10 As shown, the present invention also provides an electronic device, which may be a computer, a single-chip microcomputer, a smart mobile device, or the like. The electronic device in this embodiment may include a processor, a memory, a transceiver component, and the like. The memory, processor, and transceiver component are connected via a bus; the memory may be used to store an execution program, which may include instructions; and the processor may be used to execute the instructions stored in the memory. The memory may also be used to store data, which may be accessed and / or modified during the execution of the instructions.

[0178] The processor may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions in a storage medium to implement the corresponding method flow or corresponding function, so as to implement the steps of an equivalent modeling method for an impulse voltage disturbance source in an immunity test and / or a standard immunity test method for a converter valve monitoring unit in the above-mentioned embodiment.

[0179] Example 6

[0180] Based on the same inventive concept, the present invention also provides a readable storage medium, specifically an electronic device readable storage medium (Memory), which is a memory device in the electronic device for storing programs and data. It is understandable that the storage medium here can include both built-in storage media in the electronic device and, of course, extended storage media supported by the electronic device. The storage medium provides a storage space, which stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space. These instructions can be one or more execution programs (including program codes). It should be noted that the storage medium here can be a high-speed RAM memory or a non-volatile memory, such as at least one disk storage. The processor loads and executes one or more instructions stored in the storage medium, which can implement the steps of an equivalent modeling method for an impulse voltage disturbance source in an immunity test and / or a standard immunity test method for a converter valve monitoring unit in the above-mentioned embodiment.

[0181] It will be understood by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0182] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0183] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0184] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0185] The above are merely embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention are included in the scope of the claims of the present invention to be approved.

Claims

1. A method for equivalent modeling of impulse voltage disturbance source in immunity test, characterized in that: include: According to the equivalent circuit of the electrostatic gun combined with SPICE simulation optimization and the overall structure of the electrostatic gun used by the human body, an equivalent circuit model of the electrostatic gun is constructed; Based on the circuit structure recommended by the electrical fast pulse group immunity test standard and combined with SPICE simulation optimization, an equivalent circuit model of the electrical fast pulse group is constructed; The combination wave circuit is analyzed using SPICE tools, and a step voltage source is used based on the original circuit model in combination with circuit parameters to construct a surge combination wave generator circuit model. Based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group and the circuit model of the surge combination wave generator, the impulse voltage disturbance source in the immunity test is realized.

2. The method according to claim 1, characterized in that The equivalent circuit model of the electrostatic gun is constructed based on the equivalent circuit of the electrostatic gun combined with SPICE simulation optimization and combined with the overall structure of the electrostatic gun used by the human body, including: The ground return line of the electrostatic gun introduces an inductor with one end grounded, and the other end is connected in series with the electrostatic gun to simulate the human body capacitance to form a branch circuit; The branch is connected in parallel with the capacitance of the electrostatic gun to the ground, and then connected in series with the resistance of the simulated human arm, the step voltage source, the resistance of the discharge head, and one end of the inductance; The other end of the inductor is connected to one end of the current target load, and the other end of the current target load is grounded; The capacitance between the arm and the discharge point is connected in parallel with the resistance of the simulated human arm.

3. The method according to claim 1, characterized in that The circuit structure recommended by the electrical fast pulse group immunity test standard is combined with SPICE simulation optimization to construct an equivalent circuit model of the electrical fast pulse group, including: One end of the pulse source is grounded, and the other end is connected to one end of the energy storage capacitor, and the other end of the energy storage capacitor is respectively connected to one end of the pulse holding time adjustment resistor and one end of the impedance matching resistor; The other end of the pulse holding time adjustment resistor is grounded; the other end of the impedance matching resistor is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of RL, and the other end of RL is grounded.

4. The method according to claim 1, characterized in that The SPICE tool is used to analyze the combination wave circuit, and a step voltage source is used based on the original circuit model in combination with the circuit parameters to construct a surge combination wave generator circuit model, including: The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level; One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to simulate the open circuit voltage waveform and short circuit current waveform during the surge immunity test.

5. The method according to claim 4, characterized in that The original surge combination wave generator circuit model includes: The other end of the energy storage capacitor is connected to one end of the first pulse holding time adjustment resistor and the impedance matching resistor respectively, the other end of the impedance matching resistor is connected to one end of the rise time adjustment inductor, the other end of the rise time adjustment inductor is connected to one end of the second pulse holding time adjustment resistor, and the other end of the second pulse holding time adjustment resistor is grounded.

6. The method according to claim 1, characterized in that The method of using a SPICE tool to analyze a combination wave circuit, combining circuit parameters with a step voltage source on the basis of an original circuit model, and constructing a surge combination wave generator circuit model also includes: The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level; One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model, and the pulse tolerance capability of the transient suppression device is evaluated.

7. The method according to claim 6, characterized in that The original surge combination wave generator circuit model includes: The other end of the energy storage capacitor is connected to one end of the rise time adjustment inductor, and the other end of the rise time adjustment inductor is connected to one end of the pulse holding time adjustment resistor and the impedance matching resistor respectively; The other end of the pulse holding time adjustment resistor is grounded; Cs is connected in parallel with the pulse holding time adjustment resistor.

8. An equivalent modeling system for impulse voltage disturbance source in immunity test, characterized in that: include: The discharge model building module is used to build an equivalent circuit model of the electrostatic gun based on the equivalent circuit of the electrostatic gun combined with SPICE simulation optimization and the overall structure of the electrostatic gun used by the human body; The pulse model building module is used to build an equivalent circuit model of an electrical fast pulse group based on the circuit structure recommended by the electrical fast pulse group immunity test standard combined with SPICE simulation optimization; The combination wave model building module is used to analyze the combination wave circuit using the SPICE tool, and to build a surge combination wave generator circuit model by using a step voltage source based on the original circuit model in combination with circuit parameters; The disturbance source simulation module is used to realize the impulse voltage disturbance source in the anti-disturbance test based on the equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group and the surge combination wave generator circuit model.

9. The system according to claim 8, characterized in that The discharge model building module is specifically used for: The ground return line of the electrostatic gun introduces an inductor with one end grounded, and the other end is connected in series with the electrostatic gun to simulate the human body capacitance to form a branch circuit; The branch is connected in parallel with the capacitance of the electrostatic gun to the ground, and then connected in series with the resistance of the simulated human arm, the step voltage source, the resistance of the discharge head, and one end of the inductance; The other end of the inductor is connected to one end of the current target load, and the other end of the current target load is grounded; The capacitance between the arm and the discharge point is connected in parallel with the resistance of the simulated human arm.

10. The system according to claim 8, characterized in that The pulse model building module is specifically used for: One end of the pulse source is grounded, and the other end is connected to one end of the energy storage capacitor, and the other end of the energy storage capacitor is respectively connected to one end of the pulse holding time adjustment resistor and one end of the impedance matching resistor; The other end of the pulse holding time adjustment resistor is grounded; the other end of the impedance matching resistor is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of RL, and the other end of RL is grounded.

11. The system according to claim 8, characterized in that The combined wave model building module is specifically used for: The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level; One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model to simulate the open circuit voltage waveform and short circuit current waveform during the surge immunity test.

12. The system according to claim 11, characterized in that The original surge combination wave generator circuit model includes: The other end of the energy storage capacitor is connected to one end of the first pulse holding time adjustment resistor and the impedance matching resistor respectively, the other end of the impedance matching resistor is connected to one end of the rise time adjustment inductor, the other end of the rise time adjustment inductor is connected to one end of the second pulse holding time adjustment resistor, and the other end of the second pulse holding time adjustment resistor is grounded.

13. The system of claim 8, wherein: The combined wave model building module is used to: The step voltage source is described by the piecewise linear source in the SPICE simulation tool, and the voltage value of the step voltage source is set according to the test level; One end of the step voltage source is grounded, and the other end is connected to one end of the energy storage capacitor in the original surge combination wave generator circuit model, and the pulse tolerance capability of the transient suppression device is evaluated.

14. The system of claim 13, wherein: The original surge combination wave generator circuit model includes: The other end of the energy storage capacitor is connected to one end of the rise time adjustment inductor, and the other end of the rise time adjustment inductor is connected to one end of the pulse holding time adjustment resistor and the impedance matching resistor respectively; The other end of the pulse holding time adjustment resistor is grounded; Cs is connected in parallel with the pulse holding time adjustment resistor.

15. A standard anti-interference test method for a converter valve monitoring unit, characterized in that: include: The pre-built equivalent circuit model of the electrostatic gun is used to simulate the direct discharge of the electrostatic gun and test the pulse suppression performance of the MOV device. The pre-built equivalent circuit model of electrical fast pulse group is used to simulate the signal source generator in EFT test, and the pulse tolerance capability of transient suppression device is simulated and analyzed; The pre-built surge combination wave generator circuit model is used to simulate the open circuit voltage waveform and short circuit current waveform during the surge immunity test, and the surge pulse suppression capability of the GDT gas discharge tube is simulated and analyzed; Among them, the pre-constructed equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group, and the surge combination wave generator circuit model are constructed using an equivalent modeling method for an impulse voltage disturbance source in an immunity test as described in any one of claims 1 to 7.

16. The method according to claim 15, characterized in that Also includes: The pre-built equivalent circuit model of the electrostatic gun and the electrical fast transient pulse disturbance model are used to simulate electrostatic discharge and electrical fast transient pulse disturbance, and test the pulse suppression performance of the TVS device.

17. A standard anti-interference test system for a converter valve monitoring unit, characterized in that: include: The pulse test module is used to simulate the direct discharge of the electrostatic gun using the pre-built equivalent circuit model of the electrostatic gun to test the pulse suppression performance of the MOV device; The electrical fast pulse group test module is used to simulate the signal source generator during the EFT test using the pre-built equivalent circuit model of the electrical fast pulse group, and simulate and analyze the protection effect of the MOV device on the electrical fast transient pulse group; The surge pulse test module is used to simulate the open-circuit voltage waveform and short-circuit current waveform during the surge immunity test using a pre-built surge combination wave generator circuit model, and simulate and analyze the ability of the GDT gas discharge tube to suppress surge pulses; Among them, the pre-constructed equivalent circuit model of the electrostatic gun, the equivalent circuit model of the electric fast pulse group, and the surge combination wave generator circuit model are constructed using an equivalent modeling method for an impulse voltage disturbance source in an immunity test as described in any one of claims 1 to 7.

18. The system of claim 17, wherein: Also includes: The TVS device test module is used to: use the pre-built equivalent circuit model of the electrostatic gun and the electrical fast transient pulse disturbance model to simulate electrostatic discharge and electrical fast transient pulse disturbance to test the pulse suppression performance of the TVS device.

19. An electronic device, characterized in that: include: at least one processor and memory; The memory and the processor are connected via a bus; The memory is used to store one or more programs; When the one or more programs are executed by the at least one processor, an equivalent modeling method for an impulse voltage disturbance source in an immunity test as described in any one of claims 1 to 7 and a standard immunity test method for a converter valve monitoring unit as described in any one of claims 15-16 are implemented.

20. A readable storage medium, characterized in that: An execution program is stored thereon, and when the execution program is executed, an equivalent modeling method for an impulse voltage disturbance source in an immunity test as described in any one of claims 1 to 7 and a standard immunity test method for a converter valve monitoring unit as described in any one of claims 15-16 are implemented.

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