Single-capacitor temperature sensor based on duty ratio modulation of BJT (Bipolar Junction Transistor)

Abstract

The invention discloses a single-capacitor temperature sensor based on duty ratio modulation of a BJT (Bipolar Junction Transistor), and belongs to the field of integrated circuits. The temperature sensor circuit respectively charges a capacitor with a positive temperature coefficient voltage and a negative temperature coefficient voltage in a cycle, two charging time periods are calculated, the time for charging the capacitor to the positive temperature coefficient voltage is divided by the sum of the two time periods, and the ratio is in direct proportion to the temperature, that is, the temperature is converted into a duty ratio to be output. Compared with a high-precision ADC quantization method, the power consumption and the circuit complexity can be greatly reduced. Besides, the circuit adopts a single-capacitor design, that is, two sections of charging processes are performed on the same capacitor, the sum (namely, cycle time) of the two sections of time can be irrelevant to the temperature only by designing a proper proportion of two sections of charging current, and the capacitor generally occupies most area of the whole chip, so that compared with a double-capacitor design, the area is greatly saved, and the cost is reduced. And errors caused by capacitor mismatch can be avoided.

Description

Technical Field

[0001] The invention relates to a single capacitor temperature sensor based on BJT duty cycle modulation, belonging to the field of integrated circuits. Background Art

[0002] In the design of CMOS temperature sensors, commonly used temperature sensing devices include bipolar junction transistors (BJTs), MOSFETs, and thermistors. Compared with MOSFETs and thermistors, bipolar junction transistors (BJTs) have current amplification capabilities and good linear characteristics, as well as good stability and high precision. They are widely used in the design of CMOS process temperature sensors. The base-emitter voltage (V BE ) generates a negative temperature coefficient voltage by using the base-emitter voltage difference (ΔV BE ), produces a positive temperature coefficient quantity that is proportional to the temperature. By quantifying the positive temperature coefficient voltage (or current) and the negative temperature coefficient voltage (or current), the temperature can be obtained.

[0003] For the voltage or current with temperature characteristics, a high-precision ADC can usually be designed to convert the analog quantity into a digital quantity, such as Σ-Δ ADC. Although the conversion accuracy is high, the power consumption is large and the circuit is complex. Therefore, the design of temperature sensor without ADC is also very attractive due to its advantages such as low cost and low power consumption. The usual design schemes are: duty cycle modulated temperature sensor output, the principle of which is to convert the temperature signal into a PWM signal, and realize digital measurement and control of temperature by modulating the duty cycle of the PWM signal; or use the voltage-frequency conversion scheme to convert the voltage that changes with temperature into frequency information, and realize the measurement of temperature by measuring the frequency; both methods convert the analog signal into the time domain for calculation. Compared with the voltage-frequency conversion scheme, the circuit design of the temperature sensor based on duty cycle modulation is simple, the anti-interference ability is strong, and it has the advantages of high accuracy, resolution and low power consumption.

[0004] In temperature sensors based on duty cycle modulation design, op amps and bipolar transistors are usually used to generate positive / negative temperature signals, capacitors and comparators are used to convert voltage or current into time domain signals, and the circuit is logically controlled through the comparator output to convert positive temperature coefficient voltage (or current) and negative temperature coefficient voltage (or current) into high and low level time of PWM wave. Usually, the area of ​​op amps and capacitors occupies the main area of ​​the entire design. Zhu et al. proposed a high-precision temperature sensor based on time-mode duty-cycle modulation in “Highaccuracy time-mode duty-cycle-modulation-based temperature sensor for energyefficient system applications”. Although it has high accuracy, the circuit adopts a dual-capacitor structure, and the capacitor occupies a large area. Wang et al. proposed a temperature sensor in “An accurate BJT-based CMOS temperature sensor with duty-cycle-modulated output”. Although it only uses one capacitor in structure, it uses two op amps to obtain PTAT and CTAT currents respectively, which also brings about large power consumption and area overhead. Although the sensor structure proposed by Huang et al. in “ABJT-based CMOS temperature sensor with duty-cycle-modulated output and±0.5℃(3σ)inaccuracy from-40℃to 125℃” adopts capacitor reuse, it still needs to use an op amp in addition to the comparator, which also causes large power consumption. Therefore, there is still room for optimization in terms of area and power consumption. Under the premise of not affecting accuracy, how to design the circuit to use fewer op amps and capacitors is the key to saving area and reducing costs. Summary of the invention

[0005] The present invention focuses on the design of a low-area temperature sensor without ADC, and provides a single-capacitor temperature sensor with duty cycle modulation based on BJT, which reuses capacitors as much as possible without affecting accuracy to save area.

[0006] The technical solution adopted by the present invention is as follows:

[0007] A single capacitor temperature sensor with duty cycle modulation based on BJT, the temperature sensor circuit comprises a first PNP bipolar junction transistor Q1, a second PNP bipolar junction transistor Q2, a charging capacitor, a first direct current source Ib1, a second direct current source Ib2, a third direct current source I1, a fourth direct current source I2, a control switch and a comparator module, the first bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2 in the circuit are used as temperature sensing devices, the first direct current source Ib1 and the second direct current source Ib2 are used to provide bias current, the third direct current source I1 and the fourth direct current source I2 are used to provide charging current, the control switch is used to select two-stage charging modes and perform a reset operation, the comparator module is used to detect the size of the capacitor voltage, and the circuit state is controlled by its output state to obtain temperature information.

[0008] Optionally, a bipolar junction transistor is used as a temperature sensing device, which can generate voltages with positive and negative temperature coefficients respectively. The base-emitter voltage of a single BJT is negatively correlated with temperature. Let the base and collector of Q1 be grounded, and the emitter be connected to the bias current source Ib1. Then the base-emitter voltage of Q1 (V BE1 ) is a negative temperature coefficient voltage; for two bipolar junction transistors with different areas biased at the same current, the difference between their base-emitter voltages is positively correlated with temperature. The area ratio of Q2 to Q1 is n:1. The base and collector of Q2 are grounded, and the emitter is connected to the bias current source Ib2 (Ib2 = Ib1). The difference between the base-emitter voltages of Q1 and Q2 (ΔV BE ) is the positive temperature coefficient voltage.

[0009] Optionally, the first DC current source Ib1 and the second DC current source Ib2 are used to provide bias current to the first bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2 to ensure that the two transistors are biased at the same current; the third DC current source I1 and the fourth DC current source I2 respectively provide charging current in the two charging processes, and the charging time is controlled by controlling the size of the charging current, and the ratio of the two charging current sizes is adjusted to obtain a period with a zero temperature coefficient.

[0010] Optionally, the positive input terminal of the comparator is connected to the upper plate of the capacitor, and the negative input terminal of the comparator is connected to the emitter of the first bipolar junction transistor Q1, whose base-emitter voltage is V BE1 Initially, the voltage stored on the capacitor is 0; in the first stage, the voltages on the upper and lower plates of the capacitor are reset to 0, and then the current source charges the capacitor. When the voltage on the upper plate reaches V BE1 When the comparator flips, the comparator output voltage is triggered to enter the second stage, and the voltages of the upper and lower plates of the capacitor are reset to the base-emitter voltage V of the second bipolar junction transistor Q2. BE2 , when the upper plate voltage reaches VBE1 When the comparator flips, a cycle is completed, and then it returns to the first stage to repeat the process.

[0011] Optionally, the alternation of the above two stages is achieved by controlling switches. The first switch S1 and the second switch S2 control the access of the third DC current source I1 and the fourth DC current source I2, one end of which is connected to the current source and the other end of which is connected to the upper plate of the capacitor; the third switch S3 is a single-pole double-throw switch, which is used to control the voltage of the lower plate of the capacitor and the voltage of the upper plate after reset, one end of which is connected to the lower plate of the capacitor and the other end of which can be selectively connected to the ground or to the emitter of the second bipolar junction transistor Q2; the fourth switch S2N has one end connected to the second DC current source Ib2 and the other end connected to the emitter of the second bipolar junction transistor Q2, which is in an anti-phase relationship with the second switch S2; the reset switch S_rst is closed in the reset stage, and the two ends are respectively connected to the upper and lower plates of the capacitor.

[0012] Optionally, the steps when the circuit works are:

[0013] Step 1: In the initial stage, the third switch S3 is grounded, the fourth switch S2N is closed, the reset switch S_rst is closed, and the remaining switches are in an open state;

[0014] Step 2: After the circuit starts working, it first enters the first stage. The first switch S1 is closed, and the states of other switches remain unchanged. The third switch S3 is still selected to the ground state. At the same time, the reset switch S_rst is closed. It only takes 10ns to complete the reset and then the reset switch can be disconnected. The capacitor begins to accumulate charge. This state lasts until the comparator output signal flips.

[0015] Step three, when the comparator output signal flips, the circuit enters the second stage, the first switch S1 is disconnected, the second switch S2 is closed (the fourth switch S2N is disconnected accordingly), the third switch S3 is switched to the emitter of the second bipolar junction transistor Q2, the reset switch S_rst is closed, and disconnected after quickly completing the reset, and the capacitor begins to accumulate charge. This state continues until the comparator output signal flips, completing a cycle.

[0016] Optionally, the circuit first converts the temperature information into voltage information through a bipolar junction transistor, and then converts the voltage information into time domain information through a capacitor and a comparator. The output voltage of the comparator is used as the output of the analog part and given to the digital part as input. For any switch S1, S2, S3 or S_rst, the square wave signal that controls the switch has a period that is a constant that is independent of temperature, and the high level (or low level) time is a quantity that is positively correlated with the temperature, that is, the temperature is converted into the duty cycle of the square wave signal, and the temperature value is proportional to the duty cycle.

[0017] Optionally, the period of the square wave signal controlling the switch is the sum of the durations of the two charging stages. The ratio m of the charging current and the ratio n of the areas of the first PNP bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2 are determined by setting the derivative of the sum of the durations of the two charging stages with respect to temperature to 0, so that the sum of the durations of the two charging stages is a value that is independent of temperature.

[0018] Optionally, the temperature can also be obtained by quantizing only the positive temperature coefficient, but its absolute size is affected by the capacitance value, current value, etc. Quantifying it as a duty cycle can offset these effects to a certain extent, making the entire design more robust.

[0019] Optionally, in both charge and discharge stages, the same capacitor is charged and discharged, and a cycle time that is independent of temperature is obtained by adjusting the ratio of the charging current. Since there is only one capacitor and there are two charging processes in one cycle, a reset operation is required before each charging. The reset time is also included in the cycle and duty cycle calculations, but it has no effect because the reset time is usually very short, about nanoseconds, and the effective high and low level times are usually microseconds. Therefore, the error it brings can be completely ignored. In comparison, the area overhead saved by the single capacitor design is very considerable.

[0020] The beneficial effects of the present invention are:

[0021] First, it avoids the use of the traditional bandgap reference structure, that is, the structure of op amp plus BJT to generate positive / negative temperature signal, and achieves the same effect by cleverly controlling the connection relationship between capacitor and BJT, thereby reducing the area and power consumption to a certain extent; in addition, the design of capacitor reuse is adopted. Since the capacitor usually occupies the largest area in the entire temperature sensor, the single capacitor design can significantly reduce the area, and can also avoid the capacitor matching problem of dual capacitors, further reducing the error caused by mismatch. In terms of accuracy, the present invention has similar PWM output to other duty cycle modulated temperature sensors, the period is the number of zero temperature coefficients, the high level time is the number of positive temperature coefficients, and the value of the output duty cycle is independent of the absolute value of the capacitance and current. Under the condition of the determined proportional coefficient, part of the output error is the error caused by the BJT itself, and the other part is the error caused by the current mirror mismatch. Both of these parts of the error belong to fixed errors. The present invention does not introduce additional error sources, so it reduces the area and power consumption without reducing the accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 It is a schematic diagram of the temperature sensor circuit designed by the present invention;

[0024] Figure 2 It is a timing diagram when the present invention is working;

[0025] Figure 3 It is a schematic diagram of the digital-analog interface of the present invention. DETAILED DESCRIPTION

[0026] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0027] Embodiment 1

[0028] This embodiment provides a single capacitor temperature sensor based on BJT duty cycle modulation. The temperature sensor circuit is as follows: Figure 1 As shown, the temperature sensor circuit includes a first PNP bipolar junction transistor Q1, a second PNP bipolar junction transistor Q2, a charging capacitor, a first DC current source Ib1, a second DC current source Ib2, a third DC current source I1, a fourth DC current source I2, a control switch and a comparator module. The first bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2 in the circuit are used as temperature sensing devices, the first DC current source Ib1 and the second DC current source Ib2 are used to provide bias current, the third DC current source I1 and the fourth DC current source I2 are used to provide and charging current, the control switch is used to select two charging modes and perform a reset operation, and the comparator module is used to detect the size of the capacitor voltage, and its output state controls the circuit state to obtain temperature information.

[0029] Bipolar junction transistors are used as temperature sensing devices and can generate voltages with positive and negative temperature coefficients, respectively. The base-emitter voltage of a single BJT is negatively correlated with temperature. The base and collector of Q1 are grounded, and the emitter is connected to the bias current source I b1 , then the base-emitter voltage of Q1 (V BE1 ) is a negative temperature coefficient voltage. When V BE1 ≈750mV, T=300K,

[0030]

[0031] Two bipolar junction transistors with different areas biased at the same current have a base-emitter voltage difference that is positively correlated with temperature. The area ratio of Q2 to Q1 is n:1. The base and collector of Q2 are grounded, and the emitter is connected to the second DC current source I b2 (I b2 =I b1 ), then the base-emitter voltage difference between Q1 and Q2 (ΔV BE ) is a positive temperature coefficient voltage, and the partial derivative with respect to temperature is:

[0032]

[0033] The first DC current source Ib1 and the second DC current source Ib2 are used to provide bias current to the first PNP bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2 to ensure that the two transistors are biased at the same current; the third DC current source I1 and the fourth DC current source I2 respectively provide charging current in the two charging processes, and the charging time is controlled by controlling the size of the charging current, and the period of zero temperature coefficient is obtained by adjusting the ratio of the two charging current sizes.

[0034] The comparator input waveform and comparator output voltage waveform are as follows: Figure 2 As shown, the positive input terminal of the comparator is connected to the upper plate of the capacitor, and the negative input terminal of the comparator is connected to the emitter of the first bipolar junction transistor Q1, whose base-emitter voltage is V BE1 Initially, the voltage stored on the capacitor is 0; in the first stage, the voltages on the upper and lower plates of the capacitor are reset to 0, and then the current source charges the capacitor. When the voltage on the upper plate reaches V BE1 When the comparator flips, the comparator output voltage is triggered to enter the second stage, and the voltages of the upper and lower plates of the capacitor are reset to the base-emitter voltage V of the second bipolar junction transistor Q2. BE2 , when the upper plate voltage reaches V BE1 When the comparator flips, a cycle is completed, and then it returns to the first stage to repeat the process.

[0035] For the first stage, the capacitor top plate voltage rises from 0 to V BE1 When , the comparator flips, and the charging current in this stage is I1, so the duration of this stage is:

[0036]

[0037] For the second stage, the capacitor upper plate voltage changes from V BE2 Rising to V BE1 When , the comparator flips, and the charging current in this stage is I2, so the duration of this stage is:

[0038]

[0039] Therefore, t1 is a quantity inversely proportional to temperature, and t2 is a quantity directly proportional to temperature. Let I1 = m*I2, then:

[0040]

[0041]

[0042] Therefore, by setting reasonable values ​​of m and n, the derivative of t1+t2 with respect to temperature can be made 0, that is:

[0043] mlnn≈17.2

[0044] Then t1+t2 is a value that is independent of temperature, which is similar to the design of the bandgap reference source. Taking this time as the period, t2 as the high level time, and t1 as the low level time, t2 / (t1+t2) is the duty cycle of the PWM wave, and it is a quantity that is proportional to the temperature.

[0045] The temperature can also be obtained by quantifying only t1, but its absolute size is affected by the capacitance value, current value, etc. Quantifying it as duty cycle can offset these effects to a certain extent, making the entire design more robust.

[0046] Embodiment 2

[0047] This embodiment provides a method for implementing a single capacitor temperature sensor based on BJT duty cycle modulation, and the circuit controls the switch to achieve the alternation of the above two stages. Figure 1 As shown, the first switch S1 and the second switch S2 control the access of two charging current sources, one end of which is connected to the current source and the other end of which is connected to the upper plate of the capacitor; the third switch S3 is a single-pole double-throw switch, which is used to control the voltage of the lower plate of the capacitor and the voltage of the upper plate after reset, one end of which is connected to the lower plate of the capacitor and the other end of which can be selectively connected to the ground or to the emitter of the bipolar junction transistor Q2; the fourth switch S2N has one end connected to the second DC current source Ib2 and the other end connected to the emitter of the second bipolar junction transistor Q2, and it is in an anti-phase relationship with the second switch S2; the reset switch S_rst is closed in the reset stage, and the two ends are respectively connected to the upper and lower plates of the capacitor.

[0048] The specific steps of the circuit operation are:

[0049] Step 1: In the initial stage, the third switch S3 is grounded, the fourth switch S2N is closed, the reset switch S_rst is closed, and the remaining switches are in an open state;

[0050] Step 2: After the circuit starts working, it first enters the first stage. The first switch S1 is closed, and the states of other switches remain unchanged. The third switch S3 still remains in the state of selecting the ground. At the same time, the reset switch S_rst is closed. It only takes a short time to complete the reset and then disconnect the reset switch. The capacitor begins to accumulate charge. This state lasts until the comparator output signal flips.

[0051] Step three, when the comparator output signal flips, the circuit enters the second stage, the first switch S1 is disconnected, the second switch S2 is closed (the fourth switch S2N is disconnected accordingly), the third switch S3 is switched to the emitter of the second bipolar junction transistor Q2, the reset switch S_rst is closed, and disconnected after quickly completing the reset, and the capacitor begins to accumulate charge. This state continues until the comparator output signal flips, completing a cycle.

[0052] The control signal timing of each switch is as follows Figure 2 As shown, the switch is closed when the voltage is high and is open when the voltage is low.

[0053] The above control logic can be realized by using digital circuits, so the entire temperature sensor is a mixed digital-analog module. The specific digital-analog interface is as follows: Figure 3 The comparator output voltage is used as the analog part output and given to the digital part as input. The state machine in the digital circuit uses this as a trigger signal and outputs the four control signals DA_S1, DA_S2, DA_S3, and DA_S_rst as the analog part input.

[0054] In the initial stage, DA_S1, DA_S2, and DA_S3 are all 0 (S2N, which is the inverse of S2, is 1), and DA_S_rst is 1; after receiving the enable signal, the value of DA_S1 is pulled up, the value of DA_S_rst is pulled down, and the rest remain unchanged; when receiving the change of the comparator output, that is, the rising edge of the comparator output voltage, DA_S1 is pulled down, DA_S3 is pulled up, and DA_S_rst is pulled up, and it continues until the capacitor reset is stable, DA_S_rst is pulled down, and DA_S2 is pulled up; when the next comparator output rising edge arrives, DA_S2 is pulled down, DA_S3 is pulled up, and DA_S_rst is pulled up, and it also continues until the capacitor reset is stable, and DA_S1 is pulled up. The above process is one cycle.

[0055] from Figure 3 It can be seen that the PWM waves of the DA_S1, DA_S2, and DA_S3 cycles remember the high and low level time of the DA_S3 signal through the digital counter, and calculate its duty cycle, which is t1 / (t1+t2) described in Example 1, and is proportional to the temperature. Therefore, the temperature can be obtained based on this value.

[0056] In both charge and discharge stages, the same capacitor is charged and discharged, and a cycle time that is independent of temperature is obtained by adjusting the ratio of the charging current. Since there is only one capacitor and there are two charging processes in one cycle, a reset operation is required before each charging. The reset time is also included in the cycle and duty cycle calculations, but it has no effect because the reset time is usually very short, about nanoseconds, and the effective high and low level times are usually microseconds. Therefore, the error it brings can be completely ignored. In comparison, the area overhead saved by the single capacitor design is very considerable.

[0057] Some steps in the embodiments of the present invention may be implemented using software, and the corresponding software program may be stored in a readable storage medium, such as a CD or a hard disk.

[0058] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A single capacitor temperature sensor based on duty cycle modulation of BJT, characterized in that: The temperature sensor comprises a first PNP bipolar junction transistor Q1, a second PNP bipolar junction transistor Q2, a charging capacitor, a first DC current source Ib1, a second DC current source Ib2, a third DC current source I1, a fourth DC current source I2, a control switch and a comparator module; The first bipolar junction transistor Q1 and the second bipolar junction transistor Q2 are used as temperature sensing devices, the first DC current source Ib1 and the second DC current source Ib2 are used to provide bias current, the third DC current source I1 and the fourth DC current source I2 are used to provide charging current, the control switch is used to select two charging modes and perform a reset operation, the comparator module is used to detect the size of the capacitor voltage, and the temperature information is obtained by controlling the output state of the comparator module to control the circuit state.

2. The sensor according to claim 1, characterized in that The base and collector of the first bipolar junction transistor Q1 are grounded, and the emitter is connected to the third DC current source Ib1; the base and collector of the second bipolar junction transistor Q2 are grounded, and the emitter is connected to the fourth DC current source Ib2; the area ratio of the first bipolar junction transistor Q1 to the second bipolar junction transistor Q2 is 1:n; the third DC current source Ib1 is equal to the fourth DC current source Ib2.

3. The sensor according to claim 2, characterized in that The third DC current source Ib1 and the fourth DC current source Ib2 are used to provide bias current to the first bipolar junction transistor Q1 and the second bipolar junction transistor Q2 to ensure that the two transistors are biased at the same current; the third DC current source I1 and the fourth DC current source I2 provide charging current in the two charging processes respectively.

4. The sensor according to claim 3, characterized in that The positive input terminal of the comparator is connected to the upper plate of the capacitor, and is also connected to the third DC current source I1 and the fourth DC current source I2 through the first switch S1 and the second switch S2 respectively. The negative input terminal of the comparator is connected to the emitter of the first bipolar junction transistor Q1, and the voltage is V BE1 ; Initially, the voltage stored on the capacitor is 0; in the first stage, the voltages on the upper and lower plates of the capacitor are reset to 0, and then the current source charges the capacitor. When the voltage on the upper plate reaches V BE1 When the comparator flips, the comparator output voltage is triggered to enter the second stage, and the voltages on the upper and lower plates of the capacitor are reset to the base-emitter voltage V of the bipolar junction transistor Q2. BE2 , when the upper plate voltage reaches V BE1 When the comparator flips, a cycle is completed, and then it returns to the first stage to repeat the process.

5. The sensor according to claim 4, characterized in that The control switch includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S2N and a reset switch S_rst; the first switch S1 and the second switch S2 control the access of two charging current sources, one end of which is connected to the third DC current source I1 and the fourth DC current source I2, and the other end is connected to the upper plate of the capacitor; the third switch S3 is a single-pole double-throw switch, which is used to control the voltage of the lower plate of the capacitor and the voltage of the upper plate after reset, one end of which is connected to the lower plate of the capacitor, and the other end can be selectively connected to the ground or to the emitter of the second bipolar junction transistor Q2; one end of the fourth switch S2N is connected to the second DC current source Ib2, and the other end is connected to the emitter of the bipolar junction transistor Q2, which is in an anti-phase relationship with the second switch S2; the reset switch S_rst is closed in the reset stage, and the two ends are respectively connected to the upper and lower plates of the capacitor.

6. The sensor according to claim 5, characterized in that The working process of the sensor includes: Step 1: In the initial stage, the third switch S3 is grounded, the fourth switch S2N is closed, the reset switch S_rst is closed, and the remaining switches are in an open state; Step 2: After the circuit starts working, it first enters the first stage. The first switch S1 is closed, and the states of other switches remain unchanged. The third switch S3 is still selected to the ground state. At the same time, the reset switch S_rst is closed. It only takes 10ns to complete the reset and then the reset switch can be disconnected. The capacitor begins to accumulate charge. This state lasts until the comparator output signal flips. Step three, when the comparator output signal flips, the circuit enters the second stage, the first switch S1 is disconnected, the second switch S2 is closed, the fourth switch S2N is disconnected accordingly, the third switch S3 is switched to the emitter of the second bipolar junction transistor Q2, the reset switch S_rst is closed, and disconnected after the reset is completed, the capacitor begins to accumulate charge, and this state continues until the comparator output signal flips, completing a cycle.

7. The sensor according to claim 6, characterized in that The two charging and discharging stages are both performed on the same capacitor.

8. The sensor according to claim 7, characterized in that In the first stage, the voltage on the capacitor plate rises from 0 to V BE1 The duration is: Where C is the capacitance value, V BE1 is the base-emitter voltage of the first bipolar junction transistor Q1, I1 is the charging current in the first stage; In the second stage, the capacitor upper plate voltage changes from V BE2 Rising to V BE1 The duration is: Where C is the capacitance value, V BE2 is the base-emitter voltage of the second bipolar junction transistor Q2, I2 is the charging current of the second stage; The sum of the time used in the two stages t1+t2 is: Among them, m is the ratio of I1 and I2, I1=m*I2.

9. The sensor according to claim 8, characterized in that The values ​​of m and n are determined by making the derivative of t1+t2 with respect to temperature equal to 0, that is: With t1+t2 as the period, t2 as the high level time, t1 as the low level time, t2 / (t1+t2) is the duty cycle of the PWM wave.

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