Band-gap reference circuit and chip
By designing a bandgap reference reference circuit, using a reference voltage module and a reference current module, combined with a adjustment module, the problem of the chip requiring an additional circuit to generate a zero temperature coefficient reference current is solved, and the effect of obtaining a zero temperature coefficient voltage and current is achieved at the same time, reducing the power consumption and cost of the chip.
Patent Information
- Application Number
- CN202411853213.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-03-11
AI Technical Summary
In the prior art, the chip requires additional circuitry during use to generate a reference current of zero temperature coefficient, resulting in increased power consumption and cost.
A bandgap reference reference circuit is designed. Through the reference voltage module and the reference current module, combined with the adjustment module, the reference voltage and reference current can be generated simultaneously with zero temperature coefficient without additional circuitry.
This enables the chip to obtain a reference voltage and current with zero temperature coefficient at the same time, reducing the power consumption and cost of the chip.
Smart Images
Figure CN119597100A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of integrated circuit design, and in particular to a bandgap reference circuit and a chip. Background Art
[0002] The bandgap reference circuit can provide a reference voltage that is independent of temperature, process and voltage. The reference voltage can be used in circuits such as temperature detection, data conversion, and operational amplifiers.
[0003] In the prior art, the zero temperature coefficient reference voltage is obtained by superimposing the positive temperature coefficient voltage and the negative temperature coefficient voltage in a reasonable ratio. The positive temperature coefficient voltage is usually obtained by amplifying ΔVBE by a certain multiple, and the negative temperature coefficient voltage is usually obtained by using the VBE voltage. The zero temperature coefficient reference voltage can be obtained by combining the positive temperature coefficient voltage and the negative temperature coefficient voltage.
[0004] As the demand deepens, the chip needs not only a zero temperature coefficient reference voltage, but also a zero temperature coefficient reference current during use to ensure that the chip operating current does not change with temperature. However, in the prior art, an additional circuit is usually required to generate a zero temperature coefficient reference current, which increases the power consumption and cost of the chip. Summary of the invention
[0005] The present invention provides a bandgap reference circuit and a chip. The bandgap reference circuit can generate a zero temperature coefficient reference voltage and a zero temperature coefficient reference current simultaneously, and does not require an additional circuit to generate the zero temperature coefficient reference current, thereby reducing the power consumption and cost of the chip.
[0006] In order to achieve the above object, the present invention adopts the following technical scheme: In a first aspect, the present invention provides a bandgap reference circuit, the bandgap reference circuit comprising: a reference voltage module, a reference current module and an adjustment module; A regulating module, the input end of which is connected to the power supply voltage, the output end of which is respectively connected to the input end of the reference voltage module and the input end of the reference current module, the regulating end of which is connected to the comparison end of the reference voltage module, and the regulating module is used to adjust the voltages of the two comparison ends of the reference voltage module to be equal; A reference voltage module, whose output end is connected to the reference current module and is used to output a zero temperature coefficient reference voltage; The reference current module is used to output a zero temperature coefficient reference current according to a zero temperature coefficient reference voltage.
[0007] In a possible implementation, the reference voltage module includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, and a second transistor; The base of the first triode is connected to the base of the second triode, and is used to output a zero temperature coefficient reference voltage; The emitter of the first triode is connected to one end of the first resistor and one end of the second resistor, the collector of the first triode is connected to one end of the third resistor and the first adjustment end of the adjustment module, and the collector of the first triode is used to output a first comparison voltage; The emitter of the second triode is connected to the other end of the first resistor, the collector of the second triode is connected to one end of the fourth resistor and the second adjustment end of the adjustment module, and the collector of the second triode is used to output a second comparison voltage; The other end of the second resistor is grounded; The other end of the third resistor and the other end of the fourth resistor are connected to the output end of the regulating module.
[0008] In a possible implementation, the first transistor and the second transistor are both NPN transistors.
[0009] In a possible implementation, the reference current module includes: a current mirror unit and a load unit; One end of the load unit is connected to the output end of the reference voltage module, and the other end is grounded, and is used to generate a zero temperature coefficient reference current according to a zero temperature coefficient reference voltage; The input end of the current mirror unit is connected to the output end of the regulation module, one end of the current mirror unit is connected to one end of the load unit, and the other end is the output end. The current mirror unit is used to mirror and output a zero temperature coefficient reference current.
[0010] In a possible implementation, the load unit includes a fifth resistor; The fifth resistor is a zero temperature coefficient resistor.
[0011] In a possible implementation, the current mirror unit includes a first MOS transistor and a second MOS transistor; The gate of the first MOS tube is connected to the gate of the second MOS tube and the drain of the first MOS tube, and the drain of the first MOS tube is connected to the output end of the reference voltage module and one end of the load unit; The drain of the second MOS tube is used to output a zero temperature coefficient reference current; The source of the first MOS tube and the source of the second MOS tube are connected to the output end of the regulating module.
[0012] In a possible implementation manner, the first MOS transistor and the second MOS transistor are both PMOS transistors.
[0013] In a possible implementation, the regulating module includes: an operational amplifier unit and a third MOS tube; The source of the third MOS tube is connected to the power supply voltage, the drain is respectively connected to the other end of the third resistor, the other end of the fourth resistor, and the input end of the reference current module, and the gate is connected to the output end of the operational amplifier unit; The non-inverting input terminal of the operational amplifier unit is connected to the collector of the second transistor, and the inverting input terminal is connected to the collector of the first transistor. The operational amplifier unit is used to adjust the gate voltage of the third MOS tube according to the first comparison voltage and the second comparison voltage until the first comparison voltage and the second comparison voltage are equal.
[0014] In a possible implementation manner, the third MOS tube is a PMOS tube.
[0015] In a second aspect, the present invention provides a chip, which may include the bandgap reference circuit of the first aspect and any possible implementation thereof.
[0016] In a third aspect, the present invention provides a control method for a bandgap reference circuit, which is applied to the bandgap reference circuit of the first aspect and any possible implementation thereof, and the control method comprises: The regulating module regulates the voltages of the two comparison terminals of the reference voltage module to be equal; The reference voltage module outputs a zero temperature coefficient reference voltage; The reference current module outputs a zero temperature coefficient reference current according to a zero temperature coefficient reference voltage.
[0017] In the bandgap reference circuit provided by the present invention, the regulating module adjusts the voltages of the two comparison terminals of the reference voltage module to be equal, so that the reference voltage module can output a zero temperature coefficient reference voltage, thereby enabling the reference current module to generate a zero temperature coefficient reference current according to the zero temperature coefficient reference voltage. In this way, the voltage and current with a zero temperature coefficient can be obtained simultaneously without adding an additional reference current generating circuit, thereby reducing the cost and power consumption of the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 A circuit principle block diagram of a bandgap reference circuit provided by an embodiment of the present invention; Figure 2 A circuit schematic diagram of a bandgap reference circuit provided by an embodiment of the present invention; Figure 3 A circuit schematic diagram of another bandgap reference circuit provided by an embodiment of the present invention; Figure 4 A circuit schematic diagram of another bandgap reference circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0020] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "multiple" means two or more. In addition, the use of "based on" or "according to" means openness and inclusiveness, because the process, steps, calculations or other actions "based on" or "according to" one or more of the conditions or values may be based on additional conditions or values beyond the described values in practice.
[0021] In order to solve the problem of increasing the power consumption and cost of the chip by generating a zero temperature coefficient current through an additional circuit, an embodiment of the present invention provides a bandgap reference circuit, which can simultaneously generate a zero temperature coefficient reference voltage and a zero temperature coefficient reference current without the need for an additional circuit to generate a zero temperature coefficient reference current, thereby reducing the power consumption and cost of the chip.
[0022] Figure 1 A circuit principle block diagram of a bandgap reference circuit provided by an embodiment of the present invention. Figure 1 As shown, the bandgap reference circuit may include: a reference voltage module 11 , a reference current module 12 and an adjustment module 13 .
[0023] Among them, the regulating module 13 has an input end connected to the power supply voltage VDD, an output end connected to the input end of the reference voltage module 11 and the input end of the reference current module 12 respectively, and the regulating end is connected to the comparison end of the reference voltage module 11. The regulating module 13 is used to adjust the voltages of the two comparison ends of the reference voltage module 11 to be equal. The reference voltage module 11 has an output end connected to the reference current module 12, and is used to output a zero temperature coefficient reference voltage VBG. The reference current module 12 is used to output a zero temperature coefficient reference current IB according to the zero temperature coefficient reference voltage VBG.
[0024] In this way, it is possible to simultaneously obtain voltage and current with a zero temperature coefficient without adding an additional reference current generating circuit, thereby reducing the cost and power consumption of the chip.
[0025] Optional, Figure 2 A circuit schematic diagram of a bandgap reference circuit provided by an embodiment of the present invention. Figure 2 As shown, the reference voltage module 11 may include: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1 and a second transistor Q2.
[0026] The base of the first transistor Q1 is connected to the base of the second transistor Q2, and the base is used to output a zero temperature coefficient reference voltage.
[0027] The emitter of the first transistor Q1 is connected to one end of the first resistor R1 and one end of the second resistor R2, the collector of the first transistor Q1 is connected to one end of the third resistor R3 and the first adjustment end of the adjustment module 13, and the collector of the first transistor Q1 is used to output the first comparison voltage.
[0028] The emitter of the second transistor Q2 is connected to the other end of the first resistor R1 , the collector of the second transistor Q2 is connected to one end of the fourth resistor R4 and the second adjustment end of the adjustment module 13 , and the collector of the second transistor Q2 is used to output the second comparison voltage.
[0029] The other end of the second resistor R2 is grounded.
[0030] The other end of the third resistor R3 and the other end of the fourth resistor R3 are connected to the output end of the regulating module 13 .
[0031] In a possible implementation, the first transistor Q1 and the second transistor Q2 are both NPN transistors.
[0032] It is understandable that the first transistor Q1 and the second transistor Q2 may also be other components capable of outputting a zero temperature coefficient reference voltage, such as MOS transistors. The embodiment of the present invention is described here by taking two NPN transistors as an example.
[0033] Optional, Figure 3 A circuit schematic diagram of another bandgap reference circuit provided by an embodiment of the present invention. Figure 2 ,like Figure 3 As shown, the reference current module 12 may include: a current mirror unit 121 and a load unit 122 .
[0034] One end of the load unit 122 is connected to the output end of the reference voltage module 11 , and the other end is grounded. The load unit 122 is used to generate a zero temperature coefficient reference current according to a zero temperature coefficient reference voltage.
[0035] The input end of the current mirror unit 121 is connected to the output end of the regulating module 13 , one end of the current mirror unit 121 is connected to one end of the load unit 122 , and the other end is the output end. The current mirror unit 121 is used to mirror and output a zero temperature coefficient reference current.
[0036] Optional, Figure 4 A circuit schematic diagram of another bandgap reference circuit provided by an embodiment of the present invention. Figure 3 ,like Figure 4 As shown, the current mirror unit 121 may include a first MOS transistor PM1 and a second MOS transistor PM2.
[0037] The gate of the first MOS transistor PM1 is connected to the gate of the second MOS transistor PM2 and the drain of the first MOS transistor PM1, and the drain of the first MOS transistor PM1 is connected to the output end of the reference voltage module 11 and one end of the load unit 122. It can be understood that after the gate and drain of the first MOS transistor PM1 are connected, it is equivalent to a diode.
[0038] The drain of the second MOS transistor PM2 is used to output a zero temperature coefficient reference current. The drain of the second MOS transistor PM2 can be connected to a circuit module in a lower-level circuit that needs to use a zero temperature coefficient reference current.
[0039] The source of the first MOS transistor PM1 and the source of the second MOS transistor PM2 are connected to the output end of the regulating module 13 .
[0040] In a possible implementation, the first MOS transistor and the second MOS transistor may both be PMOS transistors, or may be other modules that can implement mirroring and output a zero temperature coefficient reference current, which is not limited here. Figure 4 In the figure, it is taken as an example that the first MOS tube and the second MOS tube are both PMOS tubes.
[0041] Optional, such as Figure 4 As shown, the load unit 122 may include a fifth resistor R5.
[0042] The fifth resistor R5 is a zero temperature coefficient resistor.
[0043] In this way, by using the adjustment module, the zero temperature coefficient reference voltage VBG can pass through R5 to obtain a zero temperature coefficient reference current. Compared with the indirect method in the prior art that requires adding an additional current generating circuit and superimposing a positive temperature coefficient current and a negative temperature coefficient current to obtain a zero temperature coefficient current, the embodiment of the present invention generates a zero temperature coefficient current in a direct manner and has a simple circuit structure, so that the bandgap reference circuit of the embodiment of the present invention can not only obtain a zero temperature coefficient voltage and a zero temperature coefficient current at the same time, but also saves chip area, so that the chip cost and power consumption are very low.
[0044] It is understandable that in the embodiment of the present invention, the load unit 122 can be not only a zero temperature coefficient resistor, but also other units that can generate a zero temperature coefficient reference current according to a zero temperature coefficient reference voltage, and the embodiment of the present invention does not make any specific limitation here. Figure 4 In the figure, it is taken as an example that the load unit 122 includes a zero temperature coefficient resistor R5.
[0045] Optional, such as Figure 4 As shown, the regulating module 13 may include: an operational amplifier unit and a third MOS transistor PM3.
[0046] Among them, the source of the third MOS transistor PM3 is connected to the power supply voltage, the drain is respectively connected to the other end of the third resistor R3, the other end of the fourth resistor R4, and the input end of the reference current module (that is, the source of PM1 and PM2), and the gate is connected to the output end of the operational amplifier unit.
[0047] The non-inverting input terminal of the operational amplifier unit is connected to the collector of the second transistor Q2, and the inverting input terminal is connected to the collector of the first transistor Q1. The operational amplifier unit is used to adjust the gate voltage of the third MOS transistor PM3 according to the first comparison voltage and the second comparison voltage until the first comparison voltage and the second comparison voltage are equal.
[0048] It can be understood that, in the embodiment of the present invention, the third MOS tube can be a PMOS tube, and of course, can also be an NMOS tube. Figure 4 In the example, the third MOS tube is a PMOS tube. The embodiment of the present invention does not specifically limit the implementation method of the third MOS tube.
[0049] refer to Figure 4 , the circuit principle of the bandgap reference circuit is: After the power supply voltage VDD is powered on, the gate voltage of PM1 is less than the source voltage, PM1 is turned on, and VDD supplies power to the reference voltage module and the reference current module. In the reference voltage module, the collector voltage VN of Q1 and the collector voltage VP of Q2 are input to the operational amplifier unit, which compares and amplifies VP and VN and outputs an adjustment signal. According to the adjustment signal, the gate voltage of PM1 is adjusted until VP and VN are equal, and the current IQ1 flowing through Q1 and the current IQ2 flowing through Q2 are equal. At this time, the loop is stable, according to Figure 4 The circuit in can be obtained as follows.
[0050] (1) (2) in, is the voltage across R1, and the current flowing through R1 is the current flowing through Q2. VT is the thermal voltage coefficient, and N is a constant proportional to the emitter junction area of Q1 and Q2.
[0051] According to formula (1) and formula (2), the following formula (3) can be obtained.
[0052] (3) In addition, the zero temperature coefficient reference voltage can be expressed using the following formula (4).
[0053] (4) in, is the voltage between the base and emitter of Q1.
[0054] Substituting formula (3) into formula (4), we can obtain the following formula (5).
[0055] (5) From the above formula (5), we can know that is a negative temperature coefficient voltage, It is a positive temperature coefficient voltage. By superimposing the two, we can get the zero temperature coefficient reference voltage VBG.
[0056] In a specific implementation, a zero temperature coefficient reference voltage can be obtained by setting the resistance values of R1 and R2.
[0057] After the zero temperature coefficient reference voltage VBG is obtained, the zero temperature coefficient reference current IB can be expressed by the following formula (6).
[0058] (6) Among them, the type of R5 is a zero temperature coefficient resistor, and the zero temperature coefficient reference voltage divided by the zero temperature coefficient resistor can obtain the zero temperature coefficient reference current IB. The zero temperature coefficient reference current can be output to the circuit module required by the subsequent stage through the current mirror composed of PM1 and PM2. Therefore, the bandgap reference circuit in the embodiment of the present invention obtains the zero temperature coefficient reference voltage and the zero temperature coefficient reference current at the same time in a low-cost, low-power manner.
[0059] The bandgap reference circuit in the embodiment of the present invention utilizes PM3 and PM1 in diode connection to enable the zero temperature coefficient reference voltage VBG to have overcurrent capability, so that the zero temperature coefficient reference current IB can be directly obtained through VBG and R5, saving chip area and greatly reducing chip cost and power consumption.
[0060] Furthermore, in the embodiment of the present invention, VDD1=VBG+VGS PM1 , VGSPM1 is the gate-source voltage of PM1, is a constant value, and the zero temperature coefficient reference voltage VBG is also a constant value. Therefore, when the power supply voltage VDD changes, VDD1 can remain unchanged, so that the zero temperature coefficient reference voltage VBG is less affected by different power supply voltages.
[0061] The embodiment of the present invention further provides a chip, which may include Figure 1-Figure 4 Any bandgap reference circuit in .
[0062] In a possible implementation, the chip may be a power management chip, and of course, may be other types of chips, which are not specifically limited here.
[0063] The embodiment of the present invention also provides a control method of a bandgap reference circuit, which is applied to the above Figure 1-Figure 4 Any bandgap reference circuit in the control method includes: The regulating module regulates the voltages of the two comparison terminals of the reference voltage module to be equal; The reference voltage module outputs a zero temperature coefficient reference voltage; The reference current module outputs a zero temperature coefficient reference current according to a zero temperature coefficient reference voltage.
[0064] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
Claims
1. A bandgap reference circuit, characterized in that: include: A reference voltage module, a reference current module and a regulation module; The regulating module has an input end connected to the power supply voltage, an output end connected to the input end of the reference voltage module and the input end of the reference current module respectively, and a regulating end connected to the comparison end of the reference voltage module, and the regulating module is used to adjust the voltages of the two comparison ends of the reference voltage module to be equal; The reference voltage module, whose output end is connected to the reference current module, is used to output a zero temperature coefficient reference voltage; The reference current module is used to output a zero temperature coefficient reference current according to the zero temperature coefficient reference voltage.
2. The bandgap reference circuit according to claim 1, characterized in that: The reference voltage module comprises: a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor and a second transistor; The base of the first transistor is connected to the base of the second transistor, and is used to output the zero temperature coefficient reference voltage; The emitter of the first transistor is connected to one end of the first resistor and one end of the second resistor, the collector of the first transistor is connected to one end of the third resistor and the first adjustment end of the adjustment module, and the collector of the first transistor is used to output a first comparison voltage; The emitter of the second transistor is connected to the other end of the first resistor, the collector of the second transistor is connected to one end of the fourth resistor and the second adjustment end of the adjustment module, and the collector of the second transistor is used to output a second comparison voltage; The other end of the second resistor is grounded; The other end of the third resistor and the other end of the fourth resistor are connected to the output end of the regulating module.
3. The bandgap reference circuit according to claim 2, characterized in that: The first transistor and the second transistor are both NPN transistors.
4. The bandgap reference circuit according to any one of claims 1 to 3, characterized in that: The reference current module includes: a current mirror unit and a load unit; One end of the load unit is connected to the output end of the reference voltage module, and the other end is grounded, and is used to generate the zero temperature coefficient reference current according to the zero temperature coefficient reference voltage; The input end of the current mirror unit is connected to the output end of the regulating module, one end of the current mirror unit is connected to one end of the load unit, and the other end is an output end for mirroring and outputting the zero temperature coefficient reference current.
5. The bandgap reference circuit according to claim 4, characterized in that: The load unit includes a fifth resistor; The fifth resistor is a zero temperature coefficient resistor.
6. The bandgap reference circuit according to claim 4, characterized in that: The current mirror unit includes a first MOS tube and a second MOS tube; The gate of the first MOS tube is connected to the gate of the second MOS tube and the drain of the first MOS tube, and the drain of the first MOS tube is connected to the output end of the reference voltage module and one end of the load unit; The drain of the second MOS tube is used to output the zero temperature coefficient reference current; The source of the first MOS tube and the source of the second MOS tube are connected to the output end of the regulating module.
7. The bandgap reference circuit according to claim 6, characterized in that: The first MOS tube and the second MOS tube are both PMOS tubes.
8. The bandgap reference circuit according to claim 2 or 3, characterized in that: The regulating module comprises: an operational amplifier unit and a third MOS tube; The source of the third MOS tube is connected to the power supply voltage, the drain is respectively connected to the other end of the third resistor, the other end of the fourth resistor, and the input end of the reference current module, and the gate is connected to the output end of the operational amplifier unit; The non-inverting input terminal of the operational amplifier unit is connected to the collector of the second transistor, and the inverting input terminal is connected to the collector of the first transistor. The operational amplifier unit is used to adjust the gate voltage of the third MOS tube according to the first comparison voltage and the second comparison voltage until the first comparison voltage is equal to the second comparison voltage.
9. The bandgap reference circuit according to claim 8, characterized in that: The third MOS tube is a PMOS tube.
10. A chip, characterized in that: The chip comprises the bandgap reference circuit according to any one of claims 1-9.