PEC port adding method based on network
Through fine area selection and graphics extraction, combined with signal port definition, a network-based PEC port addition method is implemented, which solves the problem of low efficiency in adding PEC ports in the prior art, improves simulation accuracy and efficiency, and reduces electromagnetic interference.
Patent Information
- Application Number
- CN202411450198.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-17
- Publication Date
- 2025-03-11
AI Technical Summary
In the electromagnetic field simulation analysis of the prior art, adding PEC ports requires manual selection of regular graphics, which is inefficient and cannot achieve fast and intelligent one-click addition.
Through fine area selection, graphics extraction and signal port definition, a network-based PEC port addition method is realized. Specific steps include determining the target stack, selecting the area, extracting the target graphics, creating a signal port and forming a PEC port with the PEC plane.
It improves the accuracy and efficiency of simulation, ensures high matching between ports and design, reduces the risk of electromagnetic interference, and realizes rapid and intelligent addition of PEC ports with one click.
Smart Images

Figure CN119598956A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of electromagnetic field simulation analysis, and more specifically, to a method for adding a PEC port based on a network. Background Art
[0002] The prior art generally adopts a solution of manually selecting regular graphics such as circles, rectangles, regular polygons, etc. on a layout to add PEC ports. Currently, the graphics display on the layout can be reduced by displaying only part of the stack.
[0003] However, it is still necessary to manually select regular graphics on the network one by one to add PEC ports, which is inefficient and cannot be added quickly and intelligently with one click.
[0004] Therefore, the present invention provides a method for adding a PEC port based on a network, which improves the above technical problems. Summary of the invention
[0005] The disclosed embodiments aim to address the deficiencies of the prior art and provide a method for adding PEC ports based on a network. The present invention effectively improves the accuracy and efficiency of simulation through fine area selection, graphic extraction and signal port definition. In the simulation of signal transmission, the port is guaranteed to have a high degree of matching with the design and the risk of electromagnetic interference is reduced. On the basis of balancing speed and ease of operation, a fast and intelligent one-click addition of PEC ports is achieved.
[0006] The above technical objectives of the present invention are achieved through the following technical solutions: A method for adding a PEC port based on a network, comprising the following steps: S1: determining a target stack; S2: Select an area on the target stack layout for subsequent extraction of PEC port construction; S3: Extract the target graphics in the selected area and create a signal port; S4: The signal port and the PEC plane constitute a PEC port.
[0007] As a preferred technical solution of the present invention, the target stack refers to a specific layer to which a PEC port needs to be added, and the target stack includes a microstrip line, a signal line and a ground layer; the target stack is determined by the dielectric constant, the conductive property and the correlation of other layers.
[0008] As a preferred technical solution of the present invention, the target graphic is usually a layout containing circuit rectangular traces and circuit circular traces, and extracting the target graphic information can help establish a signal terminal.
[0009] As a preferred technical solution of the present invention, when creating a signal port, it is necessary to determine whether the selected area overlaps or intersects with the graphics in the layout; if there is no overlap, the selected area needs to be adjusted; if there is no intersection, the selection needs to be adjusted; if the selected area does not intersect with the design layout, the selected area is inaccurate and needs to be re-selected or adjusted to ensure that the area covers all signal paths that need to be simulated.
[0010] As a preferred technical solution of the present invention, the process of extracting the target graphics in the framed area is: use a simulation tool to frame the starting and ending areas of the L1 layer microstrip line, prepare to add PEC ports at these two positions, simulate the input and output of signals, the framed area is generally a rectangle or an arbitrary polygon, covering the local area of the target microstrip line, representing the position of the PEC port, after the frame selection is completed, through the automatic detection of the simulation tool, check whether the framed area intersects with the microstrip line contour in the design layout, and through the visualization interface of the simulation tool, it can be seen whether the framed rectangular area accurately covers part of the microstrip line.
[0011] As a preferred technical solution of the present invention, when extracting graphics, regular graphics such as circles are extracted.
[0012] As a preferred technical solution of the present invention, it is determined whether regular geometric patterns exist simultaneously for the signal and the ground in the framed area.
[0013] As a preferred technical solution of the present invention, the position and shape of the signal port are defined according to the contour shape of the signal routing or structure.
[0014] As a preferred technical solution of the present invention, the framed area is used as the entire PEC plane, the PEC plane includes a ground plane and a metal shielding layer, and the electric field on the PEC plane is set to zero.
[0015] In summary, the present invention has the following beneficial effects: the construction method of the PEC port effectively improves the accuracy and efficiency of the simulation through fine area selection, graphic extraction and signal port definition. In the simulation of signal transmission, the port is guaranteed to have a high degree of matching with the design and the risk of electromagnetic interference is reduced. On the basis of balancing speed and convenience of operation, the PEC port can be added quickly and intelligently with one click. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 The present invention is an overall flow chart of adding a PEC port based on a network according to an embodiment of the present invention.
[0017] Figure 2 The flowchart of the invention is to determine the location of the PEC port based on network intelligence in an embodiment of the invention. DETAILED DESCRIPTION
[0018] The present application is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present application, but do not limit the present application in any form. It should be noted that, for those of ordinary skill in the art, several variations and improvements can also be made without departing from the concept of the present application. These all belong to the protection scope of the present application.
[0019] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0020] It should be noted that, if there is no conflict, the various features in the embodiments of the present application can be combined with each other, all within the scope of protection of the present application. In addition, although the functional module division is performed in the device schematic diagram and the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in a sequence different from the module division in the device or the flow chart. In addition, the words "first", "second", "third", etc. used herein do not limit the data and execution order, but only distinguish the same items or similar items with basically the same functions and effects.
[0021] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in this specification and in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.
[0022] In addition, the technical features involved in each embodiment of the present application described below can be combined with each other as long as they do not conflict with each other.
[0023] Please refer to Figure 1 , Figure 1 The overall flow chart of adding a PEC port based on the network according to the embodiment of the present disclosure is shown. The overall flow mainly includes the following 4 steps: S1: Determine the target stack; S2: Select an area on the target stack layout for subsequent extraction of PEC port construction; S3: Extract the target graphics in the selected area and create a signal port; S4: The signal port and the PEC plane constitute a PEC port.
[0024] Specifically, in this embodiment, it is necessary to determine the target stack. When designing a network model, the stack defines the hierarchy of the structure and the dielectric and conductive properties between the layers. The target stack refers to the specific layer to which the PEC port needs to be added. In electromagnetic simulation, the selection of the stack is very important to ensure that the target hierarchy is consistent with the design requirements. For example, in a multi-layer circuit board, the third layer is selected as the target stack because the third layer contains a specific structure from which the signal needs to be extracted; confirm the stack to which the signal port needs to be added. In a complex multi-layer circuit design, the stack may involve multiple dielectric layers, conductive layers, and other material properties. Different stacks have different electrical properties. Therefore, when determining the target stack, the hierarchical structure in the circuit must be fully understood to ensure that the layer containing the critical signal is correctly selected. The target stack is usually a layer containing an electrical signal path or a critical component, such as a microstrip line, a signal line, or a ground layer. In addition, the stack selection must also consider its dielectric constant, conductivity, and the correlation with other levels to ensure that no electromagnetic interference or simulation deviation occurs during simulation.
[0025] Example: Simulate a PCB stack structure containing 6 layers, top layer (L1): routing layer, containing multiple signal lines, such as microstrip lines, dielectric layer (D1): non-conductive layer, used to isolate the signal layer and inner layer, second layer (L2): ground layer (GND), as a reference plane, providing signal integrity, dielectric layer (D2): isolate L2 and L3, third layer (L3): signal layer, may contain high-speed signal lines, such as differential pairs, dielectric layer (D3): isolate L3 and power layer, fourth layer (L4): power layer (VCC), power supply layer, providing power path for the system, through design drawings or stack files, it can be determined that L3 layer contains critical high-speed differential signal lines. Since this signal line is close to other conductive layers (L2 ground layer, L4 power layer), its signal integrity may be affected by the upper and lower layers, especially the ground layer of L2 can be used as a reference plane, thereby affecting signal propagation, confirming that L3 layer is the target stack because L3 layer contains high-speed differential signal lines that need to be simulated. The signal lines on this layer are closely related to the power and ground layers. Special attention should be paid to the dielectric properties of L3, the shielding effect of the L2 ground layer, and the influence of the L4 power layer on the signal. At the key positions of the L3 layer, that is, the starting and end points of the differential signal, PEC (perfect conductor) ports are added to extract the electromagnetic field distribution and transmission parameters of the signal (such as S parameters, impedance matching, etc.).
[0026] After confirming the target stackup, you need to select a specific area on the stackup layout. This area is used for the subsequent extraction of PEC port construction. For example, if the goal is to extract the signal of the microstrip line, you can select the area where the microstrip line is located and extract the signal port through this area; the range of the selection should be precise enough to include all signal traces, but not too wide to avoid affecting other irrelevant structures. In the case of narrow signal line width, the actual area of the signal line needs to be accurately selected. Especially in high-density designs, accurate selection can ensure the accuracy of the simulation results.
[0027] After selecting the area, further extract the target graphics. The target graphics are usually the part of the layout that contains circuits and traces. Extracting these graphic information can help establish signal ports. For example, in microstrip line design, the target graphics are the copper traces of the microstrip line, and this part is extracted as the basis for the signal port. When extracting geometric graphics, the key is to extract the outer contour of the signal structure. This contour not only affects the transmission of the signal, but also determines the distribution of the electromagnetic field. For signal paths with regular graphics (such as rectangular or circular traces), the extraction of graphics is relatively simple, but for irregular shapes or complex structures, automated tools are needed to help extract.
[0028] When continuing to build the PEC port, it is necessary to verify whether the selected area overlaps or intersects with the graphics in the layout. If there is no overlap, the selected area may need to be adjusted. For example, when selecting a microstrip routing area, verify whether the area intersects with the outline of the copper foil microstrip. If there is no intersection, it means that the selection is not accurate and needs to be adjusted; if the selected area does not intersect with the design layout, it may mean that the selected area is inaccurate. Engineers need to re-select or adjust the position to ensure that the area covers all signal paths that need to be simulated. In high-density design, graphic intersection verification is crucial to avoid missing important electrical structures.
[0029] Example: Use the simulation tool to select the starting and ending areas of the L1 layer microstrip line, prepare to add PEC ports at these two locations, and simulate the input and output of the signal. The selected area is generally a rectangle or an arbitrary polygon, covering the local area of the target microstrip line, representing the location of the PEC port. After the selection is completed, the simulation tool usually provides a verification method (such as through highlighting or automatic detection) to check whether the selected area intersects with the microstrip line outline in the design layout. Through the visualization interface of the simulation tool, you can see whether the selected rectangular area accurately covers part of the microstrip line. For example, suppose that the cross section of a microstrip line is to be selected, the width of the microstrip line is 0.5 mm, and the width of the selected area is 0.4 mm. If the selected area is only adjacent to the edge of the microstrip line and not completely covered, there is not enough contact surface, which may cause distortion of the simulation results.
[0030] When extracting graphics, it is usually necessary to extract some regular geometric shapes, such as circles, rectangles, etc. This is because these regular graphics are easier to accurately construct PEC ports. For example, in the design, if the area selected by the box is a signal pin, and the pin is a circle, then the circle needs to be extracted as a signal graphic; the extraction of regular graphics can make the construction process of signal ports simpler and help improve the efficiency of simulation calculations. For signal graphics with complex shapes, it may be necessary to simplify them to a certain extent and convert them into regular geometric shapes as much as possible to facilitate subsequent simulations.
[0031] Determine whether the signal and ground have regular geometric shapes in the selected area. Usually, the geometric shapes of signal ports and ground lines need to be processed accurately. For example, if the selected area contains both regular rectangular traces of signal lines and square ground planes of ground lines, it is necessary to determine whether the two exist at the same time. If the signal and ground do not exist at the same time, it may be necessary to adjust the selected area or the way of pattern extraction to ensure the integrity of the two. Especially in high-speed signal transmission, the coupling relationship between signal and ground will directly affect signal integrity and electromagnetic interference (EMI) performance.
[0032] The addition of signal ports is based on the outer contour of the signal graph. That is, the position and shape of the signal port need to be defined according to the contour shape of the signal routing or structure. For example, in microstrip line design, the signal port will be added along the outer contour of the microstrip line so that the signal in the simulation can be transmitted along this path. In this process, the geometric shape of the signal port is very critical. Any deviation may cause electromagnetic interference or impedance mismatch on the signal transmission path, affecting the simulation results. The boundary conditions of the signal port need to be strictly set to ensure that the electromagnetic field distribution of the signal can truly reflect the transmission characteristics in the design.
[0033] Example: A microstrip line is designed for high-frequency signal transmission. The width of the microstrip line is 0.5 mm and it is located on the top layer (L1) of a multilayer PCB. A signal port needs to be added in the simulation to simulate the signal input from one end of the microstrip line and transmitted along the microstrip line to the other end. Its width and outer contour define the path of signal transmission. The geometry of the signal port needs to be consistent with the outer contour of the microstrip line. The width of the signal port should be strictly the same as the width of the microstrip line, usually 0.5 mm, to ensure that the port can perfectly cover the entire cross-section of the microstrip line. The position of the port is usually added at the starting and end of the microstrip line to ensure that the signal can accurately enter and leave the transmission path. This means that the signal port must be set along the edge or outer contour of the microstrip line. In a two-dimensional plane, the shape of the signal port is usually a rectangle that matches the cross-section of the microstrip line to ensure that the electromagnetic wave can correctly enter the microstrip line from the port. For example, if the cross-section of the microstrip line is 0.5 mm wide and the dielectric layer thickness is 1.6 mm, then the geometric dimensions of the signal port should be defined as a rectangle with the same width as the microstrip line, and its height may depend on the frequency range required for the simulation.
[0034] The previously selected area is used as the entire PEC plane. The PEC plane is an ideal conductor, and the electric field distribution on it can be set to zero. Therefore, when the selected area is used as the PEC plane, no electric field will be generated in the simulation. For example, in antenna design, the reflector or ground plane area of the antenna can be selected as the PEC plane to ensure that the electric field in this area is zero. In practical applications, the PEC plane usually simulates a ground plane or a metal shielding layer. This plane constrains the electric field distribution of the signal, so that the electric field can only be transmitted in the signal path, ensuring the accuracy of the simulation. In addition, the PEC plane can also reduce the complexity of the simulation calculation because it simplifies the boundary conditions of the electric field distribution.
[0035] The signal port is combined with the selected PEC plane to form a complete PEC port. When this port is used for simulation, it can ensure that the signal is transmitted in the specified area and controlled by the PEC plane. For example, in microstrip line simulation, the signal enters from the signal port and transmits electromagnetic waves through the PEC plane to simulate the propagation path and reflection of the signal. The main function of the PEC port is to simulate the transmission behavior of the signal under ideal conductor conditions. In electromagnetic simulation, the PEC port can be used to analyze problems such as signal integrity, impedance matching, and electromagnetic interference. After the simulation is completed, engineers can use the analysis results of the PEC port to optimize the signal transmission path and adjust the impedance matching to ensure that the signal can be transmitted efficiently and stably in the actual design.
[0036] Example: Simulate a high-frequency PCB design that includes a microstrip line structure. The microstrip line is located on the top layer (L1) of the PCB, and there is a ground plane underneath it. The design goal is to evaluate the propagation path, reflection loss, and whether there is an electromagnetic interference (EMI) problem when the signal is transmitted from one end of the microstrip line to the other end. In order to achieve the simulation, we will add PEC ports at the starting and end of the microstrip line, and observe the propagation and reflection characteristics of the signal through the simulation tool. At the starting point of the microstrip line, we add a signal port. The shape of this port accurately matches the geometric dimensions of the microstrip line (the width is 0.5 mm and the length is set according to the design requirements). This signal port will serve as the input port. By applying electromagnetic excitation, the signal will enter the microstrip line transmission path from here. At the same time, a corresponding signal port is added at the end of the microstrip line as the output port to monitor the transmission of the signal. Run the simulation through the simulation tool to observe the propagation path of the electromagnetic wave in the microstrip line. The PEC port ensures that the signal can be transmitted stably under ideal conductor conditions. The simulation can capture the signal propagation speed, any reflection phenomenon in the path, and the signal transmission at different frequencies. Since the PEC plane is an ideal conductor, the signal will be constrained during the propagation process and there will be no additional loss or interference from the ground layer. This allows the simulation to focus on analyzing signal integrity, reflection loss, and impedance matching issues.
[0037] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.
Claims
1. A method for adding a PEC port based on a network, characterized in that: The method comprises the following steps: S1: determine the target stack; S2: Select an area on the target stack layout for subsequent extraction of PEC port construction; S3: Extract the target graphics in the selected area and create a signal port; S4: The signal port and the PEC plane constitute a PEC port.
2. The method for adding a PEC port based on a network according to claim 1, characterized in that: The target stack refers to a specific layer to which a PEC port needs to be added, and the target stack includes a microstrip line, a signal line, and a ground layer; the target stack is determined by the dielectric constant, the conductive property, and the correlation of other layers.
3. The method for adding a PEC port based on a network according to claim 1, characterized in that: The target graphic is usually a circuit rectangular trace and a circuit circular trace in the layout, and extracting the target graphic information can help establish a signal terminal.
4. The method for adding a PEC port based on a network according to claim 1, characterized in that: When creating the signal port, it is necessary to determine whether the selected area overlaps or intersects with the graphics in the layout; if there is no overlap, the selected area needs to be adjusted; If they do not intersect, you need to adjust the selection; if the selected area does not intersect with the design layout, the selected area is inaccurate and you need to reselect or adjust the position to ensure that the area covers all signal paths that need to be simulated.
5. The method for adding a PEC port based on a network according to claim 1, characterized in that: The process of extracting the target graphics in the framed area is as follows: use a simulation tool to frame the starting and ending areas of the L1 layer microstrip line, prepare to add PEC ports at these two positions, and simulate the input and output of signals. The framed area is generally a rectangle or an arbitrary polygon, covering a local area of the target microstrip line, representing the position of the PEC port. After the frame selection is completed, the simulation tool is used to automatically detect whether the framed area intersects with the microstrip line contour in the design layout. Through the visualization interface of the simulation tool, it can be seen whether the framed rectangular area accurately covers part of the microstrip line.
6. The method for adding a PEC port based on a network according to claim 1, characterized in that: When extracting graphics, regular graphics such as circles are extracted.
7. The method for adding a PEC port based on a network according to claim 1, characterized in that: Determine whether the signal and ground have regular geometric shapes in the selected area.
8. The method for adding a PEC port based on a network according to claim 1, characterized in that: The position and shape of the signal port are defined according to the outline shape of the signal line or structure.
9. The method for adding a PEC port based on a network according to claim 1, characterized in that: The framed area is taken as the entire PEC plane, the PEC plane includes a ground plane and a metal shielding layer, and the electric field on the PEC plane is set to zero.