Amplifier circuit and amplifier device

Abstract

The embodiment of the invention provides an amplifier circuit and an amplifier device.The amplifier circuit is applied to a power amplifier and comprises a bias circuit, the bias circuit comprises a first bias transistor, the second end of the first bias transistor is coupled with the power amplifier, and the first bias transistor is used for providing bias current for the power amplifier; and the overcurrent protection circuit is coupled with the first end of the first bias transistor, is used for providing a first current for the first bias transistor, is also used for adjusting the bias current in a first state so as to limit the current of the power amplifier, and is also used for adjusting the first current according to the bias current in a second state.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor manufacturing technology, and in particular to an amplifier circuit and an amplifier device. Background Art

[0002] The RF power amplifier (PA) is an indispensable part of modern communication systems and is used to amplify the input signal power. However, under some extreme conditions (such as low temperature, high mismatch, etc.), the current in the RF power amplifier will exceed its current threshold, causing the RF power amplifier to burn out. Therefore, during the use of the RF power amplifier, an over current protection circuit (OCP) is urgently needed to ensure its stable operation. Summary of the invention

[0003] In view of this, the present disclosure provides an amplifier circuit and an amplifier device to solve at least one technical problem existing in the related art. To achieve the above-mentioned purpose, the technical solution of the present disclosure is implemented as follows: The present disclosure embodiment provides an amplifier circuit, which is applied to a power amplifier, including: a bias circuit, the bias circuit includes a first bias transistor, the second end of the first bias transistor is coupled to the power amplifier, and is used to provide a bias current to the power amplifier; an overcurrent protection circuit is coupled to the first end of the first bias transistor, and is used to provide a first current to the first bias transistor, and is also used to adjust the bias current in a first state to limit the current of the power amplifier, and in a second state, adjust the first current according to the bias current.

[0004] In some embodiments, the overcurrent protection circuit includes: a current mirror circuit; wherein the current mirror circuit includes a first transistor, one or more second transistors connected to the first transistor, and a reference current source connected to the first transistor, and the second transistor is used to output the first current.

[0005] In some embodiments, when the number of the second transistors is one, the first end of the first transistor is coupled to the first end of the second transistor, the third end of the first transistor is coupled to the third end of the second transistor, the second end of the first transistor is grounded through the reference current source, and the second end of the second transistor is coupled to the first end of the first bias transistor.

[0006] In some embodiments, when the number of the second transistors is multiple, the multiple second transistors are connected in parallel; wherein the first end of the first transistor is coupled to the first ends of the multiple second transistors for connecting to a power supply, the third end of the first transistor is coupled to the third ends of the multiple second transistors, the second end of the first transistor is grounded through the reference current source, and the second ends of the multiple second transistors are used to couple to the first end of the first bias transistor.

[0007] In some embodiments, at least one of the plurality of second transistors is connected to the first bias transistor.

[0008] In some embodiments, at least some of the second transistors and the first transistors form a current mirror circuit with a different ratio.

[0009] In some embodiments, in the first state, the first current is less than the bias current, and the overcurrent protection circuit is used to place the first bias transistor in a linear region or a saturation region to reduce the bias current so that the reduced bias current is the same as the first current; and / or, in the second state, the first current is greater than the bias current, and the overcurrent protection circuit is used to place the second transistor in a linear region or a saturation region to reduce the first current so that the reduced first current is the same as the bias current.

[0010] In some embodiments, in the first state, the bias current is greater than the first current, and the overcurrent protection circuit is used to reduce the bias current so that the reduced bias current is the same as the first current.

[0011] In some embodiments, the power amplifier includes an amplifying transistor; the bias circuit also includes a first resistor; wherein the second end of the first bias transistor is coupled to the third end of the amplifying transistor through the first resistor; the second end of the amplifying transistor is grounded; the third end of the amplifying transistor is used to receive an input signal, and the first end of the amplifying transistor is used to send an output signal.

[0012] In some embodiments, the power amplifier also includes a first capacitor and a second capacitor; wherein the first capacitor is coupled to the third end of the amplifying transistor, and the input signal is transmitted to the third end of the amplifying transistor through the first capacitor; the second capacitor is coupled to the first end of the amplifying transistor, and the output signal is output through the second capacitor.

[0013] In some embodiments, the bias circuit further includes a second bias transistor, a third capacitor, a second resistor and a third resistor; wherein the second end of the second bias transistor is grounded; the third end of the second bias transistor is coupled to the first end of the second bias transistor through the third capacitor and the second resistor connected in series, and the third end of the second bias transistor is also coupled to the third end of the amplifying transistor through the third resistor.

[0014] An embodiment of the present disclosure further provides an amplifier device, which at least includes: an amplifier circuit as described in the above embodiment of the present disclosure.

[0015] The embodiment of the present disclosure provides an amplifier circuit, which is applied to a power amplifier, and the amplifier circuit includes: a bias circuit, the bias circuit includes a first bias transistor, the second end of the first bias transistor is coupled to the power amplifier, and is used to provide a bias current to the power amplifier; an overcurrent protection circuit is coupled to the first end of the first bias transistor, and is used to provide a first current to the first bias transistor, and is also used to adjust the bias current in a first state to limit the current of the power amplifier, and in a second state, adjust the first current according to the bias current. In the embodiment of the present disclosure, by setting an overcurrent protection circuit in the amplifier circuit, the current of the power amplifier can be effectively limited and adjusted under different working states to ensure that the power amplifier can work stably, thereby avoiding the power amplifier from being burned due to excessive current under extreme conditions, thereby reducing the risk of chip burning of the power amplifier and significantly reducing the equipment repair rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of the structure of a power amplifier and an amplifier circuit provided in an embodiment of the present disclosure;

[0017] Figure 2 A circuit block diagram of a power amplifier and an amplifier circuit provided in an embodiment of the present disclosure;

[0018] Figure 3 A circuit block diagram of another power amplifier and amplifier circuit provided in an embodiment of the present disclosure;

[0019] Figure 4 A schematic diagram of a current mirror circuit having a first transistor and a second transistor provided in accordance with an embodiment of the present disclosure;

[0020] Figure 5 A schematic diagram of output characteristics of a MOS tube provided in one embodiment of the present disclosure;

[0021] Figure 6A schematic diagram of changes in current and input power of an amplifier transistor when an overcurrent protection circuit is provided in an amplifier circuit and when no overcurrent protection circuit is provided is provided in an embodiment of the present disclosure.

[0022] The figure includes: 101-power amplifier; 102-amplifier circuit; 120-bias circuit; 130-overcurrent protection circuit. DETAILED DESCRIPTION

[0023] The following will be combined with the embodiments of the present disclosure and the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0024] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0025] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0026] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present disclosure necessarily has the first element, component, region, layer or part.

[0027] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0028] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0029] In order to thoroughly understand the present disclosure, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution of the present disclosure. The preferred embodiments of the present disclosure are described in detail below, but in addition to these detailed descriptions, the present disclosure may also have other implementations.

[0030] In mobile terminals, RF power amplifiers are used to amplify the power of the RF signal to be transmitted, and then feed it back to the antenna for transmission. In recent years, with the development of communications and consumer electronics, the requirements for the supply voltage, output power and peak-to-average ratio of RF power amplifiers have continued to increase, all of which have put forward higher requirements for the robustness of RF power transmitters. However, under some extreme conditions (such as low temperature, high mismatch, etc.), the current in the RF power amplifier will exceed its current threshold, causing the RF power amplifier to burn out. Therefore, how to prevent the power amplifier from burning out in practical applications is an imminent challenge.

[0031] Based on this, an embodiment of the present disclosure provides an amplifier circuit applied to a power amplifier, which is used to effectively limit and adjust the current of the power amplifier under different working conditions to ensure that the power amplifier can work stably. Figure 1 and Figure 2 , Figure 1A schematic diagram of the structure of a power amplifier 101 and an amplifier circuit 102 provided in an embodiment of the present disclosure; Figure 2 A circuit block diagram of a power amplifier 101 and an amplifier circuit 102 provided in an embodiment of the present disclosure.

[0032] refer to Figure 1 , one input end of the power amplifier 101 is used to receive an input signal RFin, the other input end is used to receive a bias current Ib provided by the amplifier circuit 102, and the output end of the power amplifier 101 is used to send an output signal RFout. The amplifier circuit 102 is coupled to the power amplifier 101; here, the amplifier circuit 102 includes a bias circuit 120 and an overcurrent protection circuit 130, one end of the bias circuit 120 is coupled to the overcurrent protection circuit 130, and the other end of the bias circuit 120 is coupled to the power amplifier 101; the overcurrent protection circuit 130 is used to provide a first current I1 to the bias circuit 120, and the bias circuit 120 is used to provide a bias current Ib to the power amplifier 101. In practical applications, the overcurrent protection circuit 130 can be used to adjust the bias current Ib in the first state to limit the current of the power amplifier 101; it can also be used to adjust the first current I1 according to the bias current Ib in the second state.

[0033] It should be noted that the power amplifier 101 in the embodiment of the present disclosure may include a radio frequency power amplifier PA. Here, the power amplifier contains only one radio frequency power amplifier as an example, but the present disclosure is not limited to this. In another embodiment, the power amplifier contains N cascaded radio frequency power amplifiers, N is greater than or equal to 2, and an overcurrent protection circuit is set for at least one radio frequency power amplifier. Optionally, an overcurrent protection circuit is correspondingly set for each radio frequency power amplifier. Optionally, an overcurrent protection circuit is only correspondingly set for the first radio frequency power amplifier and the last radio frequency power amplifier.

[0034] How the overcurrent protection circuit adjusts the bias current and the first current is described in detail below in conjunction with specific embodiments and drawings.

[0035] refer to Figure 2 In some embodiments, the bias circuit 120 includes a first bias transistor T1 and a driving circuit. A first end of the first bias transistor T1 is coupled to an overcurrent protection circuit OCP130, and the overcurrent protection circuit OCP130 is used to provide a first current I1 to the first bias transistor T1, so as to limit the output current of the first bias transistor T1 when necessary; a second end of the first bias transistor T1 is connected to the power amplifier 101, so as to provide a bias current Ib to the power amplifier 101, and a third end of the first bias transistor T1 is connected to the driving circuit, and the driving circuit is used to provide a driving voltage or a driving current to the first bias transistor T1, so as to obtain the required bias current Ib.

[0036] In some embodiments, the power amplifier 101 includes an amplifier transistor T2. The third terminal of the amplifier transistor T2 is coupled to the first bias transistor T1, the second terminal of the amplifier transistor T2 is grounded, and the first terminal of the amplifier transistor T2 is connected to a fixed power supply, which is used to supply power to the amplifier transistor T2. The third terminal of the amplifier transistor T2 is also used to receive an input signal RFin, and the first terminal of the amplifier transistor T2 is also used to send an output signal RFout.

[0037] In the above embodiments, the first bias transistor T1 and the amplifying transistor T2 are both triodes. In other embodiments, the first bias transistor T1 and the amplifying transistor T2 may also be other types of transistors, such as field effect transistors, etc., which are not limited in the present disclosure. In addition, the first bias transistor T1 and the amplifying transistor T2 may be transistors of the same type or transistors of different types.

[0038] In the above embodiments, the driving circuit and the amplifying transistor are both connected to the power supply VDD. In other embodiments, the driving circuit and the amplifying transistor may also be connected to other power supplies, and the power supplies connected to the two may also be different, which is not limited here.

[0039] In some embodiments, continue to refer to Figure 2 , the bias circuit 120 may further include a first resistor R1, and the driving circuit includes a driving current source Ibias. The second end of the first bias transistor T1 is coupled to the third end of the amplifying transistor T2 through the first resistor R1. The third end of the first bias transistor T1 is coupled to a driving power supply through the driving current source Ibias, and the driving power supply is used to provide a driving voltage VDD to the driving current source Ibias. The driving current source Ibias is used to provide a driving current and a driving signal to the first bias transistor T1 to drive the first bias transistor T1 to generate a bias current Ib. The input end of the driving current source Ibias is connected to the driving power supply, and the output end of the driving current source Ibias is coupled to the third end of the first bias transistor T1.

[0040] In some embodiments, the power amplifier 101 further includes: a first capacitor C1, a second capacitor C2, and an inductor L. The third terminal of the amplifying transistor T2 is coupled to the first capacitor C1, the input signal RFin is transmitted to the third terminal of the amplifying transistor T2 through the first capacitor C1, the first terminal of the amplifying transistor T2 is coupled to the second capacitor C2, and the output signal RFout is output after passing through the second capacitor C2. The first capacitor C1 and the second capacitor C2 are used to isolate direct current to filter the radio frequency signal. The first terminal of the amplifying transistor T2 is connected to a fixed power supply through the inductor L, and the inductor L is used to isolate the power supply signal of the amplifying transistor T2 from the output signal (i.e., the radio frequency signal) to reduce the influence of the radio frequency signal on the power supply, and the inductor L is also used for output impedance matching.

[0041] In some embodiments, continue to refer to Figure 2 The bias circuit 120 may further include a fourth capacitor C4 and a fifth capacitor C5, both of which are connected in parallel with the first bias transistor T1. The first electrode terminal of the fourth capacitor C4 is coupled to the third terminal of the first bias transistor T1, and the second electrode terminal of the fourth capacitor C4 is grounded; the first electrode terminal of the fifth capacitor C5 is coupled to the first terminal of the first bias transistor T1, and the second electrode terminal of the fifth capacitor C5 is grounded. The fourth capacitor C4 and the fifth capacitor C5 are used for filtering, coupling, resonance, and improving the linearity of the amplifying transistor T2.

[0042] In some embodiments, reference Figure 3 , Figure 3 A circuit block diagram of another power amplifier 101 and amplifier circuit 102 provided in an embodiment of the present disclosure. The bias circuit 120 may further include a second bias transistor T3, a third capacitor C3, a second resistor R2, and a third resistor R3; the first end of the second bias transistor T3 is coupled to the output end of the driving current source Ibias, the second end of the second bias transistor T3 is grounded, the third end of the second bias transistor T3 is coupled to the first end of the second bias transistor T3 through the third capacitor C3 and the second resistor R2 connected in series, and the third end of the second bias transistor T3 is also coupled to the third end of the amplifying transistor T2 through the third resistor R3. Here, the second bias transistor T3, the third capacitor C3, the second resistor R2, and the third resistor R3 are used to form a bias circuit loop, the purpose of which is to compensate the power amplifier, such as temperature compensation.

[0043] In some embodiments, the overcurrent protection circuit includes a current mirror circuit; wherein the current mirror circuit includes a first transistor, one or more second transistors connected to the first transistor, and a reference current source connected to the first transistor, the second transistor is used to output the first current, and the reference current source is used to provide a reference current.

[0044] In some embodiments, the current mirror circuit includes a plurality of second transistors, and the cascade relationship between the plurality of second transistors is parallel connection. The first end of the first transistor and the first ends of the plurality of second transistors are coupled to a power supply end, and the power supply can be set according to actual needs, and can be the same as or different from the power supply connected to the power amplifier and / or the bias circuit, which is not limited here. Figure 4 In the embodiment, the power supply terminal is a battery power supply Vbat; the third terminal of the first transistor M1 is coupled to the third terminals of the plurality of second transistors M2, and the second terminal of the first transistor M1 is grounded through a reference current source.

[0045] In some embodiments, a plurality of second transistors and a first transistor may form a current mirror circuit with different proportions to output different currents. In this case, the bias circuit 120 may be selectively connected to one of the second transistors to provide a different I1 to the bias circuit. In this way, the current mirror circuit may switch the current limiting threshold of the overcurrent protection circuit according to the requirements of power amplifiers of different powers to provide different maximum currents.

[0046] In some embodiments, the bias circuit 120 may also be selectively connected to a plurality of second transistors to provide different first currents I1 to the bias circuit.

[0047] In some embodiments, the plurality of second transistors may also at least partially form a current mirror circuit with the same proportion as the first transistors.

[0048] In some embodiments, when the power amplifier 101 is a multi-stage amplifier, the plurality of second transistors may also be respectively connected to the amplifying transistors T2 in the plurality of stages.

[0049] In some embodiments, the current mirror circuit includes a second transistor, the first end of the first transistor is coupled to the first end of the second transistor, the third end of the first transistor is coupled to the third end of the second transistor, the second end of the first transistor is grounded through a reference current source, and the second end of the second transistor is coupled to the first end of the first bias transistor.

[0050] refer to Figure 4 , Figure 4 A schematic diagram of a current mirror circuit having a first transistor M1 and a second transistor M2 is provided for an embodiment of the present disclosure; wherein the first end of the first transistor M1 is coupled to the first end of the second transistor M2, the third end of the first transistor M1 is coupled to the third end of the second transistor M2, the second end of the first transistor M1 is grounded through a reference current source, and the second end of the second transistor M2 is coupled to the first end of the first bias transistor T1.

[0051] In some embodiments, the first transistor M1 and the second transistor M2 are field effect transistors. When the first transistor M1 and the second transistor M2 are both in normal working state, the power amplifier does not need overcurrent protection, and the output current of the second transistor M2 is the first current I1 provided by the overcurrent protection circuit. At this time, the first transistor M1 and the second transistor M2 are in the saturation region. The magnitude of the first current I1 is related to the reference current Iref and the width-to-length ratio of the second transistor M2 to the first transistor M1, that is, I1=m*Iref, where m is the ratio of the width-to-length ratio of the second transistor M2 to the first transistor M1. It should be noted that the first transistor and the second transistor can also be other types of transistors, such as triodes, etc., which are not limited here. When they are triodes, the first transistor M1 and the second transistor M2 are in the amplification region.

[0052] In some embodiments, the first bias transistor is a triode. When the bias circuit is in the first state, such as an abnormal working state, exemplarily, when an extreme condition (such as low temperature, high mismatch, etc.) occurs, the current required by the first bias transistor T1 in the bias circuit changes, the current of the first bias transistor T1 in the bias circuit increases, and the first current provided by the overcurrent protection circuit is different from the bias current. Exemplarily, the first current is less than the bias current, and the overcurrent protection circuit is used to change the voltage at point A so that the first bias transistor is in a saturation region to reduce the bias current, so that the reduced bias current is the same as the first current, thereby limiting the current of the amplifier and protecting the amplifier. It should be noted that when the first bias transistor is a field effect transistor, the overcurrent protection circuit is used to change the voltage at point A so that the first bias transistor is in a linear region to reduce the bias current.

[0053] In some embodiments, the second transistor is a field effect transistor. When the bias circuit is in the second state, the first current I1 is greater than the bias current Ib. At this time, the overcurrent protection circuit is used to change the voltage at point A so that the second transistor M2 is in a linear state to reduce the first current I1 so that the reduced first current is the same as the bias current Ib. It should be noted that when the second transistor is a triode, the overcurrent protection circuit is used to change the voltage at point A so that the second transistor is in a saturation region to reduce the first current.

[0054] It should be noted that the reference Figure 5 , Figure 5 The output characteristic diagram of the MOS tube is shown in Figure 3 and Figure 4 When the first current I1 is greater than the bias current Ib, the overcurrent protection current increases the voltage at its output terminal A, causing the second transistor M2 to enter the linear region from the saturation region (when the second transistor M2 is a triode, it enters the saturation region) to reduce I1 until the reduced first current is the same as the bias current.

[0055] Similarly, when the first current I1 is less than the bias current Ib, the overcurrent protection current reduces the voltage at its output terminal A, thereby causing the first bias transistor T1 to enter the saturation region from the amplification region (when the first bias transistor T1 is a field effect transistor, it enters the linear region) to reduce the bias current Ib until it is the same as the first current.

[0056] Based on this, in the embodiments of the present disclosure, by setting an overcurrent protection circuit in the amplifier circuit, the current of the power amplifier can be effectively limited and adjusted under different working conditions to ensure that the power amplifier can work stably, thereby preventing the power amplifier from being burned due to excessive current under extreme conditions. This reduces the risk of chip burnout of the power amplifier and significantly reduces the equipment repair rate. In addition, the protection circuit can be adjusted automatically without the need to set up a complex control circuit, which is simple in design and further improves reliability.

[0057] refer to Figure 6 , Figure 6 The diagram is a schematic diagram of the change of the current at the first end of the amplifying transistor with the input power when the overcurrent protection circuit is set in the amplifier circuit and when the overcurrent protection circuit is not set in the embodiment of the present disclosure; the horizontal axis is the input power (Input Power), and the vertical axis is the current Icc at the first end of the amplifying transistor. Figure 6 It can be seen that as the input power continues to increase, the current Icc at the first end of the amplifier transistor also increases accordingly. When an overcurrent protection circuit OCP is set in the amplifier circuit, after the current at the first end of the amplifier transistor increases to a certain threshold current, it will be limited to the threshold and will no longer increase; and when the overcurrent protection circuit OCP is not set in the amplifier circuit, the current Icc at the first end of the amplifier transistor continues to increase with the increase of the input power, and even after reaching a certain threshold current, it continues to increase, which will cause the current of the amplifier transistor to be too large and burn out. In other words, in the embodiment of the present disclosure, by setting an overcurrent protection circuit in the amplifier circuit, an upper limit value is set for the magnitude of the bias current, thereby limiting the current Icc of the amplifier transistor, thereby ensuring that the power amplifier can work stably and reducing the risk of burning out.

[0058] Based on the above amplifier circuit, an embodiment of the present disclosure further provides an amplifier device, which at least includes: the amplifier circuit as described in the above embodiment of the present disclosure.

[0059] An embodiment of the present disclosure further provides an electronic device, which at least includes: an amplifier device as described in the above embodiment of the present disclosure.

[0060] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial number of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.

[0061] The above description is only a preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. All equivalent structural changes made by using the contents of the present disclosure and the drawings under the inventive concept of the present disclosure, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present disclosure.

Claims

1. An amplifier circuit, applied to a power amplifier, characterized in that: include: A bias circuit, the bias circuit comprising a first bias transistor, a second end of the first bias transistor being coupled to the power amplifier and configured to provide a bias current to the power amplifier; An overcurrent protection circuit is coupled to the first end of the first bias transistor, and is used to provide a first current to the first bias transistor, and is also used to adjust the bias current in a first state to limit the current of the power amplifier, and to adjust the first current according to the bias current in a second state.

2. The amplifier circuit according to claim 1, characterized in that The overcurrent protection circuit comprises: a current mirror circuit; The current mirror circuit includes a first transistor, one or more second transistors connected to the first transistor, and a reference current source connected to the first transistor, and the second transistor is used to output the first current.

3. The amplifier circuit according to claim 2, characterized in that When the number of the second transistor is one, the first end of the first transistor is coupled to the first end of the second transistor, the third end of the first transistor is coupled to the third end of the second transistor, the second end of the first transistor is grounded through the reference current source, and the second end of the second transistor is coupled to the first end of the first bias transistor.

4. The amplifier circuit according to claim 2, characterized in that When there are multiple second transistors, the multiple second transistors are connected in parallel; The first end of the first transistor is coupled to the first ends of the plurality of second transistors for connecting to a power supply, the third end of the first transistor is coupled to the third ends of the plurality of second transistors, the second end of the first transistor is grounded through the reference current source, and the second ends of the plurality of second transistors are used to couple to the first end of the first bias transistor.

5. The amplifier circuit according to claim 4, characterized in that At least one of the plurality of second transistors is connected to the first bias transistor.

6. The amplifier circuit according to claim 4, characterized in that At least some of the second transistors form a current mirror circuit with a different ratio from that of the first transistors.

7. The amplifier circuit according to claim 2, characterized in that In the first state, the first current is less than the bias current, and the overcurrent protection circuit is used to place the first bias transistor in a linear region or a saturation region to reduce the bias current so that the reduced bias current is the same as the first current; And / or, in the second state, the first current is greater than the bias current, and the overcurrent protection circuit is used to place the second transistor in a linear region or a saturation region to reduce the first current so that the reduced first current is the same as the bias current.

8. The amplifier circuit according to claim 1, characterized in that In the first state, the bias current is greater than the first current, and the overcurrent protection circuit is used to reduce the bias current so that the reduced bias current is the same as the first current.

9. The amplifier circuit according to claim 1, characterized in that The power amplifier includes an amplifying transistor; the bias circuit also includes a first resistor; The second end of the first bias transistor is coupled to the third end of the amplifying transistor through the first resistor; the second end of the amplifying transistor is grounded; the third end of the amplifying transistor is used to receive an input signal, and the first end of the amplifying transistor is used to send an output signal.

10. The amplifier circuit according to claim 9, characterized in that The power amplifier further includes a first capacitor and a second capacitor; The first capacitor is coupled to the third end of the amplifying transistor, and the input signal is transmitted to the third end of the amplifying transistor through the first capacitor; the second capacitor is coupled to the first end of the amplifying transistor, and the output signal is output through the second capacitor.

11. The amplifier circuit according to claim 10, characterized in that The bias circuit also includes a second bias transistor, a third capacitor, a second resistor and a third resistor; The second end of the second bias transistor is grounded; the third end of the second bias transistor is coupled to the first end of the second bias transistor through the third capacitor and the second resistor connected in series, and the third end of the second bias transistor is also coupled to the third end of the amplifying transistor through the third resistor.

12. An amplifier device, characterized in that: The amplifier device comprises at least: an amplifier circuit as claimed in any one of claims 1-11.

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