Circuit board and electronic equipment

Abstract

The invention discloses a circuit board and electronic equipment, and belongs to the technical field of semiconductors. The circuit board comprises a first surface and a second surface which are opposite, the first surface is used for arranging a chip, the heat dissipation layer is located in the circuit board, the heat dissipation boss is connected with the heat dissipation layer, and the heat dissipation boss extends out of the circuit board from the interior of the circuit board. Through the connection mode, the heat of the chip can be conducted to the circuit board and is sequentially conducted to the heat dissipation layer and the heat dissipation boss, so that the heat is conducted to the outside of the circuit board. Due to the fact that the heat conduction performance of the heat dissipation layer and the heat dissipation boss is good, by arranging the heat dissipation layer and the heat dissipation boss, the heat dissipation efficiency of the circuit board is improved, the process that the heat of the chip is conducted to the outside of the circuit board through the circuit board is accelerated, and the heat of the chip on the circuit board can be reduced.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular relates to a circuit board and an electronic device. Background Art

[0002] With the development of artificial intelligence and high-performance computing, multiple chips are usually packaged on a circuit board in the process. In 3D stacking packaging technology, it is difficult to dissipate heat from the chip in the middle, which causes the chip temperature to rise, which in turn affects the stability of the system. How to improve the heat dissipation efficiency of the circuit board and reduce the heat of the chip on the circuit board is a problem that needs to be solved in this field. Summary of the invention

[0003] The present application provides a circuit board and an electronic device, aiming to improve the heat dissipation efficiency of the circuit board and reduce the heat of a chip on the circuit board.

[0004] In a first aspect, the present application provides a circuit board, comprising a first surface and a second surface relative to each other, the first surface is used to set a chip, the heat dissipation layer is located inside the circuit board, the heat dissipation boss is connected to the heat dissipation layer, and the heat dissipation boss extends from the inside of the circuit board to the outside of the circuit board.

[0005] In some embodiments, the chip is a chip obtained by 3D packaging of multiple chips, and the circuit board is a PCB board.

[0006] In some embodiments, the heat dissipation boss extends from the inside of the circuit board to the outside of the second surface.

[0007] Alternatively, in some embodiments, the heat dissipation boss extends from the inside of the circuit board to the outside of the first surface.

[0008] Alternatively, in some embodiments, the heat dissipation boss extends from the inside of the circuit board to outside the first surface and the second surface.

[0009] In some embodiments, the orthographic projection of the heat dissipation boss on the first surface is located around the orthographic projection of the chip on the first surface.

[0010] In some embodiments, the heat dissipation boss includes a plurality of bumps, and orthographic projections of the plurality of bumps on the first surface surround an outer side of an orthographic projection of the chip on the first surface.

[0011] In some embodiments, the circuit board includes multiple heat dissipation layers, the orthographic projections of the heat dissipation layers on the first surface at least partially overlap with the orthographic projections of the chip on the first surface, and the heat dissipation bosses are connected to the multiple heat dissipation layers.

[0012] In some embodiments, the material of the heat dissipation layer includes copper, and / or the material of the heat dissipation boss includes copper.

[0013] In a second aspect, the present application further provides an electronic device, which includes the circuit board and a chip in any one of the embodiments of the first aspect, wherein the chip is disposed on a first surface of the circuit board.

[0014] In some embodiments, the electronic device further comprises a heat dissipation component, and the heat dissipation boss is directly connected to the heat dissipation component to dissipate heat. Alternatively, the heat dissipation boss dissipates heat by air cooling.

[0015] In some embodiments, when the heat dissipation boss is directly connected to the heat dissipation component, the heat dissipation component is also in contact with the chip.

[0016] In the circuit board provided in the present application, the circuit board includes a first surface and a second surface relative to each other, the first surface is used to set the chip, and the circuit board is also provided with a heat dissipation layer and a heat dissipation boss, wherein the heat dissipation layer is located inside the circuit board, the heat dissipation boss is connected to the heat dissipation layer, and the heat dissipation boss extends from the inside of the circuit board to the outside of the circuit board. Through the above connection method, when a chip is set on the first surface of the circuit board, the heat of the chip can be transferred to the circuit board, and then transferred to the heat dissipation layer and the heat dissipation boss in turn, thereby transferring the heat to the outside of the circuit board. Since the heat dissipation layer and the heat dissipation boss have good thermal conductivity, by setting the heat dissipation layer and the heat dissipation boss, the heat dissipation efficiency of the circuit board is improved, and the process of transferring the heat of the chip to the outside of the circuit board by using the circuit board is accelerated, which is conducive to reducing the heat of the chip on the circuit board.

[0017] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0019] Figure 1 It is a schematic diagram of a circuit board structure in the related technology;

[0020] Figure 2 Based on Figure 1 The heat conduction simulation diagram of the circuit board shown;

[0021] Figure 3 A schematic diagram of the structure of a circuit board provided in an embodiment of the present application;

[0022] Figure 4 A schematic diagram of the structure of another circuit board provided in an embodiment of the present application;

[0023] Figure 5 A schematic diagram of the structure of another circuit board provided in an embodiment of the present application;

[0024] Figure 6 A top view of a circuit board provided in an embodiment of the present application;

[0025] Figure 7 A top view of another circuit board provided in an embodiment of the present application;

[0026] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0028] Unless the context requires otherwise, throughout the specification and claims, the term "comprising" is to be construed in an open, inclusive sense, ie, meaning "including, but not limited to."

[0029] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.

[0030] When describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For example, when describing some embodiments, the term "connection" may be used to indicate that two or more components are in direct physical or electrical contact with each other.

[0031] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0032] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0033] Exemplary embodiments are described herein with reference to cross-sectional views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include deviations in shape due to, for example, manufacturing. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0034] Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0035] According to the research on chip packaging structure, in the related technology, it is difficult to dissipate heat of the packaged chip, which leads to heat accumulation and temperature rise of the chip, thus affecting the stability of the system. In particular, in the 3D stacking chip packaging structure, multiple chip dies are packaged together and arranged on the PCB board, which makes it more difficult to dissipate heat for the chip located in the middle in the longitudinal direction. Figure 1-2 As shown, Figure 1 It is a schematic diagram of a circuit board structure in the related technology. Figure 2 Based on Figure 1 The heat conduction simulation diagram of the circuit board is shown in the figure. Figure 2 As shown, most of the heat is concentrated on the chip in the middle.

[0036] In order to improve the heat dissipation efficiency of the circuit board and reduce the heat of the chip arranged on the circuit board, the present application provides a circuit board, such as Figure 3 As shown, Figure 3 A schematic diagram of the structure of a circuit board provided in an embodiment of the present application.

[0037] The circuit board 10 includes a first surface P1 and a second surface P2 opposite to each other. The first surface P1 is used to set the chip. The heat dissipation layer 11 is located inside the circuit board 10. The heat dissipation boss 12 is connected to the heat dissipation layer 11, and the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the circuit board 10.

[0038] For example, Figure 3As shown, a chip 13 is disposed on the first surface P1 of the circuit board 10. The chip 13 is a chip obtained by 3D packaging of multiple chips, for example, including a stacked chip 131 and a chip 132, and the circuit board 10 is a printed circuit board (PCB board). Alternatively, in some other embodiments, the chip 13 can also be a chip obtained by packaging a single chip, and the circuit board in this embodiment can adapt to the heat dissipation of 3D packaged chips or non-3D packaged chips.

[0039] When a chip 13 is disposed on the first surface P1 of the circuit board 10, when the chip 13 generates heat during operation, the heat can be conducted to the circuit board 10 through the portion adjacent to the circuit board 10, and can also be dissipated through other media, but the conduction efficiency is low.

[0040] In the embodiment of the present application, in addition to the conductive function of the original conductive structure in the circuit board 10, a heat dissipation layer 11 is further provided inside the circuit board 10, and a heat dissipation boss 12 is further provided outside the circuit board. The heat dissipation layer 11 and the heat dissipation boss 12 both have good thermal conductivity and are used to accelerate heat conduction in the circuit board 10.

[0041] Exemplarily, when the heat of the chip 13 is conducted to the circuit board 10 , the heat is quickly conducted to the outside of the circuit board 10 through the heat dissipation layer 11 and the heat dissipation boss 12 .

[0042] Since the heat dissipation layer 11 and the heat dissipation boss 12 have good thermal conductivity, the heat dissipation efficiency of the circuit board 10 is improved by providing the heat dissipation layer 11 and the heat dissipation boss 12, and the process of using the circuit board 10 to conduct the heat of the chip 13 to the outside of the circuit board 10 is accelerated, which is beneficial to reducing the heat of the chip 13 and thereby improving the system stability.

[0043] In some embodiments, Figure 3 As shown, the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the second surface P2.

[0044] It can be understood that the first surface P1 is generally referred to as the front side of the circuit board 10, and the second surface P2 is generally referred to as the back side of the circuit board 10. In this embodiment, the heat dissipation boss 12 extends outside the second surface P2, and heat can be drawn out to the back side of the circuit board 10. Moreover, based on the good thermal conductivity of the heat dissipation boss 12, the heat dissipation effect of the back side of the circuit board 10 can be improved.

[0045] Based on this, the heat dissipation range of the chip 13 can be expanded to the back of the circuit board 10. Based on the good thermal conductivity of the heat dissipation layer 11 and the heat dissipation boss 12, the heat dissipation efficiency of the circuit board 10 can be improved, the heat of the chip 13 can be reduced, and the system reliability can be improved.

[0046] For example, when the 3D stacked chips are arranged on the circuit board 10, as shown in FIG. Figure 3 As shown, the heat dissipation path of the upper chip 132 that originally dissipates heat through the lower chip 131 and the medium other than the circuit board 10 is not affected, and the heat of the upper chip 132 can also be conducted layer by layer through the lower chip 131, the heat dissipation layer 11 and the heat dissipation boss 12 to the back side of the circuit board 10 for dissipation, further improving the heat dissipation efficiency of the circuit board 10, which can further reduce the heat of the chip in the 3D package and improve the heat dissipation effect of the 3D stacked chip.

[0047] Or, in some embodiments, Figure 4 As shown, Figure 4 This is a schematic structural diagram of another circuit board provided in an embodiment of the present application, wherein the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the first surface P1 .

[0048] In this embodiment, the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the first surface P1, and can lead the heat to the front of the circuit board 10. Since the heat dissipation effect of the heat dissipation boss 12 is better than the heat dissipation effect of other media, the heat dissipation speed of the chip 13 can be improved. Based on the good thermal conductivity of the heat dissipation layer 11 and the heat dissipation boss 12, the heat dissipation efficiency of the circuit board 10 can be improved, the heat of the chip 13 can be reduced, and the system reliability can be improved.

[0049] Alternatively, in some embodiments, Figure 5 As shown, Figure 5 This is a schematic structural diagram of another circuit board provided in an embodiment of the present application, in which the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the first surface P1 and the second surface P2.

[0050] In this embodiment, the heat dissipation boss 12 can simultaneously lead the heat to the front and back sides of the circuit board 10 for heat dissipation, further increasing the heat dissipation area, greatly improving the heat dissipation efficiency of the circuit board 10, and helping to reduce the heat of the chip 13 and improve system reliability.

[0051] In some embodiments, Figure 6 As shown, Figure 6 This is a top view of a circuit board provided in an embodiment of the present application. The orthographic projection of the heat dissipation boss 12 on the first surface P1 is located around the orthographic projection of the chip 13 on the first surface P1.

[0052] The heat dissipation boss 12 can provide support for other components (such as heat dissipation devices) on the one hand, and can also speed up the efficiency of heat conduction on the other hand. In addition, since the heat dissipation boss 12 is arranged around the positive projection of the chip 13, it will not affect the interconnection communication between the circuit board 10 and the chip 13 and between chips (such as between the chip 131 and the chip 132), that is, the working performance of the circuit board 10 is not affected.

[0053] In some embodiments, Figure 7 As shown, Figure 7 A top view of another circuit board provided in an embodiment of the present application, the heat dissipation boss 12 includes a plurality of bumps, including orthographic projections of the plurality of bumps on the first surface P1, surrounding the outer side of the orthographic projection of the chip 13 on the first surface P1.

[0054] Exemplarily, the multiple bumps of the heat dissipation boss 12 are discretely distributed on the outside of the chip 13, which does not affect the preparation of the circuit board 10 and the realization of its functions, and can provide support for other components (such as heat dissipation devices). While ensuring the efficiency of heat conduction, it can also save resources and reduce production costs.

[0055] In some embodiments, Figure 3 As shown, the circuit board 10 includes a plurality of heat dissipation layers 11 , the orthographic projection of the heat dissipation layer 11 on the first surface P1 at least partially overlaps with the orthographic projection of the chip 13 on the first surface P1 , and the heat dissipation boss 12 is connected to the plurality of heat dissipation layers 11 .

[0056] The number of the heat dissipation layers 11 can be one, two, three or more. The multiple heat dissipation layers 11 are arranged in layers, which increases the heat dissipation area and can disperse the heat, which is conducive to quickly conducting the heat out, that is, it is conducive to accelerating the heat dissipation speed.

[0057] Furthermore, the orthographic projection of the heat dissipation layer 11 on the first surface P1 at least partially overlaps with the orthographic projection of the chip 13 on the first surface P1. In other words, the heat dissipation layer 11 may be disposed in a full-area distribution or in a partial distribution in the circuit board 10. The dissipation layer 11 does not affect the original conductive structure in the circuit board 10. For example, the heat dissipation layer 11 and the original conductive structure in the circuit board 10 are disposed in different layers.

[0058] Exemplarily, the heat dissipation layer 11 may be distributed over the entire area of ​​the circuit board 10 , thereby expanding the heat dissipation area of ​​the circuit board 10 and improving the heat dissipation efficiency of the circuit board 10 .

[0059] Alternatively, the heat dissipation layer 11 is only provided in a partial area of ​​the circuit board 10 (eg, the area covered by the orthographic projection of the chip 13 on the first surface P1 ) to achieve targeted heat dissipation of the area with higher temperature.

[0060] Alternatively, among the plurality of heat dissipation layers 11 , some of the heat dissipation layers 11 are distributed over the entire area, and some of the heat dissipation layers 11 are distributed partially.

[0061] In short, the disposition of the heat dissipation layer 11 does not affect the conductive function of the original conductive structure of the circuit board 10 and is conducive to the heat dissipation of the chip 13 .

[0062] In some embodiments, the material of the heat dissipation layer 11 includes copper.

[0063] Alternatively, in some embodiments, the material of the heat dissipation boss 12 includes copper.

[0064] Alternatively, in some embodiments, the materials of the heat dissipation layer 11 and the heat dissipation boss 12 both include copper.

[0065] In the process of preparing the circuit board 10, copper is usually used to achieve conductive connection and structural bonding. Since copper also has good thermal conductivity, the use of copper material to prepare the heat dissipation layer 11 can utilize the mature preparation process of the circuit board 10, will not increase the process difficulty, and can also improve the heat dissipation performance of the circuit board 10. Similarly, the use of copper material to prepare the heat dissipation boss 12 can utilize the mature bonding process in the relevant process, improve the heat dissipation efficiency of the circuit board 10, and improve the stability of the system.

[0066] In a second aspect, the present application also provides an electronic device, such as Figure 8 As shown, Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device 20 includes a circuit board 10 and a chip 13 in any one of the embodiments of the first aspect above. The chip 13 is arranged on the first surface P1 of the circuit board 10.

[0067] Since the circuit board 10 is provided with a heat dissipation layer 11 and a heat dissipation boss 12, and the heat dissipation layer 11 is located inside the circuit board 10, the heat dissipation boss 12 is connected to the heat dissipation layer 11, and the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the circuit board 10, through the above connection method, the heat of the chip 13 can be conducted to the circuit board 10, and then conducted to the heat dissipation layer 11 and the heat dissipation boss 12 in turn, thereby conducting the heat to the outside of the circuit board 10.

[0068] Since the heat dissipation layer 11 and the heat dissipation boss 12 have good thermal conductivity, the heat dissipation efficiency of the circuit board 10 is improved by providing the heat dissipation layer 11 and the heat dissipation boss 12, and the process of using the circuit board 10 to conduct the heat of the chip 13 to the outside of the circuit board 10 is accelerated, which is beneficial to reducing the heat of the chip 13 on the circuit board 10, thereby helping to alleviate the heating problem of the electronic device 20 and improve the system reliability of the electronic device 20.

[0069] In some embodiments, Figure 8As shown, the electronic device 20 also includes a heat dissipation component 21. For example, the heat dissipation component 21 can be a water cooling head, a water cooling plate, or a heat dissipation aluminum plate. Since the heat dissipation component 21 has a good heat dissipation effect, the heat dissipation boss 12 is directly connected to the heat dissipation component 21 for heat dissipation, which can further improve the heat dissipation efficiency, help reduce the heat of the chip 13 and the electronic device 20, and improve the system reliability.

[0070] Exemplarily, when the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the first surface P1 , the heat dissipation component 21 may be disposed on one side of the first surface P1 of the circuit board 10 .

[0071] When the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the second surface P2 , the heat dissipation component 21 may be disposed on one side of the second surface P2 of the circuit board 10 .

[0072] When the heat dissipation boss 12 extends from the inside of the circuit board 10 to the outside of the first surface P1 and the second surface P2 , the heat dissipation component 21 can be disposed on both the first surface P1 and the second surface P2 of the circuit board 10 .

[0073] Alternatively, in some other embodiments, the heat dissipation boss 12 does not need to be directly connected to the heat dissipation component 21, but heat is dissipated by air cooling.

[0074] In some embodiments, Figure 8 As shown, when the heat dissipation boss 12 is directly connected to the heat dissipation component 21 , the heat dissipation component 21 is also in contact with the chip 13 .

[0075] That is, in the embodiment of the present application, the chip 13 directly contacts the heat dissipation component 21 for heat dissipation, and the chip 13 can also be connected to the heat dissipation component 21 through the heat dissipation layer 11 and the heat dissipation boss 12 for heat dissipation. Compared with the related art, the heat dissipation path of the chip 13 is increased, which can improve the heat dissipation effect of the 3D packaged chip.

[0076] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that a person skilled in the art can think of within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A circuit board, characterized in that: include: A first surface and a second surface opposite to each other, wherein the first surface is used for arranging a chip; A heat dissipation layer, located inside the circuit board; The heat dissipation boss is connected to the heat dissipation layer, and the heat dissipation boss extends from the inside of the circuit board to the outside of the circuit board.

2. The circuit board according to claim 1, characterized in that: The chip is a chip obtained by 3D packaging of multiple chips; The circuit board is a PCB board.

3. The circuit board according to claim 1, characterized in that: The heat dissipation boss extends from the inside of the circuit board to the outside of the second surface; and / or, The heat dissipation boss extends from the inside of the circuit board to the outside of the first surface.

4. The circuit board according to any one of claims 1 to 3, characterized in that: The orthographic projection of the heat dissipation boss on the first surface is located around the orthographic projection of the chip on the first surface of the circuit board.

5. The circuit board according to claim 4, characterized in that: The heat dissipation boss includes a plurality of bumps, and the orthographic projections of the plurality of bumps on the first surface surround the outer side of the orthographic projection of the chip on the first surface.

6. The circuit board according to claim 1, characterized in that: The circuit board comprises a plurality of heat dissipation layers, and an orthographic projection of the heat dissipation layer on the first surface at least partially overlaps with an orthographic projection of the chip on the first surface; The heat dissipation boss is connected to a plurality of the heat dissipation layers.

7. The circuit board according to claim 1, characterized in that: The material of the heat dissipation layer includes copper; and / or, The material of the heat dissipation boss includes copper.

8. An electronic device, characterized in that: comprising a circuit board as claimed in any one of claims 1 to 7; The chip is arranged on the first surface of the circuit board.

9. The electronic device according to claim 8, characterized in that: The electronic device further comprises a heat dissipation component, and the heat dissipation boss is directly connected to the heat dissipation component to dissipate heat; or, The heat dissipation boss dissipates heat through air cooling.

10. The electronic device according to claim 9, characterized in that: In the case where the heat dissipation boss is directly connected to the heat dissipation component, the heat dissipation component is also in contact with the chip.

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