Processing apparatus and processing method
By reversely setting the wafer carrier and injecting etching gas using the lateral intake route, the problem of impurities and etching by-products falling or settled on the wafer surface is solved, which significantly improves the quality of the etching production process and component efficiency.
Patent Information
- Application Number
- CN202311171034.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-12
- Publication Date
- 2025-03-14
AI Technical Summary
In the etching and production process of integrated circuits, it is difficult for the prior art to effectively avoid impurities and etching by-products falling or settled on the wafer surface due to gravity, resulting in pattern defects or structural defects, affecting component performance and operating performance.
By setting the wafer carrier in reverse, the wafer surface is facing toward the bottom surface of the chamber, and the etching plasma is located between the wafer carrier and the bottom surface of the chamber, and etching gas is injected with the lateral intake route to prevent impurities and by-products from falling or settling on the wafer surface.
It effectively improves the processing effect and quality of the etching production process, improves the pattern defects or structural defects of the wafer, and significantly improves component efficiency and operating performance.
Smart Images
Figure CN119626927A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a processing device and a processing method, and in particular to a processing device and a processing method for processing a semiconductor device. Background Art
[0002] Integrated circuits have been developed to produce millions of complex components on a single chip, such as transistors, capacitors, and resistors. The production of these components involves multiple operation stages, among which the etching process is to deposit a material layer on the surface of a substrate, and then use a plasma etching process to etch the material layer to form corresponding components or patterns on the substrate. However, the design and development of chips require faster circuit wiring and higher circuit density, so that the size of the components of the integrated circuit continues to shrink. Under this requirement, the processing uniformity and processing quality of the etching process become more important. Therefore, there is a need for improvement in processing devices and processing methods in the relevant technical field, hoping to effectively improve the operating efficiency and quality of the etching process under the requirements of integrated circuit miniaturization. Summary of the invention
[0003] One object of the present invention is to provide a processing device and a processing method, which is to reversely set the wafer (chip) carrier so that the wafer surface faces the bottom of the chamber, and the etching plasma is located between the wafer carrier and the bottom of the chamber, so as to prevent impurities in the environment from falling on the wafer surface due to gravity during the etching process, and to prevent etching byproducts from settling on the wafer surface along with the etching gas. In this way, the processing device and the processing method of the present invention can effectively improve the processing effect and processing quality of the etching process, improve the pattern defects or structural defects of the wafer, and thus achieve good quality.
[0004] To achieve the above object, the present invention provides a processing device including a chamber, a wafer carrier, at least one air inlet and at least one electrode. The wafer carrier extends into the chamber. The air inlet is arranged on a side wall of the chamber. The electrode is arranged on the chamber.
[0005] To achieve the above object, the present invention provides a processing method comprising the following steps: providing a wafer into a chamber, injecting etching gas into the chamber from both sides of the wafer, and etching the wafer with the etching gas. BRIEF DESCRIPTION OF THE DRAWINGS
[0006] Figure 1 It is a cross-sectional schematic diagram of a processing device in a first embodiment of the present invention;
[0007] Figure 2 It is a cross-sectional schematic diagram of a processing device in a second embodiment of the present invention;
[0008] Figures 3 to 6It is a schematic diagram of a processing method in a preferred embodiment of the present invention, wherein:
[0009] Figure 3 A schematic diagram of the steps of the processing method;
[0010] Figure 4 is a schematic cross-sectional view of the processing device after loading a wafer;
[0011] Figure 5 is a schematic cross-sectional view of the processing device after the wafer is flipped; and
[0012] Figure 6 It is a cross-sectional schematic diagram of the processing device after etching plasma is generated.
[0013] Main component symbols
[0014] 10, 30 Processing device
[0015] 100 Chamber
[0016] 110, 310 wafer carrier
[0017] 110a, 310a Flip plane
[0018] 112, 312 Air Inlet
[0019] 112a, 312a Etching gas
[0020] 114, 116 Electrode
[0021] 118 Air valve
[0022] 120 Pumps
[0023] 122 Wafer (chip)
[0024] 124 Impurities
[0025] 126 Etching Byproducts
[0026] 128, 328 Plasma DETAILED DESCRIPTION
[0027] In order to enable a person skilled in the art who is familiar with the technical field to which the present invention belongs to further understand the present invention, several preferred embodiments of the present invention are listed below, and the components and effects to be achieved of the present invention are described in detail with reference to the accompanying drawings. Moreover, without departing from the spirit of the present invention, the technical features of the different embodiments described below can be replaced, reorganized, or mixed with each other to form other embodiments.
[0028] Please refer to Figure 1As shown, what is illustrated is a schematic diagram of a processing device 10 in the first embodiment of the present invention. The processing device 10 includes a chamber 100, a wafer carrier 110 and at least one gas inlet 112. The chamber 100, for example, includes a vacuum chamber, preferably a vacuum chamber suitable for etching processing, such as a plasma etching chamber, a plasma processing chamber or other suitable vacuum chambers, but not limited thereto. The wafer carrier 110 and the gas inlet 112 are both disposed in the chamber 100, wherein the wafer carrier 110 is extended and disposed in the chamber 100, for example, including a carrier suitable for carrying a wafer, preferably including an electrostatic chuck (ESC) for fixing the wafer by electrostatic clamping, but not limited thereto. The gas inlet 112 is disposed at the top of the chamber 100 to deliver the required etching gas 112a from the gas inlet 112 into the chamber 100. In one embodiment, a plurality of gas inlets 112 are simultaneously disposed at the top of the chamber 100 to uniformly deliver the etching gas 112 a to various locations inside the chamber 100 .
[0029] The processing device 10 further includes at least one electrode 114, such as a lower electrode, one end of which is connected to the chamber 100 and the other end is grounded. In this way, the etching gas is excited from below by the electrode 114 to dissociate into ions or active gases, and then the wafer 122 carried by the wafer carrier 110 is subjected to the desired treatment, such as etching treatment, but not limited thereto. In another embodiment, the processing device 10 may also selectively include two electrodes 114 and 116, respectively, a lower electrode and an upper electrode, such as Figure 1 As shown, but not limited to this. On the other hand, the processing device 10 further includes an air valve 118 and a pump 120, both of which are disposed below the chamber 100. The air valve 118 is a component for regulating the gas, and the pump 120 is disposed below the air valve 118, and is used to extract the gas in the chamber 100 and discharge it outside the chamber 100. For example, when the pressure inside the chamber 100 increases to a certain limit, the excess gas is released by opening the air valve 118, and the gas is extracted and discharged outside the chamber 100 by the pump 120. In this way, the pressure condition inside the chamber 100 can be maintained at a certain value, so as to facilitate the desired process (such as etching process).
[0030] Under this setting, the processing device 10 of the present embodiment is able to effectively perform the etching process of the wafer 122. First, the wafer 122 is placed on the wafer carrier 110, and the wafer 122 is electrically clamped on a plane 110a of the wafer carrier 110, so that the surface of the wafer 122 faces the top of the chamber 100. In this way, the required etching gas 112a can be delivered into the chamber 100 from the gas inlet 112, and the electrodes 114 and 116 excite the etching gas 112a to dissociate into ions or active gases, thereby generating an etching plasma 128 to etch the surface of the wafer 122. It should be noted that in the present embodiment, the generated etching plasma 128 is located between the wafer carrier 110 and the gas inlet 112 in the vertical direction of the processing device 10, so that the surface of the wafer 122 is directly facing the etching plasma 128 and the top of the chamber 100, as shown in FIG. Figure 1 On the other hand, during the etching process, the frequency of the etching process can be adjusted by electrodes 114 and 116 at any time.
[0031] Those skilled in the art should be able to easily understand that in order to meet actual needs, the processing device of the present invention may also have other aspects, not limited to the above. For example, there may be a variety of impurities 124 and / or etching byproducts 126 generated during the etching process inside the chamber 100. Therefore, when the surface of the wafer 122 is etched, the impurities 124 in the chamber 100 may fall on the surface of the wafer 122 due to gravity, and at the same time, the byproducts 126 may settle on the surface of the wafer 122 along with the etching plasma 128. Among them, the impurities 124 falling on the surface may cause pattern defects or structural defects on the wafer 122, and the byproducts 126 settled on the surface may affect the device performance and operation performance of the wafer 122.
[0032] Therefore, in another embodiment of the present invention, a processing device is provided that can prevent the impurities 124 and the byproducts 126 from affecting the etching process, effectively improve the pattern defects or structural defects that may be derived on the wafer 122, and enhance the performance and operation of its components. Other embodiments or variations of the processing device of the present invention will be further described below. In order to simplify the description, the following description mainly details the differences between the embodiments, and will not repeat the same parts. In addition, the same components in the embodiments of the present invention are marked with the same reference numerals to facilitate comparison between the embodiments.
[0033] Please refer to Figure 2, which is a schematic diagram of a processing device 30 in a second embodiment of the present invention. The structure of the processing device 30 is substantially the same as the processing device 10 in the first embodiment, and the similarities are not repeated. The main difference between this embodiment and the aforementioned embodiment is that the wafer carrier 310 of the processing device 30 has a flip plane 310a that can be flipped.
[0034] like Figure 2 As shown, the processing device 30 includes a chamber 100, a wafer carrier 310, at least one gas inlet 312, and at least one electrode 114. The wafer carrier 310 and the gas inlet 312 are both disposed in the chamber 100, wherein the wafer carrier 310 is also extended in the chamber 100, for example, including a carrier suitable for carrying a wafer, preferably including an electrostatic wafer seat that fixes the wafer by electrostatic clamping, but not limited thereto.
[0035] It should be noted that the gas inlet 312 of the present embodiment is arranged around the chamber 100 to uniformly deliver the etching gas 312a into the chamber 100. At the same time, the lateral gas inlet route can also prevent the impurities 124 or etching byproducts 126 in the chamber 100 from directly falling on the surface of the wafer 122, which can greatly improve the processing effect and processing quality of the etching process and improve the pattern defects or structural defects on the wafer 122. In one embodiment, the processing device 30 includes, for example, a plurality of gas inlets 112, which are respectively arranged on the surrounding side walls inside the chamber 100, preferably, they are circumferentially arranged on the surrounding side walls of the wafer carrier 310, such as Figure 2 Thus, the inlet route of the etching gas 312a introduced through the inlet 312 can more effectively prevent the impurities 124 or etching byproducts 126 in the chamber 100 from directly falling on the surface of the wafer 122, thereby avoiding the generation of pattern defects or structural defects of the wafer 122, thereby improving its device performance and operation performance.
[0036] It should be noted that the wafer carrier 310 further includes a flip plane 310a, which can be selectively flipped to face the top surface or the bottom surface of the chamber 100. Specifically, when the wafer carrier 310 initially carries the wafer 122, the flip plane 310a faces the top surface of the chamber 100. Then, by flipping the wafer carrier 310, the flip plane 310a turns to face the bottom surface of the chamber 100. At this time, the surface of the wafer 122 also faces the bottom surface of the chamber 100. Figure 2 In addition, the processing device 30 also includes an air valve 118 and a pump 120, both of which are arranged below the chamber 100. The specific features and functions of the air valve 118, the pump 120, and the aforementioned chamber 110, electrodes 114, 116 and other components are the same as those described in the first embodiment, and will not be repeated.
[0037] Under this setting, the processing device 30 of the present embodiment can also effectively perform the etching process of the wafer 122, and can effectively perform etching treatment on the surface of the wafer 122 without affecting the etching process by the impurities 124 and the byproducts 126. According to the processing device 30 of the present embodiment, the required etching gas 312a is sent into the chamber 100 from the gas inlet 312, and the electrodes 114 and 116 excite the etching gas 312a to dissociate into ions or active gases, thereby generating etching plasma 328 to perform the etching treatment on the surface of the wafer 122. In one embodiment, the processing device 30 may also additionally include a driving ring (not shown) disposed between the wafer carrier 310 and the bottom surface of the chamber 100, and the driving ring may generate an electric field or a magnetic field to drive the etching plasma 328 to move toward the surface of the wafer 122, thereby promoting the etching process.
[0038] It should be noted that, since the air inlet 312 of the present embodiment is disposed around the chamber 100, the lateral air inlet route allows the impurities 124 and etching byproducts 126 in the chamber 100 to fall only on the bottom surface of the chamber 100 due to gravity, and will not contaminate the surface of the wafer 122. Furthermore, since the wafer 122 is disposed on the flip plane 310a, the surface of the wafer 122 is turned to face the bottom surface of the chamber 100, so that the generated etching plasma 328 is located between the wafer carrier 310 and the bottom surface of the chamber 100 in the vertical direction of the processing device 30, and directly below the wafer 122 (and the wafer carrier 310), which is conducive to etching the surface of the wafer 122, such as Figure 2 As shown. Thus, when etching the surface of the wafer 122, the impurities 124 and etching byproducts 126 that fall on the bottom of the chamber 100 are discharged together with the gas when it is pumped out of the chamber 100 through the air valve 118 and the pump 120. In other words, the processing device 30 of this embodiment can effectively avoid the defects and defects that may be derived from the impurities 124 and / or etching byproducts 126, and significantly improve the performance and operation of the wafer 122.
[0039] In order to enable a person having ordinary knowledge in the technical field to which the present invention belongs to easily understand the processing device 30 of the present invention, the processing method performed by the processing device 30 of the present invention will be further described below.
[0040] Please refer to Figures 3 to 6 As shown, what is depicted is a schematic diagram of a processing method in a preferred embodiment of the present invention, which includes but is not limited to the following steps. First, as Figure 3 and Figure 4As shown, a wafer is provided (step S1), and a wafer 122 is provided in a chamber 100. A plurality of air inlets 312 are arranged around the chamber 100, electrodes 114 and 116 are arranged on the chamber 100, and an air valve 118 and a pump 120 are arranged below the chamber 100. In one embodiment, the chamber 100 includes, for example, a vacuum chamber, preferably a vacuum chamber suitable for etching processing, such as a plasma etching chamber, a plasma processing chamber or other suitable vacuum chambers, but is not limited thereto.
[0041] Then, the wafer is fixed (step S11). It should be noted that when the wafer 122 is transferred into the chamber 100, the wafer 122 is first placed on a wafer carrier 310 so as to fix the wafer 122 on a flip plane 310a of the wafer carrier 310. In a preferred embodiment, the wafer 122 is fixed on the flip plane 310a by, for example, electrostatic clamping, but is not limited thereto. Under this setting, the surface of the wafer 122 faces a top surface of the chamber 100, such as Figure 4 In another embodiment, before providing the wafer 122 into the chamber 100 (ie, step S1 ), the wafer 122 may be fixed on the wafer carrier 310 , and then the wafer 122 may be transferred into the chamber 100 by extending the wafer carrier 310 into the chamber 100 .
[0042] Next, the wafer is turned over (step S12). Figure 3 and Figure 5 As shown in FIG. 1 , after the wafer 122 is fixed on the flip plane 310a, the wafer carrier 310 is flipped so that the surface of the wafer 122 turns to face a bottom surface of the chamber 100. Under this configuration, the air inlet 312 disposed around the inside of the chamber 100 is located below the surface of the wafer 122, between the wafer carrier 310 and the bottom surface of the chamber 100, as shown in FIG. Figure 5 In another embodiment, before providing the wafer 122 into the chamber 100 (i.e., step S1), the wafer 122 may be fixed on the wafer carrier 310 and the wafer carrier 310 may be turned over, and then the wafer 122 may be transferred into the chamber 100 by extending the wafer carrier 310 into the chamber 100. In this way, the wafer 122 sent into the chamber 100 directly faces the bottom surface of the chamber 100.
[0043] Then, the etching gas is injected (step S2). Figure 3 and Figure 6As shown, etching gas 312a is injected from the gas inlet 312 around the chamber 100, and the etching gas 312a introduced laterally is dissociated into ions or active gases under the excitation of the electrodes 114 and 116, thereby generating etching plasma 328. It should be noted that, since the etching gas 312a is injected into the chamber 100 from around the wafer 122, the impurities (not shown) and / or etching byproducts (not shown) existing in the chamber 100 itself will not be able to settle or fall on the wafer 122, but will directly fall on the bottom surface of the chamber 100, which is conducive to improving the defects and defects that may be derived from the wafer 122. In addition, the lateral gas inlet route of the etching gas 312a enables the generated etching plasma 328 to be located between the wafer 122 (and the wafer carrier 310) and the bottom surface of the chamber 100.
[0044] Follow-up, as Figure 3 and Figure 6 As shown, the wafer is etched (step S3). Specifically, the etching process of the wafer 122 is to generate an etching plasma 328 through the etching gas 312, and then the surface of the wafer 122 is processed by the etching plasma 328, thereby forming a desired pattern or structure on the surface of the wafer 122. It should be noted that when the etching process of the wafer 122 is performed, the surface of the wafer 122 still faces the bottom surface of the chamber 100, so that the surface of the wafer 122 is just facing the etching plasma 328 formed between the bottom surface of the chamber 100 and the wafer carrier 310, which is conducive to the etching process on the surface of the wafer 122.
[0045] In one embodiment, during the etching process, a gas adjustment step (not shown) may be selectively performed to adjust the etching frequency of the etching gas 312a etching the wafer 122 through the electrodes 114 and 116. In addition, after the etching process, a gas exhaust step (not shown) may be selectively performed to exhaust the etching gas 312a in the chamber 100 from the bottom surface of the chamber 100 using the air valve 118 and the pump 120 disposed below the chamber 100. At the same time, since the impurities and / or the etching byproducts in the chamber 100 directly fall on the bottom surface of the chamber 100, when the etching gas 312a in the chamber 100 is exhausted, the impurities and / or the etching byproducts may also be exhausted to avoid affecting the wafer 122.
[0046] Therefore, according to the processing method of this embodiment, etching gas is injected around the wafer so that impurities and / or etching byproducts existing in the chamber itself cannot settle or fall on the wafer. In addition, before the etching process is performed, the wafer carrier is flipped in advance so that the surface of the wafer is turned to face the bottom surface of the chamber. Accordingly, the lateral air intake route causes the generated etching plasma to be located between the wafer and the bottom surface of the chamber, which is conducive to etching the surface of the wafer. Under this operation, the processing method of this embodiment can also perform etching on the wafer without interference from the impurities and / or the etching byproducts. In this way, not only the effect and quality of the etching process can be improved, but also the defects and defects that may be derived from the impurities and / or the etching byproducts on the wafer can be avoided, thereby significantly improving the efficiency and operating performance of the wafer.
[0047] In general, the present invention provides a processing device and a processing method, which is to reversely set the wafer carrier so that the wafer surface faces the bottom of the chamber, and the etching plasma is located between the wafer carrier and the bottom of the chamber, so as to prevent impurities in the environment from falling on the wafer surface due to gravity during the etching process, and to prevent etching byproducts from settling on the wafer surface along with the etching gas. In this way, the processing device and the processing method of the present invention can effectively improve the processing effect and processing quality of the etching process, improve the pattern defects or structural defects of the wafer, and thus achieve good quality.
[0048] The above descriptions are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.
Claims
1. A processing device, characterized in that: include: Chamber; A wafer carrier is extended and disposed in the chamber; at least one air inlet disposed around the chamber; as well as At least one electrode is disposed on the chamber.
2. The processing device according to claim 1, characterized in that The air inlet is arranged on the side wall below the wafer carrier.
3. The processing device according to claim 1, characterized in that The chamber also includes an etching plasma located between the wafer carrier and the bottom surface of the chamber.
4. The processing device according to claim 3, characterized in that The wafer carrier also includes a flip plane.
5. The processing device according to claim 4, characterized in that The turning plane faces the bottom surface of the chamber.
6. The processing device according to claim 4, characterized in that The flip plane includes an electrostatic wafer holder.
7. The processing device according to claim 1, characterized in that An air valve is also included and is arranged below the chamber.
8. The processing device according to claim 7, characterized in that A pump is also included and is arranged below the air valve.
9. A processing method, characterized in that: include: providing a wafer into the chamber; Injecting etching gas into the chamber from the periphery of the wafer; as well as The wafer is etched by the etching gas.
10. The processing method according to claim 9, characterized in that: Before injecting the etching gas into the chamber, the method further comprises: The wafer is positioned to face the bottom surface of the chamber.
11. The processing method according to claim 10, characterized in that: Also includes: An etching plasma is generated in the chamber and is located between the bottom surface of the chamber and the wafer.
12. The processing method according to claim 10, characterized in that: Also includes: transferring the wafer into the chamber; placing the wafer on a wafer carrier in the chamber, wherein the wafer carrier faces a top surface of the chamber; as well as The wafer carrier is turned over.
13. The processing method according to claim 12, characterized in that: Also includes: The wafer is fixed on the wafer carrier by electrostatic clamping.
14. The processing method according to claim 9, characterized in that: Also includes: The etching gas is exhausted from the bottom surface of the chamber.
15. The processing method according to claim 14, characterized in that: Also includes: When the etching gas is exhausted from the bottom surface of the chamber, impurities and etching byproducts are also exhausted from the chamber.
16. The processing method according to claim 9, characterized in that: Also includes: The etching frequency of the etching gas etching the wafer is adjusted by at least one electrode disposed on the chamber.