Frequency divider system and frequency division control method

Abstract

The invention discloses a frequency divider system and a frequency division control method. The frequency divider system comprises: a radio frequency signal inlet connector for receiving an optical frequency comb signal; the frequency divider unit is connected with the radio frequency signal inlet connector, and the frequency divider unit comprises a plurality of frequency division stages; the VHF frequency band signal output connector is connected with the frequency divider unit and is used for outputting a VHF frequency band signal; the MCU controller is connected with the frequency divider unit and is used for controlling the frequency dividing ratio of a plurality of frequency dividing stages through GPIO (General Purpose Input / Output); and the low-frequency connector is connected with the MCU controller and is used for providing a power supply and a frequency division control signal for the system. The problems that an existing frequency divider is high in noise coefficient, low in processable highest frequency, low in dynamic range, difficult to adapt to complex and changeable application environments, low in processable input signal frequency, narrow in output frequency range, high in power consumption and high in cost and generally needs high-precision clock equipment can be solved.

Description

Technical Field

[0001] The embodiments of the present application relate to the fields of remote sensing monitoring and radio frequency analog signal processing. More specifically, the present invention relates to a frequency divider system and a frequency division control method. Background Art

[0002] Frequency Combs (optical frequency comb) is an optical spectrum composed of equally spaced lines. Each line of this spectrum corresponds to a precise frequency, and the spacing between these frequencies is equal, so it is called a "comb".

[0003] Optical frequency combs have a wide range of applications, mainly including precision measurement, optical synchronization, spectroscopy, astronomy and other fields. For example, it can be used to measure the frequency of light, which has important applications in physics, such as measuring the energy level of atoms and measuring the speed of light. In addition, optical frequency combs can also be used in fiber-optic communications. By encoding data onto different frequency comb teeth, high-speed and high-capacity data transmission can be achieved. In astronomy, optical frequency combs can be used to measure the speed of stars, which is of great significance for research such as searching for exoplanets.

[0004] The processing of 20GHz optical frequency comb plays an important role in signal processing and analysis systems. Due to the high frequency, it needs to be processed into a low-frequency signal and then converted to a digital signal before being processed by the processor. At present, the frequency divider technology is a technology that uses a mixer to move a higher frequency to a lower frequency. The purpose of the frequency divider is to reduce the carrier frequency of the signal or directly remove the carrier frequency to obtain a baseband signal. It is widely used in communications, radar systems and various electronic devices.

[0005] At present, the divider is usually implemented by a phase-locked loop, which is costly, complex in programming and debugging. In addition, the divider with dynamic range requirements is usually implemented by controlling the dynamic range with analog signals, and the signal stepping cannot be accurately controlled. In addition, the register for the local oscillator signal is generally an FPGA or an MCU with a crystal oscillator, which is costly and complex in programming. Summary of the invention

[0006] A series of simplified concepts are introduced in the Summary of the Invention, which will be further described in detail in the Detailed Description of the Invention. The Summary of the Invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0007] In order to solve the problems of the existing frequency divider, such as high noise coefficient, low maximum frequency, low dynamic range, difficulty in adapting to complex and changing application environments, low input signal frequency, narrow output frequency range, high power consumption, high cost, and generally requiring high-precision clock devices, in a first aspect, the present invention proposes a frequency divider system, including:

[0008] A radio frequency signal inlet connector for receiving an optical frequency comb signal;

[0009] A frequency divider unit connected to the RF signal inlet connector, the frequency divider unit comprising a plurality of frequency division stages;

[0010] A VHF band signal output connector, connected to the frequency divider unit, for outputting a VHF band signal;

[0011] An MCU controller, connected to the frequency divider unit, for controlling the frequency division ratios of a plurality of frequency division stages through GPIO; and

[0012] The low-frequency connector is connected to the MCU controller and is used to provide power and frequency division control signals for the system.

[0013] Optionally, the frequency divider unit further includes:

[0014] Filter, to filter non-target signals;

[0015] A low noise amplifier is used to process the received optical frequency comb signal.

[0016] Optionally, the system further includes a radio frequency test output port, and the frequency divider unit further includes:

[0017] The power divider is connected to the MCU controller via the SPI bus and is used to divide the signal into two paths, one path is transmitted to the next level of frequency division, and the other path is output to the RF test output port.

[0018] Optionally, the MCU controller is an MCU microcontroller with 36 pins and no external crystal oscillator.

[0019] Optionally, also include:

[0020] The digitally controlled attenuator is connected to the output end of the power divider. The power divider is used to divide the signal into two paths, one of which is transmitted to the next level of frequency division after passing through the digitally controlled attenuator, and the other is output to the radio frequency test output port. The MCU controller sends a control instruction to the digitally controlled attenuator through the SPI bus to adjust the power attenuation value of the attenuator to dynamically control the power of the output signal.

[0021] Optionally, the signal adjusted by the digitally controlled attenuator is amplified by an amplifier and then output to the output connector.

[0022] In a second aspect, the present invention further provides a frequency division control method, using the frequency divider system described in the first aspect, the method comprising:

[0023] Based on the received optical frequency comb signal and the target VHF signal, the frequency division ratio is dynamically adjusted through the GPIO interface of the MCU, and the signal power is adjusted through the SPI interface.

[0024] Optionally, also include:

[0025] Adjust the output power and division ratio by testing the feedback of the RF test output port;

[0026] Based on the negative feedback model, the frequency division and power control parameters of the system are adjusted in real time to adapt to the fluctuation of the input signal.

[0027] In summary, the frequency divider system proposed in this application includes: a radio frequency signal inlet connector for receiving an optical frequency comb signal; a frequency divider unit connected to the radio frequency signal inlet connector, the frequency divider unit including multiple frequency division stages; a VHF band signal output connector connected to the frequency divider unit for outputting a signal in the VHF band; an MCU controller connected to the frequency divider unit for controlling the frequency division ratio of multiple frequency division stages through GPIO; and a low-frequency connector connected to the MCU controller for providing power and frequency division control signals for the system. This system uses a low-noise amplifier and a high-performance frequency divider to ensure low noise characteristics at different frequencies, so that the dynamic range of the system reaches 63dB. This effectively improves the adaptability of the frequency divider under different signal strengths and meets the requirements of various complex application environments. By selecting a miniaturized MCU (STM32F103TBU6) with only 36 pins and no external crystal oscillator, the overall size of the system is controlled within 30mm*100mm, and the comprehensive power consumption is only 2.372W. This solves the problems of high power consumption and large size in existing systems, and is suitable for applications with strict restrictions on size and power consumption. The system uses a combination of multiple dividers, providing flexible frequency division ratio selection (such as frequency division ratio 1 / 2 / 4 / 8, etc.), and dynamically adjusts the frequency division ratio through MCU control to meet the needs of multi-band output. This design makes the system reconfigurable and can flexibly adjust the output frequency range according to different application scenarios, covering from 9.76MHz to 625MHz. Compared with the traditional high-cost divider using a phase-locked loop, this solution uses a dedicated divider chip and a digitally controlled attenuator control method, which has a simple structure and low cost. The miniaturized design of the MCU further reduces the equipment cost, making it suitable for mass production and wide application.

[0028] The frequency division control method of the present invention, other advantages, objectives and features of the present invention will be reflected in part through the following description, and in part will be understood by those skilled in the art through research and practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present specification. Also, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0030] Figure 1 A schematic diagram of the structure of a frequency divider system provided in an embodiment of the present application;

[0031] Figure 2 A schematic diagram of the structure of another frequency divider system provided in an embodiment of the present application;

[0032] Figure 3 A schematic diagram of the structure of another frequency divider system provided in an embodiment of the present application;

[0033] Figure 4 A signal phase noise simulation diagram of a frequency divider system provided in an embodiment of the present application;

[0034] Figure 5 A signal phase noise simulation diagram of another frequency divider system provided in an embodiment of the present application;

[0035] Figure 6 A schematic diagram of the structure of another frequency divider system provided in an embodiment of the present application;

[0036] Figure 7 A schematic flowchart of a frequency division control method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices. The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0038] In order to solve the problems of the current frequency divider, such as high noise coefficient, low maximum frequency, low dynamic range, difficulty in adapting to complex and changing application environments, low input signal frequency, narrow output frequency range, high power consumption, high cost, and generally requiring high-precision clock equipment. In addition, there are also problems such as high noise coefficient, low gain range, low dynamic range, and difficulty in adapting to complex and changing application environments. Please refer to Figure 1 , is a schematic diagram of the structure of a frequency divider system provided in an embodiment of the present application, including:

[0039] A radio frequency signal inlet connector 1, for receiving an optical frequency comb signal;

[0040] A frequency divider unit 2, connected to the RF signal input connector, the frequency divider unit comprising a plurality of frequency division stages;

[0041] A VHF band signal output connector 3, connected to the frequency divider unit, for outputting a VHF band signal;

[0042] An MCU controller 4, connected to the frequency divider unit, for controlling the frequency division ratios of multiple frequency division stages through GPIO; and

[0043] The low frequency connector 8 is connected to the MCU controller and is used to provide power and frequency division control signals for the system.

[0044] In summary, the frequency divider system proposed in this application includes: a radio frequency signal inlet connector for receiving an optical frequency comb signal; a frequency divider unit connected to the radio frequency signal inlet connector, the frequency divider unit including multiple frequency division stages; a VHF band signal output connector connected to the frequency divider unit for outputting a signal in the VHF band; an MCU controller connected to the frequency divider unit for controlling the frequency division ratio of multiple frequency division stages through GPIO; and a low-frequency connector connected to the MCU controller for providing power and frequency division control signals for the system. This system uses a low-noise amplifier and a high-performance frequency divider to ensure low noise characteristics at different frequencies, so that the dynamic range of the system reaches 63dB. This effectively improves the adaptability of the frequency divider under different signal strengths and meets the requirements of various complex application environments. By selecting a miniaturized MCU (STM32F103TBU6) with only 36 pins and no external crystal oscillator, the overall size of the system is controlled within 30mm*100mm, and the comprehensive power consumption is only 2.372W. This solves the problems of high power consumption and large size in existing systems, and is suitable for applications with strict restrictions on size and power consumption. The system uses a combination of multiple dividers, providing flexible frequency division ratio selection (such as frequency division ratio 1 / 2 / 4 / 8, etc.), and dynamically adjusts the frequency division ratio through MCU control to meet the needs of multi-band output. This design makes the system reconfigurable and can flexibly adjust the output frequency range according to different application scenarios, covering from 9.76MHz to 625MHz. Compared with the traditional high-cost divider using a phase-locked loop, this solution uses a dedicated divider chip and a digitally controlled attenuator control method, which has a simple structure and low cost. The miniaturized design of the MCU further reduces the equipment cost, making it suitable for mass production and wide application.

[0045] According to some embodiments, the frequency divider unit further comprises:

[0046] Filter, to filter non-target signals;

[0047] A low noise amplifier is used to process the received optical frequency comb signal.

[0048] According to some embodiments, the system further comprises a radio frequency test output port, and the frequency divider unit further comprises:

[0049] The power divider is connected to the MCU controller via the SPI bus and is used to divide the signal into two paths, one path is transmitted to the next level of frequency division, and the other path is output to the RF test output port.

[0050] For example, Figure 1 As shown, the radio frequency test output ports may include RFOut-2 and RFOut-3.

[0051] According to some embodiments, the MCU controller is an MCU microcontroller with 36 pins and no external crystal oscillator.

[0052] According to some embodiments, further comprising:

[0053] The digitally controlled attenuator is connected to the output end of the power divider. The power divider is used to divide the signal into two paths, one of which is transmitted to the next level of frequency division after passing through the digitally controlled attenuator, and the other is output to the radio frequency test output port. The MCU controller sends a control instruction to the digitally controlled attenuator through the SPI bus to adjust the power attenuation value of the attenuator to dynamically control the power of the output signal.

[0054] According to some embodiments, the signal adjusted by the digitally controlled attenuator is amplified by an amplifier and then output to the output connector.

[0055] Exemplarily, the module RF signal input connector receives the optical frequency comb 20GHz frequency band signal and sends it to the divider unit. The input signal power is -25dBm to -15dBm, which is the normal output power level of the optical frequency comb 20GHz signal obtained after conversion by the photoelectric converter. The divider unit divides the 20GHz frequency band signal and processes it into a VHF frequency band signal. The VHF frequency band signal output connector connects the output signal of the divider unit and transmits it to the outside. It is the final target output RF signal of the present invention, and the default frequency is 250Mhz; the MCU controller provides a register for the local oscillator, and the model is STM32F103TBU6. In particular, this MCU has only 36 pins and does not require an external crystal oscillator. The size is 6mm*6mm, and the design is low-cost and miniaturized. The RF connection line connects the signal and the port for interconnection. RF test output port 2, detects the RF signal obtained after the first frequency division and outputs it to the outside; RF test output port 3, detects the RF signal obtained after the second frequency division and outputs it to the outside; low-frequency connector, the entire divider provides power supply and frequency division control signal, the model is 2.54mm double-row pin; in particular, the technology described in the present invention can be implemented within an area of ​​30mm*100mm, with a miniaturized design.

[0056] It can be understood that the optical frequency comb 20GHz signal enters the divider unit through the module RF signal input connector, the MCU controller controls the frequency division ratio of the divider through GPIO to determine the frequency of the target VHF band signal, and the MCU controller controls the power dynamic range of the target VHF band signal through the SPI bus; the signal converted into the VHF band after being processed by the divider is sent to the next level for processing through the VHF band signal output connector, the low-frequency connector provides power and frequency division ratio for this device, and the RF connection line provides the connection of the communication link. In summary, this device and system can realize the frequency division function from the optical frequency comb 20GHz band to the VHF band, and provide filtering and digitally controlled variable gain amplification, which can effectively reduce the volume and mass of the device and the overall system complexity.

[0057] See also Figure 2 and Figure 3 , Figure 2 A schematic diagram of the structure of another frequency divider system provided in an embodiment of the present application; Figure 3 This is a schematic diagram of the structure of another frequency divider system provided in the embodiment of the present application. The function of this unit is to down-convert the signal of the optical frequency comb 20GHz frequency band into the signal of the VHF frequency band. The block diagram at high gain is as follows Figure 2 , at this time the gain is maximum (up to 21.3db); the block diagram at low gain is as follows Figure 3, at this time the gain is minimum (can reach -39.7db); the system dynamic range can reach 63db. The meanings of the various parts are as follows: filter, the model is BFCQ-1932+, the passband is 17.7 to 21GHz, low insertion loss and high out-of-band suppression, it filters non-target signals to avoid interfering with the system; low noise amplifier, the model is PMA3-223GLN+, the noise figure is 1.6dB, it amplifies the 20GHz frequency band signal of the optical frequency comb; divider, the model is HMC862A, the manufacturer is ADI, the frequency range is 0.1GHz to 24GHz, it converts the 20GHz frequency band signal into a divided signal, the division ratio is 1 / 2 / 4 / 8, the division ratio is controlled by the GPIO setting, and the default division ratio in this article is 4; power divider, the model is EP2K1+, the frequency range is 2-26.5GHz, it divides the divided signal, sends one way to the lower level for processing, and outputs one way to the outside of the module for detection; divider, the model is HMC862A, the manufacturer is ADI, the range is 0.1GHz to 24GHz, converts the signal of 20GHz frequency band into the signal after frequency division processing, the frequency division ratio is 1 / 2 / 4 / 8, and the frequency division ratio is controlled by GPIO setting. The default frequency division ratio in this article is 4; the power divider, the model is EP2W1+, the frequency range is 0.5-9.5GHz, the power of the divided signal is divided, one way is sent to the lower level for processing, and one way is output to the outside of the module for detection; the frequency divider, the model is HMC394, CNC 5-bit frequency divider, manufacturer ADI, frequency range is 0.1-2.2GHz, the signal after two frequency division processing is divided for the third time, the frequency division ratio The frequency division ratio is 2 to 32, and the frequency division ratio is controlled by the GPIO setting, and can be set in sequence. The default frequency division ratio in this article is 5; the low-pass filter, the model is LFCN-630+, which filters the VHF band signal; the digital attenuator, the model is HMC542B, the manufacturer is ADI, the frequency range is DC-4GHz, and the range is 31.5db; the amplifier, the model is Gali-6+, the frequency range is DC-4GHz, and the gain is 12db; the digital attenuator, the model is HMC542B, the manufacturer is ADI, the frequency range is DC-4GHz, and the range is 31.5db;

[0058] In summary, the 20G signal input to this divider unit is sent to the divider for 1 / 2 / 4 / 8 frequency division (converted to 2.5G-20G signal) after filtering, amplification and power division, and then passed through a divider of the same model for 1 / 2 / 4 / 8 frequency division (converted to 312.5M-20G signal), and then used a low-frequency 2.2G divider for 2 to 32 frequency division, and finally sent to the back stage after attenuation and amplification, filtering and power division by the digital attenuator. At the same time, it has the function of intermediate frequency detection, and the intermediate two frequency divisions have detection port output. The system has a system noise coefficient of 3.02db, a maximum gain of 21.3db, and a dynamic range of 63db. It has the characteristics of low noise, low cost and high dynamics, and has a high input frequency, supports multi-band output, and can be reconstructed. The default output frequency is 250MHz, the maximum frequency is 625MHz, and the minimum frequency is 9.76MHz.

[0059] For example, in the frequency divider unit, multiple types of frequency divider chips are used, such as HMC862A and HMC394. Among them, HMC862A supports a frequency range of 0.1GHz to 24GHz, and can divide the 20GHz frequency band signal into a lower frequency band; HMC394 supports a frequency range of 0.1GHz to 2.2GHz for further frequency division processing. Through these dedicated frequency divider chips, the frequency division circuit design can be simplified, and the debugging difficulty and cost can be reduced.

[0060] Exemplarily, the above system uses HMC542B digital controlled attenuator (frequency range DC-4GHz, attenuation range 31.5dB), which is dynamically controlled through SPI bus and can adjust the power level of the signal. The digital controlled attenuator can accurately adjust the power of the signal according to the demand, so that the system can adapt to different signal strengths and application scenarios. The use of digital controlled attenuator provides a high-precision signal gain control method, which is more accurate and more convenient to control than traditional analog signal control. The digital control method realized through SPI interface can more accurately control the power dynamic range of the output signal, increasing the flexibility and adjustability of the system. This design method using dedicated chip is simpler than traditional phase-locked loop technology, especially suitable for applications with high dynamic range and complex signal frequency. The document points out the shortcomings of traditional phase-locked loop frequency divider, such as high cost, complex program and difficult debugging. The scheme achieves the effect of simplified control and easy debugging through a dedicated frequency divider chip. The introduction of digital controlled attenuator enables the system to flexibly adjust the power dynamic range of the output signal. Compared with fixed attenuators, digitally controlled attenuators can accurately adjust power according to external control, avoiding excessive or insufficient power deviations in signals in different application scenarios, thereby enhancing the system's adaptability and performance stability.

[0061] The simulation diagram of the phase noise of the divider signal is as follows Figure 4 and Figure 5, Figure 4 A signal phase noise simulation diagram of a frequency divider system provided in an embodiment of the present application; Figure 5 This is a signal phase noise simulation diagram of another divider system provided in an embodiment of the present application. The divider signal phase noise simulation diagram is similar to the measured result, and the device performance is good.

[0062] See also Figure 6 , Figure 6 A schematic structural diagram of another frequency divider system provided in an embodiment of the present application shows the frequency divider system after removing the frequency divider of model HMC862A.

[0063] Figure 7 A schematic flow chart of a frequency division control method provided in an embodiment of the present application is shown in FIG. Figure 7 As shown, the frequency division control method adopts the above-mentioned frequency divider system, and the method includes:

[0064] Based on the received optical frequency comb signal and the target VHF signal, the frequency division ratio is dynamically adjusted through the GPIO interface of the MCU, and the signal power is adjusted through the SPI interface.

[0065] In some examples, the method further includes:

[0066] Adjust the output power and division ratio by testing the feedback of the RF test output port;

[0067] Based on the negative feedback model, the frequency division and power control parameters of the system are adjusted in real time to adapt to the fluctuation of the input signal.

[0068] It can be understood that the network can adjust the system's frequency division and power control parameters in real time to adapt to the fluctuations of the input signal. This negative feedback control method is particularly suitable for occasions where the frequency range and signal power change frequently, allowing the system to automatically adjust to the optimal output state in a complex signal environment, thereby improving the system function.

[0069] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and for parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0070] Those skilled in the art should understand that the embodiments of the present application can be provided as methods, systems, and computer program products to achieve the design objectives in the form of a combination of software and hardware.

[0071] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded computer, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0072] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0073] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0074] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0075] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0076] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware combined with software functional units.

[0077] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A frequency divider system, characterized in that: include: A radio frequency signal inlet connector for receiving an optical frequency comb signal; A frequency divider unit connected to the RF signal inlet connector, the frequency divider unit comprising a plurality of frequency division stages; A VHF band signal output connector, connected to the frequency divider unit, for outputting a VHF band signal; An MCU controller, connected to the frequency divider unit, for controlling the frequency division ratios of a plurality of frequency division stages through GPIO; and The low-frequency connector is connected to the MCU controller and is used to provide power and frequency division control signals for the system.

2. The system according to claim 1, characterized in that The frequency divider unit further comprises: Filter, to filter non-target signals; A low noise amplifier is used to process the received optical frequency comb signal.

3. The system according to claim 1, characterized in that The system further includes a radio frequency test output port, and the frequency divider unit further includes: The power divider is connected to the MCU controller via the SPI bus and is used to divide the signal into two paths, one path is transmitted to the next level of frequency division, and the other path is output to the RF test output port.

4. The system according to claim 1, characterized in that The MCU controller is an MCU microcontroller with 36 pins and no external crystal oscillator.

5. The system according to claim 1, wherein: Also includes: The digital controlled attenuator is connected to the output end of the power divider, and the power divider is used to divide the signal into two paths, one path is transmitted to the next level of frequency division after passing through the digital controlled attenuator, and the other path is output to the radio frequency test output port.

6. The system according to claim 5, characterized in that The MCU controller sends a control instruction to the digitally controlled attenuator through the SPI bus to adjust the power attenuation value of the attenuator, so as to dynamically control the power of the output signal.

7. The system according to claim 6, characterized in that The signal adjusted by the digitally controlled attenuator is amplified by the amplifier and then output to the output connector.

8. A frequency division control method, characterized in that: Using the frequency divider system according to one of claims 1 to 7, the method comprises: Based on the received optical frequency comb signal and the target VHF signal, the frequency division ratio is dynamically adjusted through the GPIO interface of the MCU, and the signal power is adjusted through the SPI interface.

9. The control method according to claim 8, characterized in that: The step of adjusting the signal power through the SPI interface includes: A control instruction is sent to the digital controlled attenuator via the SPI bus to adjust the power attenuation value of the attenuator, so as to dynamically control the power of the output signal.

10. The control method according to claim 8, characterized in that: Also includes: Adjust the output power and division ratio by testing the feedback of the RF test output port; Based on the negative feedback model, the frequency division and power control parameters of the system are adjusted in real time to adapt to the fluctuation of the input signal.

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