Multi-path output pulse synchronization device capable of adjusting voltage and pulse width

Abstract

The invention discloses a multi-path output pulse synchronization device capable of adjusting voltage and pulse width, and relates to the field of power systems, a field programmable gate array is used for monitoring pulse input and controlling multi-path pulse output, the field programmable gate array is further communicated with a UART-to-USB module through a UART, and the UART-to-USB module is connected with the field programmable gate array. The UART-to-USB module is connected with communication between the field programmable gate array and an upper computer, a USB signal of the upper computer and a UART signal of the field programmable gate array are mutually converted, the upper computer and the field programmable gate array are communicated, a pulse signal output by the field programmable gate array is output after passing through the output adjustable voltage unit, and the UART-to-USB module is connected with the output adjustable voltage unit. The power supply module supplies power to the field programmable gate array, the UART-to-USB module and the output adjustable voltage unit; according to the invention, the pulse width and voltage required by output can be set only through adjustment of an upper computer, so that external equipment and time are greatly saved, and the operation is convenient.

Description

Technical Field

[0001] The invention relates to the field of electric power systems, and in particular to a multi-channel output pulse synchronization device with adjustable voltage and pulse width. Background Art

[0002] In the prior art, when a device receives a trigger pulse, the high level and pulse width of the multi-channel output pulses sent simultaneously by the device are fixed. This means that if one wants to conduct experiments with different pulse voltages or widths, one needs to add additional circuits or devices for adjustment, which is cumbersome to operate. To this end, we propose a multi-channel output pulse synchronization device with adjustable voltage and pulse width. Summary of the invention

[0003] The main purpose of the present invention is to provide a multi-channel output pulse synchronization device with adjustable voltage and pulse width, adjustable pulse width, adjustable output pulse high level time, and adjustable output pulse voltage.

[0004] To achieve the above-mentioned purpose, the technical solution adopted by the present invention is: a multi-channel output pulse synchronization device with adjustable voltage and pulse width, comprising a field programmable gate array, a power module, a UART to USB module and an output adjustable voltage unit, the field programmable gate array monitors pulse input and controls multi-channel pulse output, the field programmable gate array also communicates with the UART to USB module through UART, the UART to USB module connects the communication between the field programmable gate array and the host computer, converts the USB signal of the host computer and the UART signal of the field programmable gate array to each other, so that the two communicate, the pulse signal output by the field programmable gate array is output after passing through the output adjustable voltage unit, the power module is electrically connected to the field programmable gate array, the UART to USB module, and the output adjustable voltage unit respectively, and supplies power to the field programmable gate array, the UART to USB module and the output adjustable voltage unit;

[0005] The output adjustable voltage unit is composed of a programmable digital potentiometer, an LDO, an operational amplifier or a comparator; when a comparator is used in the output adjustable voltage unit, the programmable digital potentiometer is used as a feedback resistor of the LDO to adjust the output voltage of the LDO, and the voltage is used as a power supply voltage of the high-speed comparator. At this time, the field programmable gate array adjusts the output voltage of the LDO by adjusting the resistance value of the digital potentiometer through the SPI interface of the programmable digital potentiometer, thereby achieving the adjustment operation of the output level of the comparator; the output pulse signal of the field programmable gate array is connected to the positive input terminal of the comparator, and the negative input terminal of the comparator uses a resistor to divide a high level voltage lower than the output pulse signal of the field programmable gate array. At this time, when the field programmable gate array outputs a pulse, the level signal of the positive input terminal will be higher than the level signal of the negative input terminal, and the comparator outputs a high level, and the voltage value of the output pulse is the output voltage value of the LDO.

[0006] When an operational amplifier is used in the output adjustable voltage unit, the programmable digital potentiometer is used as a feedback resistor of the operational amplifier to adjust the amplification factor of the operational amplifier to control the output voltage. At this time, the field programmable gate array adjusts the resistance value of the digital potentiometer through the SPI interface of the programmable digital potentiometer to adjust the amplification factor of the operational amplifier, thereby adjusting the output voltage.

[0007] The present invention has the following beneficial effects:

[0008] The multi-channel output pulse synchronization device with adjustable voltage and pulse width of the present invention can set the pulse width and voltage required for output only by adjusting the upper computer, which greatly saves external equipment and time and is convenient to operate. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 The principle framework of the multi-channel output pulse synchronization device with adjustable voltage and pulse width of the present invention is Figure 1 ;

[0010] Figure 2 The principle framework of the multi-channel output pulse synchronization device with adjustable voltage and pulse width of the present invention is Figure 2 ;

[0011] Figure 3 The comparator scheme operation frame in the output adjustable voltage unit of the present invention is Figure 1 ;

[0012] Figure 4 The comparator scheme operation frame in the output adjustable voltage unit of the present invention is Figure 2 ;

[0013] Figure 5 This is a block diagram of the operation of the operational amplifier scheme in the output adjustable voltage unit of the present invention. DETAILED DESCRIPTION

[0014] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0015] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0016] Please refer to Figure 1-Figure 2 As shown, the present invention is a multi-channel output pulse synchronization device with adjustable voltage and pulse width, including a field programmable gate array, a power module, a UART to USB module and an output adjustable voltage unit. The field programmable gate array monitors pulse input and controls multi-channel pulse output. The field programmable gate array also communicates with the UART to USB module through UART. The UART to USB module connects the communication between the field programmable gate array and the host computer, converts the USB signal of the host computer and the UART signal of the field programmable gate array to each other, allowing the two to communicate. The pulse signal output by the field programmable gate array is output after passing through the output adjustable voltage unit. The power module is electrically connected to the field programmable gate array, the UART to USB module, and the output adjustable voltage unit respectively to supply power to the field programmable gate array, the UART to USB module and the output adjustable voltage unit.

[0017] The output adjustable voltage unit is composed of a programmable digital potentiometer, an LDO, an op amp or a comparator, including two schemes described in detail as follows;

[0018] like Figure 3-Figure 4As shown in the figure, the comparator scheme: the programmable digital potentiometer is used as the feedback resistor of the LDO to adjust the output voltage of the LDO, and the voltage is used as the power supply voltage of the high-speed comparator. At this time, the field programmable gate array adjusts the resistance value of the digital potentiometer through the SPI interface of the programmable digital potentiometer to adjust the output voltage of the LDO, and the output level of the comparator can be adjusted. The output pulse signal of the field programmable gate array is connected to the positive input terminal of the comparator, and the negative input terminal of the comparator uses a resistor to divide a high level voltage lower than the output pulse signal of the field programmable gate array. When the field programmable gate array outputs a pulse, the level signal of the positive input terminal will be higher than the level signal of the negative input terminal, and the comparator outputs a high level. The voltage value of the output pulse is the output voltage value of the LDO.

[0019] like Figure 5 As shown in the figure, the operational amplifier solution: the programmable digital potentiometer is used as the feedback resistor of the operational amplifier to adjust the amplification factor of the operational amplifier so as to control the output voltage. At this time, the field programmable gate array can adjust the amplification factor of the operational amplifier by adjusting the resistance value of the digital potentiometer through the SPI interface of the programmable digital potentiometer, thereby adjusting the output voltage.

[0020] This solution uses a field programmable gate array as the central controller, a pulse trigger input is given to the field programmable gate array, and the output of the field programmable gate array is given to multiple output channels. The field programmable gate array has a register for each channel, and the register stores data such as the pulse width of the channel and the high and low level voltages of the pulse (Note: only the op amp solution can adjust the low level voltage);

[0021] The FPGA communicates with the host computer through the serial port to set the pulse width and voltage data in each channel register. The host computer sends the pulse width and pulse level data set by the user interface to the FPGA in a certain format. The FPGA stores the data in the register after parsing. Then the FPGA converts the data in the register into the data required by the digital programmable potentiometer and sets the digital programmable potentiometer through SPI.

[0022] When the field programmable gate array receives an input pulse signal, it reads the pulse width data stored in the register according to the program settings and outputs the corresponding pulse signal, which is then output after passing through the output adjustable voltage unit.

[0023] Pulse width modulation scheme:

[0024] The field programmable gate array selects a certain system clock, such as 250MHz, and calculates the required number of system clock cycles according to the pulse width time requirements sent by the host computer, and then counts to give a high level. For example, if the host computer requires the pulse width to be 8ns, the field programmable gate array outputs a high level and counts two clock cycles before outputting a low level, thus obtaining the required pulse. The pulse width can only be a multiple of half of the system cycle.

[0025] Communication between host computer and field programmable gate array:

[0026] The host computer and the field programmable gate array communicate with each other via a serial port. The host computer calculates the number of system clock cycles required for the pulse width and the voltage required for the output pulse based on the information from the user interface, and transmits these two values ​​to the field programmable gate array via the serial port using an agreed protocol. The field programmable gate array updates the register values ​​of each channel based on the received data and sets the digital programmable potentiometer. Once completed, it can output the corresponding pulse when the next pulse arrives.

[0027] In the description of this specification, the description with reference to the terms "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0028] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to only specific implementation methods. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A multi-channel output pulse synchronization device with adjustable voltage and pulse width, characterized in that: The invention comprises a field programmable gate array, a power module, a UART-to-USB module and an output adjustable voltage unit. The field programmable gate array monitors pulse input and controls multi-channel pulse output. The field programmable gate array also communicates with the UART-to-USB module via UART. The UART-to-USB module connects the communication between the field programmable gate array and a host computer, converts the USB signal of the host computer and the UART signal of the field programmable gate array to each other, and allows the two to communicate. The pulse signal output by the field programmable gate array is output after passing through the output adjustable voltage unit. The power module is electrically connected to the field programmable gate array, the UART-to-USB module and the output adjustable voltage unit respectively, and supplies power to the field programmable gate array, the UART-to-USB module and the output adjustable voltage unit.

2. A multi-channel output pulse synchronization device with adjustable voltage and pulse width according to claim 1, characterized in that: The output adjustable voltage unit is composed of a programmable digital potentiometer, an LDO, an operational amplifier or a comparator.

3. A multi-channel output pulse synchronization device with adjustable voltage and pulse width according to claim 2, characterized in that: When a comparator is used in the output adjustable voltage unit, the programmable digital potentiometer is used as the feedback resistor of the LDO to adjust the output voltage of the LDO, and the voltage is used as the power supply voltage of the high-speed comparator. At this time, the field programmable gate array adjusts the resistance value of the digital potentiometer through the SPI interface of the programmable digital potentiometer to adjust the output voltage of the LDO, thereby achieving the adjustment operation of the output level of the comparator.

4. A multi-channel output pulse synchronization device with adjustable voltage and pulse width according to claim 3, characterized in that: The output pulse signal of the field programmable gate array is connected to the positive input terminal of the comparator, and the negative input terminal of the comparator uses a resistor to divide the voltage to produce a high-level voltage lower than the output pulse signal of the field programmable gate array. At this time, when the field programmable gate array outputs a pulse, the level signal of the positive input terminal will be higher than the level signal of the negative input terminal, and the comparator outputs a high level. The voltage value of the output pulse is the output voltage value of the LDO.

5. A multi-channel output pulse synchronization device with adjustable voltage and pulse width according to claim 2, characterized in that: When an operational amplifier is used in the output adjustable voltage unit, the programmable digital potentiometer is used as a feedback resistor of the operational amplifier to adjust the amplification factor of the operational amplifier to control the output voltage. At this time, the field programmable gate array adjusts the resistance value of the digital potentiometer through the SPI interface of the programmable digital potentiometer to adjust the amplification factor of the operational amplifier, thereby adjusting the output voltage.

Images