LED packaging device and LED packaging device manufacturing method
By installing a stress buffer coating on the glass substrate of the LED packaging device, the problem of LED packaging products being susceptible to thermal stress cracking is solved, and the reliability of the product is improved.
Patent Information
- Application Number
- CN202411762504.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-03
- Publication Date
- 2025-03-18
AI Technical Summary
现有LED封装产品容易受热应力开裂，导致可靠性差。
Using a circuit substrate including a glass substrate, a stress buffer coating and a circuit layer, the stress buffer coating consists of an organic buffer layer, an inorganic insulating layer and a metal adhesion layer. The glass substrate and perforated inner wall are coated through these layers, strengthening the strength of the glass substrate and preventing cracking.
Through the use of stress buffer coating, the strength of the glass substrate is improved, and the cracking of the glass substrate is prevented due to thermal stress, thereby improving the reliability of the LED packaging device.
Smart Images
Figure CN119653943A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of LED packaging, and in particular to an LED packaging device and a method for manufacturing the LED packaging device. Background Art
[0002] Micro LED display screen production generally starts with making Micro LED chips into discrete devices, namely MIP (MicroLED in Package) chips, and then transferring the MIP chips in batches to the printed circuit board PCB (Printed Circuit Board). At present, the circuit substrate packaging technology of the printed circuit board PCB generally includes several process types such as TGV and TSV. Among them, TGV technology (Through Glass Via, TGV, glass through hole) uses a glass substrate as a circuit substrate, and makes vertical through holes on the glass substrate and fills the through holes with conductive materials to achieve electrical connection. This technology has a low coefficient of thermal expansion (coefficient of thermal expansion, CTE) and high flatness, which is conducive to improving the yield of mass transfer and has great market prospects.
[0003] However, due to the chemical inertness and fragility of glass itself, the TGV circuit substrate is prone to cracking under thermal stress, resulting in insufficient reliability of LED packaging products.
[0004] Therefore, the LED packaging products in the prior art are easily cracked due to thermal stress and have poor reliability. Summary of the invention
[0005] In view of the above problems, the present invention aims to provide an LED packaging device and a method for manufacturing an LED packaging device, which can solve the problem that LED packaging products in the prior art are easily cracked due to thermal stress and have poor reliability.
[0006] The above technical objectives of the present invention are achieved through the following technical solutions:
[0007] An LED packaging device, comprising:
[0008] A circuit substrate, the circuit substrate comprising a glass substrate, a stress buffer coating and a circuit layer; the glass substrate is provided with a perforation, the stress buffer coating is coated on the front and back surfaces of the glass substrate and the inner wall of the perforation, and the circuit layer is arranged on the stress buffer coating on the front and back surfaces of the glass substrate; the stress buffer coating comprises an organic buffer layer, an inorganic insulating layer and a metal adhesion layer, and the organic buffer layer, the inorganic insulating layer and the metal adhesion layer are arranged in sequence along the surface of the glass substrate in an outward direction;
[0009] An LED chip, wherein the LED chip is arranged on the circuit substrate and is electrically connected to the circuit layer; and a packaging adhesive, wherein the packaging adhesive covers the outside of the LED chip.
[0010] In a feasible embodiment, the thickness A of the organic buffer layer is greater than the thickness B of the inorganic insulating layer, and 5B≤A≤10B.
[0011] In a feasible embodiment, the thickness of the inorganic insulating layer is 0.1-10 μm.
[0012] In a feasible embodiment, the dielectric constant of the inorganic insulating layer is greater than the dielectric constant of the organic buffer layer.
[0013] In a feasible embodiment, the material of the organic buffer layer is Parylene, the material of the inorganic insulating layer is silicon dioxide, and the material of the metal adhesion layer is titanium.
[0014] In a feasible embodiment, the stress buffer coating further includes a first seed layer disposed between the metal adhesion layer and the circuit layer, and the material of the first seed layer is copper.
[0015] In a feasible embodiment, the circuit substrate further includes electroplated copper filled in the through-hole, the electroplated copper is bonded to the metal adhesion layer on the inner wall of the through-hole, and the electroplated copper electrically connects the circuit layers located on the front and back sides of the glass substrate.
[0016] In a feasible embodiment, a bonding layer is provided on the circuit layer, and the LED chip is bonded to the bonding layer to form an electrical connection.
[0017] In a feasible embodiment, a reflective layer is disposed on the circuit layer, and the reflective layer surrounds the side of the bonding layer.
[0018] The present invention also provides a method for manufacturing an LED packaging device, comprising:
[0019] Depositing an organic buffer layer on a glass substrate with a through hole, so that the organic buffer layer covers the front and back surfaces of the glass substrate and the inner wall of the through hole;
[0020] depositing an inorganic insulating layer on the organic buffer layer;
[0021] depositing a metal adhesion layer on the inorganic insulating layer;
[0022] Filling the through-holes after depositing the metal adhesion layer with electroplated copper, and depositing a circuit layer on the metal adhesion layer on the front and back sides of the glass substrate respectively, so that the circuit layers on the front and back sides of the glass substrate are electrically connected through the electroplated copper in the through-holes;
[0023] The LED chip is electrically connected to the circuit layer on the front or back side of the glass substrate, and the outer side of the LED chip is covered with packaging glue to obtain an LED packaging device.
[0024] Due to the adoption of the above technical solution, the present invention has at least the following beneficial effects:
[0025] The LED packaging device provided by the present invention uses a glass substrate as a base substrate, and arranges a stress buffer coating on the front and back surfaces of the glass substrate and the inner wall of the perforation. The stress buffer coating can form a complete and dense film layer on the surface of the glass substrate, wherein the organic buffer layer directly in contact with the glass substrate can buffer the influence of stress on the glass substrate, the inorganic insulating layer can prevent current leakage, and the metal adhesion layer can ensure the adhesion connection effect between the circuit layer and the glass substrate, thereby improving the strength of the glass substrate, preventing the glass from cracking due to stress, and thus improving the reliability of the LED packaging device product. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 is a schematic structural diagram of an LED packaging device provided by an embodiment of the present invention;
[0027] Figure 2 is a schematic structural diagram of a glass substrate provided by an embodiment of the present invention;
[0028] Figure 3 The embodiment of the present invention provides Figure 2 A schematic diagram of the enlarged structure of the local A in the middle;
[0029] Figure 4 is a flow chart of a method for manufacturing an LED packaging device provided by an embodiment of the present invention;
[0030] Figure 5 is a schematic structural diagram of a glass substrate provided by an embodiment of the present invention having a through hole;
[0031] Figure 6 is a schematic diagram of a glass substrate structure on which an organic buffer layer, an inorganic insulating layer and a metal adhesion layer are formed after step S3 provided in an embodiment of the present invention;
[0032] Figure 7 is a schematic diagram of the structure of a glass substrate filled with perforations and polished flat before step S4 provided in an embodiment of the present invention;
[0033] Figure 8is a schematic diagram of the structure of a glass substrate on which a circuit layer is formed after step S4 provided in an embodiment of the present invention;
[0034] Fig. 9 is a schematic diagram of the structure of a glass substrate on which a bonding layer and a reflective layer are formed before step S5 provided in an embodiment of the present invention;
[0035] Fig.10 It is a schematic structural diagram of the final LED package device after the LED chip is bonded to the glass substrate to complete the packaging after step S5 provided by an embodiment of the present invention.
[0036] In the accompanying drawings, 1. circuit substrate; 11. glass substrate; 111. perforation; 12. stress buffer coating; 121. organic buffer layer; 122. inorganic insulating layer; 123. metal adhesion layer; 13. circuit layer; 14. electroplated copper; 15. bonding layer; 16. reflective layer; 2. LED chip; 3. packaging glue. DETAILED DESCRIPTION
[0037] The following is a clear and complete description of the technical solution of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by technicians in this field without creative work are within the scope of protection of the present invention.
[0038] In the description of the present invention, it should be noted that the orientations or positional relationships indicated by terms such as "center", "up", "down", "left", "right", "vertical", "horizontal", "inside" and "outside" are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0039] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For those skilled in the art, the specific meanings of the above terms in this utility model can be understood according to specific circumstances.
[0040] Example 1
[0041] See also Figure 1 to Figure 3 ,in Figure 1 is a schematic diagram of the structure of the LED packaging device provided in this embodiment, Figure 2is a schematic structural diagram of the glass substrate 11 provided in this embodiment, Figure 3 This embodiment Figure 2 The enlarged structural diagram of the part A in the figure, an LED packaging device provided in this embodiment includes:
[0042] A circuit substrate 1, the circuit substrate 1 comprising a glass substrate 11, a stress buffer coating 12 and a circuit layer 13; the glass substrate 11 is provided with a perforation 111, the stress buffer coating 12 is coated on the front and back surfaces of the glass substrate 11 and the inner wall of the perforation 111, and the circuit layer 13 is arranged on the stress buffer coating 12 on the front and back surfaces of the glass substrate 11; the stress buffer coating 12 comprises an organic buffer layer 121, an inorganic insulating layer 122 and a metal adhesion layer 123, and the organic buffer layer 121, the inorganic insulating layer 122 and the metal adhesion layer 123 are arranged in sequence along the surface of the glass substrate 11 in an outward direction;
[0043] An LED chip 2, wherein the LED chip 2 is disposed on the circuit substrate 1 and is electrically connected to the circuit layer 13; and
[0044] The packaging glue 3 covers the outer side of the LED chip 2 .
[0045] It can be understood that the perforations 111 on the glass substrate 11 can be formed by laser induced etching technology. The perforations 111 are mainly used for electrical connection between the LED chip 2 and the circuit layer 13 or other layers. The number of perforations 111 can be set according to actual needs. For example, in this embodiment, four perforations 111 are set on the glass substrate 11, and the aperture of the perforations is set to 10 to 50 um, and the spacing is 10 to 1000 um. The specific numbers in other possible embodiments are not further described here, and those skilled in the art can understand it in combination with the prior art.
[0046] It is further explained that in this embodiment, the stress buffer coating 12 is coated on the front and back surfaces of the glass substrate 11 and the inner wall of the perforation 111, which means that a thin film layer with uniform film thickness is formed on the glass substrate 11 and the inner wall of the perforation 111. In addition to coating the glass substrate 11 and the inner wall of the perforation 111, those skilled in the art can also fully coat the glass substrate 11 according to actual conditions, such as setting the stress buffer coating 12 on the side. The stress buffer coating 12 can greatly enhance the connection strength of the vulnerable parts, such as the edge of the perforation 111, to prevent stress cracking of the glass substrate 11.
[0047] It can be understood that, for the stress buffer coating 12, the organic buffer layer 121 in direct contact with the glass substrate 11 can buffer the influence of stress on the glass substrate 11, the inorganic insulating layer 122 in the middle layer can prevent the leakage of current, and the outermost metal adhesion layer 123 can ensure the adhesion and connection effect between the circuit layer 13 and the electroplated copper 14 filling the perforation 111 and the glass substrate 11.
[0048] Furthermore, the LED chip 2 and the encapsulation glue 3 are not further described here, and those skilled in the art can select the settings according to actual needs. For example, for the Micro LED display, the encapsulation glue 3 can be encapsulated by molding, and the encapsulation glue 3 preferably uses black semi-transmittance encapsulation glue, which can improve the contrast of the Micro LED display. Other more specific embodiments are not further described here.
[0049] In this embodiment, the thickness A of the organic buffer layer 121 is greater than the thickness B of the inorganic insulating layer 122, and 5B≤A≤10B. By making the thickness A of the organic buffer layer 121 greater than the thickness B of the inorganic insulating layer 122, most of the deformation stress can be buffered in the organic buffer layer 121, thereby avoiding the inorganic insulating layer 122 and the glass substrate 11 from directly contacting each other and causing cracking of the inorganic insulating layer 122 due to the difference in deformation properties between the two. When the thickness A of the organic buffer layer 121 is 5 to 10 times the thickness B of the inorganic insulating layer 122, the anti-cracking effect of the inorganic insulating layer 122 is best, which is a preferred embodiment. In other embodiments, the relationship between the thicknesses of the two can also be adjusted according to performance requirements, which is not further described here.
[0050] In this embodiment, the thickness of the inorganic insulating layer 122 is 0.1 to 10 μm (micrometers, the same below), which can not only ensure the insulation effect, but also, after the arrangement of the organic buffer layer 121 and the metal adhesion layer 123, the thickness of the overall stress buffer coating 12 will not be too large to affect the arrangement of the circuit layer 13, the electroplated copper 14 filled in the through hole 111, etc. In addition, while satisfying that the thickness A of the organic buffer layer 121 is 5 to 10 times the thickness B of the inorganic insulating layer 122, it is preferred that the thickness A of the organic buffer layer 121 is designed to be within 10 μm, so as to control the overall thickness of the stress buffer coating 12. For example, if the thickness B of the inorganic insulating layer 122 is 0.2 μm, the thickness A of the organic buffer layer 121 can be 2 μm. More specific arrangements are not further described here.
[0051] In this embodiment, the dielectric constant of the inorganic insulating layer 122 is greater than the dielectric constant of the organic buffer layer 121. It can be understood that in this embodiment, the dielectric constant of the inorganic insulating layer 122 is required to be greater than the dielectric constant of the organic buffer layer 121, so as to ensure that the insulation performance of the inorganic insulating layer 122 is better than that of the organic buffer layer 121, preferably much better, and the main function is to prevent current leakage and avoid the direct impact of the current on the organic buffer layer 121.
[0052] In this embodiment, the material of the organic buffer layer 121 is Parylene, the material of the inorganic insulating layer 122 is silicon dioxide (SiO 2 ), and the material of the metal adhesion layer 123 is titanium (Ti). It can be understood that Parylene, also known as Parylene, is a cyclic dimer of a paraxylene compound. It is deposited and covered by a chemical vapor deposition method (Chemical Vapor Deposition, CVD) to form a nano-coating material with uniform film thickness, which can greatly enhance the connection strength of fragile parts, prevent glass stress cracking, and improve the flatness of the inner wall of the through hole 111, which is helpful for material filling in subsequent processes; the inorganic insulating layer 122 is made of silicon dioxide and the metal adhesion layer 123 is made of titanium. There is a good bonding effect between titanium and silicon dioxide and between titanium and the conventional copper of the circuit layer 13. Therefore, in this embodiment, titanium is used as the metal adhesion layer 123, which can improve the adhesion effect between the inorganic insulating layer 122 and the subsequent electroplated copper 14 filler set in the through hole 111 and the circuit layer 13. The thickness of the metal adhesion layer 123 is preferably set at 1 to 1000 nm (nanometer, the same below).
[0053] In this embodiment, the stress buffer coating 12 further includes a first seed layer disposed between the metal adhesion layer 123 and the circuit layer 13, and the material of the first seed layer is copper (Cu). By disposing the first seed layer, the adhesion and conductivity of the circuit layer 13 when disposed on the metal adhesion layer 123 can be improved, and the uniform arrangement of the circuit layer 13 can be ensured so as to improve the deposition quality and performance of the circuit layer 13. In this embodiment, the thickness of the first seed layer is preferably set to 1 to 10 μm.
[0054] In this embodiment, the circuit substrate 1 further includes electroplated copper 14 filled in the through-hole 111 , the electroplated copper 14 is bonded to the metal adhesion layer 123 on the inner wall of the through-hole 111 , and the electroplated copper 14 electrically connects the circuit layer 13 on the front and back sides of the glass substrate 11 .
[0055] In this embodiment, a bonding layer 15 is disposed on the circuit layer 13 , and the LED chip 2 is bonded to the bonding layer 15 to form an electrical connection.
[0056] It can be understood that in order to bond the LED chip 2 to the glass substrate 11 to achieve electrical connection, in this embodiment, a circuit layer 13 and a bonding layer 15 are provided on the basis of the stress buffer coating 12 of the glass substrate 11, and both the circuit layer 13 and the bonding layer 15 can be provided by a physical vapor deposition method (Physical Vapor Deposition, PVD). Among them, the circuit layer 13 can include a second barrier layer and a second seed layer, the second barrier layer is preferably made of titanium, and the specific barrier layer is preferably deposited with a thickness of 0.01 to 1 μm; the second seed layer is preferably made of copper, and the thickness is preferably 0.1 to 1 μm. The bonding layer 15 can be similar to the structure of the circuit layer 13, specifically including a third barrier layer and a third seed layer. The structure and composition of the third group of barrier layers and the third seed layer can refer to the setting of the circuit layer 13, the third barrier layer is preferably made of titanium, and the third seed layer is preferably tin (Sn), forming a Sn bonding layer, and the overall thickness of the bonding layer 15 is preferably 1 to 10 μm.
[0057] In this embodiment, a reflective layer 16 is disposed on the circuit layer 13, and the reflective layer 16 surrounds the side of the bonding layer 15. It can be understood that in order to improve the light extraction efficiency of the LED, a reflective layer 16 is further disposed on the circuit layer 13 in this embodiment, and the material of the reflective layer 16 can be white ink, which is disposed around the bonding layer 15, thereby preventing the bonding layer 15 from melting and overflowing during the bonding process, thereby preventing the LED chip 2 from short-circuiting.
[0058] Due to the adoption of the above technical solution, the present invention has the following beneficial effects:
[0059] The LED packaging device provided by the present invention uses a glass substrate 11 as a base substrate, and sets a stress buffer coating 12 on the front and back surfaces of the glass substrate 11 and the inner wall of the perforation 111. The stress buffer coating 12 can form a complete and dense film layer on the surface of the glass substrate 11, wherein the organic buffer layer 121 directly in contact with the glass substrate 11 can buffer the influence of stress on the glass substrate 11, the inorganic insulating layer 122 can prevent current leakage, and the metal adhesion layer 123 can ensure the adhesion connection effect between the circuit layer 13 and the glass substrate 11, thereby improving the strength of the glass substrate 11 and preventing the glass from cracking due to stress, thereby improving the reliability of the LED packaging device product.
[0060] Example 2
[0061] See also Figure 4 , is a flow chart of a method for manufacturing an LED package device provided in this embodiment. The method for manufacturing an LED package device provided by the present invention comprises the following steps:
[0062] Step S1 : depositing an organic buffer layer on a glass substrate with a through hole, so that the organic buffer layer covers the front and back surfaces of the glass substrate and the inner wall of the through hole.
[0063] In addition, before step S1, Figure 5 The structure schematic diagram of the glass substrate provided in the present embodiment is shown. The glass substrate 11 that has not yet been provided with a perforation 111 can also be opened according to actual needs. Specifically, the glass substrate 11 can be cleaned first, and then the laser induced etching technology is used to form the perforation. In the present embodiment, the aperture of the perforation is preferably set to 10-50um, and the spacing is 10-1000um. In step S1, specifically, as described in the previous embodiment, the material of the organic buffer layer 121 is parylene, which is a cyclic dimer of a p-xylene compound, and is deposited and covered by a chemical vapor deposition method (Chemical Vapor Deposition, CVD). The chemical vapor deposition method is a process in which a gaseous or vaporous substance reacts in a gas phase or a gas-solid interface to generate a solid deposit. Those skilled in the art can implement it according to the prior art combined with the design in the present embodiment, and no further description is given here.
[0064] Step S2, depositing an inorganic insulating layer on the organic buffer layer.
[0065] It can be understood that the deposition of the inorganic insulating layer 122 is also achieved by chemical vapor deposition. The thickness of the inorganic insulating layer 122 is preferably 0.1 to 10 μm in this embodiment. In addition, while satisfying that the thickness A of the organic buffer layer 121 is 5 to 10 times the thickness B of the inorganic insulating layer 122, the thickness A of the organic buffer layer 121 is preferably designed to be within 10 μm, so as to control the overall thickness of the stress buffer coating. The material type and specific settings of the inorganic insulating layer 122 can be understood and implemented with reference to the previous embodiments, except for the special description in this embodiment, and will not be repeated here.
[0066] Step S3, depositing a metal adhesion layer on the inorganic insulating layer.
[0067] like Figure 6 The figure shows a schematic diagram of the glass substrate structure in which an organic buffer layer, an inorganic insulating layer and a metal adhesion layer are formed after step S3 in this embodiment, which can be combined with the above Figure 2-Figure 3Understand. It can be understood that the metal adhesion layer 123 adopts the physical vapor deposition method (Physical Vapor Deposition, PVD). Physical vapor deposition refers to the technology of using physical methods to vaporize the surface of the material source (solid or liquid) into gaseous atoms or molecules, or partially ionize into ions under vacuum conditions, and deposit a thin film with a special function on the surface of the substrate through a low-pressure gas (or plasma) process. Physical vapor deposition is one of the main surface treatment technologies. Those skilled in the art can implement it according to the existing technology combined with the design in this embodiment, and will not be further described here. Further, the thickness of the metal adhesion layer 123 in this embodiment is titanium material, and its deposition thickness is preferably 1 to 1000nm. The specific setting of the metal adhesion layer 123 can be understood and implemented with reference to the aforementioned embodiment except for the special description of this embodiment, and will not be repeated here. In addition, after the metal adhesion layer 123 is deposited in this step S3 to form the metal adhesion layer 123, a first seed layer can also be deposited on the metal adhesion layer 123 to form the first seed layer. The specific requirements and settings of the first seed layer can be understood with reference to the aforementioned embodiment.
[0068] Step S4, filling the through-holes after depositing the metal adhesion layer with electroplated copper, and depositing a circuit layer on the metal adhesion layer on the front and back sides of the glass substrate respectively, so that the circuit layers on the front and back sides of the glass substrate are electrically connected through the electroplated copper in the through-holes.
[0069] It is understandable that if Figure 7 FIG. 1 is a schematic diagram of the structure of the glass substrate after the perforations are filled and polished before step S4 in this embodiment. Figure 8The figure shows a schematic diagram of the structure of the glass substrate after forming the circuit layer in step S4 of this embodiment. In step S4, the glass substrate 11 may be firstly plasma cleaned or vacuum high-pressure spray cleaned to remove the deposited residue. In addition, after the through-hole 111 is filled with electroplated copper 14, the glass substrate 11 may be firstly chemically mechanically polished. The full name of chemical mechanical polishing is Chemical Mechanical Polishing (CMP), which is a combination of mechanical grinding and chemical corrosion. It forms a smooth plane on the surface of the ground medium by means of ultra-fine ion grinding and chemical corrosion of the slurry, so that the flatness of the entire front or back of the glass substrate 11 after the through-hole 111 is filled can be guaranteed. The circuit layer 13 in this embodiment is preferably made of Cu material. The manufacturing process of the circuit layer 13 in this step includes: first, depositing a second barrier layer and a second seed layer by physical vapor deposition (PVD), wherein the second barrier layer is made of titanium (Ti) with a deposition thickness of 0.01 to 1 um; the second seed layer is made of copper (Cu) with a thickness of 0.01 to 1 um; secondly, coating negative photoresist, exposing, developing, and patterning; then electroplating a Cu layer with a thickness of 1 to 10 um; finally, removing the negative photoresist in a developer to form the circuit layer 13.
[0070] Step S5, electrically connecting the LED chip to the circuit layer on the front or back side of the glass substrate, and covering the outer side of the LED chip with packaging glue to obtain an LED package device.
[0071] Specifically, Fig. 9 FIG. 1 is a schematic diagram of the structure of a glass substrate on which a bonding layer and a reflective layer are formed before step S5 in this embodiment. Fig.10The structure diagram of the final LED package device after the LED chip is bonded to the glass substrate after step S5 in this embodiment is shown. In this embodiment, in order to bond the LED chip 2 to the glass substrate 11 and realize electrical connection, a bonding layer 15 can also be made on the glass substrate 11. The bonding layer 15 is made of Sn material. The bonding layer 15 is made in the same process as the circuit layer 13, including sputtering the third barrier layer and the third seed layer, photolithography, electroplating, degumming and other steps. The same process is used and will not be further described here. Preferably, after depositing the bonding layer 15, it can also include making white ink on the circuit layer 13 as a reflective layer 16, and surrounding the side of the bonding layer 15. The manufacturing process of the reflective layer 16 includes ink coating, pre-baking, exposure, development, and post-baking. The thickness of the white ink is 0.1 to 10um. In addition to reducing light reflection and protecting the circuit board, the white ink can also prevent the bonding layer 15 (Sn) from melting and overflowing during the bonding process to prevent the LED chip 2 from short-circuiting. During electrical connection, the LED chips 2 arranged according to the glass-based circuit board array are hot-pressed and bonded to the glass-based circuit backplane. Specifically, the present invention adopts NiAu / Sn / Cu hot-pressing bonding or laser welding; the bonding layer 15 (Sn) forms an IMC (intermetallic chemical) with the NiAu layer of the LED chip 2 and the Cu layer of the glass-based circuit backplane, thereby achieving electrical connection. After the electrical connection is completed, the AOI equipment can also be used for lighting test. The outer side of the LED chip 2 is covered with packaging glue 3, which is specifically packaged by molding. The packaging glue 3 uses black semi-transmittance packaging glue 3, which can improve the contrast of the LED display.
[0072] In addition, when LED package components are manufactured in a whole-plate batch production mode, they can also be cut and split at the end to form individual LED package devices and remove defective products.
[0073] The contents not mentioned in the above embodiments can be understood and implemented by referring to the description in Embodiment 1, and will not be repeated here.
[0074] Although the present invention has been described in detail above by general description and specific embodiments, it is obvious to those skilled in the art that some modifications or improvements can be made to the present invention. Therefore, these modifications or improvements made without departing from the spirit of the present invention all belong to the scope of protection claimed by the present invention.
Claims
1. An LED packaging device, characterized in that: include: A circuit substrate, the circuit substrate comprising a glass substrate, a stress buffer coating and a circuit layer; the glass substrate is provided with a perforation, the stress buffer coating is coated on the front and back surfaces of the glass substrate and the inner wall of the perforation, and the circuit layer is arranged on the stress buffer coating on the front and back surfaces of the glass substrate; the stress buffer coating comprises an organic buffer layer, an inorganic insulating layer and a metal adhesion layer, and the organic buffer layer, the inorganic insulating layer and the metal adhesion layer are arranged in sequence along the surface of the glass substrate in an outward direction; An LED chip, wherein the LED chip is disposed on the circuit substrate and is electrically connected to the circuit layer; as well as Packaging glue, the packaging glue covers the outer side of the LED chip.
2. The LED package device according to claim 1, characterized in that: The thickness A of the organic buffer layer is greater than the thickness B of the inorganic insulating layer, and 5B≤A≤10B.
3. The LED package device according to claim 2, characterized in that: The thickness of the inorganic insulating layer is 0.1-10 μm.
4. The LED package device according to claim 1, characterized in that: The dielectric constant of the inorganic insulating layer is greater than the dielectric constant of the organic buffer layer.
5. The LED package device according to claim 1, characterized in that: The material of the organic buffer layer is Parylene, the material of the inorganic insulating layer is silicon dioxide, and the material of the metal adhesion layer is titanium.
6. The LED package device according to claim 1, characterized in that: The stress buffer coating further includes a first seed layer disposed between the metal adhesion layer and the circuit layer, and the material of the first seed layer is copper.
7. The LED package device according to claim 1, characterized in that: The circuit substrate further includes electroplated copper filled in the through-hole, the electroplated copper is bonded to the metal adhesion layer on the inner wall of the through-hole, and the electroplated copper electrically connects the circuit layers located on the front and back sides of the glass substrate.
8. The LED package device according to claim 1, characterized in that: A bonding layer is arranged on the circuit layer, and the LED chip is bonded to the bonding layer to form an electrical connection.
9. The LED package device according to claim 8, characterized in that: A reflective layer is arranged on the circuit layer, and the reflective layer surrounds the side of the bonding layer.
10. A method for manufacturing an LED packaging device, characterized in that: include, Depositing an organic buffer layer on a glass substrate with a through hole, so that the organic buffer layer covers the front and back surfaces of the glass substrate and the inner wall of the through hole; depositing an inorganic insulating layer on the organic buffer layer; depositing a metal adhesion layer on the inorganic insulating layer; Filling the through-holes after depositing the metal adhesion layer with electroplated copper, and depositing a circuit layer on the metal adhesion layer on the front and back sides of the glass substrate respectively, so that the circuit layers on the front and back sides of the glass substrate are electrically connected through the electroplated copper in the through-holes; The LED chip is electrically connected to the circuit layer on the front or back side of the glass substrate, and the outer side of the LED chip is covered with packaging glue to obtain an LED packaging device.