Nanosecond pulse generator based on FPGA control

Abstract

A nanosecond pulse generator based on FPGA control comprises a power supply system, a DC-DC module, a pulse forming system, an FPGA control system and a man-machine interaction system. The power supply system comprises a filtering isolation module and a program-controlled direct-current power supply; the pulse forming system comprises an energy storage capacitor and an LTD high-voltage circuit module; the output end of the FPGA control system controls the pulse forming module to respectively control charging of the energy storage capacitor and discharging of the LTD high-voltage circuit module through a photoelectric isolation circuit, and the input end of the FPGA control system is in communication connection with the program control direct-current power supply and the man-machine interaction system. The nanosecond pulse generator can output nanosecond high-voltage pulses, overhigh voltage is generated at the end of equipment, interference of an electric field in the equipment on time sequence signals can be further eliminated through power amplification and photoelectric conversion, and control is more accurate and stable.

Description

Technical Field

[0001] The present invention belongs to the field of bio-electromagnetic technology, and specifically relates to a nanosecond pulse generator based on field programmable gate array (FPGA) control. Background Art

[0002] Electroporation refers to the phenomenon that under the action of a high-voltage pulsed electric field, the permeability of the cell membrane changes, resulting in the formation of nanoscale tiny pores. When the electric field strength rises to a certain level or the pulse voltage is continuously applied, the electroporation formed cannot be restored. This phenomenon is called irreversible electroporation (IRE). IRE tumor ablation technology is a treatment method that eliminates tumors by inducing tumor cell apoptosis through electric pulses. Studies have shown that when a pulsed electric field with a rising edge of ns, a pulse width of μs, and an amplitude of kV / cm acts on tumor cells, the tumor cells will undergo irreversible electroporation apoptosis.

[0003] In the research of IRE ablation equipment, the research on high-voltage pulse generator is one of the focuses. High-voltage pulse generator is used to transmit the pulse parameters required for IRE. At present, there are two forms of high-voltage pulse generators required for IRE ablation. One is a capacitor discharge pulse generator, which mainly produces exponential decay pulses. Air spark switches are commonly used. The other is a square wave pulse generator, which produces square wave pulses. High-voltage pulse generators are usually composed of Blumlein transmission lines, insulated gate field effect transistors (MOSFETs), IGBTs, etc.

[0004] Existing high-voltage pulse generators, such as the "All-solid-state high-voltage nanosecond square wave pulse generator based on FPGA control" with application number 201110195350.4, disclose a nanosecond square wave pulse generator based on FPGA control. Based on the Max generator principle, a group of capacitors are charged in parallel, and then the initial pulse generated by the solid-state switch device discharging the capacitors in series is chopped to obtain the required high-voltage nanosecond square wave pulse. The FPGA control system realizes human-computer communication through a portable computer, sends high-voltage DC module and Max circuit control signals, receives the measurement signal obtained by the pulse measurement system, controls the operation of the entire generator and handles emergencies, and plays an overall control role on the system. The main disadvantage of this system is that in the steep pulse circuit, the FPGA chip is directly connected to the photoelectric converter, and the photoelectric signal is unstable due to the influence of electric field inductance, etc. In addition, the Marx circuit is used. Since each stage of the Marx circuit is at a different potential and the voltage of the latter stage is very high, the circuit is complicated and an expensive isolation transformer is required, which also has certain safety hazards for medical use. In addition, since all switches and capacitors in the Marx circuit are connected in series, it has a high output impedance and has certain limitations on the output current. Summary of the invention

[0005] The present invention provides a nanosecond pulse generator and medical equipment based on FPGA control, aiming to solve the problems of unstable photoelectric signals and complex Marx circuits and high output impedance existing in traditional FPGA pulse generation circuits.

[0006] Principle of the present invention: The present invention is based on the principle of solid-state linear transformer driver (LTD). The operator sets the output pulse amplitude, pulse width, pulse frequency and pulse number through the human-computer interaction system. After being processed by the single-chip microcomputer module and the FPGA operation module of the FPGA control system, the electrical signal is converted into an optical signal through the photoelectric isolation circuit and transmitted to the power supply system and the pulse forming system. The power supply system automatically converts the voltage of the programmable DC power supply according to the pulse amplitude set by the human-computer interaction system to charge the energy storage capacitor. After charging, the charging circuit is cut off through the FPGA control program, the pulse forming system is connected, and the energy storage capacitor releases the boosted electricity to the load through the magnetic core coupling discharge boost in the LTD high-voltage circuit module. MOSFET switch 1 and MOSFET switch 2 perform switch action switching according to the pulse width, pulse frequency and pulse number set by the human-computer interaction system to control the output pulse width, pulse frequency and pulse number. Since the frequency of the MOSFET switch is at the kHz level, in order to ensure the consistency of the MOSFET switch, a power enhancement circuit is provided on the periphery of the FPGA control system to enhance the photoelectric conversion signal.

[0007] The present invention solves the technical problem and adopts the following technical solution:

[0008] The present invention first provides a nanosecond pulse generator based on FPGA control, including a power supply system, a pulse forming system, an FPGA control system and a human-computer interaction system; the power supply system includes a filtering isolation module and a programmable DC power supply, the pulse forming system includes an energy storage capacitor and an LTD high-voltage circuit module, the output end of the FPGA control system controls the pulse forming module to control the charging of the energy storage capacitor and the discharging of the LTD high-voltage circuit module respectively through a photoelectric isolation circuit, and the input end of the FPGA control system is communicatively connected with the programmable DC power supply and the human-computer interaction system.

[0009] The power supply system includes a power supply, a filter isolation module, a power switch and a programmable DC power supply. The power supply is a commercially available 110-220V grid power supply, which is connected to the filter isolation module through a wire to filter the EMI electromagnetic interference signal transmitted by the grid power supply and prevent the EMI signal generated by the nanosecond pulse generator from entering the grid to ensure the safety of the nanosecond pulse generator and the power supply environment. The filter isolation module can effectively protect the equipment from various electrical noises and interferences in the grid, improve the performance and reliability of the equipment, and also isolate the pulse electric field generated by the equipment to prevent the pulse electric field from interfering with or damaging other devices on the grid power line through the grid power supply. The programmable DC power supply converts 100-220V AC power into DC power, connects to the energy storage circuit through the circuit, and charges the energy storage capacitor. At the same time, the programmable DC power supply provides a DC voltage of 5V, 6V, 7V, 8V, 9V or 10V for the power enhancement circuit. The power supply system provides a safe and stable power supply for the pulse forming system, FPGA control system and human-computer interaction system to ensure the normal operation of the entire equipment.

[0010] The pulse forming system includes an energy storage capacitor and an LTD high-voltage circuit module. The DC power supply is used to charge the energy storage capacitor, and the charging circuit is closed by turning on the MOSFET switch 1. Then the MOSFET switch 2 in the LTD high-voltage circuit module is turned on (MOSFET switch 1 is turned off), and the voltage in the energy storage capacitor is discharged and boosted through the core coupling discharge. The ratio of the number of turns of the primary coil and the secondary coil in the core coupling can be 1:1, 1:2, 1:3, 1:4 or 1:5. In order to obtain a voltage with a higher pulse amplitude, the LTD high-voltage circuit module can be composed of multiple groups of LTD circuits.

[0011] The further optoelectronic isolation circuit includes an optoelectronic coupling unit, the input end of the optoelectronic coupling unit is connected to the FPGA control system, the output end of the optoelectronic coupling unit is connected to the pulse forming system, and the optoelectronic coupling unit is used to transmit the switch control signal to the pulse forming system in one direction through optoelectronic conversion.

[0012] The further realization of nanosecond pulses is achieved by controlling the first MOSFET switch to be turned on through the photoelectric isolation circuit through the FPGA control system to realize the programmable DC power supply to charge the energy storage capacitor and control the second MOSFET switch to be turned on to realize the discharge of the LTD high-voltage circuit module, thereby outputting a pulse voltage.

[0013] The FPGA control system includes a synchronous trigger module and a single-chip computer module. The FPGA is connected to the input end of the synchronous trigger module, and the output end of the synchronous trigger module is connected to the photoelectric isolation module. After the photoelectric signal conversion of the photoelectric isolation module, it is connected to the control end of the LTD high-voltage circuit module in the pulse forming system, and the synchronous pulse signal sent by the synchronous trigger module to the MOSFET switch is converted into an optical signal for transmission. Avoid being interfered by the high voltage of the pulse forming system and ensure the stability and synchronization of the synchronous trigger pulse signal. The FPGA control system is also equipped with a power enhancement circuit on the periphery to enhance the photoelectric conversion signal. The power enhancement circuit can be a 5V, 6V, 7V, 8V, 9V, or 10V power enhancement circuit. The main function of the FPGA control system is to convert the setting parameters of the human-computer interaction system into the operating parameters of the circuit system, and to achieve the output of the set pulse voltage, pulse width, pulse frequency, and number of pulses by controlling the operation of each component in the circuit.

[0014] The nanosecond pulse generator of the present invention can output a pulse amplitude of 0-50 kV, a pulse width of 200-600 ns, a pulse frequency of 1-2000 Hz, a falling edge of 20-60 ns, and a pulse number of 1-1000. The specific parameters can be set on the human-computer interaction system according to actual needs.

[0015] The human-computer interaction system is a conventional computer, tablet, microcomputer or other electronic device, which is connected to the microcontroller module of the FPGA control system through a serial cable or Bluetooth. The operator sets the required parameters through the user interface of the control program and sends commands to the FPGA control system, thereby realizing human-computer interaction communication.

[0016] On the other hand, the present invention also provides a medical device, including an ablation electrode needle, characterized in that it also includes the above-mentioned nanosecond pulse generator, and the ablation electrode needle is connected to the pulse generator to release the nanosecond pulse signal.

[0017] The beneficial effects of the above technical solutions of the present invention include, for example: the present invention adopts FPGA as a control system, which can accurately control pulse parameters and programmable DC power supply. The present invention adopts LTD high-voltage circuit module for boosting, which is simpler in design than the conventional Max circuit, does not require expensive and complex electrical components and is safer. The present invention is equipped with a power enhancement circuit on the periphery of the FPGA control system, which can ensure that the instructions of the FPGA control system are timely and accurate and ensure synchronous transmission to the pulse forming system, avoiding the delay difference between the switches in the parallel circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0019] Figure 1 It is a principle block diagram of the present invention;

[0020] Figure 2 This is the schematic diagram of the FPGA control pulse circuit;

[0021] Figure 3 Schematic diagram of power enhancement circuit for FPGA control system periphery;

[0022] Figure 4 This is the LTD circuit topology diagram of the pulse forming system;

[0023] Figure 5 This is the 5V power enhancement circuit diagram;

[0024] Figure 6 Input circuit for fiber optic board;

[0025] Figure 7 This is the DC-DC conversion circuit diagram. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0027] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0029] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear to indicate an orientation or position relationship, they are based on the orientation or position relationship shown in the accompanying drawings, or are the orientation or position relationship in which the product of the invention is usually placed when used. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0030] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.

[0031] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0032] Example 1

[0033] like Figures 1 to 7 As shown, a nanosecond pulse generator based on FPGA control mainly includes a power supply system, a DC-DC module, a pulse forming system, and an FPGA control system.

[0034] The power supply system includes a filtering isolation module and a programmable DC power supply. The filtering isolation module is an EMI filter (a commercially available component). The programmable DC power supply can select a 500V to 5000V DC power supply as needed to charge the energy storage capacitor.

[0035] The LTD high voltage circuit module is composed of n cascaded LTD circuits, such as Figure 4 As shown, the charging terminals C1, C2, C3, .....C in each LTD circuit n The parallel connection is adopted, and the superimposed voltage is set in series at the load end. The advantage of this setting is that each LTD charging circuit end does not need to withstand excessively high voltage, which is conducive to extending the life and safety of circuit components. The load end directly outputs voltage without electrical components. Another advantage is that the voltage and current in the entire device will not be too high in this setting, which improves the safety and reliability of medical equipment.

[0036] like Figure 4 As shown, the timing signal generated by the FPGA controls switches Q0 and Q1-Q N The switch can be turned on and off, and a MOSFET switch can be used as the switch. When a MOSFET switch is selected, the Q0 switch is equivalent to Figure 2 The first MOSFET switch, Q1-Q N The switch is equivalent to the second MOSFET switch. When the LTD circuit needs to be charged, the Q0 switch is turned on and Q1-Q N The switch is turned off, and the DC power is supplied to the capacitor C1-CN When charging; when discharging, Q1-Q N switch is on, Q0 switch is off, diodes D0 and D1-D N The control capacitor discharges through the primary coil and is then transmitted to the load after electromagnetic coupling isolation. N electromagnetic couplings are connected in series at the load end, and the voltage is superimposed to 10kv-50kv.

[0037] The driving voltage of the FPGA chip is 3.3V. To obtain a stable 3.3V voltage, this application scheme adopts a DC-DC conversion circuit. Figure 7 As shown, the input bypass capacitor C16 of AMS1117 is 10uF / 50V, the output capacitor C12 is 10uF / 50V, the resistance of R11 is 3000 ohms, and the avalanche diode D20 is used to prevent the power supply from being reversed. The OUT terminal of AMS1117 can output a stable 3.3V voltage.

[0038] The present application converts the timing signal of the FPGA into an optical signal through an optoelectronic isolation module, which can transmit the high-frequency timing signal with maximum fidelity, and the use of optical signal transmission can avoid interference with the electrical signal.

[0039] Furthermore, since the power supply voltage of the FPGA chip is 3.3V, and the photoelectric conversion circuit uses a 3.3V circuit with a slightly weak driving force. This application adopts the following design: the timing signal generated by the FPGA is amplified by a 5V power amplifier, and then the electrical signal is converted into an optical signal through an invisible optical fiber transmitter HFBR-1412, which is then transmitted to the drive circuit and converted into an electrical signal, which is then amplified to drive the power circuit to work. The specific implementation scheme is as follows: Figure 5 and Figure 6 As shown, in some embodiments, the timing signal generated by the FPGA is input into the 74HC14 chip through G15 (1A) and J15 (2A), the VCC terminal of the 74HC14 inputs a 5V voltage, the 1Y pin of the 74HC14 is connected to the 2 of the optical fiber board, and the 2Y pin of the 74HC14 is connected to the 3 of the optical fiber board. When the FPGA chip controls the charging of the LTD circuit, the FPGA outputs a high-level signal (3.3V voltage) input into the G15 (1A) of the 74HC14, and after conversion by the internal circuit of the 74HC14, the 5V voltage is output to the optical fiber board 2 through 1Y, thereby generating a charging signal; when the FPGA chip controls the discharge of the LTD circuit, the FPGA outputs a high-level signal (3.3V voltage) input into the J15 (2A) of the 74HC14, and after conversion by the internal circuit of the 74HC14, the 5V voltage is output to the optical fiber board 3 through 2Y, thereby generating a discharge signal.

[0040] Example 2

[0041] like Figures 1 to 7As shown, a nanosecond pulse generator based on FPGA control mainly includes a power supply system, a DC-DC module, a pulse forming system, an FPGA control system and a human-computer interaction system.

[0042] The human-computer interaction system is connected to the FPGA control system via 485 communication. The human-computer interaction system can be a tablet or a microcomputer. The set pulse parameters can be input into the FPGA system through the human-computer interaction system to control and adjust the pulse output.

[0043] The power supply system includes a filtering isolation module and a programmable DC power supply. The filtering isolation module is an EMI filter (a commercially available component). The programmable DC power supply can select a 500V to 5000V DC power supply as needed to charge the energy storage capacitor.

[0044] The LTD high voltage circuit module is composed of n cascaded LTD circuits, such as Figure 4 As shown, the charging terminals C1, C2, C3, .....C in each LTD circuit n The parallel connection is adopted, and the voltage is superimposed in series at the load end. The advantage of this setting is that each LTD charging circuit end does not need to withstand excessively high voltage, which is conducive to extending the life and safety of circuit components. The load end directly outputs voltage without electrical components. Another advantage is that the voltage and current in the entire device will not be too high in this setting, which improves the safety and reliability of medical equipment.

[0045] like Figure 4 As shown, the timing signal generated by the FPGA controls switches Q0 and Q1-Q N The switch can be turned on and off, and a MOSFET switch can be used as the switch. When a MOSFET switch is selected, the Q0 switch is equivalent to Figure 2 The first MOSFET switch, Q1-Q N The switch is equivalent to the second MOSFET switch. When the LTD circuit needs to be charged, the Q0 switch is turned on and Q1-Q N The switch is turned off, and the DC power is supplied to the capacitor C1-C N When charging; when discharging, Q1-Q N switch is on, Q0 switch is off, diodes D0 and D1-D N The control capacitor discharges through the primary coil and is then transmitted to the load after electromagnetic coupling isolation. N electromagnetic couplings are connected in series at the load end, and the voltage is superimposed to 10kv-50kv.

[0046] The driving voltage of the FPGA chip is 3.3V. To obtain a stable 3.3V voltage, this application scheme adopts a DC-DC conversion circuit. Figure 7As shown, the input bypass capacitor C16 of AMS1117 is 10uF / 50V, the output capacitor C12 is 10uF / 50V, the resistance of R11 is 3000 ohms, and the avalanche diode D20 is used to prevent the power supply from being reversed. The OUT terminal of AMS1117 can output a stable 3.3V voltage.

[0047] The present application converts the timing signal of the FPGA into an optical signal through an optoelectronic isolation module, which can transmit the high-frequency timing signal with maximum fidelity, and the use of optical signal transmission can avoid interference with the electrical signal.

[0048] Furthermore, since the power supply voltage of the FPGA chip is 3.3V, and the photoelectric conversion circuit uses a 3.3V circuit with a slightly weak driving force. This application adopts the following design: the timing signal generated by the FPGA is amplified by a 5V power amplifier, and then the electrical signal is converted into an optical signal through an invisible optical fiber transmitter HFBR-1412, which is then transmitted to the drive circuit and converted into an electrical signal, which is then amplified to drive the power circuit to work. The specific implementation scheme is as follows: Figure 5 and Figure 6 As shown, in some embodiments, the timing signal generated by the FPGA is input into the 74HC14 chip through G15 (1A) and J15 (2A), the VCC terminal of the 74HC14 inputs a 5V voltage, the 1Y pin of the 74HC14 is connected to the 2 of the optical fiber board, and the 2Y pin of the 74HC14 is connected to the 3 of the optical fiber board. When the FPGA chip controls the charging of the LTD circuit, the FPGA outputs a high-level signal (3.3V voltage) input into the G15 (1A) of the 74HC14, and after conversion by the internal circuit of the 74HC14, the 5V voltage is output to the optical fiber board 2 through 1Y, thereby generating a charging signal; when the FPGA chip controls the discharge of the LTD circuit, the FPGA outputs a high-level signal (3.3V voltage) input into the J15 (2A) of the 74HC14, and after conversion by the internal circuit of the 74HC14, the 5V voltage is output to the optical fiber board 3 through 2Y, thereby generating a discharge signal.

[0049] Example 3

[0050] A medical device adopts the nanosecond pulse generator of embodiment 1 or embodiment 2, and the load is an ablation electrode needle.

[0051] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A nanosecond pulse generator based on FPGA control, characterized in that Including power supply system, DC-DC module, pulse forming system, FPGA control system and human-computer interaction system; The power supply system includes a filtering isolation module and a programmable DC power supply; The pulse forming system includes an energy storage capacitor and an LTD high voltage circuit module; The pulse forming module controlled by the output end of the FPGA control system controls the charging of the energy storage capacitor and the discharging of the LTD high-voltage circuit module respectively through the photoelectric isolation circuit, and the input end of the FPGA control system is communicatively connected with the programmable DC power supply and the human-computer interaction system.

2. The nanosecond pulse generator according to claim 1, characterized in that: The filtering isolation module is arranged at the mains power interface, and is used to filter the EMI electromagnetic interference signal transmitted by the mains power and prevent the EMI signal generated by the nanosecond pulse generator from entering the power grid, so as to ensure the safety of the nanosecond pulse generator and the power supply environment.

3. The nanosecond pulse generator according to claim 1, characterized in that: The photoelectric isolation circuit includes a photoelectric coupling unit, the input end of the photoelectric coupling unit is connected to the FPGA control system, the output end of the photoelectric coupling unit is connected to the pulse forming system, and the photoelectric coupling unit is used to transmit the switch control signal to the pulse forming system in one direction through photoelectric conversion.

4. The nanosecond pulse generator according to claim 1, characterized in that: The nanosecond pulse is realized by controlling the first MOSFET switch to be turned on through the photoelectric isolation circuit through the FPGA control system to realize the programmable DC power supply to charge the energy storage capacitor and control the second MOSFET switch to be turned on to realize the discharge of the LTD high-voltage circuit module, thereby outputting a pulse voltage.

5. The nanosecond pulse generator according to claim 1, characterized in that: The FPGA control system is peripherally equipped with a power enhancement circuit to enhance the photoelectric conversion signal.

6. The nanosecond pulse generator according to claim 4, characterized in that: The power boost circuit is a 5V power boost circuit.

7. The nanosecond pulse generator according to claim 1, characterized in that: The LTD high voltage circuit module is discharged and boosted by magnetic core coupling.

8. The nanosecond pulse generator according to claim 1, characterized in that: The LTD high voltage circuit module may be composed of a plurality of groups of LTD circuits.

9. The nanosecond pulse generator according to claim 1, characterized in that: The human-computer interaction system can display the pulse electric field signal information in a graphical interface through a user interface.

10. A medical device comprising an ablation electrode needle, characterized in that: It also includes the nanosecond pulse generator as described in claims 1-9, and the ablation electrode needle is connected to the pulse generator to release the nanosecond pulse signal.

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